BS IEC 61523-4:2015
$215.11
Design and Verification of Low-Power Integrated Circuits
Published By | Publication Date | Number of Pages |
BSI | 2015 | 352 |
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This standard establishes a format used to define the low-power design intent for electronic systems and electronic intellectual property (IP). The format provides the ability to specify the supply network, switches, isolation, retention, and other aspects relevant to power management of an electronic system. The standard defines the relationship between the low-power design specification and the logic design specification captured via other formats [e.g., standard hardware description languages (HDLs)].
Status | Withdrawn |
---|---|
Title | Design and Verification of Low-Power Integrated Circuits |
Publisher | BSI |
Committee | EPL/501 |
Pages | 352 |
Publication Date | 2015-04-30 |
Withdrawn Date | 2024-02-20 |
Replaced By | BS IEC 61523-4:2023 |
ISBN | 978 0 580 88138 1 |
Standard Number | BS IEC 61523-4:2015 |
Identical National Standard Of | IEC 61523-4:2015 |
Descriptors | Information exchange, Interfaces (data processing), Design, Electronic engineering, Computerized control, Integrated circuits |
ICS Codes | 35.060 - Languages used in information technology |
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