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BS EN 16603-20-20:2018

$198.66

Space engineering. Electrical design and interface requirements for power supply

Published By Publication Date Number of Pages
BSI 2018 64
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The target applications covered by this standard are all missions traditionally provided with power distribution and protection by LCLs/RLCLs (science, earth observation, navigation) with exclusion of applications for which the power distribution and protection is provided by fuses (e.g. most of the GEO telecom satellites).

The present standard applies to power distribution by LCLs/RLCLs for power systems, and in general for satellites, required to be Single Point Failure Free.

The present standard document applies exclusively to the main bus power distribution by LCLs/RLCLs to external satellite loads.

A particular case of LCLs (Heater LCLs, or HLCLs) is also treated. The HLCLs are the protections elements of the power distribution to the thermal heaters in a spacecraft.

Internal power system protections of LCLs/RLCLs are not covered.

Paralleling of LCLs to increase power supply line reliability is not covered by the present standard, since this choice does not appreciably change the reliability of the overall function (i.e. LCL plus load).

In fact, a typical reliability figure of the LCL (limited to the loss of its switch-on capability) is 20 FIT or less.

If the load to be connected to the LCL line has a substantial higher failure rate than this, it is not necessary to duplicate the LCL to supply that load.

This standard may be tailored for the specific characteristic and constrains of a space project in conformance with ECSS-S-ST-00.

PDF Catalog

PDF Pages PDF Title
2 undefined
9 1 Scope
10 2 Normative references
11 3 Terms, definitions and abbreviated terms
3.1 Terms from other standards
3.2 Terms specific to the present standard
20 3.3 Abbreviated terms
3.4 Nomenclature
22 4 Principles
4.1 General
4.2 Standard assumptions
23 5 Requirements
5.1 Reference power bus specifications
25 5.2 Functional/Source interface requirements
5.2.1 LCL/HLCL class
5.2.1.1 LCL/HLCL class
5.2.2 RLCL class
5.2.2.1 RLCL class
5.2.3 Current limitation section
5.2.3.1 Range
5.2.3.2 Switch element, position
5.2.3.3 Current sensing element, position
26 5.2.3.4 Current limitation, LCL rating
5.2.3.5 Current limitation, RLCL derating
5.2.4 Trip-off section
5.2.4.1 Range
5.2.5 UVP section
5.2.5.1 Provision
5.2.5.2 Unregulated bus case
5.2.5.3 Centralised protection
27 5.2.6 Telecommand section features
5.2.6.1 Commandability
5.2.6.2 Retrigger function
5.2.6.3 Retrigger ENABLE
5.2.6.4 Retrigger DISABLE
5.2.7 Conditions at start-up/ switch-off
5.2.7.1 Auto ON
5.2.7.2 Auto OFF
28 5.2.7.3 LCL start-up with an internal failure
5.2.7.4 LCL status at start-up
5.2.7.5 LCL start-up on SC 1
5.2.7.6 LCL start-up on SC 2
5.2.7.7 Switch-off
5.2.8 Telemetry section
5.2.8.1 LCL status
29 5.2.8.2 Current telemetry
5.2.8.3 Current telemetry, full scale reading
5.2.8.4 Current telemetry, linearity and accuracy
5.2.8.5 Current telemetry, offset
5.2.8.6 Current telemetry, reading at zero current
5.2.8.7 Current telemetry, verification
30 5.2.9 Status section
5.2.9.1 LCL status under failed conditions
5.2.10 Repetitive overload
5.2.10.1 LCL case
5.2.10.2 RLCL case
5.2.11 Reverse current tolerance
5.2.11.1 Reverse current tolerance
31 5.2.12 Parallel connection
5.2.12.1 LCLs in parallel
5.2.12.2 LCLs in parallel and current sharing
5.2.12.3 LCLs in parallel and trip-off
5.2.12.4 LCLs in parallel and ON/OFF command
5.2.12.5 LCLs in parallel and current telemetry
5.2.13 Switching options
5.2.13.1 No additional switching capability
32 5.2.13.2 No additional switching capability, negligible load power consumption mode
5.2.13.3 Additional switching capability
5.2.13.4 Additional switching capability, location of additional switch
5.2.13.5 Additional switching capability, UVP acting on additional switch
33 5.2.14 LCL Switch dissipative failure
5.2.14.1 Steady state condition
5.2.14.2 Transient condition
5.2.14.3 Local protection
34 5.2.15 Loss of LCL lines
5.2.15.1 Loss of LCL lines
5.2.16 Noise immunity
5.2.16.1 General
5.2.16.2 Verification
5.2.17 Output impedance envelope, when in limitation
5.2.17.1 Value
35 5.2.17.2 Verification
5.2.18 Noise immunity feature
5.2.18.1 RLCL spurious switch-off
5.2.18.2 RLCL spurious effects
5.2.19 Output LCL load (Input load characteristic)
5.2.19.1 Load inductance
5.2.19.2 Load capacitance
36 5.3 Functional/Load interface requirements
5.3.1 Nominal feature
5.3.1.1 Load behaviour
5.3.2 Switch-on
5.3.2.1 Load behaviour 1
5.3.2.2 Load behaviour 2
5.3.2.3 Input filter charging
37 5.3.3 LCL switch dissipative failure
5.3.3.1 Steady state condition, load
5.3.4 Load test condition
5.3.4.1 Load test condition
5.3.5 User UVP at bus input side
5.3.5.1 User UVP at bus input side
38 5.4 Performance/Source interface requirements
5.4.1 Overall requirements
5.4.1.1 Current overshoot
5.4.1.2 Reverse current tolerance
39 5.4.1.3 Leakage current
5.4.1.4 Time interval between successive ON commands
5.4.2 Start-up/Switch-off requirements
5.4.2.1 Start-up current rate
5.4.2.2 Switch-off current rate
5.4.2.3 Load input filter charge time
5.4.2.4 Output, auto start OFF, amplitude
40 5.4.2.5 Output, auto start OFF, duration
5.4.3 UVP
5.4.3.1 Switch-off threshold, regulated bus
5.4.3.2 Switch-off threshold, unregulated bus
5.4.3.3 UVP noise immunity
5.4.3.4 UVP noise immunity, verification
41 5.4.3.5 UVP hysteresis
5.4.4 Switch-on capability
5.4.4.1 Enable ON threshold Voltage, regulated bus
5.4.4.2 Enable ON threshold Voltage, unregulated bus
5.4.4.3 Switch-on response time, value
5.4.4.4 Switch-on response time, verification
42 5.4.5 Voltage drop
5.4.5.1 Voltage drop
5.4.6 Stability
5.4.6.1 Frequency domain, phase margin
5.4.6.2 Frequency domain, gain margin
5.4.6.3 Time domain, transient from non-limiting mode to current limitation mode
43 5.4.6.4 Time domain, start-up transient to current limitation mode
5.4.7 Current Telemetry, accuracy
5.4.7.1 Current Telemetry, accuracy
5.4.8 Current Telemetry, offset
5.4.8.1 Current Telemetry, offset
44 5.4.9 Retrigger interval
5.4.9.1 Retrigger interval
5.4.10 dI/dt limit on retrigger ON edge
5.4.10.1 dI/dt limit on retrigger ON edge
5.4.11 dI/dt limit on retrigger OFF edge
5.4.11.1 dI/dt limit on retrigger OFF edge
5.4.12 Status, accuracy
5.4.12.1 Nominal condition
45 5.5 Performance/Load interface requirements
5.5.1 Load reverse current
5.5.1.1 Avoidance
5.5.1.2 Reinjection current
5.5.2 Load characteristic
5.5.2.1 Maximum inductance
5.5.2.2 Maximum capacitance
46 5.5.2.3 Load impedance envelope
5.5.3 Source-load characteristic
5.5.3.1 Source-load impedance phase margin
5.5.3.2 Source-load impedance gain margin
5.5.4 Start-up surge input current
5.5.4.1 Start-up surge input current
47 5.5.5 Internal load Input current limitation
5.5.5.1 Internal load Input current limitation
BS EN 16603-20-20:2018
$198.66