BS EN IEC 61643-341:2020
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Components for low-voltage surge protection – Performance requirements and test circuits for thyristor surge suppressors (TSS)
| Published By | Publication Date | Number of Pages |
| BSI | 2020 | 82 |
IEC 61643-341:2020 specifies standard test circuits and methods for thyristor surge suppressor (TSS) components. These surge protective components, SPCs, are specially formulated thyristors designed to limit overvoltages and divert surge currents by clamping and switching actions. These SPCs are used in the construction of surge protective devices (SPDs) and equipment used in Information & Communications Technologies (ICT) networks with voltages up to AC 1 000 V and DC 1 500 V. This document is applicable to gated or non-gated TSS components with third quadrant (-v and โi) characteristics of blocking, conducting or switching. This document contains information on – terminology; – letter symbols; – essential ratings and characteristics; – rating verification and characteristic measurement; This document does not apply to the conventional three-terminal thyristors as covered by IEC 60747-6. This second edition of IEC 61643-341 cancels and replaces the first edition published in 2001. This edition constitutes a technical revision.This edition includes the following significant technical changes with respect to the previous edition: Addition of performance values.
PDF Catalog
| PDF Pages | PDF Title |
|---|---|
| 2 | undefined |
| 5 | Annex ZA(normative)Normative references to international publicationswith their corresponding European publications |
| 7 | English CONTENTS |
| 11 | FOREWORD |
| 13 | 1 Scope 2 Normative references 3 Terms, definitions, abbreviated terms and symbols |
| 14 | 3.1 Parametric terms, letter symbols and definitions 3.2 General terms 3.3 Main terminal ratings |
| 16 | 3.4 Main terminal characteristics |
| 17 | 3.5 Additional and derived parameters 3.6 Temperature related parameters |
| 18 | 3.7 Gate terminal parameters |
| 20 | 3.8 Abbreviated terms 3.9 Circuit symbols Figures Figure 1 โ Fixed voltage, two terminals: a) reverse blocking and b) reverse conducting |
| 21 | 4 TSS types Figure 2 โ Gated reverse blocking: a) P gate b) N gate and c) P & N gate Figure 3 โ Gated reverse conducting: a) P gate and b) N gate Figure 4 โ Bidirectional: a) 2 terminal fixed voltage and b) gated |
| 22 | Figure 5 โ Switching quadrant characteristics: a) fixed-voltage TSS and b) gated TSS Figure 6 โ TSS non-switching characteristics: a) reverse blocking b) reverse conducting Tables Table 1 โ Types of TSS |
| 23 | 5 Service conditions 5.1 Normal service conditions 5.2 Storage temperature range, Tstgmin.to Tstgmax. 6 Mechanical requirements and identification 6.1 Robustness of terminations 6.2 Solderability 6.3 Marking 6.4 Documentation |
| 24 | 7 Standard test methods 7.1 Failure rates 7.2 Test conditions 7.2.1 General 7.2.2 Standard atmospheric conditions |
| 25 | 7.2.3 Measurement errors 7.2.4 Measurement accuracy 7.2.5 Designated impulse shape and values 7.2.6 Multiple TSS 7.2.7 Gated TSS testing 7.3 Rating test procedures 7.3.1 General |
| 26 | 7.3.2 Repetitive peak off-state voltage, VDRM 7.3.3 Repetitive peak on-state current, ITRM Figure 7 โ Test circuit for verifying repetitive peak off-state voltage (VDRM) Figure 8 โ Test circuit for verifying repetitive peak on-state current, ITRM |
| 27 | 7.3.4 Non-repetitive peak on-state current, ITSM Figure 9 โ Repetitive peak on-state current waveforms |
| 28 | 7.3.5 Non-repetitive peak pulse current, IPP Figure 10 โ Test circuit for verifying non-repetitive peak on-state current, ITSM |
| 29 | 7.3.6 Repetitive peak reverse voltage, VRRM 7.3.7 Non-repetitive surge forward current, IFSM 7.3.8 Repetitive peak forward current, IFRM Figure 11 โ Test circuit for verifying non-repetitive peak pulse current, IPP |
| 30 | 7.3.9 Critical rate of rise of on-state current, di/dt Figure 12 โ Test circuit for verifying critical rate of rise of on-state current (di/dt) |
| 31 | 7.4 Characteristic test procedures 7.4.1 General 7.4.2 Off-state current, ID Figure 13 โ Half sine-wave di/dt test circuit |
| 32 | 7.4.3 Repetitive peak off-state current, IDRM 7.4.4 Repetitive peak reverse current, IRRM 7.4.5 Breakover voltage, V(BO) and current, I(BO) Figure 14 โ Test circuit for off-state current, ID at VD |
| 33 | Figure 15 โ Test circuit for breakover, V(BO) and I(BO) and on-state voltage, VT Figure 16 โ Voltage and current waveforms versus time for a fixed-voltage TSS showing switch-on, on-state and switch-off events |
| 34 | 7.4.6 On-state voltage, VT Table 2 โ Breakover ramp rate test values |
| 35 | Figure 17 โ Waveform expansions of Figure 16 |
| 36 | Figure 18 โ Voltage and current waveforms versus time for a gated TSS showing switch-on, on-state and switch-off events |
| 37 | Figure 19 โ Waveform expansions of Figure 18 |
| 38 | 7.4.7 Holding current, IH Figure 20 โ Test circuit for holding current, IH |
| 39 | 7.4.8 Off-state capacitance, Co Figure 21 โ Test circuit for holding current with additional DC bias Figure 22 โ Test circuit for capacitance measurement |
| 40 | Figure 23 โ Test circuit for capacitance measurement with external DC bias |
| 41 | Figure 24 โ Test circuit for capacitance measurement of multi-terminal TSS |
| 42 | 7.4.9 Forward voltage, VF 7.4.10 Peak forward recovery voltage, VFRM Figure 25 โ Diode voltage and current waveforms versus time showing VFRM and rising current di/dt |
| 43 | 7.4.11 Critical rate of off-state voltage rise, dv/dt 7.4.12 Variation of holding current with temperature 7.4.13 Gate-to-adjacent terminal peak off-state voltage and peak off-state gate current, VGDM, IGDM Figure 26 โ Test circuit for exponential critical rate of off-state voltage rise, dv/dt |
| 44 | 7.4.14 Gate reverse current, adjacent terminal open, IGAO, IGKO Figure 27 โ Test circuit for gate-to-adjacent terminal peak off-statevoltage and current, VGDM and IGDM Figure 28 โ Test circuit for gate reverse current, adjacent terminal open, IGAO, IGKO |
| 45 | 7.4.15 Gate reverse current, main terminals short-circuited, IGAS, IGKS Figure 29 โ Test circuit for gate reverse current,main terminals short-circuited, IGAS, IGKS |
| 46 | Annex A (informative) Common impulse waveshapes A.1 General A.2 Types of impulse generator A.3 Impulse generator parameters A.3.1 Glossary of terms |
| 47 | A.3.2 Virtual parameters |
| 48 | Figure A.1 โ Current or voltage impulse amplitude versus time showing a 10 % to 90 % T1 front time and T2 time to half value Figure A.2 โ Voltage impulse amplitude versus time showing a 30 % to 90 % T1 front time and T2 time to half value |
| 49 | A.4 Impulse generators typically used for surge protector testing A.4.1 General A.4.2 Impulse generators with a defined voltage waveform A.4.3 Impulse generators with a defined current waveform Table A.1 โ Voltage impulse generators |
| 50 | A.4.4 Generators with defined voltage and current waveforms Table A.2 โ Current impulse generators |
| 51 | Table A.3 โ Voltage and current impulse generators |
| 52 | Table A.4 โ Other voltage and current impulse generators |
| 53 | Annex B (informative) Glossary of IEC 60747-6 [10] thyristor terms B.1 General B.2 Thyristor types |
| 54 | B.3 Basic terms defining the static voltage-current characteristics of triode thyristors |
| 56 | B.4 Basic terms defining the static voltage-current characteristics of diode thyristors |
| 57 | B.5 Particulars of the static voltage-current characteristics of triode and diode thyristors Figure B.1 โ Particulars of the static characteristic of unidirectional thyristors |
| 58 | Figure B.2 โ Particulars of the static characteristic of bidirectional thyristors |
| 59 | B.6 Terms related to ratings and characteristics; principal voltages |
| 60 | B.7 Terms related to ratings and characteristics; principal currents |
| 62 | B.8 Terms related to ratings and characteristics; gate voltages and currents |
| 64 | B.9 Terms related to ratings and characteristics; powers, energies and losses |
| 65 | Figure B.3 โ a) Approximation of the on-state VT-IT characteristicb) Approximation of the reverse VR-IR characteristic |
| 66 | B.10 Letter symbols B.10.1 General Table B.1 โ Additional general subscripts |
| 67 | B.10.2 List of letter symbols Table B.2 โ Principal voltages, anode-cathode voltages Table B.3 โ Principal currents, anode currents, cathode currents |
| 68 | Table B.4 โ Gate voltages Table B.5 โ Gate currents Table B.6 โ Sundry quantities Table B.7 โ Power loss |
| 69 | Annex C (informative) Additional parametric tests C.1 General C.2 Temperature derating C.3 Thermal resistance, Rth |
| 70 | C.4 Transient thermal impedance, Zth(t) Figure C.1 โ Test circuit for thermal resistance and impedance |
| 71 | C.5 Gate reverse current, on-state, IGAT, IGKT Figure C.2 โ Thermal impedance versus time |
| 72 | C.6 Gate reverse current, forward conducting state, IGAF, IGKF Figure C.3 โ Test circuit for gate reverse current, on-state, IGAT, IGKT |
| 73 | C.7 Gate switching charge, QGS Figure C.4 โ Test circuit for gate reverse current, forward conducting state, IGAF, IGKF |
| 74 | Figure C.5 โ Test circuit for gate switching current, gate switching charge andgate-to-adjacent terminal breakover voltage, IGSM, QGS, VGK(BO), VGA(BO) |
| 75 | C.8 Peak gate switching current, IGSM Figure C.6 โ Test circuit of an integrated gate diode TSS for gate switching current,gate switching charge and gate-to-adjacent terminal breakovervoltage IGSM, QGS, VGK(BO), VGA(BO) |
| 76 | C.9 Gate-to-adjacent terminal breakover voltage, VGK(BO), VGA(BO) Figure C.7 โ Overall and expanded clamping waveforms for a P-type gate TSS showing VGK(BO) and QGS measurement (diK/dt = 10 A/ยตs, VGG = โ72 V) |
| 77 | Annex D (normative) Preferred values D.1 General D.2 V(BO) and VDRM Figure D.1 โ V(BO)/VDRM ratio against VDRM |
| 78 | D.3 CO, VDRM and IPP Figure D.2 โ V(BO) vs VDRM Figure D.3 โ Capacitance variation with DC bias |
| 79 | D.4 IH D.5 IPP and time to half value (duration) Figure D.4 โ IPP versus Duration for various 10/1 000 current ratings |
| 80 | Bibliography |
