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BS EN IEC 63093-13:2019

BS EN IEC 63093-13:2019

$142.49

Ferrite cores. Guidelines on dimensions and the limits of surface irregularities – PQ-cores

Published By Publication Date Number of Pages
BSI 2019 28
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This part of IEC 63093 specifies the dimensions that are of importance for mechanical interchangeability for a preferred range of PQ-cores and low-profile PQI-cores made of ferrite, and the locations of their terminal pins on a 2,54 mm printed wiring grid in relation to the base outlines of the cores. It also gives guidance on allowable limits of surface irregularities applicable to PQ-cores in accordance with the relevant generic specification.

The selection of core sizes for this document is based on the philosophy of including those sizes which are industrial standards, either by inclusion in a national standard, or by broad-based use in industry.

This document is a specification useful in the negotiations between ferrite core manufacturers and customers about surface irregularities.

The general considerations that the design of this range of cores is based upon are given in Annex A.

PDF Catalog

PDF Pages PDF Title
2 undefined
5 Annex ZA(normative)Normative references to international publicationswith their corresponding European publications
7 English
CONTENTS
9 FOREWORD
11 1 Scope
2 Normative references
3 Terms and definitions
12 4 Primary dimensions
4.1 General
4.2 Dimensions of PQ-cores
4.2.1 Principal dimensions
4.2.2 Effective parameter and Amin values
4.3 Dimensional limits for coil formers
4.4 Pin locations and base outlines
4.5 Pin diameter
Figures
Figure 1 – Dimensions of PQ-cores
13 Tables
Table 1 – Dimensions of PQ-cores
14 Figure 2 – Dimensions of low-profile PQI-cores
Table 2 – Dimensions of low-profile PQI-cores
15 Table 3 – Effective parameter and Amin values for PQ-cores
Table 4 – Effective parameter and Amin values for low-profile PQI-cores
16 Figure 3 – Main dimensions of coil formers for PQ-cores
Table 5 – Dimensional limits for coil formers for PQ-cores
17 5 Mounting
Figure 4 – Pin locations and base outlines viewed from the upper side of the board
18 6 Definitions and limits of surface irregularities
6.1 General
6.2 Examples of surface irregularities
6.3 Chips and ragged edges
6.3.1 General
6.3.2 Chips and ragged edges located on the mating surface
Figure 5 – Examples of surface irregularities
19 6.3.3 Chips and ragged edges located on the other surfaces
Figure 6 – Chips and ragged edges locations
20 Table 6 – Area and length reference of irregularities for visual inspection
21 6.4 Cracks
Figure 7 – Cracks locations
Table 7 – Limits for cracks
22 6.5 Pull-out
6.6 Crystallites
6.7 Flash
Figure 8 – Pull-out location
Figure 9 – Crystallite location
23 6.8 Pores
Figure 10 – Flash location
Figure 11 – Pore location
24 Annex A (informative)PQ-cores design
25 Annex B (informative)Examples of allowable areas of chips
Table B.1 – Allowable areas of chips in mm2
26 Annex C (normative)Example of a gauge to check the dimensions of PQ-coresmeeting the primary dimensions
C.1 General
Figure C.1 – Gauge dimensions
Table C.1 – Gauge dimensions
27 C.2 Procedure and requirements

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BS EN IEC 63093-13:2019
$142.49