BS IEC 62014-5:2015
$189.07
Quality of Electronic and Software Intellectual Property Used in System and System on Chip (SoC) Designs
Published By | Publication Date | Number of Pages |
BSI | 2015 | 46 |
This specification defines a standard XML format for representing electronic design intellectual property (IP) quality information, based on an information model for IP quality measurement. It includes a schema and the terms that are relevant for measuring IP quality, including the software that executes on the system. The schema and information model can be focused to represent particular categories of interest to IP users. In the context of this document, the term IP shall be used to mean electronic design intellectual property. Electronic design intellectual property is a term used in the electronic design community to refer to a reusable collection of design specifications that represent the behavior, properties, and/or representation of the design in various media.
PDF Catalog
PDF Pages | PDF Title |
---|---|
4 | Contents |
10 | Introduction |
13 | 1.3 Design environment 1.4 QIP-compliant enabled implementations |
14 | 1.5 Conventions used |
17 | 1.6 Use of color in this standard 1.7 Contents of this standard |
18 | 2. Normative references 3. Definitions, acronyms, and abbreviations 3.1 Definitions |
19 | 3.2 Acronyms and abbreviations 4. Interoperability use model |
20 | 4.1 Roles and responsibilities 4.2 IP exchange flows |
21 | 5. QIP schema structures 5.1 QIP schema structure for golden XML |
25 | 5.2 QIP schema structure for the answer XML |
27 | 5.3 Tooling requirements for operating on golden XML |
31 | 5.4 Relationship between golden XML and completed XML |
32 | 5.5 User extensions |
33 | 6. Compatibility with VSIA QIP |
35 | Annex A (informative) Bibliography |
36 | Annex B (normative) Semantic consistency rules |
43 | Annex C (inforrmative) IEEE List of Participants |