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BS IEC 62951-9:2022

$79.05

Semiconductor devices. Flexible and stretchable semiconductor devices – Performance testing methods of one transistor and one resistor (1T1R) resistive memory cells

Published By Publication Date Number of Pages
BSI 2022 22
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PDF Catalog

PDF Pages PDF Title
2 undefined
4 CONTENTS
5 FOREWORD
7 1 Scope
2 Normative references
3 Terms and definitions
9 4 Device under testing (DUT)
10 5 Test method
5.1 General
5.2 Test equipment and tools
5.2.1 General
Figures
Figure 1 ā€“ 1T1R resistive memory cell
11 5.2.2 Read
Figure 2 ā€“ Block diagram of the measurement setup of 1T1R resistive memory cells
Figure 3 ā€“ Read operation of 1T1R resistive memory cell
12 5.2.3 Forming
Figure 4 ā€“ Cumulative probability distribution of HRSand LRS of 1T1R resistive memory cells
13 5.2.4 SET programming
Figure 5 ā€“ Forming operation of 1T1R resistive memory cell
Figure 6 ā€“ Simulation test flow chart of the forming process
14 5.2.5 RESET programming
Figure 7 ā€“ SET operation of 1T1R resistive memory cell
Figure 8 ā€“ Simulation test flow chart of the SET operation of 1T1R resistive memory cell
15 Figure 9 ā€“ RESET operation of 1T1R resistive memory cell
Figure 10 ā€“ Simulation test flow chart of the RESET operationof 1T1R resistive memory cell
16 5.2.6 Endurance
Figure 11 ā€“ Cumulative resistance distribution of 1T1R resistive memory
17 Figure 12 ā€“ Simulation test flow chart of the endurance testof 1T1R resistive memory cell
Figure 13 ā€“ Exemplary endurance data of a 1T1R resistive memory cell
18 5.2.7 Retention
Figure 14 ā€“ Simulation test flow chart of retention propertyof 1T1R resistive memory cells
Figure 15 ā€“ Exemplary retention characteristics of 1T1R resistive memory cells
19 5.3 Test report
20 Bibliography
BS IEC 62951-9:2022
$79.05