BSI 24/30488910 DC:2024 Edition
$13.70
BS EN IEC 61189-3-302. Test methods for electrical materials, printed board and other interconnection structures and assemblies – Part 3-302. Detection of plating defects in unpopulated circuit boards by computed tomography (CT)
Published By | Publication Date | Number of Pages |
BSI | 2024 | 18 |
PDF Catalog
PDF Pages | PDF Title |
---|---|
6 | FOREWORD |
8 | 1. Scope 2. 2.Normative references 3. Terms and definitions 4. Test principle |
9 | 5. Equipment 5.1 X-ray CT scanner 5.1.1X-ray source system 5.1.2 Mechanical Scanning Systems 5.1.3 Detector Systems 5.1.4 Shielding Facilities 5.2 Software Systems 6. Test environment |
10 | 7. Test the steps 7.1 Equipment Preparation 7.2 Sample clamping 7.3 Parameter Settings 7.3.1 X-ray sources 7.3.2 Scanning Methods 7.3.3 Scanning the Field of View 7.3.4 Number of Frames Scanned 7.3.5 Scan Time |
11 | 7.4 Scanning 7.5 Image Reconstruction 7.5.1 3D Reconstruction 7.5.2 Image Quality 7.5.3 Visualization 7.5.4 Image Analysis and data processing 7.5.5 Image Saving 8. Reports 8.1 Basic Information 8.2 Device Information 8.3 Sample Information 8.4 Sweep Parameters |
12 | 8.5 Measurement results |
13 | A.1 Typical image of plating voids A.2 Typical image of copper filling defects A.3 Typical image of rough plating |
14 | A.4 Typical image of nodulation A.5 Typical image of plating folds A.6 Typical image of interlayer coincidence |
16 | B.1 Void Identification B.1.1 Principle B.1.2 Via B.1.3 Fill hole |
17 | B.2 Statistical analysis B.2.1 Number of voids B.2.2 Calculated the maximum length of the voids/board thickness ratio B.2.3 Calculated filled holes void rate |
18 | Bibliography |