BSI PD IEC/TR 62834:2013
$167.15
IEC nanoelectronics standardization roadmap
| Published By | Publication Date | Number of Pages |
| BSI | 2013 | 36 |
1 Scope
This Technical Report covers nanomaterials and nanoscale devices. To achieve consensus more quickly when building the roadmap, an ICT “More Moore” area has been adopted for the priority standardization items of this first version, as shown in Table 1.
Table 1 – Categories and detail potential products
PDF Catalog
| PDF Pages | PDF Title |
|---|---|
| 4 | CONTENTS |
| 6 | FOREWORD |
| 8 | INTRODUCTION Figures Figure 1 – Roadmap format |
| 9 | 1 Scope Tables Table 1 – Categories and detail potential products |
| 10 | 2 Background 2.1 General Figure 2 – Technologies and related products |
| 11 | 2.2 Classification of nanotechnology 2.2.1 General 2.2.2 Nanomaterials 2.2.3 Nanoscale devices 2.2.4 Nano-biotechnology 2.2.5 Nanofabrication process – Equipment – Measurement 3 Current status and prospects 3.1 Related markets Figure 3 – Interaction of product, technology and standardization roadmaps |
| 12 | 3.2 Technology development directions for nanomaterials 3.2.1 General |
| 13 | 3.2.2 World leading group status Figure 4 – ISO 229 WG3 roadmap for standardization of nanomaterials: www.nanosafe.org |
| 14 | 3.2.3 Nanopore materials 3.2.4 Nanocomposite materials 3.3 Overall technology status and prospects of nanoelectronic devices |
| 15 | 4 Nanomaterials technology, scenario and standardization roadmap 4.1 Technology 4.1.1 Classification of nanomaterials |
| 16 | 4.1.2 Standardization items of zero dimensional nanomaterials Table 2 – Classification of nanomaterials Table 3 – Characteristics to be considered in developing standards for nanoparticles |
| 17 | 4.1.3 Standardization items of one-dimensional nanomaterials Table 4 – Characteristics to be considered in developing standards for quantum dot Table 5 – Characteristics to be considered in developing standards for CNT |
| 18 | 4.1.4 Standardization items of two-dimensional nanomaterials Table 6 – Characteristics to be considered in developing standards for nanowires Table 7 – Characteristics to be considered in developing standards for nanostructured thin film |
| 19 | 4.1.5 Standardization items of three-dimensional nanomaterial Table 8 – Characteristics to be considered indeveloping standards for nanostructured thin films Table 9 – Characteristics to be considered in developing standards for nanopores |
| 20 | 4.2 Scenarios 4.2.1 Scenario for nanoparticles (or nanopowders) 4.2.2 Scenario for quantum dots Table 10 – Characteristics to be considered in developing standards for nanocomposite materials |
| 21 | 4.2.3 Scenario for carbon nanotubes |
| 22 | 4.2.4 Scenario for nanowires 4.2.5 Scenario for nanostructured thin films |
| 23 | 4.2.6 Scenario for sheet resistance characterization of CNT films 4.2.7 Scenario for wear resistance and exposure test of CNT films |
| 24 | 4.2.8 Scenario for thermal characterization of CNT films 4.2.9 Scenario for graphene |
| 25 | 4.2.10 Scenario for nanopores 4.2.11 Scenario for nanocomposite materials Table 11 – Matrix for graphene characterization |
| 26 | 4.3 Roadmap of standardization of nanomaterials (2009-2020) 5 Nanoelectronic devices technology, scenario and standardization roadmap 5.1 Technology 5.1.1 Nanoscale non-volatile memory devices 5.1.2 New nanomaterial or new nanostructure for nanoelectronic devices 5.1.3 Three-dimensional nanoscale transistors |
| 27 | 5.1.4 Single electron transistors 5.1.5 Nanoscale logic devices 5.1.6 Carbon interconnects 5.1.7 Nanoscale magnetic devices 5.1.8 Molecular devices 5.2 Scenario 5.2.1 Scenario for nanoscale non-volatile memory devices |
| 28 | 5.2.2 Scenario for nanostructure electronic materials 5.2.3 Scenario for nanoscale interconnects (CNT) |
| 29 | 5.2.4 Scenario for one-dimensional nanoscale transistors 5.2.5 Scenario for three-dimensional nanoscale transistors Figure 5 – Estimated resistance of 50 nm-diameter vias dependent on the filling rate of CNTs in a via hole for 1 nm-diameter SWNT, 3 nm-diameter3-walled MWNT, and 5 nm-diameter 6-walled MWNT |
| 30 | 5.2.6 Scenario for single electron transistors 5.2.7 Scenario for key control characteristics of nanoscale logic devices 5.2.8 Scenario for molecular devices 5.3 Standardization roadmap of nanoelectronic devices (2009-2020) |
| 32 | Figure 6 – Roadmap for standardization of nanomaterials (2009-2020) |
| 33 | Figure 7 – Roadmap for standardization of nanoelectronic devices (2009-2020) |
| 34 | Bibliography |
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BSI PD IEC/TR 62834:2013
IEC nanoelectronics standardization roadmap Published By Publication Date Number of Pages BSI 2013 36
