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BSI PD IEC/TS 62878-2-4:2015

BSI PD IEC/TS 62878-2-4:2015

$167.15

Device embedded substrate – Guidelines. Test element groups (TEG)

Published By Publication Date Number of Pages
BSI 2015 40
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This part of IEC 62878 describes the test element group devices useful when measuring basic properties of device embedded substrates.

This part of IEC 62878 is applicable to device embedded substrates fabricated by use of organic base material, which include for example active or passive devices, discrete components formed in the fabrication process of electronic wiring board, and sheet formed components.

The IEC 62878 series neither applies to the re-distribution layer (RDL) nor to the electronic modules defined as an M-type business model in IEC 62421.

PDF Catalog

PDF Pages PDF Title
4 English
CONTENTS
6 FOREWORD
8 INTRODUCTION
9 1 Scope
2 Normative references
3 Terms, definitions and abbreviations
3.1 Terms and definitions
3.2 Abbreviations
4 Test conditions and sample preparation
4.1 General
4.2 Test conditions
4.2.1 Classification of tests and evaluation
10 4.2.2 Measuring environment
4.2.3 Test methods
4.3 Test specimens and number of specimens
4.3.1 Specimen
Tables
Table 1 – Application and embedded device
Table 2 – Measuring environment
11 4.3.2 Number of specimens
4.3.3 Test report
5 TEG
5.1 Preparation of the TEG
12 Figures
Figure 1 – Area array arrangement – TEG for conductor resistivity and via-to-via insulation
13 Figure 2 – Area array arrangement – TEG for insulation measurement of resistance between conductors and insulation resistance between layers
14 Figure 3 – Chip arrangement in a shot
15 Figure 4 – Shot arrangement in a wafer
16 Figure 5 – Pitch chip specification of peripheral terminal of 60(m TEG
17 Figure 6 – Peripheral arrangement of TEG for complex tests
18 Figure 7 – Chip arrangement in a shot
Figure 8 – Shot arrangement in a wafer
19 5.2 Structures of TEG
Figure 9 – Structure of test board and pad connection
Figure 10 – Structure of a test board and via connection
20 5.3 Test pattern guide
5.3.1 Test items
Table 3 – Test items
21 5.3.2 Area array arrangement of TEG for an active device
Figure 11 – Area array arrangement
22 5.3.3 Peripheral arrangement of TEG
Table 4 – Terminal dimensions
23 Figure 12 – Peripheral arrangement of TEG
Table 5 – Detailed dimensions of the peripheral arrangement of TEG
24 Figure 13 – Example of pad arrangement of peripherals
Table 6 – Detailed dimensions of the peripheral arrangement of pad connections
25 5.3.4 TEG size for active devices
Figure 14 – TEG size of active device
26 5.3.5 TEG for passive devices
5.3.6 Complex test pattern for the area arrangement, TEG-A
Figure 15 – TEG for passive device
Table 7 – Dimension of passive device TEG
27 Figure 16 – Test pattern for conduction and insulation resistance between vias (seen from L6)
Table 8 – Dimensions of the area array arrangement of TEG-A
28 Figure 17 – Complex test patterns for conduction and via-to-via insulation
29 5.3.7 Complex pattern for area arrangement of TEG-B
Figure 18 – Test patterns for insulation between conductor and between layers in an area array arrangement
Table 9 – Dimensions of TEG-B for the area array arrangement
30 Figure 19 – Complex test patterns for L1 to L6 for insulation between conductors and layers
31 5.3.8 Complex test pattern for peripheral arrangement
Figure 20 – L1 to L6 complex test patterns for the peripheral arrangement
32 5.3.9 Complex test pattern for passive components
Figure 21 – Conduction test patterns for L1 to L6 of passive components
33 Figure 22 – Insulation test patterns between terminals for L1 to L6 of passive components
34 Figure 23 – Interlayer insulation test patterns of L1 to L6 of passive components
35 5.3.10 Guide of measurement terminals of a complex test pattern for an active device
Figure 24 – Terminal arrangement (1) for measurement and evaluation using complex pattern for an active device
36 5.3.11 Terminal arrangement using complex patterns
Figure 25 – Terminal arrangement (2) for measurement and evaluation using complex pattern for an active device
37 Figure 26 – Terminal arrangement for measurement and evaluation using complex pattern for passive device
Figure 27 – Terminal arrangement for measurement and evaluation using complex pattern for device embedded substrate
38 Bibliography

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BSI PD IEC/TS 62878-2-4:2015
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