Behavioural languages – Part 1-1: VHDL Language Reference Manual:2011 Edition

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Behavioural languages – Part 1-1: VHDL Language Reference Manual

Published By	Publication Date	Number of Pages
IEEE	2011	648

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PDF Catalog

PDF Pages	PDF Title
1	IEC 616191-1-1-2011 Front cover
5	CONTENTS
11	FOREWORD
15	IEEE Standard VHDL Language Reference Manual
19	1. Overview of this standard 1.1 Scope 1.2 Purpose
20	1.3 Structure and terminology of this standard
23	2. Normative references
25	3. Design entities and configurations 3.1 General 3.2 Entity declarations
28	3.3 Architecture bodies
31	3.4 Configuration declarations
37	4. Subprograms and packages 4.1 General 4.2 Subprogram declarations
41	4.3 Subprogram bodies
44	4.4 Subprogram instantiation declarations 4.5 Subprogram overloading
47	4.6 Resolution functions
48	4.7 Package declarations
49	4.8 Package bodies
51	4.9 Package instantiation declarations
52	4.10 Conformance rules
53	5. Types 5.1 General
54	5.2 Scalar types
62	5.3 Composite types
71	5.4 Access types
73	5.5 File types
76	5.6 Protected types
79	5.7 String representations
81	6. Declarations 6.1 General
82	6.2 Type declarations 6.3 Subtype declarations
84	6.4 Objects
91	6.5 Interface declarations
107	6.6 Alias declarations
110	6.7 Attribute declarations
111	6.8 Component declarations 6.9 Group template declarations 6.10 Group declarations
112	6.11 PSL clock declarations
113	7. Specifications 7.1 General 7.2 Attribute specification
116	7.3 Configuration specification
121	7.4 Disconnection specification
125	8. Names 8.1 General
126	8.2 Simple names 8.3 Selected names
129	8.4 Indexed names
130	8.5 Slice names 8.6 Attribute names
131	8.7 External names
135	9. Expressions 9.1 General
136	9.2 Operators
149	9.3 Operands
157	9.4 Static expressions
160	9.5 Universal expressions
163	10. Sequential statements 10.1 General 10.2 Wait statement
165	10.3 Assertion statement
166	10.4 Report statement
167	10.5 Signal assignment statement
178	10.6 Variable assignment statement
181	10.7 Procedure call statement
182	10.8 If statement 10.9 Case statement
184	10.10 Loop statement
185	10.11 Next statement 10.12 Exit statement
186	10.13 Return statement 10.14 Null statement
187	11. Concurrent statements 11.1 General 11.2 Block statement
188	11.3 Process statement
190	11.4 Concurrent procedure call statements
191	11.5 Concurrent assertion statements
192	11.6 Concurrent signal assignment statements
194	11.7 Component instantiation statements
200	11.8 Generate statements
203	12. Scope and visibility 12.1 Declarative region 12.2 Scope of declarations
205	12.3 Visibility
209	12.4 Use clauses
210	12.5 The context of overload resolution
213	13. Design units and their analysis 13.1 Design units 13.2 Design libraries
215	13.3 Context declarations 13.4 Context clauses
216	13.5 Order of analysis
217	14. Elaboration and execution 14.1 General 14.2 Elaboration of a design hierarchy
220	14.3 Elaboration of a block, package, or subprogram header
223	14.4 Elaboration of a declarative part
228	14.5 Elaboration of a statement part
231	14.6 Dynamic elaboration
232	14.7 Execution of a model
243	15. Lexical elements 15.1 General 15.2 Character set
245	15.3 Lexical elements, separators, and delimiters
247	15.4 Identifiers
248	15.5 Abstract literals
249	15.6 Character literals 15.7 String literals
250	15.8 Bit string literals
252	15.9 Comments
253	15.10 Reserved words
255	15.11 Tool directives
257	16. Predefined language environment 16.1 General 16.2 Predefined attributes
272	16.3 Package STANDARD
286	16.4 Package TEXTIO
292	16.5 Standard environment package
293	16.6 Standard mathematical packages
294	16.7 Standard multivalue logic package
295	16.8 Standard synthesis packages
301	16.9 Standard synthesis context declarations 16.10 Fixed-point package
302	16.11 Floating-point package
303	17. VHDL Procedural Interface overview 17.1 General 17.2 Organization of the interface
304	17.3 Capability sets
306	17.4 Handles
309	18. VHPI access functions 18.1 General 18.2 Information access functions
311	18.3 Property access functions
312	18.4 Access by name function
313	19. VHPI information model 19.1 General 19.2 Formal notation
314	19.3 Class inheritance hierarchy
315	19.4 Name properties
328	19.5 The stdUninstantiated package
331	19.6 The stdHierarchy package
338	19.7 The stdTypes package
340	19.8 The stdExpr package
343	19.9 The stdSpec package
345	19.10 The stdSubprograms package
347	19.11 The stdStmts package
353	19.12 The stdConnectivity package
358	19.13 The stdCallbacks package 19.14 The stdEngine package
359	19.15 The stdForeign package 19.16 The stdMeta package
361	19.17 The stdTool package
362	19.18 Application contexts
363	20. VHPI tool execution 20.1 General 20.2 Registration phase
369	20.3 Analysis phase 20.4 Elaboration phase
371	20.5 Initialization phase 20.6 Simulation phase 20.7 Save phase
372	20.8 Restart phase 20.9 Reset phase
373	20.10 Termination phase
375	21. VHPI callbacks 21.1 General 21.2 Callback functions
377	21.3 Callback reasons
389	22. VHPI value access and update 22.1 General 22.2 Value structures and types
392	22.3 Reading object values
393	22.4 Formatting values
395	22.5 Updating object values
399	22.6 Scheduling transactions on drivers
403	23. VHPI function reference 23.1 General 23.2 vhpi_assert
404	23.3 vhpi_check_error
406	23.4 vhpi_compare_handles
407	23.5 vhpi_control
408	23.6 vhpi_create
410	23.7 vhpi_disable_cb
411	23.8 vhpi_enable_cb
412	23.9 vhpi_format_value
414	23.10 vhpi_get 23.11 vhpi_get_cb_info
415	23.12 vhpi_get_data
417	23.13 vhpi_get_foreignf_info
418	23.14 vhpi_get_next_time
419	23.15 vhpi_get_phys
420	23.16 vhpi_get_real 23.17 vhpi_get_str
421	23.18 vhpi_get_time
422	23.19 vhpi_get_value
423	23.20 vhpi_handle
424	23.21 vhpi_handle_by_index
426	23.22 vhpi_handle_by_name
428	23.23 vhpi_is_printable
429	23.24 vhpi_iterator
430	23.25 vhpi_printf
431	23.26 vhpi_protected_call
433	23.27 vhpi_put_data
435	23.28 vhpi_put_value
436	23.29 vhpi_register_cb
438	23.30 vhpi_register_foreignf
439	23.31 vhpi_release_handle
440	23.32 vhpi_remove_cb
441	23.33 vhpi_scan 23.34 vhpi_schedule_transaction
445	23.35 vhpi_vprintf
447	24. Standard tool directives 24.1 Protect tool directives
465	Annex A (informative) Description of accompanying files
469	Annex B (normative) VHPI header file
495	Annex C (informative) Syntax summary
519	Annex D (informative) Potentially nonportable constructs
521	Annex E (informative) Changes from IEEE Std 1076-2002
529	Annex F (informative) Features under consideration for removal
531	Annex G (informative) Guide to use of standard packages
569	Annex H (informative) Guide to use of protect directives
575	Annex I (informative) Glossary
603	Annex J (informative) Bibliography
605	Annex K (informative) IEEE List of participants
607	Index