IEEE 1014-1987

$75.42

IEEE Standard for A Versatile Backplane Bus: VMEbus

Published By	Publication Date	Number of Pages
IEEE	1987

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Description

New IEEE Standard – Inactive-Reserved. This IEEE 1014 standard specifies a high-performance backplane bus for use in microcomputer systems that employ single or multiple microprocessors is specified. It is based on the VMEbus specification, released by the VME Manufacturers’ Group in August of 1982. The bus includes four subbuses: data transfer bus, priority interrupt bus, arbitration bus, and utility bus. The data transfer bus supports 8-, 16-, and 32-bit transfers over a non-multiplexed 32-bit data and address highway. The transfer protocols are asynchronous and fully handshaken. The priority interrupt bus provides real-time interrupt services to the system. The allocation of bus mastership is performed by the arbitration bus, which allows to implement round robin and prioritized arbitration algorithms. The utility bus provides the system with power-up and power-down synchronization. The mechanical specifications of boards, backplanes, subracks, and enclosures are based on IEC 297 specification, also know as the Euroboard form factor.

PDF Catalog

PDF Pages	PDF Title
1	Title Page
3	Foreword
4	Participants
7	CONTENTS
9	1. Introduction 1.1 Objectives 1.2 Interface System Elements
14	1.3 Specification Diagrams 1.4 Terminology
16	1.5 Protocol
18	2. Data Transfer Bus 2.1 Introduction
19	2.2 Data-Transfer-Bus Lines
26	2.3 DTB Modules Ñ Basic Description
44	2.4 Typical Operation
51	2.5 Data-Transfer-Bus Acquisition
53	2.6 DTB Timing Rules and Observations
89	3. DTB Arbitration Bus 3.1 Introduction
91	3.2 Arbitration Bus Lines
93	3.3 Functional Modules
100	3.4 Typical Operation
107	3.5 Race Conditions Between Master Requests and Arbiter Grants
108	4. Priority Interrupt Bus 4.1 Introduction
111	4.2 Priority Interrupt Bus lines
114	4.3 Priority Interrupt Bus Modules Ñ Basic Description
124	4.4 Typical Operation
130	4.5 Race Conditions
131	4.6 Priority Interrupt Bus Timing Rules and Observations
150	5. Utility Bus 5.1 Introduction 5.2 Utility Bus Signal Lines 5.3 Utility Bus Modules
154	5.4 System Initialization and Diagnostics
157	5.5 Power Pins
158	5.6 Reserved Line
159	6. Electrical Specifications 6.1 Introduction 6.2 Power Distribution
160	6.3 Electrical Signal Characteristics
161	6.4 Bus Driving and Receiving Requirements
167	6.5 Backplane Signal Line Interconnections
173	6.6 User-Defined Signals 6.7 Signal Line Drivers and Terminations
175	7. Mechanical Specifications 7.1 Introduction
176	7.2 Boards
184	7.3 Front Panels
193	7.4 Backplanes
200	7.5 Assembly of Subracks
203	7.6 Backplane Connectors and Board Connectors
205	Annex A—Glossary
209	Annex B—Signal Line Description
212	Annex C—Use of the SERCLK and SERDAT* Lines
214	Annex D—Metastability and Synchronization
225	Annex E—Permissible Capability Subsets