IEEE 1076-2008

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IEEE Standard VHDL Language Reference Manual

Published By	Publication Date	Number of Pages
IEEE	2008	640

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Description

Revision Standard – Superseded. VHSIC Hardware Description Language (VHDL) is defined. VHDL is a formal notation intended for use in all phases of the creation of electronic systems. Because it is both machine readable and human readable, it supports the development, verification, synthesis, and testing of hardware designs; the communication of hardware design data; and the maintenance, modification, and procurement of hardware. Its primary audiences are the implementors of tools supporting the language and the advanced users of the language. (Additional downloads are available for this standard at https://standards.ieee.org/content/dam/ieee-standards/standards/web/download/1076-2008_downloads.zip)

PDF Catalog

PDF Pages	PDF Title
1	IEEE Std 1076-2008 (Revision of IEEE Std 1076-2002) IEEE Standard VHDL Language Reference Manual
3	Title page
6	Introduction Notice to users Laws and regulations Copyrights
7	Updating of IEEE documents Errata Interpretations Patents Participants
9	Contents
15	Important notice 1. Overview of this standard 1.1 Scope 1.2 Purpose
16	1.3 Structure and terminology of this standard
19	2. Normative references
21	3. Design entities and configurations 3.1 General 3.2 Entity declarations
24	3.3 Architecture bodies
27	3.4 Configuration declarations
33	4. Subprograms and packages 4.1 General 4.2 Subprogram declarations
37	4.3 Subprogram bodies
40	4.4 Subprogram instantiation declarations 4.5 Subprogram overloading
43	4.6 Resolution functions
44	4.7 Package declarations
45	4.8 Package bodies
47	4.9 Package instantiation declarations
48	4.10 Conformance rules
49	5. Types 5.1 General
50	5.2 Scalar types
58	5.3 Composite types
67	5.4 Access types
69	5.5 File types
72	5.6 Protected types
75	5.7 String representations
77	6. Declarations 6.1 General
78	6.2 Type declarations 6.3 Subtype declarations
80	6.4 Objects
87	6.5 Interface declarations
103	6.6 Alias declarations
106	6.7 Attribute declarations
107	6.8 Component declarations 6.9 Group template declarations 6.10 Group declarations
108	6.11 PSL clock declarations
109	7. Specifications 7.1 General 7.2 Attribute specification
112	7.3 Configuration specification
117	7.4 Disconnection specification
121	8. Names 8.1 General
122	8.2 Simple names 8.3 Selected names
125	8.4 Indexed names
126	8.5 Slice names 8.6 Attribute names
127	8.7 External names
131	9. Expressions 9.1 General
132	9.2 Operators
145	9.3 Operands
153	9.4 Static expressions
156	9.5 Universal expressions
159	10. Sequential statements 10.1 General 10.2 Wait statement
161	10.3 Assertion statement
162	10.4 Report statement
163	10.5 Signal assignment statement
174	10.6 Variable assignment statement
177	10.7 Procedure call statement
178	10.8 If statement 10.9 Case statement
180	10.10 Loop statement
181	10.11 Next statement 10.12 Exit statement
182	10.13 Return statement 10.14 Null statement
183	11. Concurrent statements 11.1 General 11.2 Block statement
184	11.3 Process statement
186	11.4 Concurrent procedure call statements
187	11.5 Concurrent assertion statements
188	11.6 Concurrent signal assignment statements
190	11.7 Component instantiation statements
196	11.8 Generate statements
199	12. Scope and visibility 12.1 Declarative region 12.2 Scope of declarations
201	12.3 Visibility
205	12.4 Use clauses
206	12.5 The context of overload resolution
209	13. Design units and their analysis 13.1 Design units 13.2 Design libraries
211	13.3 Context declarations 13.4 Context clauses
212	13.5 Order of analysis
213	14. Elaboration and execution 14.1 General 14.2 Elaboration of a design hierarchy
216	14.3 Elaboration of a block, package, or subprogram header
219	14.4 Elaboration of a declarative part
224	14.5 Elaboration of a statement part
227	14.6 Dynamic elaboration
228	14.7 Execution of a model
239	15. Lexical elements 15.1 General 15.2 Character set
241	15.3 Lexical elements, separators, and delimiters
243	15.4 Identifiers
244	15.5 Abstract literals
245	15.6 Character literals 15.7 String literals
246	15.8 Bit string literals
248	15.9 Comments
249	15.10 Reserved words
251	15.11 Tool directives
253	16. Predefined language environment 16.1 General 16.2 Predefined attributes
268	16.3 Package STANDARD
282	16.4 Package TEXTIO
288	16.5 Standard environment package
289	16.6 Standard mathematical packages
290	16.7 Standard multivalue logic package
291	16.8 Standard synthesis packages
297	16.9 Standard synthesis context declarations 16.10 Fixed-point package
298	16.11 Floating-point package
299	17. VHDL Procedural Interface overview 17.1 General 17.2 Organization of the interface
300	17.3 Capability sets
302	17.4 Handles
305	18. VHPI access functions 18.1 General 18.2 Information access functions
307	18.3 Property access functions
308	18.4 Access by name function
309	19. VHPI information model 19.1 General 19.2 Formal notation
310	19.3 Class inheritance hierarchy
311	19.4 Name properties
324	19.5 The stdUninstantiated package
327	19.6 The stdHierarchy package
334	19.7 The stdTypes package
336	19.8 The stdExpr package
339	19.9 The stdSpec package
341	19.10 The stdSubprograms package
343	19.11 The stdStmts package
349	19.12 The stdConnectivity package
354	19.13 The stdCallbacks package 19.14 The stdEngine package
355	19.15 The stdForeign package 19.16 The stdMeta package
357	19.17 The stdTool package
358	19.18 Application contexts
359	20. VHPI tool execution 20.1 General 20.2 Registration phase
365	20.3 Analysis phase 20.4 Elaboration phase
367	20.5 Initialization phase 20.6 Simulation phase 20.7 Save phase
368	20.8 Restart phase 20.9 Reset phase
369	20.10 Termination phase
371	21. VHPI callbacks 21.1 General 21.2 Callback functions
373	21.3 Callback reasons
385	22. VHPI value access and update 22.1 General 22.2 Value structures and types
388	22.3 Reading object values
389	22.4 Formatting values
391	22.5 Updating object values
395	22.6 Scheduling transactions on drivers
399	23. VHPI function reference 23.1 General 23.2 vhpi_assert
400	23.3 vhpi_check_error
402	23.4 vhpi_compare_handles
403	23.5 vhpi_control
404	23.6 vhpi_create
406	23.7 vhpi_disable_cb
407	23.8 vhpi_enable_cb
408	23.9 vhpi_format_value
410	23.10 vhpi_get 23.11 vhpi_get_cb_info
411	23.12 vhpi_get_data
413	23.13 vhpi_get_foreignf_info
414	23.14 vhpi_get_next_time
415	23.15 vhpi_get_phys
416	23.16 vhpi_get_real 23.17 vhpi_get_str
417	23.18 vhpi_get_time
418	23.19 vhpi_get_value
419	23.20 vhpi_handle
420	23.21 vhpi_handle_by_index
422	23.22 vhpi_handle_by_name
424	23.23 vhpi_is_printable
425	23.24 vhpi_iterator
426	23.25 vhpi_printf
427	23.26 vhpi_protected_call
429	23.27 vhpi_put_data
431	23.28 vhpi_put_value
432	23.29 vhpi_register_cb
433	23.30 vhpi_register_foreignf
435	23.31 vhpi_release_handle
436	23.32 vhpi_remove_cb 23.33 vhpi_scan
437	23.34 vhpi_schedule_transaction
440	23.35 vhpi_vprintf
443	24. Standard tool directives 24.1 Protect tool directives
461	Annex A (informative) Description of accompanying files
465	Annex B (normative) VHPI header file
491	Annex C (informative) Syntax summary
515	Annex D (informative) Potentially nonportable constructs
517	Annex E (informative) Changes from IEEE Std 1076-2002
525	Annex F (informative) Features under consideration for removal
527	Annex G (informative) Guide to use of standard packages
565	Annex H (informative) Guide to use of protect directives
571	Annex I (informative) Glossary
599	Annex J (informative) Bibliography
601	Index A
603	B
605	C
607	D
610	E
613	F
615	G
616	H
617	I
619	J-K-L
621	M-N
623	O
624	P
627	Q
628	R
629	S
634	T
636	U
637	V
640	W-X-Z