IEEE 1076.4 1996
$70.42
IEEE Standard VITAL Application-Specific Integrated Circuit (ASIC) Modeling Specification
| Published By | Publication Date | Number of Pages |
| IEEE | 1996 | 81 |
New IEEE Standard – Inactive – Superseded. Superseded by 1076.4-2000. The VITAL (VHDL Initiative Towards ASIC Libraries) ASIC Modeling Specification is defined. It creates a methodology that promotes the development of highly accurate, efficient simulation models for ASIC (Application-Specific Integrated Circuit) components in VHDL. You will receive an email from Customer Service with the URL needed to access this publication online.
PDF Catalog
| PDF Pages | PDF Title |
|---|---|
| 1 | Title Page |
| 3 | Introduction |
| 4 | Participants |
| 8 | CONTENTS |
| 11 | 1. Overview 1.1 Intent and scope of this standard 1.2 Structure and terminology of this standard 1.3 Syntactic description |
| 13 | 1.4 Semantic description 1.5 Front matter, examples, figures, notes, and annexes |
| 14 | 2. References |
| 15 | 3. Basic elements of the VITAL ASIC modeling 3.1 VITAL modeling levels and compliance |
| 16 | 3.2 VITAL standard packages 3.3 VITAL specification for timing data insertion |
| 18 | 4. The VITAL Level 0 specification 4.1 The VITAL_Level0 attribute 4.2 General usage rules |
| 19 | 4.3 The VITAL Level 0 entity interface |
| 27 | 4.4 The VITAL Level 0 architecture body |
| 29 | 5. Backannotation 5.1 Backannotation methods |
| 30 | 5.2 The VITAL SDF map |
| 43 | 6. The VITAL Level 1 specification 6.1 The VITAL_Level1 attribute 6.2 The VITAL Level 1 architecture body |
| 44 | 6.3 The VITAL Level 1 architecture declarative part 6.4 The VITAL Level 1 architecture statement part |
| 53 | 7. Predefined primitives and tables 7.1 VITAL logic primitives |
| 55 | 7.2 VitalResolve 7.3 VITAL table primitives |
| 61 | 8. Timing constraints 8.1 Timing check procedures |
| 63 | 8.2 Modeling negative timing constraints |
| 69 | 9. Delay selection 9.1 VITAL delay types and subtypes |
| 70 | 9.2 Transition-dependent delay selection 9.3 Glitch handling |
| 71 | 9.4 Path delay procedures |
| 73 | 9.5 Delay selection in VITAL primitives 9.6 VitalExtendToFillDelay |
| 75 | 10. The VITAL standard packages |
| 76 | Annex A—Syntax summary |
| 80 | Annex B—Glossary |
| 81 | Annex C—Bibliography |
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