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IEEE 1355 1996

$58.50

IEEE Standard for Heterogeneous InterConnect (HIC), (Low-Cost, Low-Latency Scalable Serial Interconnect for Parallel System Construction)

Published By Publication Date Number of Pages
IEEE 1996 147
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New IEEE Standard – Inactive – Withdrawn. Withdrawn Standard. Withdrawn Date: Jan 25, 2005. Enabling the construction of high-performance, scalable, modular, parallel systems with low system integration cost is discussed. Complementary use of physical connectors and cables, electrical properties, and logical protocols for point-to-point serial scalable interconnect, operating at speeds of 10-200 Mb/s and at 1 Gb/s in copper and optic technologies, is described.

PDF Catalog

PDF Pages PDF Title
1 Title Page
2 Copyright Page
5 Introduction
Participants
8 CONTENTS
11 1. Overview
1.1 Scope
1.2 Purpose
2. References
13 3. Definitions
3.1 General
3.2 Glossary
16 4. Physical media and logical layers
4.1 Physical media
17 4.2 Logical layers
20 4.3 Interaction of layers
22 4.4 Implementations defined in the standard
24 5. DS-SE and DS-DE
5.1 General
5.2 DS-SE: physical medium
25 5.3 DS-SE signal level
30 5.4 DS-DE: physical medium
35 5.5 DS-DE signal level
37 5.6 DS-SE and DS-DE character level
39 5.7 DS-SE and DS-DE exchange level
42 6. TS-FO-02 fiber optic link
6.1 Physical medium
44 6.2 Signal level
46 6.3 TS-FO character level
51 7. HS-SE-10
7.1 HS-SE physical medium
55 7.2 HS-SE signal level
58 7.3 HS character level (8B/12B code)
75 7.4 HS exchange level
83 8. HS-FO-10 fiber optic link
8.1 Physical medium
85 8.2 Signal level
87 8.3 Character level end exchange level
9. Common packet level
9.1 General discussion
88 9.2 Packet format
89 9.3 Networks and routing
9.4 Error detection, recovery, and reporting
10. Conformance criteria
10.1 Conformance statements
10.2 Definition of subsets
90 10.3 Conformance statements and cable markings
91 Annex A (Normative) DS-DE connector specification
98 Annex B (Normative) HS-SE connector specification
103 Annex C (Normative) TS-FO and HS-FO connector specifications
117 Annex D (Informative) Rationale
121 Annex E (Informative) Switch chips, switches, and fabrics
122 Annex F (Informative) Use of the transaction layer—Asynchronous transfer mode (ATM) example
131 Annex G (Informative) Error handling
132 Annex H (Informative) Flow control calculations
134 Annex I (Informative) Synchronized channel communications
137 Annex J (Informative) Example DS-SE driver circuit
139 Annex K (Informative) DS-DE optional power supply recommendation
140 Annex L (Informative) DS-DE fixed connector PCB recommendation
141 Annex M (Informative) DS-DE cable (10 core) recommendation
142 Annex N (Informative) DS-DE multiway connector housing recommendation
143 Annex O (Informative) HS-SE fixed connector PCB recommendation
144 Annex P (Informative) HS-SE cable recommendation
145 Annex Q (Informative) HS-SE connector multiway housing recommendation
146 Annex R (Informative)TS/HS-FO connector PCB and front panel cut-out recommendation
147 Annex S (Informative) TS/HS-FO fiber cable recommendation
IEEE 1355 1996
$58.50