IEEE 1450.1 2005
$150.04
(Replaced) IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std. 1450-1999) for Semiconductor Design Environments
Published By | Publication Date | Number of Pages |
IEEE | 2005 | 124 |
New IEEE Standard – Active. Replaced by IEC 62526 Ed. 1 (2007-11).Standard Test Interface Language (STIL) provides an interface between digital test generation tools and test equipment. Extensions to the test interface language (contained in this standard) are defined that (1) facilitate the use of the language in the design environment and (2) facilitate the use of the language for large designs encompassing subdesigns with reusable patterns.
PDF Catalog
PDF Pages | PDF Title |
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3 | IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450TM-1999) fo… |
5 | Introduction Notice to users |
6 | Participants |
7 | Contents |
11 | IEEE Standard for Extensions to Standard Test Interface Language (STIL) (IEEE Std 1450TM-1999) fo… 1. Overview |
12 | 1.1 Scope |
13 | 1.2 Purpose 2. Definitions, acronyms, and abbreviations 2.1 Definitions |
14 | 2.2 Acronyms and abbreviations 3. Structure of this standard |
15 | 4. STIL syntax description 4.1 Reserved words |
16 | 4.2 Reserved characters |
17 | 4.3 Reserved UserFunctions |
18 | 4.4 Signal and group name characteristics 4.5 STIL name spaces and name resolution |
19 | 5. Expressions 5.1 Constant and variable expressions 5.2 Expression delimiters—single quotes and parentheses |
21 | 5.3 Arithmetic expressions—integer, real, time, boolean |
22 | 5.4 Pattern data expressions |
24 | 5.5 Expression processing |
28 | 5.6 Boolean—boolean_expr 5.7 Integers—integer_expr |
29 | 5.8 Logic expressions—logic_expr |
30 | 5.9 Real expressions—real_expr |
31 | 5.10 Addition to timing expressions—time_expr |
32 | 5.11 SignalVariables—sigvar_expr |
34 | 5.12 Formal parameters in procedures and macros 5.13 Integer lists—integer_list |
35 | 6. Statement structure and organization of STIL information 7. STIL statement |
36 | 7.1 STIL syntax 7.2 STIL example 8. UserKeywords statement 8.1 UserKeywords syntax 8.2 UserKeywords example |
37 | 9. Variables block 9.1 Variables block syntax |
39 | 9.2 Variables example 9.3 Variables scoping |
41 | 9.4 Variables synchronizing |
42 | 10. Signals block |
43 | 10.1 Signals block syntax 10.2 Signals example |
44 | 10.3 Bracketed signal notation enhancement |
45 | 11. SignalGroups block 11.1 SignalGroups syntax 11.2 SignalGroups, WFCMap, and Variables example |
46 | 11.3 Default WFCMap attribute value 11.4 Defining indexed signal groups |
47 | 12. PatternBurst block 12.1 PatternBurst syntax |
49 | 12.2 PatternBurst example |
50 | 12.3 Tiling and synchronization of patterns |
52 | 12.4 If and While statements |
53 | 13. Timing block and WaveformTable block 13.1 Additional domain specification 13.2 CompareSubstitute operation—s, S |
54 | 14. ScanStructures block 14.1 ScanStructures syntax |
57 | 14.2 Scan cell naming—cell_ref, chain_ref, cell_group, chain_group |
58 | 14.3 Scoping rules for ScanStructure blocks |
59 | 14.4 Example indexed list of scan cells 14.5 Example of ScanChainGroups and ActiveScanChain |
61 | 14.6 Scan chain segments and cell groups |
62 | 15. Pattern data |
63 | 15.1 Data content read back—C, D, E, S, U, W |
65 | 15.2 Vector data mapping and joining—m, j |
67 | 15.3 Specifying event data in a pattern—e |
68 | 15.4 Using expressions within pattern data |
69 | 16. Pattern statements 16.1 Additional Pattern syntax |
71 | 16.2 Vector data constraints—F, E |
72 | 16.3 Shift and LoopData statements |
74 | 16.4 Loop statement using an integer expression |
75 | 16.5 MergedScan function 17. Procedure and macro data substitution 17.1 Nested procedure and macro cells |
76 | 17.2 Passing parameters to variables |
77 | 17.3 Default value of formal parameters 17.4 Data substitution using WFCConstant and SignalVariable |
79 | 18. Environment block 18.1 Environment syntax |
81 | 18.2 MAP_STRING syntax 18.3 NameMaps example |
83 | 18.4 Compact scan-cell mapping using InheritNameMap |
84 | 19. Pragma block 19.1 Pragma syntax 20. PatternFailReport |
85 | 20.1 PatternFailReport syntax |
86 | 20.2 PatternFailReport example |
88 | Annex A (informative) Glossary |
89 | Annex B (informative) Signal mapping using SignalVariables |
93 | Annex C (informative) Using logic expression with signals |
94 | Annex D (informative) Using boolean expressions in patterns |
95 | Annex E (informative) Variables and expressions in algorithmic patterns |
97 | Annex F (informative) Using AllowInterleave |
100 | Annex G (informative) Vector data mapping using m |
103 | Annex H (informative) Vector data joining using j |
106 | Annex I (informative) Block data collection |
108 | Annex J (informative) Using Fixed and Equivalent statements |
110 | Annex K (informative) Independent parallel patterns |
112 | Annex L (informative) Applications using new ScanStructures syntax |
116 | Annex M (informative) BreakPoints using MergedScan() function |
119 | Annex N (informative) Labels and X statements for diagnostic feedback |
122 | Annex O (informative) Use of STIL.1 for specific applications |
124 | Annex P (informative) Bibliography |