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IEEE 1687-2014

$161.96

IEEE Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device

Published By Publication Date Number of Pages
IEEE 2014 283
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New IEEE Standard – Active. A methodology for accessing instrumentation embedded within a semiconductor device, without defining the instruments or their features themselves, via the IEEE 1149.1(TM) test access port (TAP) and/or other signals, is described in this standard. The elements of the methodology include a hardware architecture for the on-chip network connecting the instruments to the chip pins, a hardware description language to describe this network, and a software language and protocol for communicating with the instruments via this network.

PDF Catalog

PDF Pages PDF Title
1 IEEE Std 1687-2014 Front cover
5 Important Notices and Disclaimers Concerning IEEE Standards Documents
8 Participants
11 Introduction
12 Contents
15 IMPORTANT NOTICE
1. Overview
1.1 Scope
1.2 Purpose
16 1.3 Background
1.4 Organization
17 1.5 Context
18 2. Normative references
3. Definitions, acronyms, and abbreviations
3.1 Definitions
24 3.2 Acronyms and abbreviations
25 4. Technology
4.1 Introduction
4.2 Serial access networks
32 4.3 On-chip instruments
33 5. Hardware architecture
5.1 Introduction to the IEEE 1687 network
5.2 Hierarchical IEEE 1687 networks
36 5.3 Controller
5.4 Instrument interface
37 5.5 Access network
44 5.6 Test data register
48 5.7 Local reset
52 5.8 Delivery and integration of instruments
53 5.9 Embedded TAP controller
58 5.10 Definitions of the structure of IEEE 1687 hardware architecture
59 5.11 Port functions of a module
61 5.12 Signals between and within IEEE 1687 modules
62 5.13 Components comprising a module
64 5.14 TAP finite state machine embedded in an IEEE 1687 module
67 5.15 Access network behavior
5.16 Plug-and-play interfaces
70 6. Instrument Connectivity Language (ICL)
6.1 ICL introduction
71 6.2 ICL overview
73 6.3 ICL lexical conventions and definitions
87 6.4 ICL primitive element keywords and statements
149 6.5 ICL informational statements
155 6.6 ICL connectivity
6.7 Inferring information in implicit ICL
156 6.8 Active values for control signals
157 7. Procedural Description Language (PDL): level-0
7.1 Purpose
7.2 PDL levels
158 7.3 Basic PDL concepts
161 7.4 Retargeting of PDL
163 7.5 PDL level-0 overview
166 7.6 PDL general rules
168 7.7 Generic PDL tokens
169 7.8 PDL numbers
171 7.9 PDL level-0 commands
196 8. Procedural Description Language: level-1 (Tcl)
8.1 Purpose
8.2 Tcl command extensions
197 8.3 PDL level-1 overview
8.4 PDL level-1 commands
203 8.5 PDL level-1 example
204 Annex A (informative) ICL grammar
A.1 Conventions
A.2 ICL language definition
213 Annex B (informative) PDL level-0 grammar
B.1 Conventions
B.2 Grammar
217 Annex C (informative) PDL level-1 grammar
218 Annex D (informative) PDL differences between IEEE Std 1687-2014 and IEEE Std 1149.1-2013
D.1 Introduction
D.2 PDL level-0 command differences
220 D.3 PDL level-1 commands
221 D.4 General operation differences
222 D.5 Creating interoperable PDL
226 Annex E (informative) Examples
E.1 Example context
228 E.2 Instrument example
229 E.3 Scan register example
231 E.4 Wrapped instrument example
232 E.5 Daisy-chain example
233 E.6 SIB_mux_pre component example
234 E.7 Single SIB example
235 E.8 Multiple SIB example
236 E.9 Scan muxes with local control example
238 E.10 Scan muxes with remote control example
239 E.11 Nested SIB example: mux_pre
241 E.12 BAD Nested SIB example: mux_post
242 E.13 Exclusive access example: implicit ICL
243 E.14 Exclusive access example: explicit ICL
244 E.15 Exclusive access with broadcast example
246 E.16 Broadcast or daisy-chain example
247 E.17 Branched scan chain example
248 E.18 Branched-then-merged scan chain example
250 E.19 IEEE 1500 wrapper serial port
251 E.20 IEEE 1500 WSP with SWIR bit included
253 E.21 Single embedded TAP controller (eTAPC) example
254 E.22 Basic PDL for a simple instrument
256 E.23 MBIST engine example
257 E.24 MBIST and associated memory example
258 E.25 Combined MBIST and memory example
260 E.26 Addressable instruments
261 E.27 Black-box module
262 E.28 Wide scan interface example
263 E.29 Simple IEEE 1149.1 AccessLink example
264 E.30 Complex IEEE 1149.1 AccessLink example
267 E.31 Generic AccessLink example
269 Annex F (informative) Design guidance
F.1 Introduction
F.2 Scan register implementations
275 F.3 Scan multiplexers
281 Annex G (informative) Bibliography
283 Back cover
IEEE 1687-2014
$161.96