IEEE 1754 1995

$146.79

IEEE Standard for a 32-bit Microprocessor Architecture

Published By	Publication Date	Number of Pages
IEEE	1995	282

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Description

New IEEE Standard – Inactive – Withdrawn. A 32-bit microprocessor architecture, available to a wide variety of manufacturers and users, is defined. The standard includes the definition of the instruction set, register model, data types, instruction op-codes, and coprocessor interface. You will receive an email from Customer Service with the URL needed to access this publication online.

PDF Catalog

PDF Pages	PDF Title
1	Title page
3	Introduction
5	Committee lists
9	Contents
17	1. Overview
21	2. Definitions, special word usage, abbreviations, and acronyms
25	3. Architectural overview
31	4. Data formats
39	5. Registers
57	6. Instructions
71	7. Traps
83	Annex A—Instruction definitions
147	Annex B—ISP descriptions
175	Annex C—IEEE 754 implementation requirements for IEEE 1754
179	Annex D—IEEE 1754 implementation dependencies
193	Annex E—Opcodes and condition codes
199	Annex F—IEEE 1754 Reference MMU architecture
217	Annex G—Suggested ASI assignments
225	Annex H—Example integer multiplication and division routines
241	Annex I—Suggested assembly language syntax
247	Annex J—Software considerations
259	Annex K—Instruction set summary
263	Annex L—Non-IEEE 1754 architectural extensions
265	Annex M—Bibliography
267	Index