IEEE 802.3-2015
$522.71
IEEE Standard for Ethernet
Published By | Publication Date | Number of Pages |
IEEE | 2015 | 699 |
Revision Standard – Superseded. Ethernet local area network operation is specified for selected speeds of operation from 1 Mb/s to 100 Gb/s using a common media access control (MAC) specification and management information base (MIB). The Carrier Sense Multiple Access with Collision Detection (CSMA/CD) MAC protocol specifies shared medium (half duplex) operation, as well as full duplex operation. Speed specific Media Independent Interfaces (MIIs) allow use of selected Physical Layer devices (PHY) for operation over coaxial, twisted pair or fiber optic cables, or electrical backplanes. System considerations for multisegment shared access networks describe the use of Repeaters which are defined for operational speeds up to 1000 Mb/s. Local Area Network (LAN) operation is supported at all speeds. Other specified capabilities include: various PHY types for access networks, PHYs suitable for metropolitan area network applications, and the provision of power over selected twisted pair PHY types.
PDF Catalog
PDF Pages | PDF Title |
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1 | IEEE Standard for Ethernet SECTION SIX Contents |
32 | 78. Energy-Efficient Ethernet (EEE) 78.1 Overview 78.1.1 LPI Signaling |
33 | 78.1.1.1 Reconciliation sublayer service interfaces 78.1.1.2 Responsibilities of LPI Client 78.1.2 LPI Client service interface |
34 | 78.1.2.1 LP_IDLE.request 78.1.2.1.1 Function 78.1.2.1.2 Semantics of the service primitive 78.1.2.1.3 When generated 78.1.2.1.4 Effect of receipt 78.1.2.2 LP_IDLE.indication 78.1.2.2.1 Function 78.1.2.2.2 Semantics of the service primitive 78.1.2.2.3 When generated |
35 | 78.1.2.2.4 Effect of receipt 78.1.3 Reconciliation sublayer operation 78.1.3.1 RS LPI assert function |
36 | 78.1.3.2 LPI detect function 78.1.3.3 PHY LPI operation 78.1.3.3.1 PHY LPI transmit operation |
37 | 78.1.3.3.2 PHY LPI receive operation |
38 | 78.1.4 PHY types optionally supporting EEE |
39 | 78.2 LPI mode timing parameters description |
40 | 78.3 Capabilities Negotiation 78.4 Data Link Layer Capabilities |
41 | 78.4.1 Data Link Layer capabilities timing requirements |
42 | 78.4.2 Control state diagrams 78.4.2.1 Conventions 78.4.2.2 Constants 78.4.2.3 Variables |
46 | 78.4.2.4 Functions 78.4.2.5 State diagrams |
50 | 78.4.3 State change procedure across a link |
51 | 78.4.3.1 Transmitting link partner’s state change procedure across a link |
52 | 78.4.3.2 Receiving link partner’s state change procedure across a link |
53 | 78.5 Communication link access latency |
55 | 78.5.1 10 Gb/s PHY extension using XGXS 78.5.2 40 Gb/s and 100 Gb/s PHY extension using XLAUI or CAUI-n |
56 | 78.6 Protocol implementation conformance statement (PICS) proforma for EEE Data Link Layer Capabilities 78.6.1 Introduction 78.6.2 Identification 78.6.2.1 Implementation identification 78.6.2.2 Protocol summary |
57 | 78.6.3 Major capabilities/options 78.6.4 DLL requirements |
58 | 79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements 79.1 Overview 79.1.1 IEEE 802.3 LLDP frame format |
59 | 79.1.1.1 Destination Address field 79.1.1.2 Source Address field 79.1.1.3 Length/Type field 79.1.1.4 LLDPDU field 79.1.1.5 Pad field 79.1.1.6 Frame Check Sequence field 79.2 Requirements of the IEEE 802.3 Organizationally Specific TLV set |
60 | 79.3 IEEE 802.3 Organizationally Specific TLVs 79.3.1 MAC/PHY Configuration/Status TLV 79.3.1.1 Auto-negotiation support/status 79.3.1.2 PMD auto-negotiation advertised capability field |
61 | 79.3.1.3 Operational MAU type 79.3.1.4 MAC/PHY Configuration/Status TLV usage rules 79.3.2 Power Via MDI TLV |
62 | 79.3.2.1 MDI power support 79.3.2.2 PSE power pair 79.3.2.3 Power class 79.3.2.4 Requested power type/source/priority 79.3.2.4.1 Power type |
63 | 79.3.2.4.2 Power source 79.3.2.4.3 Power priority 79.3.2.5 PD requested power value |
64 | 79.3.2.6 PSE allocated power value 79.3.2.7 Power Via MDI TLV usage rules 79.3.3 Link Aggregation TLV (deprecated) |
65 | 79.3.3.1 Aggregation status 79.3.3.2 Aggregated port ID 79.3.3.3 Link Aggregation TLV usage rules 79.3.4 Maximum Frame Size TLV |
66 | 79.3.4.1 Maximum frame size 79.3.4.2 Maximum Frame Size TLV usage rules |
67 | 79.3.5 EEE TLV 79.3.5.1 Transmit Tw 79.3.5.2 Receive Tw 79.3.5.3 Fallback Tw |
68 | 79.3.5.4 Echo Transmit and Receive Tw 79.3.5.5 EEE TLV usage rules 79.3.6 EEE Fast Wake TLV 79.3.6.1 Transmit fast wake 79.3.6.2 Receive fast wake |
69 | 79.3.6.3 Echo of Transmit fast wake and Receive fast wake 79.3.6.4 EEE Fast Wake TLV usage rules 79.4 IEEE 802.3 Organizationally Specific TLV selection management 79.4.1 IEEE 802.3 Organizationally Specific TLV selection variable/LLDP Configuration managed object class cross reference 79.4.2 IEEE 802.3 Organizationally Specific TLV/LLDP Local and Remote System group managed object class cross references |
72 | 79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements 79.5.1 Introduction 79.5.2 Identification 79.5.2.1 Implementation identification 79.5.2.2 Protocol summary |
73 | 79.5.3 Major capabilities/options 79.5.4 IEEE 802.3 Organizationally Specific TLV |
74 | 79.5.5 MAC/PHY Configuration/Status TLV 79.5.6 EEE TLV |
75 | 79.5.7 EEE Fast Wake TLV 79.5.8 Power Via MDI TLV |
76 | 79.5.9 Link Aggregation TLV 79.5.10 Maximum Frame Size TLV |
77 | 80. Introduction to 40 Gb/s and 100 Gb/s networks 80.1 Overview 80.1.1 Scope 80.1.2 Objectives 80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model |
78 | 80.1.4 Nomenclature |
80 | 80.1.5 Physical Layer signaling systems |
81 | 80.2 Summary of 40 Gigabit and 100 Gigabit Ethernet sublayers 80.2.1 Reconciliation Sublayer (RS) and Media Independent Interface 80.2.2 Physical Coding Sublayer (PCS) 80.2.3 Forward Error Correction (FEC) sublayers |
82 | 80.2.4 Physical Medium Attachment (PMA) sublayer 80.2.5 Physical Medium Dependent (PMD) sublayer 80.2.6 Auto-Negotiation 80.2.7 Management interface (MDIO/MDC) 80.2.8 Management 80.3 Service interface specification method and notation |
83 | 80.3.1 Inter-sublayer service interface 80.3.2 Instances of the Inter-sublayer service interface |
84 | 80.3.3 Semantics of inter-sublayer service interface primitives 80.3.3.1 IS_UNITDATA_i.request 80.3.3.1.1 Semantics of the service primitive 80.3.3.1.2 When generated 80.3.3.1.3 Effect of receipt 80.3.3.2 IS_UNITDATA_i.indication |
89 | 80.3.3.2.1 Semantics of the service primitive 80.3.3.2.2 When generated 80.3.3.2.3 Effect of receipt 80.3.3.3 IS_SIGNAL.indication 80.3.3.3.1 Semantics of the service primitive 80.3.3.3.2 When generated 80.3.3.3.3 Effect of receipt 80.3.3.4 IS_TX_MODE.request |
90 | 80.3.3.4.1 Semantics of the service primitive 80.3.3.4.2 When generated 80.3.3.4.3 Effect of receipt 80.3.3.5 IS_RX_MODE.request 80.3.3.5.1 Semantics of the service primitive 80.3.3.5.2 When generated 80.3.3.5.3 Effect of receipt 80.3.3.6 IS_RX_LPI_ACTIVE.request 80.3.3.6.1 Semantics of the service primitive |
91 | 80.3.3.6.2 When generated 80.3.3.6.3 Effect of receipt 80.3.3.7 IS_ENERGY_DETECT.indication 80.3.3.7.1 Semantics of the service primitive 80.3.3.7.2 When generated 80.3.3.7.3 Effect of receipt 80.3.3.8 IS_RX_TX_MODE.indication 80.3.3.8.1 Semantics of the service primitive 80.3.3.8.2 When generated 80.3.3.8.3 Effect of receipt |
92 | 80.4 Delay constraints 80.5 Skew constraints |
99 | 80.6 State diagrams 80.7 Protocol implementation conformance statement (PICS) proforma |
100 | 81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation (XLGMII and CGMII) 81.1 Overview |
101 | 81.1.1 Summary of major concepts 81.1.2 Application 81.1.3 Rate of operation 81.1.4 Delay constraints |
102 | 81.1.5 Allocation of functions 81.1.6 XLGMII/CGMII structure |
103 | 81.1.7 Mapping of XLGMII/CGMII signals to PLS service primitives 81.1.7.1 Mapping of PLS_DATA.request 81.1.7.1.1 Function 81.1.7.1.2 Semantics of the service primitive 81.1.7.1.3 When generated 81.1.7.1.4 Effect of receipt |
104 | 81.1.7.2 Mapping of PLS_DATA.indication 81.1.7.2.1 Function 81.1.7.2.2 Semantics of the service primitive 81.1.7.2.3 When generated 81.1.7.2.4 Effect of receipt 81.1.7.3 Mapping of PLS_CARRIER.indication 81.1.7.4 Mapping of PLS_SIGNAL.indication |
105 | 81.1.7.5 Mapping of PLS_DATA_VALID.indication 81.1.7.5.1 Function 81.1.7.5.2 Semantics of the service primitive 81.1.7.5.3 When generated 81.1.7.5.4 Effect of receipt 81.2 XLGMII/CGMII data stream |
106 | 81.2.1 Inter-frame 81.2.2 Preamble and start of frame delimiter |
107 | 81.2.3 Data 81.2.4 End of frame delimiter 81.2.5 Definition of Start of Packet and End of Packet Delimiters 81.3 XLGMII/CGMII functional specifications 81.3.1 Transmit 81.3.1.1 TX_CLK |
108 | 81.3.1.2 TXC (transmit control) 81.3.1.3 TXD (transmit data) |
110 | 81.3.1.4 Start control character alignment |
111 | 81.3.1.5 Transmit direction LPI transition 81.3.2 Receive 81.3.2.1 RX_CLK (receive clock) |
112 | 81.3.2.2 RXC (receive control) |
113 | 81.3.2.3 RXD (receive data) |
114 | 81.3.2.4 Receive direction LPI transition |
115 | 81.3.3 Error and fault handling 81.3.3.1 Response to error indications by the XLGMII/CGMII 81.3.3.2 Conditions for generation of transmit Error control characters 81.3.3.3 Response to received invalid frame sequences |
116 | 81.3.4 Link fault signaling 81.3.4.1 Variables and counters |
117 | 81.3.4.2 State diagram 81.4 LPI assertion and detection |
119 | 81.4.1 LPI messages 81.4.2 Transmit LPI state diagram 81.4.2.1 Variables and counters |
120 | 81.4.2.2 State Diagram 81.4.3 Considerations for transmit system behavior |
121 | 81.4.4 Considerations for receive system behavior |
122 | 81.5 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation 81.5.1 Introduction 81.5.2 Identification 81.5.2.1 Implementation identification 81.5.2.2 Protocol summary |
123 | 81.5.2.3 Major capabilities/options 81.5.3 PICS proforma tables for Reconciliation Sublayer and Media Independent Interface for 40 Gb/s and 100 Gb/s operation 81.5.3.1 General |
124 | 81.5.3.2 Mapping of PLS service primitives |
125 | 81.5.3.3 Data stream structure 81.5.3.4 XLGMII/CGMII signal functional specifications |
126 | 81.5.3.5 Link fault signaling state diagram 81.5.3.6 LPI functions |
127 | 82. Physical Coding Sublayer (PCS) for 64B/66B, type 40GBASE-R and 100GBASE-R 82.1 Overview 82.1.1 Scope 82.1.2 Relationship of 40GBASE-R and 100GBASE-R to other standards |
128 | 82.1.3 Summary of 40GBASE-R and 100GBASE-R sublayers 82.1.3.1 Physical Coding Sublayer (PCS) |
129 | 82.1.4 Inter-sublayer interfaces 82.1.4.1 PCS service interface (XLGMII/CGMII) 82.1.4.2 Physical Medium Attachment (PMA) or Forward Error Correction (FEC) service interface |
130 | 82.1.5 Functional block diagram |
131 | 82.2 Physical Coding Sublayer (PCS) 82.2.1 Functions within the PCS |
132 | 82.2.2 Use of blocks 82.2.3 64B/66B transmission code 82.2.3.1 Notation conventions |
133 | 82.2.3.2 Transmission order 82.2.3.3 Block structure |
136 | 82.2.3.4 Control codes |
137 | 82.2.3.5 Valid and invalid blocks 82.2.3.6 Idle (/I/) |
138 | 82.2.3.7 Start (/S/) 82.2.3.8 Terminate (/T/) 82.2.3.9 ordered set (/O/) 82.2.3.10 Error (/E/) 82.2.4 Transmit process |
139 | 82.2.5 Scrambler 82.2.6 Block distribution 82.2.7 Alignment marker insertion |
142 | 82.2.8 BIP calculations 82.2.9 Rapid alignment marker insertion |
144 | 82.2.10 PMA or FEC Interface |
145 | 82.2.11 Test-pattern generators 82.2.12 Block synchronization 82.2.13 PCS lane deskew |
146 | 82.2.14 PCS lane reorder 82.2.15 Alignment marker removal 82.2.16 Descrambler 82.2.17 Receive process |
147 | 82.2.18 Test-pattern checker 82.2.19 Detailed functions and state diagrams 82.2.19.1 State diagram conventions 82.2.19.2 State variables 82.2.19.2.1 Constants |
148 | 82.2.19.2.2 Variables |
151 | 82.2.19.2.3 Functions |
152 | 82.2.19.2.4 Counters |
153 | 82.2.19.2.5 Timers |
154 | 82.2.19.3 State diagrams 82.2.19.3.1 LPI state diagrams |
155 | 82.3 PCS Management 82.3.1 PMD MDIO function mapping |
157 | 82.4 Loopback 82.5 Delay constraints 82.6 Auto-Negotiation |
166 | 82.7 Protocol implementation conformance statement (PICS) proforma for Clause 82, Physical Coding Sublayer (PCS) for 64B/66B, type 40GBASE-R and 100GBASE-R 82.7.1 Introduction 82.7.2 Identification 82.7.2.1 Implementation identification 82.7.2.2 Protocol summary |
167 | 82.7.3 Major capabilities/options |
168 | 82.7.4 PICS Proforma Tables for PCS, type 40GBASE-R and 100GBASE-R 82.7.4.1 Coding rules 82.7.4.2 Scrambler and Descrambler 82.7.4.3 Deskew and Reordering |
169 | 82.7.4.4 Alignment Markers 82.7.5 Test-pattern modes 82.7.5.1 Bit order 82.7.6 Management |
170 | 82.7.6.1 State diagrams |
171 | 82.7.6.2 Loopback 82.7.6.3 Delay constraints 82.7.6.4 Auto-Negotiation for Backplane Ethernet functions |
172 | 82.7.6.5 LPI functions |
173 | 83. Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R 83.1 Overview 83.1.1 Scope 83.1.2 Position of the PMA in the 40GBASE-R or 100GBASE-R sublayers 83.1.3 Summary of functions 83.1.4 PMA sublayer positioning |
176 | 83.2 PMA interfaces 83.3 PMA service interface |
179 | 83.4 Service interface below PMA |
180 | 83.5 Functions within the PMA 83.5.1 Per input-lane clock and data recovery 83.5.2 Bit-level multiplexing |
182 | 83.5.3 Skew and Skew Variation 83.5.3.1 Skew generation toward SP0 83.5.3.2 Skew generation toward SP1 83.5.3.3 Skew tolerance at SP1 83.5.3.4 Skew generation toward SP2 83.5.3.5 Skew tolerance at SP5 83.5.3.6 Skew generation at SP6 |
183 | 83.5.3.7 Skew tolerance at SP6 83.5.3.8 Skew generation toward SP7 83.5.4 Delay constraints 83.5.5 Clocking architecture |
184 | 83.5.6 Signal drivers 83.5.7 Link status 83.5.8 PMA local loopback mode 83.5.9 PMA remote loopback mode (optional) |
185 | 83.5.10 PMA test patterns (optional) |
187 | 83.5.11 Energy Efficient Ethernet 83.5.11.1 PMA quiet and alert signals 83.5.11.2 Detection of PMA quiet and alert signals |
188 | 83.5.11.3 Additional transmit functions in the Tx direction |
189 | 83.5.11.4 Additional receive functions in the Tx direction 83.5.11.5 Additional transmit functions in the Rx direction |
190 | 83.5.11.6 Additional receive functions in the Rx direction 83.5.11.7 Support for BASE-R FEC 83.6 PMA MDIO function mapping |
194 | 83.7 Protocol implementation conformance statement (PICS) proforma for Clause 83, Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R 83.7.1 Introduction 83.7.2 Identification 83.7.2.1 Implementation identification 83.7.2.2 Protocol summary |
195 | 83.7.3 Major capabilities/options |
197 | 83.7.4 Skew generation and tolerance 83.7.5 Test patterns |
198 | 83.7.6 Loopback modes 83.7.7 EEE deep sleep with XLAUI/CAUI |
199 | 84. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4 84.1 Overview 84.2 Physical Medium Dependent (PMD) service interface |
201 | 84.3 PCS requirements for Auto-Negotiation (AN) service interface 84.4 Delay constraints 84.5 Skew constraints |
202 | 84.6 PMD MDIO function mapping |
203 | 84.7 PMD functional specifications 84.7.1 Link block diagram 84.7.2 PMD transmit function 84.7.3 PMD receive function |
204 | 84.7.4 Global PMD signal detect function 84.7.5 PMD lane-by-lane signal detect function 84.7.6 Global PMD transmit disable function |
205 | 84.7.7 PMD lane-by-lane transmit disable function 84.7.8 Loopback mode 84.7.9 PMD_fault function 84.7.10 PMD transmit fault function 84.7.11 PMD receive fault function |
206 | 84.7.12 PMD control function 84.8 40GBASE-KR4 electrical characteristics 84.8.1 Transmitter characteristics 84.8.1.1 Test fixture 84.8.2 Receiver characteristics 84.8.2.1 Receiver interference tolerance 84.9 Interconnect characteristics 84.10 Environmental specifications 84.10.1 General safety |
207 | 84.10.2 Network safety 84.10.3 Installation and maintenance guidelines 84.10.4 Electromagnetic compatibility 84.10.5 Temperature and humidity |
208 | 84.11 Protocol implementation conformance statement (PICS) proforma for Clause 84, Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4 84.11.1 Introduction 84.11.2 Identification 84.11.2.1 Implementation identification 84.11.2.2 Protocol summary |
209 | 84.11.3 Major capabilities/options |
210 | 84.11.4 PICS proforma tables for Clause 84, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-KR4 84.11.4.1 PMD functional specifications |
211 | 84.11.4.2 Management functions 84.11.4.3 Transmitter electrical characteristics |
212 | 84.11.4.4 Receiver electrical characteristics 84.11.4.5 Environmental specifications |
213 | 85. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.1 Overview |
214 | 85.2 Physical Medium Dependent (PMD) service interface |
215 | 85.3 PCS requirements for Auto-Negotiation (AN) service interface 85.4 Delay constraints |
216 | 85.5 Skew constraints 85.6 PMD MDIO function mapping |
218 | 85.7 PMD functional specifications 85.7.1 Link block diagram |
220 | 85.7.2 PMD Transmit function 85.7.3 PMD Receive function 85.7.4 Global PMD signal detect function |
221 | 85.7.5 PMD lane-by-lane signal detect function 85.7.6 Global PMD transmit disable function 85.7.7 PMD lane-by-lane transmit disable function 85.7.8 Loopback mode |
222 | 85.7.9 PMD_fault function 85.7.10 PMD transmit fault function 85.7.11 PMD receive fault function 85.7.12 PMD control function 85.8 MDI Electrical specifications for 40GBASE-CR4 and 100GBASE-CR10 85.8.1 Signal levels |
223 | 85.8.2 Signal paths 85.8.3 Transmitter characteristics |
224 | 85.8.3.1 Transmitter differential output return loss 85.8.3.2 Transmitter noise parameter measurements |
225 | 85.8.3.3 Transmitter output waveform |
227 | 85.8.3.3.1 Coefficient initialization 85.8.3.3.2 Coefficient step size 85.8.3.3.3 Coefficient range 85.8.3.3.4 Waveform acquisition 85.8.3.3.5 Linear fit to the waveform measurement at TP2 |
228 | 85.8.3.3.6 Transfer function between the transmit function and TP2 |
229 | 85.8.3.4 Insertion loss TP0 to TP2 or TP3 to TP5 |
230 | 85.8.3.5 Test fixture |
231 | 85.8.3.6 Test fixture impedance 85.8.3.7 Test fixture insertion loss 85.8.3.8 Data dependent jitter (DDJ) 85.8.3.9 Signaling rate range |
232 | 85.8.4 Receiver characteristics at TP3 summary 85.8.4.1 Receiver differential input return loss |
233 | 85.8.4.2 Receiver interference tolerance test 85.8.4.2.1 Test setup |
234 | 85.8.4.2.2 Test channel 85.8.4.2.3 Test channel calibration |
235 | 85.8.4.2.4 Pattern generator 85.8.4.2.5 Test procedure 85.8.4.3 Bit error ratio 85.8.4.4 Signaling rate range 85.8.4.5 AC-coupling |
236 | 85.9 Channel characteristics 85.10 Cable assembly characteristics 85.10.1 Characteristic impedance and reference impedance 85.10.2 Cable assembly insertion loss |
238 | 85.10.3 Cable assembly insertion loss deviation (ILD) |
239 | 85.10.4 Cable assembly return loss |
240 | 85.10.5 Cable assembly multiple disturber near-end crosstalk (MDNEXT) loss 85.10.6 Cable assembly multiple disturber far-end crosstalk (MDFEXT) loss |
241 | 85.10.7 Cable assembly integrated crosstalk noise (ICN) |
243 | 85.10.8 Cable assembly test fixture 85.10.9 Mated test fixtures |
244 | 85.10.9.1 Mated test fixtures insertion loss 85.10.9.2 Mated test fixtures return loss |
245 | 85.10.9.3 Mated test fixtures common-mode conversion loss |
246 | 85.10.9.4 Mated test fixtures integrated crosstalk noise 85.10.10 Shielding 85.10.11 Crossover function |
247 | 85.11 MDI specification 85.11.1 40GBASE-CR4 MDI connectors 85.11.1.1 Style-1 40GBASE-CR4 MDI connectors |
248 | 85.11.1.1.1 Style-1 AC-coupling |
249 | 85.11.1.2 Style-2 40GBASE-CR4 MDI connectors 85.11.1.2.1 Style-2 40GBASE-CR4 Connector pin assignments |
250 | 85.11.2 100GBASE-CR10 MDI connectors |
252 | 85.11.2.1 100GBASE-CR10 MDI AC-coupling 85.11.3 Electronic keying 85.12 Environmental specifications |
253 | 85.13 Protocol implementation conformance statement (PICS) proforma for Clause 85, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.1 Introduction 85.13.2 Identification 85.13.2.1 Implementation identification 85.13.2.2 Protocol summary |
254 | 85.13.3 Major capabilities/options |
255 | 85.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.4.1 PMD functional specifications |
256 | 85.13.4.2 Management functions |
257 | 85.13.4.3 Transmitter specifications 85.13.4.4 Receiver specifications |
258 | 85.13.4.5 Cable assembly specifications |
259 | 85.13.4.6 MDI connector specifications 85.13.4.7 Environmental specifications |
260 | 86. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE–SR4 and 100GBASE–SR10 86.1 Overview |
262 | 86.2 Physical Medium Dependent (PMD) service interface |
263 | 86.3 Delay and Skew 86.3.1 Delay constraints 86.3.2 Skew and Skew Variation constraints 86.4 PMD MDIO function mapping |
264 | 86.5 PMD functional specifications 86.5.1 PMD block diagram |
265 | 86.5.2 PMD transmit function 86.5.3 PMD receive function 86.5.4 PMD global signal detect function |
266 | 86.5.5 PMD lane-by-lane signal detect function 86.5.6 PMD reset function 86.5.7 PMD global transmit disable function (optional) |
267 | 86.5.8 PMD lane-by-lane transmit disable function (optional) 86.5.9 PMD fault function (optional) 86.5.10 PMD transmit fault function (optional) 86.5.11 PMD receive fault function (optional) 86.6 Lane assignments 86.7 PMD to MDI specifications for 40GBASE-SR4 or 100GBASE-SR10 |
268 | 86.7.1 Transmitter optical specifications |
269 | 86.7.2 Characteristics of signal within, and at the receiving end of, a compliant optical channel |
270 | 86.7.3 40GBASE–SR4 or 100GBASE–SR10 receiver optical specifications |
271 | 86.7.4 40GBASE–SR4 or 100GBASE–SR10 illustrative link power budget 86.8 Definitions of optical and dual-use parameters and measurement methods 86.8.1 Test points and compliance boards 86.8.2 Test patterns and related subclauses |
274 | 86.8.2.1 Multi-lane testing considerations 86.8.3 Parameters applicable to both electrical and optical signals 86.8.3.1 Skew and Skew Variation |
275 | 86.8.3.2 Eye diagrams 86.8.3.2.1 Eye mask acceptable hit count examples 86.8.3.3 Jitter 86.8.3.3.1 J2 Jitter 86.8.3.3.2 J9 Jitter |
276 | 86.8.4 Optical parameter definitions 86.8.4.1 Wavelength and spectral width 86.8.4.2 Average optical power 86.8.4.3 Optical Modulation Amplitude (OMA) 86.8.4.4 Transmitter and dispersion penalty (TDP) 86.8.4.5 Extinction ratio 86.8.4.6 Transmitter optical waveform (transmit eye) |
277 | 86.8.4.6.1 Optical transmitter eye mask |
278 | 86.8.4.7 Stressed receiver sensitivity 86.8.4.8 Receiver jitter tolerance |
279 | 86.9 Safety, installation, environment, and labeling 86.9.1 General safety 86.9.2 Laser safety 86.9.3 Installation 86.9.4 Environment 86.9.5 PMD labeling 86.10 Optical channel 86.10.1 Fiber optic cabling model |
280 | 86.10.2 Characteristics of the fiber optic cabling (channel) 86.10.2.1 Optical fiber cable 86.10.2.2 Optical fiber connection |
281 | 86.10.2.2.1 Connection insertion loss 86.10.2.2.2 Maximum discrete reflectance 86.10.3 Medium Dependent Interface (MDI) 86.10.3.1 Optical lane assignments for 40GBASE-SR4 |
282 | 86.10.3.2 Optical lane assignments for 100GBASE-SR10 86.10.3.3 Medium Dependent Interface (MDI) requirements |
284 | 86.11 Protocol implementation conformance statement (PICS) proforma for Clause 86, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE–SR4 and 100GBASE–SR10 86.11.1 Introduction 86.11.2 Identification 86.11.2.1 Implementation identification 86.11.2.2 Protocol summary |
285 | 86.11.3 Major capabilities/options |
286 | 86.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 40GBASE–SR4 and 100GBASE–SR10 86.11.4.1 PMD functional specifications |
287 | 86.11.4.2 Management functions 86.11.4.3 Optical specifications for 40GBASE–SR4 or 100GBASE–SR10 |
288 | 86.11.4.4 Definitions of parameters and measurement methods 86.11.4.5 Environmental and safety specifications |
289 | 86.11.4.6 Optical channel and MDI |
290 | 87. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.1 Overview 87.2 Physical Medium Dependent (PMD) service interface |
292 | 87.3 Delay and Skew 87.3.1 Delay constraints 87.3.2 Skew constraints 87.4 PMD MDIO function mapping 87.5 PMD functional specifications 87.5.1 PMD block diagram |
293 | 87.5.2 PMD transmit function |
294 | 87.5.3 PMD receive function 87.5.4 PMD global signal detect function |
295 | 87.5.5 PMD lane-by-lane signal detect function 87.5.6 PMD reset function 87.5.7 PMD global transmit disable function (optional) 87.5.8 PMD lane-by-lane transmit disable function |
296 | 87.5.9 PMD fault function (optional) 87.5.10 PMD transmit fault function (optional) 87.5.11 PMD receive fault function (optional) 87.6 Wavelength-division-multiplexed lane assignments 87.7 PMD to MDI optical specifications for 40GBASE-LR4 and 40GBASE-ER4 |
297 | 87.7.1 40GBASE-LR4 and 40GBASE-ER4 transmitter optical specifications |
298 | 87.7.2 40GBASE-LR4 and 40GBASE-ER4 receive optical specifications |
299 | 87.7.3 40GBASE-LR4 and 40GBASE-ER4 illustrative link power budgets 87.8 Definition of optical parameters and measurement methods |
300 | 87.8.1 Test patterns for optical parameters |
301 | 87.8.2 Skew and Skew Variation 87.8.3 Wavelength 87.8.4 Average optical power 87.8.5 Optical Modulation Amplitude (OMA) 87.8.6 Transmitter and dispersion penalty 87.8.6.1 Reference transmitter requirements |
302 | 87.8.6.2 Channel requirements 87.8.6.3 Reference receiver requirements |
303 | 87.8.6.4 Test procedure 87.8.7 Extinction ratio 87.8.8 Relative Intensity Noise (RIN20OMA) 87.8.9 Transmitter optical waveform (transmit eye) 87.8.10 Receiver sensitivity 87.8.11 Stressed receiver sensitivity |
304 | 87.8.11.1 Stressed receiver conformance test block diagram |
305 | 87.8.11.2 Stressed receiver conformance test signal characteristics and calibration |
307 | 87.8.11.3 Stressed receiver conformance test signal verification 87.8.11.4 Sinusoidal jitter for receiver conformance test |
308 | 87.8.11.5 Stressed receiver conformance test procedure for WDM conformance testing |
309 | 87.8.12 Receiver 3 dB electrical upper cutoff frequency 87.9 Safety, installation, environment, and labeling 87.9.1 General safety 87.9.2 Laser safety |
310 | 87.9.3 Installation 87.9.4 Environment 87.9.4.1 Electromagnetic emission 87.9.4.2 Temperature, humidity, and handling 87.9.5 PMD labeling requirements 87.10 Fiber optic cabling model |
311 | 87.11 Characteristics of the fiber optic cabling (channel) 87.11.1 Optical fiber cable |
312 | 87.11.2 Optical fiber connection 87.11.2.1 Connection insertion loss 87.11.2.2 Maximum discrete reflectance 87.11.3 Medium Dependent Interface (MDI) requirements 87.12 Requirements for interoperation between 40GBASE-LR4 and 40GBASE-ER4 |
313 | 87.13 Protocol implementation conformance statement (PICS) proforma for Clause 87, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.13.1 Introduction 87.13.2 Identification 87.13.2.1 Implementation identification 87.13.2.2 Protocol summary |
314 | 87.13.3 Major capabilities/options |
315 | 87.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.13.4.1 PMD functional specifications |
316 | 87.13.4.2 Management functions 87.13.4.3 PMD to MDI optical specifications for 40GBASE-LR4 87.13.4.4 PMD to MDI optical specifications for 40GBASE-ER4 |
317 | 87.13.4.5 Optical measurement methods 87.13.4.6 Environmental specifications 87.13.4.7 Characteristics of the fiber optic cabling and MDI |
318 | 88. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4 88.1 Overview 88.2 Physical Medium Dependent (PMD) service interface |
320 | 88.3 Delay and Skew 88.3.1 Delay constraints 88.3.2 Skew constraints 88.4 PMD MDIO function mapping 88.5 PMD functional specifications 88.5.1 PMD block diagram |
321 | 88.5.2 PMD transmit function |
322 | 88.5.3 PMD receive function 88.5.4 PMD global signal detect function |
323 | 88.5.5 PMD lane-by-lane signal detect function 88.5.6 PMD reset function 88.5.7 PMD global transmit disable function (optional) 88.5.8 PMD lane-by-lane transmit disable function |
324 | 88.5.9 PMD fault function (optional) 88.5.10 PMD transmit fault function (optional) 88.5.11 PMD receive fault function (optional) 88.6 Wavelength-division-multiplexed lane assignments |
325 | 88.7 PMD to MDI optical specifications for 100GBASE-LR4 and 100GBASE-ER4 88.7.1 100GBASE-LR4 and 100GBASE-ER4 transmitter optical specifications |
327 | 88.7.2 100GBASE-LR4 and 100GBASE-ER4 receive optical specifications |
328 | 88.7.3 100GBASE-LR4 and 100GBASE-ER4 illustrative link power budgets 88.8 Definition of optical parameters and measurement methods 88.8.1 Test patterns for optical parameters 88.8.2 Wavelength |
329 | 88.8.3 Average optical power 88.8.4 Optical Modulation Amplitude (OMA) |
330 | 88.8.5 Transmitter and dispersion penalty (TDP) 88.8.5.1 Reference transmitter requirements 88.8.5.2 Channel requirements |
331 | 88.8.5.3 Reference receiver requirements 88.8.5.4 Test procedure 88.8.6 Extinction ratio 88.8.7 Relative Intensity Noise (RIN20OMA) 88.8.8 Transmitter optical waveform (transmit eye) |
332 | 88.8.9 Receiver sensitivity 88.8.10 Stressed receiver sensitivity 88.8.11 Receiver 3 dB electrical upper cutoff frequency 88.9 Safety, installation, environment, and labeling 88.9.1 General safety 88.9.2 Laser safety |
333 | 88.9.3 Installation 88.9.4 Environment 88.9.5 Electromagnetic emission 88.9.6 Temperature, humidity, and handling 88.9.7 PMD labeling requirements |
334 | 88.10 Fiber optic cabling model 88.11 Characteristics of the fiber optic cabling (channel) |
335 | 88.11.1 Optical fiber cable 88.11.2 Optical fiber connection 88.11.2.1 Connection insertion loss 88.11.2.2 Maximum discrete reflectance 88.11.3 Medium Dependent Interface (MDI) requirements |
336 | 88.12 Protocol implementation conformance statement (PICS) proforma for Clause 88, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4 88.12.1 Introduction 88.12.2 Identification 88.12.2.1 Implementation identification 88.12.2.2 Protocol summary |
337 | 88.12.3 Major capabilities/options |
338 | 88.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 100GBASE-LR4 and 100GBASE-ER4 88.12.4.1 PMD functional specifications |
339 | 88.12.4.2 Management functions 88.12.4.3 PMD to MDI optical specifications for 100GBASE-LR4 88.12.4.4 PMD to MDI optical specifications for 100GBASE-ER4 |
340 | 88.12.4.5 Optical measurement methods 88.12.4.6 Environmental specifications 88.12.4.7 Characteristics of the fiber optic cabling and MDI |
341 | 89. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.1 Overview |
342 | 89.2 Physical Medium Dependent (PMD) service interface |
343 | 89.3 Delay and skew 89.3.1 Delay constraints 89.3.2 Skew constraints 89.4 PMD MDIO function mapping |
344 | 89.5 PMD functional specifications 89.5.1 PMD block diagram 89.5.2 PMD transmit function 89.5.3 PMD receive function |
345 | 89.5.4 PMD global signal detect function |
346 | 89.5.5 PMD reset function 89.5.6 PMD global transmit disable function (optional) 89.5.7 PMD fault function (optional) 89.5.8 PMD transmit fault function (optional) 89.5.9 PMD receive fault function (optional) 89.6 PMD to MDI optical specifications for 40GBASE-FR |
347 | 89.6.1 40GBASE-FR transmitter optical specifications 89.6.2 40GBASE-FR receive optical specifications |
348 | 89.6.3 40GBASE-FR illustrative link power budget 89.6.4 Comparison of power budget methodology |
349 | 89.7 Definition of optical parameters and measurement methods 89.7.1 Test patterns for optical parameters |
350 | 89.7.2 Skew and Skew Variation 89.7.3 Wavelength 89.7.4 Average optical power 89.7.5 Dispersion penalty 89.7.5.1 Channel requirements |
351 | 89.7.5.2 Reference receiver requirements 89.7.5.3 Test procedure 89.7.6 Extinction ratio |
352 | 89.7.7 Relative Intensity Noise (RIN20OMA) 89.7.8 Transmitter optical waveform (transmit eye) 89.7.9 Receiver sensitivity 89.7.10 Receiver jitter tolerance 89.7.11 Receiver 3 dB electrical upper cutoff frequency |
353 | 89.8 Safety, installation, environment, and labeling 89.8.1 General safety 89.8.2 Laser safety 89.8.3 Installation 89.8.4 Environment |
354 | 89.8.4.1 Electromagnetic emission 89.8.4.2 Temperature, humidity, and handling 89.8.5 PMD labeling requirements 89.9 Fiber optic cabling model 89.10 Characteristics of the fiber optic cabling (channel) 89.10.1 Optical fiber cable |
355 | 89.10.2 Optical fiber connection 89.10.2.1 Connection insertion loss 89.10.2.2 Maximum discrete reflectance |
356 | 89.10.3 Medium Dependent Interface (MDI) requirements |
357 | 89.11 Protocol implementation conformance statement (PICS) proforma for Clause 89, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.11.1 Introduction 89.11.2 Identification 89.11.2.1 Implementation identification 89.11.2.2 Protocol summary |
358 | 89.11.3 Major capabilities/options 89.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.11.4.1 PMD functional specifications |
359 | 89.11.4.2 Management functions 89.11.4.3 PMD to MDI optical specifications for 40GBASE-FR |
360 | 89.11.4.4 Optical measurement methods 89.11.4.5 Environmental specifications 89.11.4.6 Characteristics of the fiber optic cabling and MDI |
361 | 90. Ethernet support for time synchronization protocols 90.1 Introduction 90.2 Overview 90.3 Relationship with other IEEE standards 90.4 Time Synchronization Service Interface (TSSI) 90.4.1 Introduction |
362 | 90.4.1.1 Interlayer service interfaces 90.4.1.2 Responsibilities of TimeSync Client |
363 | 90.4.2 TSSI 90.4.3 Detailed service specification 90.4.3.1 TS_TX.indication primitive 90.4.3.1.1 Semantics 90.4.3.1.2 Condition for generation 90.4.3.1.3 Effect of receipt 90.4.3.2 TS_RX.indication primitive 90.4.3.2.1 Semantics |
364 | 90.4.3.2.2 Condition for generation 90.4.3.2.3 Effect of receipt 90.5 generic Reconciliation Sublayer (gRS) 90.5.1 TS_SFD_Detect_TX function 90.5.2 TS_SFD_Detect_RX function |
365 | 90.6 Overview of management features |
366 | 90.7 Data delay measurement |
368 | 90.8 Protocol implementation conformance statement (PICS) proforma for Clause 90, Ethernet support for time synchronization protocols 90.8.1 Introduction 90.8.2 Identification 90.8.2.1 Implementation identification 90.8.2.2 Protocol summary |
369 | 90.8.3 TSSI indication 90.8.4 Data delay reporting |
370 | 91. Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.1 Overview 91.1.1 Scope 91.1.2 Position of RS-FEC in the 100GBASE-R sublayers 91.2 FEC service interface |
371 | 91.3 PMA compatibility |
372 | 91.4 Delay constraints 91.5 Functions within the RS-FEC sublayer 91.5.1 Functional block diagram 91.5.2 Transmit function 91.5.2.1 Lane block synchronization 91.5.2.2 Alignment lock and deskew 91.5.2.3 Lane reorder 91.5.2.4 Alignment marker removal |
374 | 91.5.2.5 64B/66B to 256B/257B transcoder |
375 | 91.5.2.6 Alignment marker mapping and insertion |
377 | 91.5.2.7 Reed-Solomon encoder |
379 | 91.5.2.8 Symbol distribution 91.5.2.9 Transmit bit ordering 91.5.3 Receive function 91.5.3.1 Alignment lock and deskew |
381 | 91.5.3.2 Lane reorder 91.5.3.3 Reed-Solomon decoder |
382 | 91.5.3.4 Alignment marker removal 91.5.3.5 256B/257B to 64B/66B transcoder |
383 | 91.5.3.6 Block distribution |
384 | 91.5.3.7 Alignment marker mapping and insertion 91.5.3.8 Receive bit ordering |
385 | 91.5.4 Detailed functions and state diagrams 91.5.4.1 State diagram conventions |
387 | 91.5.4.2 State variables 91.5.4.2.1 Variables |
389 | 91.5.4.2.2 Functions 91.5.4.2.3 Counters |
390 | 91.5.4.3 State diagrams |
394 | 91.6 RS-FEC MDIO function mapping |
396 | 91.6.1 FEC_bypass_correction_enable 91.6.2 FEC_bypass_indication_enable 91.6.3 FEC_bypass_correction_ability 91.6.4 FEC_bypass_indication_ability 91.6.5 hi_ser 91.6.6 amps_lock 91.6.7 fec_align_status 91.6.8 FEC_corrected_cw_counter |
397 | 91.6.9 FEC_uncorrected_cw_counter 91.6.10 FEC_lane_mapping 91.6.11 FEC_symbol_error_counter_i 91.6.12 align_status 91.6.13 BIP_error_counter_i 91.6.14 lane_mapping 91.6.15 block_lock 91.6.16 am_lock |
398 | 91.7 Protocol implementation conformance statement (PICS) proforma for Clause 91, Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.7.1 Introduction 91.7.2 Identification 91.7.2.1 Implementation identification 91.7.2.2 Protocol summary |
399 | 91.7.3 Major capabilities/options 91.7.4 PICS proforma tables for Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.7.4.1 Transmit function |
400 | 91.7.4.2 Receive function |
402 | 91.7.4.3 State diagrams |
403 | 92. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.1 Overview |
404 | 92.2 Physical Medium Dependent (PMD) service interface |
405 | 92.3 PCS requirements for Auto-Negotiation (AN) service interface 92.4 Delay constraints 92.5 Skew constraints |
406 | 92.6 PMD MDIO function mapping |
407 | 92.7 PMD functional specifications 92.7.1 Link block diagram |
409 | 92.7.2 PMD Transmit function 92.7.3 PMD Receive function 92.7.4 Global PMD signal detect function 92.7.5 PMD lane-by-lane signal detect function |
410 | 92.7.6 Global PMD transmit disable function 92.7.7 PMD lane-by-lane transmit disable function 92.7.8 Loopback mode 92.7.9 PMD fault function 92.7.10 PMD transmit fault function |
411 | 92.7.11 PMD receive fault function 92.7.12 PMD control function |
412 | 92.8 100GBASE-CR4 electrical characteristics 92.8.1 Signal levels 92.8.2 Signal paths 92.8.3 Transmitter characteristics |
413 | 92.8.3.1 Signal levels |
414 | 92.8.3.2 Transmitter differential output return loss 92.8.3.3 Common-mode to differential mode output return loss |
415 | 92.8.3.4 Common-mode to common-mode output return loss |
416 | 92.8.3.5 Transmitter output waveform |
417 | 92.8.3.5.1 Linear fit to the measured waveform 92.8.3.5.2 Steady-state voltage and linear fit pulse peak |
418 | 92.8.3.5.3 Coefficient initialization 92.8.3.5.4 Coefficient step size 92.8.3.5.5 Coefficient range 92.8.3.6 Insertion loss TP0 to TP2 or TP3 to TP5 |
419 | 92.8.3.7 Transmitter output noise and distortion 92.8.3.8 Transmitter output jitter |
420 | 92.8.3.8.1 Even-odd jitter 92.8.3.8.2 Effective bounded uncorrelated jitter and effective random jitter |
421 | 92.8.3.9 Signaling rate range 92.8.4 Receiver characteristics |
422 | 92.8.4.1 Receiver input amplitude tolerance 92.8.4.2 Receiver differential input return loss 92.8.4.3 Differential to common-mode input return loss 92.8.4.4 Receiver interference tolerance test |
423 | 92.8.4.4.1 Test setup 92.8.4.4.2 Test channel |
424 | 92.8.4.4.3 Test channel calibration 92.8.4.4.4 Pattern generator |
425 | 92.8.4.4.5 Test procedure 92.8.4.5 Receiver jitter tolerance 92.8.4.6 Signaling rate range 92.9 Channel characteristics 92.10 Cable assembly characteristics |
426 | 92.10.1 Characteristic impedance and reference impedance 92.10.2 Cable assembly insertion loss |
428 | 92.10.3 Cable assembly differential return loss 92.10.4 Differential to common-mode return loss |
429 | 92.10.5 Differential to common-mode conversion loss |
430 | 92.10.6 Common-mode to common-mode return loss 92.10.7 Cable assembly Channel Operating Margin 92.10.7.1 Channel signal path |
431 | 92.10.7.1.1 TP0 to TP1 and TP4 to TP5 signal paths 92.10.7.2 Channel crosstalk paths |
432 | 92.11 Test fixtures 92.11.1 TP2 or TP3 test fixture 92.11.1.1 Test fixture return loss 92.11.1.2 Test fixture insertion loss |
434 | 92.11.2 Cable assembly test fixture 92.11.3 Mated test fixtures 92.11.3.1 Mated test fixtures insertion loss |
435 | 92.11.3.2 Mated test fixtures return loss |
436 | 92.11.3.3 Mated test fixtures common-mode conversion insertion loss 92.11.3.4 Mated test fixtures common-mode return loss |
438 | 92.11.3.5 Mated test fixtures common-mode to differential mode return loss 92.11.3.6 Mated test fixtures integrated crosstalk noise |
439 | 92.11.3.6.1 Mated test fixture multiple disturber near-end crosstalk (MDNEXT) loss 92.11.3.6.2 Mated test fixture multiple disturber far-end crosstalk (MDFEXT) loss 92.11.3.6.3 Mated test fixture integrated crosstalk noise (ICN) |
440 | 92.12 MDI specification |
441 | 92.12.1 100GBASE-CR4 MDI connectors 92.12.1.1 Style-1 100GBASE-CR4 MDI connectors |
442 | 92.12.1.2 Style-2 100GBASE-CR4 MDI connectors |
443 | 92.13 Environmental specifications |
444 | 92.14 Protocol implementation conformance statement (PICS) proforma for Clause 92, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.1 Introduction 92.14.2 Identification 92.14.2.1 Implementation identification 92.14.2.2 Protocol summary |
445 | 92.14.3 Major capabilities/options |
446 | 92.14.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.4.1 PMD functional specifications |
447 | 92.14.4.2 Management functions |
448 | 92.14.4.3 Transmitter specifications |
449 | 92.14.4.4 Receiver specifications |
450 | 92.14.4.5 Cable assembly specifications |
451 | 92.14.4.6 MDI connector specifications 92.14.4.7 Environmental specifications |
452 | 93. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.1 Overview |
453 | 93.2 Physical Medium Dependent (PMD) service interface |
454 | 93.3 PCS requirements for Auto-Negotiation (AN) service interface 93.4 Delay constraints 93.5 Skew constraints |
455 | 93.6 PMD MDIO function mapping |
456 | 93.7 PMD functional specifications 93.7.1 Link block diagram 93.7.2 PMD Transmit function |
457 | 93.7.3 PMD Receive function 93.7.4 Global PMD signal detect function 93.7.5 PMD lane-by-lane signal detect function |
458 | 93.7.6 Global PMD transmit disable function 93.7.7 PMD lane-by-lane transmit disable function 93.7.8 Loopback mode |
459 | 93.7.9 PMD fault function 93.7.10 PMD transmit fault function 93.7.11 PMD receive fault function 93.7.12 PMD control function |
460 | 93.8 100GBASE-KR4 electrical characteristics 93.8.1 Transmitter characteristics 93.8.1.1 Transmitter test fixture |
462 | 93.8.1.2 Signaling rate and range 93.8.1.3 Signal levels |
463 | 93.8.1.4 Transmitter output return loss 93.8.1.5 Transmitter output waveform |
465 | 93.8.1.5.1 Linear fit to the measured waveform 93.8.1.5.2 Steady-state voltage and linear fit pulse peak 93.8.1.5.3 Coefficient initialization 93.8.1.5.4 Coefficient step size 93.8.1.5.5 Coefficient range |
466 | 93.8.1.6 Transmitter output noise and distortion 93.8.1.7 Transmitter output jitter 93.8.2 Receiver characteristics 93.8.2.1 Receiver test fixture |
467 | 93.8.2.2 Receiver input return loss 93.8.2.3 Receiver interference tolerance |
468 | 93.8.2.4 Receiver jitter tolerance |
470 | 93.9 Channel characteristics 93.9.1 Channel Operating Margin 93.9.2 Insertion loss 93.9.3 Return loss |
472 | 93.9.4 AC-coupling 93.10 Environmental specifications 93.10.1 General safety |
473 | 93.10.2 Network safety 93.10.3 Installation and maintenance guidelines 93.10.4 Electromagnetic compatibility 93.10.5 Temperature and humidity |
474 | 93.11 Protocol implementation conformance statement (PICS) proforma for Clause 93, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.1 Introduction 93.11.2 Identification 93.11.2.1 Implementation identification 93.11.2.2 Protocol summary |
475 | 93.11.3 Major capabilities/options |
476 | 93.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.4.1 Functional specifications |
477 | 93.11.4.2 Transmitter characteristics |
479 | 93.11.4.3 Receiver characteristics |
480 | 93.11.4.4 Channel characteristics 93.11.4.5 Environmental specifications |
481 | 94. Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.1 Overview |
482 | 94.2 Physical Medium Attachment (PMA) Sublayer 94.2.1 PMA Service Interface |
483 | 94.2.1.1 PMA:IS_UNITDATA_i.request 94.2.1.1.1 Semantics of the service primitive 94.2.1.1.2 When generated 94.2.1.1.3 Effect of receipt 94.2.1.2 PMA:IS_UNITDATA_i.indication 94.2.1.2.1 Semantics of the service primitive |
484 | 94.2.1.2.2 When generated 94.2.1.2.3 Effect of receipt 94.2.1.3 PMA:IS_SIGNAL.indication 94.2.1.3.1 Semantics of the service primitive 94.2.1.3.2 When generated 94.2.1.3.3 Effect of receipt 94.2.1.4 PMA:IS_TX_MODE.request 94.2.1.4.1 Semantics of the service primitive 94.2.1.4.2 When generated 94.2.1.4.3 Effect of receipt |
485 | 94.2.1.5 PMA:IS_RX_MODE.request 94.2.1.5.1 Semantics of the service primitive 94.2.1.5.2 When generated 94.2.1.5.3 Effect of receipt 94.2.1.6 PMA:IS_ENERGY_DETECT.indication 94.2.1.6.1 Semantics of the service primitive 94.2.1.6.2 When generated 94.2.1.6.3 Effect of receipt 94.2.1.7 PMA:IS_RX_TX_MODE.indication |
486 | 94.2.1.7.1 Semantics of the service primitive 94.2.1.7.2 When generated 94.2.1.7.3 Effect of receipt 94.2.2 PMA Transmit Functional Specifications |
487 | 94.2.2.1 FEC Interface 94.2.2.2 Overhead Frame 94.2.2.3 Overhead |
488 | 94.2.2.4 Termination Blocks |
489 | 94.2.2.5 Gray Mapping 94.2.2.6 Precoding 94.2.2.7 PAM4 encoding |
490 | 94.2.2.8 PMD Interface 94.2.3 PMA Receive Functional Specifications |
491 | 94.2.3.1 Overhead 94.2.4 Skew constraints 94.2.5 Delay constraints 94.2.6 Link status 94.2.7 PMA local loopback mode |
492 | 94.2.8 PMA remote loopback mode (optional) 94.2.9 PMA test patterns 94.2.9.1 JP03A test pattern 94.2.9.2 JP03B test pattern 94.2.9.3 Quaternary PRBS13 test pattern |
493 | 94.2.9.4 Transmitter linearity test pattern 94.2.10 PMA MDIO function mapping |
494 | 94.3 Physical Medium Dependent (PMD) Sublayer 94.3.1 Physical Medium Dependent (PMD) service interface |
495 | 94.3.1.1 PMD:IS_UNITDATA_i.request 94.3.1.1.1 Semantics of the service primitive 94.3.1.1.2 When generated 94.3.1.1.3 Effect of receipt 94.3.1.2 PMD:IS_UNITDATA_i.indication 94.3.1.2.1 Semantics of the service primitive 94.3.1.2.2 When generated 94.3.1.2.3 Effect of receipt |
496 | 94.3.1.3 PMD:IS_SIGNAL.indication 94.3.1.3.1 Semantics of the service primitive 94.3.1.3.2 When generated 94.3.1.3.3 Effect of receipt 94.3.2 PCS requirements for Auto-Negotiation (AN) service interface 94.3.3 Delay constraints 94.3.4 Skew constraints |
497 | 94.3.5 PMD MDIO function mapping |
498 | 94.3.6 PMD functional specifications 94.3.6.1 Link block diagram |
499 | 94.3.6.2 PMD Transmit function 94.3.6.3 PMD Receive function 94.3.6.4 Global PMD signal detect function 94.3.6.5 PMD lane-by-lane signal detect function 94.3.6.6 Global PMD transmit disable function |
500 | 94.3.6.7 PMD lane-by-lane transmit disable function 94.3.6.8 Loopback mode 94.3.7 PMD fault function 94.3.8 PMD transmit fault function |
501 | 94.3.9 PMD receive fault function 94.3.10 PMD control function 94.3.10.1 Overview 94.3.10.2 Training frame structure |
502 | 94.3.10.3 Training frame words 94.3.10.4 Frame marker 94.3.10.5 Control channel encoding 94.3.10.5.1 Differential Manchester encoding 94.3.10.5.2 Control channel structure 94.3.10.6 Coefficient update field |
504 | 94.3.10.6.1 Preset 94.3.10.6.2 Initialize 94.3.10.6.3 Parity 94.3.10.6.4 Coefficient (k) update 94.3.10.7 Status report field |
505 | 94.3.10.7.1 Parity 94.3.10.7.2 Training frame countdown 94.3.10.7.3 Receiver ready |
506 | 94.3.10.7.4 Coefficient (k) status 94.3.10.7.5 Coefficient update process 94.3.10.8 Training pattern |
508 | 94.3.10.9 Transition from training to data 94.3.10.10 Frame lock state diagram 94.3.10.11 Training state diagram 94.3.10.12 Coefficient update state diagram |
509 | 94.3.11 PMD LPI function 94.3.11.1 Alert Signal 94.3.11.1.1 Frame marker 94.3.11.1.2 Coefficient update field 94.3.11.1.3 Status report field 94.3.11.1.4 Parity |
510 | 94.3.11.1.5 Mode 94.3.11.1.6 Alert frame countdown 94.3.11.1.7 PMA alignment offset 94.3.11.1.8 Receiver ready 94.3.11.1.9 Transition from alert to data |
511 | 94.3.12 PMD Transmitter electrical characteristics 94.3.12.1 Test fixture 94.3.12.1.1 Test fixture impedance |
512 | 94.3.12.1.2 Test fixture insertion loss |
513 | 94.3.12.2 Signaling rate and range |
514 | 94.3.12.3 Signal levels |
515 | 94.3.12.4 Transmitter output return loss |
516 | 94.3.12.5 Transmitter output waveform |
517 | 94.3.12.5.1 Transmitter linearity |
518 | 94.3.12.5.2 Linear fit to the measured waveform 94.3.12.5.3 Steady-state voltage and linear fit pulse peak 94.3.12.5.4 Coefficient initialization |
519 | 94.3.12.5.5 Coefficient step size 94.3.12.5.6 Coefficient range 94.3.12.6 Transmitter output jitter 94.3.12.6.1 Clock random jitter and clock deterministic jitter |
520 | 94.3.12.6.2 Even-odd jitter |
521 | 94.3.12.7 Transmitter output noise and distortion 94.3.13 PMD Receiver electrical characteristics 94.3.13.1 Test fixture |
522 | 94.3.13.2 Receiver input return loss 94.3.13.3 Receiver interference tolerance |
525 | 94.3.13.4 Receiver jitter tolerance 94.3.13.4.1 Test setup 94.3.13.4.2 Test method 94.4 Channel characteristics 94.4.1 Channel Operating Margin 94.4.2 Channel insertion loss |
527 | 94.4.3 Channel return loss |
528 | 94.4.4 Channel AC-coupling 94.5 Environmental specifications 94.5.1 General safety 94.5.2 Network safety |
529 | 94.5.3 Installation and maintenance guidelines 94.5.4 Electromagnetic compatibility 94.5.5 Temperature and humidity |
530 | 94.6 Protocol implementation conformance statement (PICS) proforma for Clause 94, Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.6.1 Introduction 94.6.2 Identification 94.6.2.1 Implementation identification 94.6.2.2 Protocol summary |
531 | 94.6.3 Major capabilities/options 94.6.4 PICS proforma tables for Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.6.4.1 PMA functional specifications |
532 | 94.6.4.2 PMD functional specifications |
536 | 94.6.4.3 PMD transmitter characteristics |
537 | 94.6.4.4 PMD receiver characteristics |
538 | 94.6.4.5 Channel characteristics 94.6.4.6 Environment specifications |
539 | 95. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.1 Overview |
540 | 95.1.1 Bit error ratio 95.2 Physical Medium Dependent (PMD) service interface |
541 | 95.3 Delay and Skew 95.3.1 Delay constraints 95.3.2 Skew constraints |
542 | 95.4 PMD MDIO function mapping 95.5 PMD functional specifications |
543 | 95.5.1 PMD block diagram 95.5.2 PMD transmit function 95.5.3 PMD receive function |
544 | 95.5.4 PMD global signal detect function 95.5.5 PMD lane-by-lane signal detect function 95.5.6 PMD reset function |
545 | 95.5.7 PMD global transmit disable function (optional) 95.5.8 PMD lane-by-lane transmit disable function (optional) 95.5.9 PMD fault function (optional) 95.5.10 PMD transmit fault function (optional) 95.5.11 PMD receive fault function (optional) 95.6 Lane assignments |
546 | 95.7 PMD to MDI optical specifications for 100GBASE-SR4 95.7.1 100GBASE-SR4 transmitter optical specifications |
547 | 95.7.2 100GBASE-SR4 receive optical specifications 95.7.3 100GBASE-SR4 illustrative link power budget 95.8 Definition of optical parameters and measurement methods |
548 | 95.8.1 Test patterns for optical parameters 95.8.1.1 Multi-lane testing considerations |
549 | 95.8.2 Center wavelength and spectral width 95.8.3 Average optical power 95.8.4 Optical Modulation Amplitude (OMA) |
550 | 95.8.5 Transmitter and dispersion eye closure (TDEC) 95.8.5.1 TDEC conformance test setup 95.8.5.2 TDEC measurement method |
553 | 95.8.6 Extinction ratio 95.8.7 Transmitter optical waveform (transmit eye) 95.8.8 Stressed receiver sensitivity 95.8.8.1 Stressed receiver conformance test block diagram |
554 | 95.8.8.2 Stressed receiver conformance test signal characteristics and calibration |
556 | 95.8.8.3 J2 and J4 Jitter 95.8.8.4 Stressed receiver conformance test signal verification 95.8.8.5 Sinusoidal jitter for receiver conformance test |
557 | 95.9 Safety, installation, environment, and labeling 95.9.1 General safety 95.9.2 Laser safety 95.9.3 Installation 95.9.4 Environment 95.9.5 Electromagnetic emission 95.9.6 Temperature, humidity, and handling |
558 | 95.9.7 PMD labeling requirements 95.10 Fiber optic cabling model |
559 | 95.11 Characteristics of the fiber optic cabling (channel) 95.11.1 Optical fiber cable 95.11.2 Optical fiber connection 95.11.2.1 Connection insertion loss 95.11.2.2 Maximum discrete reflectance 95.11.3 Medium Dependent Interface (MDI) |
560 | 95.11.3.1 Optical lane assignments 95.11.3.2 Medium Dependent Interface (MDI) requirements |
561 | 95.12 Protocol implementation conformance statement (PICS) proforma for Clause 95, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.12.1 Introduction 95.12.2 Identification 95.12.2.1 Implementation identification 95.12.2.2 Protocol summary |
562 | 95.12.3 Major capabilities/options |
563 | 95.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.12.4.1 PMD functional specifications |
564 | 95.12.4.2 Management functions 95.12.4.3 PMD to MDI optical specifications for 100GBASE-SR4 |
565 | 95.12.4.4 Optical measurement methods 95.12.4.5 Environmental specifications |
566 | 95.12.4.6 Characteristics of the fiber optic cabling and MDI |
567 | Annex 83A (normative) 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s ten-lane Attachment Unit Interface (CAUI-10) 83A.1 Overview |
568 | 83A.1.1 Summary of major concepts 83A.1.2 Rate of operation 83A.2 XLAUI/CAUI-10 link block diagram |
569 | 83A.2.1 Transmitter compliance points |
570 | 83A.2.2 Receiver compliance points 83A.3 XLAUI/CAUI-10 electrical characteristics 83A.3.1 Signal levels |
571 | 83A.3.2 Signal paths 83A.3.3 EEE operation 83A.3.4 Transmitter characteristics |
572 | 83A.3.4.1 Output amplitude |
573 | 83A.3.4.1.1 Amplitude and swing 83A.3.4.2 Rise/fall time 83A.3.4.3 Differential output return loss |
574 | 83A.3.4.4 Common-mode output return loss |
575 | 83A.3.4.5 Transmitter eye mask and transmitter jitter definition |
576 | 83A.3.4.6 Global transmit disable function 83A.3.5 Receiver characteristics 83A.3.5.1 Bit error ratio 83A.3.5.2 Input signal definition |
577 | 83A.3.5.3 Differential input return loss |
578 | 83A.3.5.4 Differential to common-mode input return loss |
579 | 83A.3.5.5 AC-coupling 83A.3.5.6 Jitter tolerance 83A.3.5.7 Global energy detect function |
580 | 83A.4 Interconnect characteristics |
581 | 83A.4.1 Characteristic impedance |
582 | 83A.5 Electrical parameter measurement methods 83A.5.1 Transmit jitter 83A.5.2 Receiver tolerance |
583 | 83A.6 Environmental specifications 83A.6.1 General safety 83A.6.2 Network safety 83A.6.3 Installation and maintenance guidelines 83A.6.4 Electromagnetic compatibility 83A.6.5 Temperature and humidity |
584 | 83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s ten-lane Attachment Unit Interface (CAUI-10) 83A.7.1 Introduction 83A.7.2 Identification 83A.7.2.1 Implementation identification 83A.7.2.2 Protocol summary |
585 | 83A.7.3 Major capabilities/options 83A.7.4 XLAUI/CAUI-10 transmitter requirements |
586 | 83A.7.5 XLAUI/CAUI-10 receiver requirements 83A.7.6 Electrical measurement methods 83A.7.7 Environmental specifications |
587 | Annex 83B (normative) Chip-to-module 40 Gb/s Attachment Unit Interface (XLAUI) and 100Gb/s ten-lane Attachment Unit Interface (CAUI-10) 83B.1 Overview |
589 | 83B.2 Compliance point specifications for chip-to-module XLAUI/CAUI-10 |
591 | 83B.2.1 Module specifications |
594 | 83B.2.2 Host specifications |
595 | 83B.2.3 Host input signal tolerance |
596 | 83B.3 Environmental specifications 83B.3.1 General safety 83B.3.2 Network safety 83B.3.3 Installation and maintenance guidelines 83B.3.4 Electromagnetic compatibility |
597 | 83B.3.5 Temperature and humidity |
598 | 83B.4 Protocol implementation conformance statement (PICS) proforma for Annex 83B, Chip-to-module 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s ten-lane Attachment Unit Interface (CAUI-10) 83B.4.1 Introduction 83B.4.2 Identification 83B.4.2.1 Implementation identification 83B.4.2.2 Protocol summary |
599 | 83B.4.3 Major capabilities/options 83B.4.4 Module requirements 83B.4.5 Host requirements |
600 | 83B.4.6 Environmental specifications |
601 | Annex 83C (informative) PMA sublayer partitioning examples 83C.1 Partitioning examples with FEC 83C.1.1 FEC implemented with PCS |
602 | 83C.1.2 FEC implemented with PMD |
603 | 83C.2 Partitioning examples with RS-FEC 83C.2.1 Single PMA sublayer with RS-FEC |
604 | 83C.2.2 Single CAUI-10 with RS-FEC |
605 | 83C.3 Partitioning examples without FEC 83C.3.1 Single PMA sublayer without FEC 83C.3.2 Single XLAUI/CAUI-4 without FEC |
606 | 83C.3.3 Separate SERDES for optical module interface |
607 | Annex 83D (normative) Chip-to-chip 100Gb/s four-lane Attachment Unit Interface (CAUI-4) 83D.1 Overview |
609 | 83D.2 CAUI-4 chip-to-chip compliance point definition 83D.3 CAUI-4 chip-to-chip electrical characteristics 83D.3.1 CAUI-4 transmitter characteristics |
610 | 83D.3.1.1 Transmitter equalization settings |
611 | 83D.3.2 Optional EEE operation |
612 | 83D.3.3 CAUI-4 receiver characteristics 83D.3.3.1 Receiver interference tolerance |
613 | 83D.3.3.2 Transmitter equalization feedback (optional) |
614 | 83D.3.4 Global energy detect function for optional EEE operation 83D.4 CAUI-4 chip-to-chip channel characteristics |
615 | 83D.5 Example usage of the optional transmitter equalization feedback 83D.5.1 Overview |
616 | 83D.5.2 Tuning equalization settings on lane 0 in the transmit direction |
617 | 83D.5.3 Tuning equalization settings on lane 0 in the receive direction |
618 | 83D.6 Protocol implementation conformance statement (PICS) proforma for Annex 83D, Chip-to-chip 100 Gb/s four-lane Attachment Unit Interface (CAUI-4) 83D.6.1 Introduction 83D.6.2 Identification 83D.6.2.1 Implementation identification 83D.6.2.2 Protocol summary |
619 | 83D.6.3 Major capabilities/options 83D.6.4 PICS proforma tables for chip-to-chip 100 Gb/s four-lane Attachment Unit Interface (CAUI-4) 83D.6.4.1 Transmitter |
620 | 83D.6.4.2 Receiver 83D.6.4.3 Channel |
621 | Annex 83E (normative) Chip-to-module 100Gb/s four-lane Attachment Unit Interface (CAUI-4) 83E.1 Overview |
622 | 83E.1.1 Bit error ratio |
623 | 83E.2 CAUI-4 chip-to-module compliance point definitions 83E.3 CAUI-4 chip-to-module electrical characteristics 83E.3.1 CAUI-4 host output characteristics |
624 | 83E.3.1.1 Signaling rate and range 83E.3.1.2 Signal levels |
625 | 83E.3.1.3 Output return loss |
626 | 83E.3.1.4 Differential termination mismatch 83E.3.1.5 Transition time |
627 | 83E.3.1.6 Host output eye width and eye height 83E.3.1.6.1 Reference receiver for host output eye width and eye height evaluation |
629 | 83E.3.2 CAUI-4 module output characteristics 83E.3.2.1 Module output eye width and eye height 83E.3.2.1.1 Reference receiver for module output eye width and eye height evaluation |
630 | 83E.3.3 CAUI-4 host input characteristics |
631 | 83E.3.3.1 Input return loss |
632 | 83E.3.3.2 Host stressed input test 83E.3.3.2.1 Host stressed input test procedure |
634 | 83E.3.4 CAUI-4 module input characteristics 83E.3.4.1 Module stressed input test 83E.3.4.1.1 Module stressed input test procedure |
637 | 83E.4 CAUI-4 measurement methodology 83E.4.1 HCB/MCB characteristics 83E.4.2 Eye width and eye height measurement method |
638 | 83E.4.2.1 Vertical eye closure |
639 | 83E.5 Protocol implementation conformance statement (PICS) proforma for Annex 83E, Chip-to-module 100 Gb/s four-lane Attachment Unit Interface (CAUI-4) 83E.5.1 Introduction 83E.5.2 Identification 83E.5.2.1 Implementation identification 83E.5.2.2 Protocol summary |
640 | 83E.5.3 Major capabilities/options 83E.5.4 PICS proforma tables for chip-to-module 100 Gb/s four-lane Attachment Unit Interface (CAUI-4) 83E.5.4.1 Host output |
641 | 83E.5.4.2 Module output 83E.5.4.3 Host input 83E.5.4.4 Module input |
642 | Annex 85A (informative) 40GBASE-CR4 and 100GBASE-CR10 TP0 and TP5 test point parameters 85A.1 Overview 85A.2 Transmitter characteristics at TP0 |
643 | 85A.3 Receiver characteristics at TP5 85A.4 Transmitter and receiver differential printed circuit board trace loss |
644 | 85A.5 Channel insertion loss |
645 | 85A.6 Channel return loss 85A.7 Channel insertion loss deviation (ILD) |
646 | 85A.8 Channel integrated crosstalk noise (ICN) |
648 | Annex 86A (normative) Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.1 Overview 86A.2 Block diagram and test points 86A.3 Lane assignments |
649 | 86A.4 Electrical specifications for nPPI 86A.4.1 nPPI host to module electrical specifications |
650 | 86A.4.1.1 Differential return losses at TP1 and TP1a |
652 | 86A.4.2 nPPI module to host electrical specifications 86A.4.2.1 Differential return losses at TP4 and TP4a |
653 | 86A.5 Definitions of electrical parameters and measurement methods 86A.5.1 Test points and compliance boards |
654 | 86A.5.1.1 Compliance board parameters 86A.5.1.1.1 Reference insertion losses of HCB and MCB |
655 | 86A.5.1.1.2 Electrical specifications of mated HCB and MCB |
658 | 86A.5.2 Test patterns and related subclauses 86A.5.3 Parameter definitions 86A.5.3.1 AC common-mode voltage 86A.5.3.2 Termination mismatch |
659 | 86A.5.3.3 Transition time 86A.5.3.4 Data Dependent Pulse Width Shrinkage (DDPWS) |
660 | 86A.5.3.5 Signal to noise ratio Qsq |
661 | 86A.5.3.6 Eye mask for TP1a and TP4 86A.5.3.7 Reference impedances for electrical measurements 86A.5.3.8 Host input signal tolerance 86A.5.3.8.1 Introduction 86A.5.3.8.2 Test equipment and setup |
662 | 86A.5.3.8.3 Stressed eye jitter characteristics |
663 | 86A.5.3.8.4 Calibration |
664 | 86A.5.3.8.5 Calibration procedure 86A.5.3.8.6 Test procedure |
665 | 86A.6 Recommended electrical channel |
666 | 86A.7 Safety, installation, environment, and labeling 86A.7.1 General safety 86A.7.2 Installation 86A.7.3 Environment 86A.7.4 PMD labeling |
667 | 86A.8 Protocol implementation conformance statement (PICS) proforma for Annex 86A, Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.8.1 Introduction 86A.8.2 Identification 86A.8.2.1 Implementation identification 86A.8.2.2 Protocol summary |
668 | 86A.8.3 Major capabilities/options 86A.8.4 PICS proforma tables for Parallel Physical Interface (nPPI) for 40GBASE- SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.8.4.1 PMD functional specifications |
669 | 86A.8.4.2 Electrical specifications for nPPI 86A.8.4.3 Definitions of parameters and measurement methods |
670 | 86A.8.4.4 Environmental and safety specifications |
671 | Annex 91A (informative) RS-FEC codeword examples 91A.1 Input to the 64B/66B to 256B/257B transcoder |
672 | 91A.2 Output of the RS(528,514) encoder 91A.3 Output of the RS(544,514) encoder |
673 | 91A.4 Reed-Solomon encoder model 91A.4.1 Global variable declarations for RS(528,514) |
674 | 91A.4.2 Global variable declarations for RS(544,514) 91A.4.3 Other global variable declarations 91A.4.4 GF(210) multiplier function 91A.4.5 Reed-Solomon encoder function |
675 | 91A.4.6 Main function |
676 | Annex 92A (informative) 100GBASE-CR4 TP0 and TP5 test point parameters and channel characteristics 92A.1 Overview 92A.2 Transmitter characteristics at TP0 92A.3 Receiver characteristics at TP5 92A.4 Transmitter and receiver differential printed circuit board trace loss |
677 | 92A.5 Channel insertion loss |
679 | 92A.6 Channel return loss 92A.7 Channel Operating Margin (COM) |
680 | Annex 93A (normative) Specification methods for electrical channels 93A.1 Channel Operating Margin |
682 | 93A.1.1 Measurement of the channel 93A.1.2 Transmitter and receiver device package models |
683 | 93A.1.2.1 Cascade connection of two-port networks 93A.1.2.2 Two-port network for a shunt capacitance 93A.1.2.3 Two-port network for the package transmission line |
684 | 93A.1.2.4 Assembly of transmitter and receiver device package models |
685 | 93A.1.3 Path terminations 93A.1.4 Filters 93A.1.4.1 Receiver noise filter 93A.1.4.2 Transmitter equalizer |
686 | 93A.1.4.3 Receiver equalizer 93A.1.5 Pulse response 93A.1.6 Determination of variable equalizer parameters |
688 | 93A.1.7 Interference and noise amplitude 93A.1.7.1 Interference amplitude distribution |
689 | 93A.1.7.2 Noise amplitude distribution 93A.1.7.3 Combination of interference and noise distributions |
690 | 93A.2 Test channel calibration using COM |
691 | 93A.3 Fitted insertion loss |
692 | 93A.4 Insertion loss deviation |
693 | Annex 93B (informative) Electrical backplane reference model |
694 | Annex 93C (normative) Receiver interference tolerance 93C.1 Test setup |
697 | 93C.2 Test method |