IEEE 802.3bj-2014

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IEEE Standard for Ethernet Amendment 2: Physical Layer Specifications and Management Parameters for 100 Gb/s Operation Over Backplanes and Copper Cables

Published By	Publication Date	Number of Pages
IEEE	2014	368

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Description

Amendment Standard – Superseded. 100 Gb/s Physical Layer (PHY) specifications and management parameters for operation on electrical backplanes and twinaxial copper cables are added by this amendment to IEEE Std 802.3-2012. This amendment also specifies optional Energy Efficient Ethernet (EEE) for 40 Gb/s and 100 Gb/s operation over electrical backplanes and copper cables.

PDF Catalog

PDF Pages	PDF Title
1	IEEE Std 802.3bj-2014 Front cover
3	Title page
4	Abstract/Keywords
5	Important Notices and Disclaimers Concerning IEEE Standards Documents
8	Participants
12	Introduction
15	Contents
33	IMPORTANT NOTICE
34	1. Introduction 1.4 Definitions
35	1.5 Abbreviations
36	30. Management 30.2 Managed objects 30.2.5 Capabilities
38	30.3 Layer management for DTEs 30.3.2.1.2 aPhyType 30.3.2.1.3 aPhyTypeList 30.5 Layer management for medium attachment units (MAUs) 30.5.1.1.2 aMAUType
39	30.5.1.1.11 aBIPErrorCount 30.5.1.1.12 aLaneMapping 30.5.1.1.15 aFECability 30.5.1.1.16 aFECmode
40	30.5.1.1.17 aFECCorrectedBlocks 30.5.1.1.18 aFECUncorrectableBlocks
41	30.5.1.1.26 aRSFECBIPErrorCount 30.5.1.1.27 aRSFECLaneMapping 30.5.1.1.28 aRSFECBypassAbility
42	30.5.1.1.29 aRSFECIndicationAbility 30.5.1.1.30 aRSFECBypassEnable 30.5.1.1.31 aRSFECIndicationEnable
43	30.6 Management for link Auto-Negotiation 30.6.1.1.5 aAutoNegLocalTechnologyAbility
44	30.12 Layer Management for Link Layer Discovery Protocol (LLDP) 30.12.2 LLDP Local System Group managed object class 30.12.2.1 LLDP Local System Group attributes 30.12.2.1.30 aLldpXdot3LocTxFw 30.12.2.1.31 aLldpXdot3LocTxFwEcho 30.12.2.1.32 aLldpXdot3LocRxFw 30.12.2.1.33 aLldpXdot3LocRxFwEcho
45	30.12.3 LLDP Remote System Group managed object class 30.12.3.1 LLDP Remote System Group attributes 30.12.3.1.24 aLldpXdot3RemTxFw 30.12.3.1.25 aLldpXdot3RemTxFwEcho 30.12.3.1.26 aLldpXdot3RemRxFw 30.12.3.1.27 aLldpXdot3RemRxFwEcho
46	45. Management Data Input/Output (MDIO) Interface 45.2.1 PMA/PMD registers
47	45.2.1.2 PMA/PMD status 1 register (Register 1.1)
48	45.2.1.2.a PMA ingress AUI stop ability (1.1.9) 45.2.1.2.b PMA egress AUI stop ability (1.1.8) 45.2.1.6 PMA/PMD control 2 register (Register 1.7)
50	45.2.1.6.a PMA ingress AUI stop enable (1.7.9) 45.2.1.6.b PMA egress AUI stop enable (1.7.8) 45.2.1.7.4 Transmit fault (1.8.11) 45.2.1.7.5 Receive fault (1.8.10) 45.2.1.8 PMD transmit disable register (Register 1.9)
52	45.2.1.12 40G/100G PMA/PMD extended ability register (Register 1.13) 45.2.1.12.1a 100GBASE-CR4 ability (1.13.14) 45.2.1.12.1b 100GBASE-KR4 ability (1.13.13) 45.2.1.12.1c 100GBASE-KP4 ability (1.13.12) 45.2.1.13a EEE capability (Register 1.16)
53	45.2.1.13a.1 100GBASE-CR4 EEE deep sleep supported (1.16.11) 45.2.1.13a.2 100GBASE-KR4 EEE deep sleep supported (1.16.10) 45.2.1.13a.3 100GBASE-KP4 EEE deep sleep supported (1.16.9) 45.2.1.13a.4 100GBASE-CR10 EEE deep sleep supported (1.16.8) 45.2.1.13a.5 40GBASE-CR4 EEE deep sleep supported (1.16.1) 45.2.1.13a.6 40GBASE-KR4 EEE deep sleep supported (1.16.0)
54	45.2.1.79 BASE-R PMD control register (Register 1.150) 45.2.1.80 BASE-R PMD status register (Register 1.151) 45.2.1.81 BASE-R LP coefficient update, lane 0 register (Register 1.152) 45.2.1.82 BASE-R LP status report, lane 0 register (Register 1.153) 45.2.1.83 BASE-R LD coefficient update, lane 0 register (Register 1.154) 45.2.1.84 BASE-R LD status report, lane 0 register (Register 1.155)
55	45.2.1.88a PMA overhead control 1, 2, and 3 registers (Register 1.162 through 1.164) 45.2.1.88b PMA overhead status 1 and 2 registers (Register 1.165, 1.166)
56	45.2.1.92a RS-FEC control register (Register 1.200) 45.2.1.92a.1 FEC bypass indication enable (1.200.1) 45.2.1.92a.2 FEC bypass correction enable (1.200.0)
57	45.2.1.92b RS-FEC status register (Register 1.201) 45.2.1.92b.1 PCS align status (1.201.15) 45.2.1.92b.2 RS-FEC align status (1.201.14)
58	45.2.1.92b.3 FEC AM lock 3 (1.201.11) 45.2.1.92b.4 FEC AM lock 2 (1.201.10) 45.2.1.92b.5 FEC AM lock 1 (1.201.9) 45.2.1.92b.6 FEC AM lock 0 (1.201.8) 45.2.1.92b.7 RS-FEC high SER (1.201.2) 45.2.1.92b.8 FEC bypass indication ability (1.201.1) 45.2.1.92b.9 FEC bypass correction ability (1.201.0) 45.2.1.92c RS-FEC corrected codewords counter (Register 1.202, 1.203)
59	45.2.1.92d RS-FEC uncorrected codewords counter (Register 1.204, 1.205) 45.2.1.92e RS-FEC lane mapping register (Register 1.206)
60	45.2.1.92f RS-FEC symbol error counter lane 0 (Register 1.210, 1.211) 45.2.1.92g RS-FEC symbol error counter lane 1 through 3 (Register 1.212, 1.213, 1.214, 1.215, 1.216, 1.217) 45.2.1.92h RS-FEC BIP error counter lane 0 (Register 1.230) 45.2.1.92i RS-FEC BIP error counter, lane 1 through 19 (Registers 1.231 through 1.249)
61	45.2.1.92j RS-FEC PCS lane 0 mapping register (Register 1.250) 45.2.1.92k RS-FEC PCS lanes 1 through 19 mapping registers (Registers 1.251 through 1.269) 45.2.1.92l RS-FEC PCS alignment status 1 register (Register 1.280)
62	45.2.1.92l.1 Block 7 lock (1.280.7) 45.2.1.92l.2 Block 6 lock (1.280.6) 45.2.1.92l.3 Block 5 lock (1.280.5) 45.2.1.92l.4 Block 4 lock (1.280.4) 45.2.1.92l.5 Block 3 lock (1.280.3)
63	45.2.1.92l.6 Block 2 lock (1.280.2) 45.2.1.92l.7 Block 1 lock (1.280.1) 45.2.1.92l.8 Block 0 lock (1.280.0) 45.2.1.92m RS-FEC PCS alignment status 2 register (Register 1.281)
64	45.2.1.92m.1 Block 19 lock (1.281.11) 45.2.1.92m.2 Block 18 lock (1.281.10) 45.2.1.92m.3 Block 17 lock (1.281.9) 45.2.1.92m.4 Block 16 lock (1.281.8) 45.2.1.92m.5 Block 15 lock (1.281.7) 45.2.1.92m.6 Block 14 lock (1.281.6)
65	45.2.1.92m.7 Block 13 lock (1.281.5) 45.2.1.92m.8 Block 12 lock (1.281.4) 45.2.1.92m.9 Block 11 lock (1.281.3) 45.2.1.92m.10 Block 10 lock (1.281.2) 45.2.1.92m.11 Block 9 lock (1.281.1) 45.2.1.92m.12 Block 8 lock (1.281.0) 45.2.1.92n RS-FEC PCS alignment status 3 register (Register 1.282) 45.2.1.92n.1 Lane 7 aligned (1.282.7)
66	45.2.1.92n.2 Lane 6 aligned (1.282.6) 45.2.1.92n.3 Lane 5 aligned (1.282.5) 45.2.1.92n.4 Lane 4 aligned (1.282.4) 45.2.1.92n.5 Lane 3 aligned (1.282.3)
67	45.2.1.92n.6 Lane 2 aligned (1.282.2) 45.2.1.92n.7 Lane 1 aligned (1.282.1) 45.2.1.92n.8 Lane 0 aligned (1.282.0) 45.2.1.92o RS-FEC PCS alignment status 4 register (Register 1.283)
68	45.2.1.92o.1 Lane 19 aligned (1.283.11) 45.2.1.92o.2 Lane 18 aligned (1.283.10) 45.2.1.92o.3 Lane 17 aligned (1.283.9) 45.2.1.92o.4 Lane 16 aligned (1.283.8) 45.2.1.92o.5 Lane 15 aligned (1.283.7)
69	45.2.1.92o.6 Lane 14 aligned (1.283.6) 45.2.1.92o.7 Lane 13 aligned (1.283.5) 45.2.1.92o.8 Lane 12 aligned (1.283.4) 45.2.1.92o.9 Lane 11 aligned (1.283.3) 45.2.1.92o.10 Lane 10 aligned (1.283.2) 45.2.1.92o.11 Lane 9 aligned (1.283.1) 45.2.1.92o.12 Lane 8 aligned (1.283.0) 45.2.1.98a PMD training pattern lanes 0 through 3 (Register 1.1450 through 1.1453)
70	45.2.1.100 PRBS pattern testing control (Register 1.1501)
71	45.2.3 PCS registers 45.2.3.9 EEE control and capability (Register 3.20)
72	45.2.3.9.a 100GBASE-R EEE deep sleep supported (3.20.13) 45.2.3.9.b 100GBASE-R EEE fast wake supported (3.20.12) 45.2.3.9.c 40GBASE-R EEE deep sleep supported (3.20.9) 45.2.3.9.d 40GBASE-R EEE fast wake supported (3.20.8) 45.2.3.9.7 LPI_FW (3.20.0) 45.2.7 Auto-Negotiation registers 45.2.7.12 Backplane Ethernet, BASE-R copper status (Register 7.48)
73	45.2.7.12.2 Negotiated Port Type (7.48.1, 7.48.2, 7.48.3, 7.48.5, 7.48.6, 7.48.8, 7.48.9, 7.48.10, 7.48.11) 45.2.7.13 EEE advertisement (Register 7.60)
75	45.2.7.13.a 100GBASE-CR4 EEE supported (7.60.13) 45.2.7.13.b 100GBASE-KR4 EEE supported (7.60.12) 45.2.7.13.c 100GBASE-KP4 EEE supported (7.60.11) 45.2.7.13.d 100GBASE-CR10 EEE supported (7.60.10) 45.2.7.13.e 40GBASE-CR4 EEE supported (7.60.8) 45.2.7.13.f 40GBASE-KR4 EEE supported (7.60.7) 45.2.7.14 EEE link partner ability (Register 7.61)
77	45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input/Output (MDIO) Interface 45.5.3.2 PMA/PMD MMD options 45.5.3.3 PMA/PMD management functions
78	69. Introduction to Ethernet operation over electrical backplanes 69.1 Overview 69.1.1 Scope 69.1.2 Objectives 69.1.2 Relationship of Backplane Ethernet to the ISO OSI reference model
80	69.2 Summary of Backplane Ethernet Sublayers 69.2.1 Reconciliation sublayer and media independent interfaces
81	69.2.3 Physical Layer signaling systems
82	69.2.6 Low-Power Idle 69.3 Delay constraints 69.5 Protocol implementation conformance statement (PICS) proforma
83	73. Auto-Negotiation for backplane and copper cable assembly 73.3 Functional specifications 73.5 DME transmission 73.5.1 DME electrical specifications 73.6 Link codeword encoding 73.6.4 Technology Ability Field
84	73.6.10 Transmit Switch function 73.7 Receive function requirements 73.7.1 DME page reception 73.7.2 Receive Switch function
85	73.7.6 Priority Resolution function 73.10 State diagrams and variable definitions 73.10.1 State diagram variables
87	73.11 Protocol implementation conformance statement (PICS) proforma for Clause 73, Auto-Negotiation for backplane and copper cable assembly 73.11.4 PICS proforma tables for Auto-Negotiation for backplane and copper cable assembly 73.11.4.3 Link codeword encoding
88	73.11.4.4 Receive function requirements
89	74. Forward Error Correction (FEC) sublayer for BASE-R PHYs 74.5 FEC service interface 74.5.2 40GBASE-R and 100GBASE-R service primitives 74.7 FEC principle of operation 74.7.4 Functions within FEC sublayer
90	74.7.4.8 FEC rapid block synchronization for EEE (optional)
91	78. Energy-Efficient Ethernet (EEE) 78.1 Overview 78.1.1 LPI Signaling
92	78.1.1.1 Interlayer Reconciliation sublayer service interfaces 78.1.2 LPI Client service interface 78.1.2.2 LP_IDLE.indication 78.1.2.2.3 When generated 78.1.3 Reconciliation sublayer operation 78.1.3.3 PHY LPI operation 78.1.3.3.1 PHY LPI transmit operation
93	78.1.3.3.2 PHY LPI receive operation 78.1.4 PHY types optionally supporting EEE Supported PHY types
94	78.2 LPI mode timing parameters description 78.3 Capabilities Negotiation
95	78.4 Data Link Layer Capabilities 78.4.2 Control state diagrams 78.4.2.3 Variables
97	78.4.2.4 Functions
98	78.4.2.5 State diagrams
99	78.4.3 State change procedure across a link
100	78.4.3.1 Transmitting link partner’s state change procedure across a link 78.4.3.2 Receiving link partner’s state change procedure across a link
101	78.5 Communication link access latency
102	78.5.2 40 Gb/s and 100 Gb/s PHY extension using XLAUI or CAUI
103	79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements 79.3 IEEE 802.3 Organizationally Specific TLVs 79.3.6 EEE Fast Wake TLV 79.3.6.1 Transmit fast wake
104	79.3.6.2 Receive fast wake 79.3.6.3 Echo of Transmit fast wake and Receive fast wake 79.3.6.4 EEE Fast Wake TLV usage rules 79.4 IEEE 802.3 Organizationally Specific TLV selection management 79.4.2 IEEE 802.3 Organizationally Specific TLV/LLDP Local and Remote System group managed object class cross references
105	79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and values (TLV) information elements 79.5.3 Major capabilities/options
106	79.5.6a EEE Fast Wake TLV
107	80. Introduction to 40 Gb/s and 100 Gb/s networks 80.1 Overview 80.1.1 Scope 80.1.2 Objectives 80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model
108	80.1.4 Nomenclature
109	80.1.5 Physical Layer signaling systems
111	80.2 Summary of 40 Gigabit and 100 Gigabit Ethernet sublayers 80.2.2 Physical Coding Sublayer (PCS) 80.2.3 Forward Error Correction (FEC) sublayers 80.2.4 Physical Medium Attachment (PMA) sublayer 80.2.5 Physical Medium Dependent (PMD) sublayer 80.2.6 Auto-Negotiation
112	80.3 Service interface specification method and notation 80.3.1 Inter-sublayer service interface 80.3.2 Instances of the Inter-sublayer service interface
115	80.3.3 Semantics of inter-sublayer service interface primitives 80.3.3.4 IS_TX_MODE.request 80.3.3.4.1 Semantics of the service primitive 80.3.3.4.2 When generated 80.3.3.4.3 Effect of receipt 80.3.3.5 IS_RX_MODE.request 80.3.3.5.1 Semantics of the service primitive 80.3.3.5.2 When generated 80.3.3.5.3 Effect of receipt 80.3.3.6 IS_RX_LPI_ACTIVE.request
116	80.3.3.6.1 Semantics of the service primitive 80.3.3.6.2 When generated 80.3.3.6.3 Effect of receipt 80.3.3.7 IS_ENERGY_DETECT.indication 80.3.3.7.1 Semantics of the service primitive 80.3.3.7.2 When generated 80.3.3.7.3 Effect of receipt 80.3.3.8 IS_RX_TX_MODE.indication 80.3.3.8.1 Semantics of the service primitive
117	80.3.3.8.2 When generated 80.3.3.8.3 Effect of receipt 80.4 Delay constraints 80.5 Skew constraints
121	80.7 Protocol implementation conformance statement (PICS) proforma
122	81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation (XLGMII and CGMII) 81.1 Overview 81.1.1 Summary of major concepts 81.1.7 Mapping of XLGMII/CGMII signals to PLS service primitives 81.1.7.3 Mapping of PLS_CARRIER.indication
123	81.3 XLGMII/CGMII functional specifications 81.3.1 Transmit 81.3.1.2 TXC (transmit control) 81.3.1.5 Transmit direction LPI transition
124	81.3.2 Receive 81.3.2.2 RXC (receive control) 81.3.2.4 Receive direction LPI transition 81.3.4 Link fault signaling
125	81.3a LPI Assertion and Detection
126	81.3a.1 LPI messages 81.3a.2 Transmit LPI state diagram 81.3a.2.1 Variables and counters
127	81.3a.2.2 State diagram 81.3a.3 Considerations for transmit system behavior 81.3a.4 Considerations for receive system behavior
128	81.4 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation 81.4.2 Identification 81.4.2.3 Major capabilities/options 81.4.3 PICS proforma tables for Reconciliation Sublayer and Media Independent Interface for 40 Gb/s and 100 Gb/s operation 81.4.3.6 LPI functions
129	82. Physical Coding Sublayer (PCS) for 64B/66B, type 40GBASE-R and 100GBASE-R 82.1 Overview 82.1.3 Summary of 40GBASE-R and 100GBASE-R sublayers 82.1.4 Inter-sublayer interfaces 82.1.4.2 Physical Medium Attachment (PMA) or Forward Error Correction (FEC) service interface
130	82.1.5 Functional block diagram
131	82.2 Physical Coding Sublayer (PCS) 82.2.3 64B/66B transmission code 82.2.3.4 Control codes 82.2.3.6 Idle (/I/) 82.2.8 BIP calculations 82.2.8a Rapid alignment marker insertion
133	82.2.11 Block synchronization
134	82.2.12 PCS lane deskew 82.2.18 Detailed functions and state diagrams 82.2.18.2 State variables 82.2.18.2.2 Variables
136	82.2.18.2.3 Functions
137	82.2.18.2.4 Counters 82.2.18.2.5 Timers
138	82.2.18.3 State diagrams 82.2.18.3.1 LPI state diagrams
139	82.3 PCS Management 82.3.1 PMD MDIO function mapping
140	82.6 Auto-Negotiation
149	82.7 Protocol implementation conformance statement (PICS) proforma for Clause 82, Physical Coding Sublayer (PCS) for 64B/66B, type 40GBASE-R and 100GBASE-R 82.7.3 Major capabilities/options 82.7.6.5 Auto-Negotiation for Backplane Ethernet functions
150	82.7.6.6 LPI functions
151	83. Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R 83.1 Overview 83.1.1 Scope 83.3 PMA service interface
152	83.5 Functions within the PMA 83.5.3 Skew and Skew Variation 83.5.3.a Skew generation toward SP0 83.5.3.7 Skew generation toward SP7 83.5.8 PMA local loopback mode
153	83.5.11 Energy Efficient Ethernet 83.5.11.1 PMA quiet and alert signals
154	83.5.11.2 Detection of PMA quiet and alert signals 83.5.11.3 Additional transmit functions in the Tx direction
155	83.5.11.4 Additional receive functions in the Tx direction 83.5.11.5 Additional transmit functions in the Rx direction
156	83.5.11.6 Additional receive functions in the Rx direction 83.5.11.7 Support for BASE-R FEC 83.6 PMA MDIO function mapping
157	83.7 Protocol implementation conformance statement (PICS) proforma for Clause 83, Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R 83.7.3 Major capabilities/options 83.7.7 EEE deep sleep with XLAUI/CAUI
158	84. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4 84.1 Overview 84.2 Physical Medium Dependent (PMD) service interface 84.3 PCS requirements for Auto-Negotiation (AN) service interface
159	84.6 PMD MDIO function mapping 84.7 PMD functional specifications 84.7.2 PMD Transmit function 84.7.4 Global PMD signal detect function
160	84.7.6 Global PMD transmit disable function
161	84.11 Protocol implementation conformance statement (PICS) proforma for Clause 84, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-KR4 84.11.3 Major capabilities/options 84.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 84.11.4.1 PMD functional specifications 84.11.4.3 Transmitter electrical characteristics
162	85. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.1 Overview 85.2 Physical Medium Dependent (PMD) service interface 85.3 PCS requirements for Auto-Negotiation (AN) service interface
163	85.6 PMD MDIO function mapping 85.7 PMD functional specifications 85.7.2 PMD Transmit function 85.7.4 Global PMD signal detect function
164	85.7.6 Global PMD transmit disable function 85.8.3 Transmitter characteristics 85.13 Protocol implementation conformance statement (PICS) proforma for Clause 85, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.3 Major capabilities/options
165	85.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.4.1 PMD functional specifications 85.13.4.3 Transmitter specifications
166	91. Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.1 Overview 91.1.1 Scope 91.1.2 Position of RS-FEC in the 100GBASE-R sublayers 91.2 FEC service interface
167	91.3 PMA compatibility
168	91.4 Delay constraints 91.5 Functions within the RS-FEC sublayer 91.5.1 Functional block diagram 91.5.2 Transmit function 91.5.2.1 Lane block synchronization 91.5.2.2 Alignment lock and deskew 91.5.2.3 Lane reorder 91.5.2.4 Alignment marker removal
170	91.5.2.5 64B/66B to 256B/257B transcoder
171	91.5.2.6 Alignment marker mapping and insertion
173	91.5.2.7 Reed-Solomon encoder
175	91.5.2.8 Symbol distribution 91.5.2.9 Transmit bit ordering 91.5.3 Receive function 91.5.3.1 Alignment lock and deskew
177	91.5.3.2 Lane reorder 91.5.3.3 Reed-Solomon decoder
178	91.5.3.4 Alignment marker removal 91.5.3.5 256B/257B to 64B/66B transcoder
179	91.5.3.6 Block distribution 91.5.3.7 Alignment marker mapping and insertion
180	91.5.3.8 Receive bit ordering 91.5.4 Detailed functions and state diagrams 91.5.4.1 State diagram conventions
182	91.5.4.2 State variables 91.5.4.2.1 Variables
184	91.5.4.2.2 Functions 91.5.4.2.3 Counters
185	91.5.4.3 State diagrams
189	91.6 RS-FEC MDIO function mapping
191	91.6.1 FEC_bypass_correction_enable 91.6.2 FEC_bypass_indication_enable 91.6.3 FEC_bypass_correction_ability 91.6.4 FEC_bypass_indication_ability 91.6.5 hi_ser 91.6.6 amps_lock 91.6.7 fec_align_status 91.6.8 FEC_corrected_cw_counter
192	91.6.9 FEC_uncorrected_cw_counter 91.6.10 FEC_lane_mapping 91.6.11 FEC_symbol_error_counter_i 91.6.12 align_status 91.6.13 BIP_error_counter_i 91.6.14 lane_mapping 91.6.15 block_lock 91.6.16 am_lock
193	91.7 Protocol implementation conformance statement (PICS) proforma for Clause 91, Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.7.1 Introduction 91.7.2 Identification 91.7.2.1 Implementation identification 91.7.2.2 Protocol summary
194	91.7.3 Major capabilities/options 91.7.4 PICS proforma tables for Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.7.4.1 Transmit function
195	91.7.4.2 Receive function
196	91.7.4.3 State diagrams
197	92. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.1 Overview
198	92.2 Physical Medium Dependent (PMD) service interface
199	92.3 PCS requirements for Auto-Negotiation (AN) service interface 92.4 Delay constraints 92.5 Skew constraints
200	92.6 PMD MDIO function mapping
201	92.7 PMD functional specifications 92.7.1 Link block diagram
203	92.7.2 PMD Transmit function 92.7.3 PMD Receive function 92.7.4 Global PMD signal detect function 92.7.5 PMD lane-by-lane signal detect function
204	92.7.6 Global PMD transmit disable function 92.7.7 PMD lane-by-lane transmit disable function 92.7.8 Loopback mode 92.7.9 PMD fault function 92.7.10 PMD transmit fault function
205	92.7.11 PMD receive fault function 92.7.12 PMD control function
206	92.8 100GBASE-CR4 electrical characteristics 92.8.1 Signal levels 92.8.2 Signal paths 92.8.3 Transmitter characteristics
207	92.8.3.1 Signal levels
208	92.8.3.2 Transmitter differential output return loss 92.8.3.3 Common-mode to differential mode output return loss
209	92.8.3.4 Common-mode to common-mode output return loss
210	92.8.3.5 Transmitter output waveform
211	92.8.3.5.1 Linear fit to the measured waveform 92.8.3.5.2 Steady-state voltage and linear fit pulse peak
212	92.8.3.5.3 Coefficient initialization 92.8.3.5.4 Coefficient step size 92.8.3.5.5 Coefficient range 92.8.3.6 Insertion loss TP0 to TP2 or TP3 to TP5
213	92.8.3.7 Transmitter output noise and distortion 92.8.3.8 Transmitter output jitter
214	92.8.3.8.1 Even-odd jitter 92.8.3.8.2 Effective bounded uncorrelated jitter and effective random jitter
215	92.8.3.9 Signaling rate range 92.8.4 Receiver characteristics
216	92.8.4.1 Receiver input amplitude tolerance 92.8.4.2 Receiver differential input return loss 92.8.4.3 Differential to common-mode input return loss 92.8.4.4 Receiver interference tolerance test
217	92.8.4.4.1 Test setup 92.8.4.4.2 Test channel
218	92.8.4.4.3 Test channel calibration 92.8.4.4.4 Pattern generator
219	92.8.4.4.5 Test procedure 92.8.4.5 Receiver jitter tolerance 92.8.4.6 Signaling rate range 92.9 Channel characteristics 92.10 Cable assembly characteristics
220	92.10.1 Characteristic impedance and reference impedance 92.10.2 Cable assembly insertion loss
222	92.10.3 Cable assembly differential return loss 92.10.4 Differential to common-mode return loss
223	92.10.5 Differential to common-mode conversion loss
224	92.10.6 Common-mode to common-mode return loss 92.10.7 Cable assembly Channel Operating Margin 92.10.7.1 Channel signal path
225	92.10.7.1.1 TP0 to TP1 and TP4 to TP5 signal paths 92.10.7.2 Channel crosstalk paths
226	92.11 Test fixtures 92.11.1 TP2 or TP3 test fixture 92.11.1.1 Test fixture return loss 92.11.1.2 Test fixture insertion loss
228	92.11.2 Cable assembly test fixture 92.11.3 Mated test fixtures 92.11.3.1 Mated test fixtures insertion loss
229	92.11.3.2 Mated test fixtures return loss
230	92.11.3.3 Mated test fixtures common-mode conversion insertion loss 92.11.3.4 Mated test fixtures common-mode return loss
232	92.11.3.5 Mated test fixtures common-mode to differential mode return loss 92.11.3.6 Mated test fixtures integrated crosstalk noise
233	92.11.3.6.1 Mated test fixture multiple disturber near-end crosstalk (MDNEXT) loss 92.11.3.6.2 Mated test fixture multiple disturber far-end crosstalk (MDFEXT) loss 92.11.3.6.3 Mated test fixture integrated crosstalk noise (ICN)
234	92.12 MDI specification
235	92.12.1 100GBASE-CR4 MDI connectors 92.12.1.1 Style-1 100GBASE-CR4 MDI connectors
236	92.12.1.2 Style-2 100GBASE-CR4 MDI connectors
237	92.13 Environmental specifications
238	92.14 Protocol implementation conformance statement (PICS) proforma for Clause 92, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.1 Introduction 92.14.2 Identification 92.14.2.1 Implementation identification 92.14.2.2 Protocol summary
239	92.14.3 Major capabilities/options
240	92.14.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.4.1 PMD functional specifications
241	92.14.4.2 Management functions
242	92.14.4.3 Transmitter specifications
243	92.14.4.4 Receiver specifications
244	92.14.4.5 Cable assembly specifications
245	92.14.4.6 MDI connector specifications 92.14.4.7 Environmental specifications
246	93. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.1 Overview
247	93.2 Physical Medium Dependent (PMD) service interface
248	93.3 PCS requirements for Auto-Negotiation (AN) service interface 93.4 Delay constraints 93.5 Skew constraints
249	93.6 PMD MDIO function mapping
250	93.7 PMD functional specifications 93.7.1 Link block diagram
251	93.7.2 PMD Transmit function 93.7.3 PMD Receive function 93.7.4 Global PMD signal detect function 93.7.5 PMD lane-by-lane signal detect function
252	93.7.6 Global PMD transmit disable function 93.7.7 PMD lane-by-lane transmit disable function 93.7.8 Loopback mode 93.7.9 PMD fault function 93.7.10 PMD transmit fault function
253	93.7.11 PMD receive fault function 93.7.12 PMD control function
254	93.8 100GBASE-KR4 electrical characteristics 93.8.1 Transmitter characteristics 93.8.1.1 Transmitter test fixture
256	93.8.1.2 Signaling rate and range 93.8.1.3 Signal levels
257	93.8.1.4 Transmitter output return loss 93.8.1.5 Transmitter output waveform
259	93.8.1.5.1 Linear fit to the measured waveform 93.8.1.5.2 Steady-state voltage and linear fit pulse peak 93.8.1.5.3 Coefficient initialization 93.8.1.5.4 Coefficient step size 93.8.1.5.5 Coefficient range
260	93.8.1.6 Transmitter output noise and distortion 93.8.1.7 Transmitter output jitter 93.8.2 Receiver characteristics 93.8.2.1 Receiver test fixture
261	93.8.2.2 Receiver input return loss 93.8.2.3 Receiver interference tolerance
262	93.8.2.4 Receiver jitter tolerance
264	93.9 Channel characteristics 93.9.1 Channel Operating Margin 93.9.2 Insertion loss 93.9.3 Return loss
266	93.9.4 AC-coupling 93.10 Environmental specifications 93.10.1 General safety
267	93.10.2 Network safety 93.10.3 Installation and maintenance guidelines 93.10.4 Electromagnetic compatibility 93.10.5 Temperature and humidity
268	93.11 Protocol implementation conformance statement (PICS) proforma for Clause 93, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.1 Introduction 93.11.2 Identification 93.11.2.1 Implementation identification 93.11.2.2 Protocol summary
269	93.11.3 Major capabilities/options
270	93.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.4.1 Functional specifications
271	93.11.4.2 Transmitter characteristics
273	93.11.4.3 Receiver characteristics
274	93.11.4.4 Channel characteristics 93.11.4.5 Environmental specifications
275	94. Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.1 Overview
276	94.2 Physical Medium Attachment (PMA) Sublayer 94.2.1 PMA Service Interface
277	94.2.1.1 PMA:IS_UNITDATA_i.request 94.2.1.1.1 Semantics of the service primitive 94.2.1.1.2 When generated 94.2.1.1.3 Effect of receipt 94.2.1.2 PMA:IS_UNITDATA_i.indication 94.2.1.2.1 Semantics of the service primitive
278	94.2.1.2.2 When generated 94.2.1.2.3 Effect of receipt 94.2.1.3 PMA:IS_SIGNAL.indication 94.2.1.3.1 Semantics of the service primitive 94.2.1.3.2 When generated 94.2.1.3.3 Effect of receipt 94.2.1.4 PMA:IS_TX_MODE.request 94.2.1.4.1 Semantics of the service primitive 94.2.1.4.2 When generated 94.2.1.4.3 Effect of receipt
279	94.2.1.5 PMA:IS_RX_MODE.request 94.2.1.5.1 Semantics of the service primitive 94.2.1.5.2 When generated 94.2.1.5.3 Effect of receipt 94.2.1.6 PMA:IS_ENERGY_DETECT.indication 94.2.1.6.1 Semantics of the service primitive 94.2.1.6.2 When generated 94.2.1.6.3 Effect of receipt 94.2.1.7 PMA:IS_RX_TX_MODE.indication
280	94.2.1.7.1 Semantics of the service primitive 94.2.1.7.2 When generated 94.2.1.7.3 Effect of receipt 94.2.2 PMA Transmit Functional Specifications
281	94.2.2.1 FEC Interface 94.2.2.2 Overhead Frame 94.2.2.3 Overhead
282	94.2.2.4 Termination Blocks
283	94.2.2.5 Gray Mapping 94.2.2.6 Precoding 94.2.2.7 PAM4 encoding
284	94.2.2.8 PMD Interface 94.2.3 PMA Receive Functional Specifications
285	94.2.3.1 Overhead 94.2.4 Skew constraints 94.2.5 Delay constraints 94.2.6 Link status 94.2.7 PMA local loopback mode
286	94.2.8 PMA remote loopback mode (optional) 94.2.9 PMA test patterns 94.2.9.1 JP03A test pattern 94.2.9.2 JP03B test pattern 94.2.9.3 Quaternary PRBS13 test pattern
287	94.2.9.4 Transmitter linearity test pattern 94.2.10 PMA MDIO function mapping
288	94.3 Physical Medium Dependent (PMD) Sublayer 94.3.1 Physical Medium Dependent (PMD) service interface
289	94.3.1.1 PMD:IS_UNITDATA_i.request 94.3.1.1.1 Semantics of the service primitive 94.3.1.1.2 When generated 94.3.1.1.3 Effect of receipt 94.3.1.2 PMD:IS_UNITDATA_i.indication 94.3.1.2.1 Semantics of the service primitive 94.3.1.2.2 When generated 94.3.1.2.3 Effect of receipt
290	94.3.1.3 PMD:IS_SIGNAL.indication 94.3.1.3.1 Semantics of the service primitive 94.3.1.3.2 When generated 94.3.1.3.3 Effect of receipt 94.3.2 PCS requirements for Auto-Negotiation (AN) service interface 94.3.3 Delay constraints 94.3.4 Skew constraints
291	94.3.5 PMD MDIO function mapping
292	94.3.6 PMD functional specifications 94.3.6.1 Link block diagram
293	94.3.6.2 PMD Transmit function 94.3.6.3 PMD Receive function 94.3.6.4 Global PMD signal detect function 94.3.6.5 PMD lane-by-lane signal detect function 94.3.6.6 Global PMD transmit disable function
294	94.3.6.7 PMD lane-by-lane transmit disable function 94.3.6.8 Loopback mode 94.3.7 PMD fault function 94.3.8 PMD transmit fault function
295	94.3.9 PMD receive fault function 94.3.10 PMD control function 94.3.10.1 Overview 94.3.10.2 Training frame structure
296	94.3.10.3 Training frame words 94.3.10.4 Frame marker 94.3.10.5 Control channel encoding 94.3.10.5.1 Differential Manchester encoding 94.3.10.5.2 Control channel structure 94.3.10.6 Coefficient update field
298	94.3.10.6.1 Preset 94.3.10.6.2 Initialize 94.3.10.6.3 Parity 94.3.10.6.4 Coefficient (k) update 94.3.10.7 Status report field
299	94.3.10.7.1 Parity 94.3.10.7.2 Training frame countdown 94.3.10.7.3 Receiver ready
300	94.3.10.7.4 Coefficient (k) status 94.3.10.7.5 Coefficient update process 94.3.10.8 Training pattern
301	94.3.10.9 Transition from training to data 94.3.10.10 Frame lock state diagram 94.3.10.11 Training state diagram
303	94.3.10.12 Coefficient update state diagram 94.3.11 PMD LPI function 94.3.11.1 Alert Signal 94.3.11.1.1 Frame marker
304	94.3.11.1.2 Coefficient update field 94.3.11.1.3 Status report field 94.3.11.1.4 Parity 94.3.11.1.5 Mode 94.3.11.1.6 Alert frame countdown 94.3.11.1.7 PMA alignment offset
305	94.3.11.1.8 Receiver ready 94.3.11.1.9 Transition from alert to data 94.3.12 PMD Transmitter electrical characteristics
306	94.3.12.1 Test fixture 94.3.12.1.1 Test fixture impedance
308	94.3.12.1.2 Test fixture insertion loss 94.3.12.2 Signaling rate and range 94.3.12.3 Signal levels
309	94.3.12.4 Transmitter output return loss
310	94.3.12.5 Transmitter output waveform
311	94.3.12.5.1 Transmitter linearity
312	94.3.12.5.2 Linear fit to the measured waveform 94.3.12.5.3 Steady-state voltage and linear fit pulse peak 94.3.12.5.4 Coefficient initialization
313	94.3.12.5.5 Coefficient step size 94.3.12.5.6 Coefficient range 94.3.12.6 Transmitter output jitter 94.3.12.6.1 Clock random jitter and clock deterministic jitter
314	94.3.12.6.2 Even-odd jitter
315	94.3.12.7 Transmitter output noise and distortion 94.3.13 PMD Receiver electrical characteristics 94.3.13.1 Test fixture
316	94.3.13.2 Receiver input return loss 94.3.13.3 Receiver interference tolerance
319	94.3.13.4 Receiver jitter tolerance 94.3.13.4.1 Test setup 94.3.13.4.2 Test method 94.4 Channel characteristics 94.4.1 Channel Operating Margin 94.4.2 Channel insertion loss
321	94.4.3 Channel return loss
322	94.4.4 Channel AC-coupling 94.5 Environmental specifications 94.5.1 General safety 94.5.2 Network safety
323	94.5.3 Installation and maintenance guidelines 94.5.4 Electromagnetic compatibility 94.5.5 Temperature and humidity
324	94.6 Protocol implementation conformance statement (PICS) proforma for Clause 94, Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KP4 94.6.1 Introduction 94.6.2 Identification 94.6.2.1 Implementation identification 94.6.2.2 Protocol summary
325	94.6.3 Major capabilities/options 94.6.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KP4 94.6.4.1 PMA functional specifications
326	94.6.4.2 PMD functional specifications
330	94.6.4.3 PMD transmitter characteristics
331	94.6.4.4 PMD receiver characteristics
332	94.6.4.5 Channel characteristics 94.6.4.6 Environment specifications
333	Annex 83A (normative) 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s Attachment Unit Interface (CAUI) 83A.3 XLAUI/CAUI electrical characteristics 83A.3.2a EEE operation 83A.3.3 Transmitter characteristics 83A.3.3.1 Output amplitude 83A.3.3.1.1 Amplitude and swing 83A.3.3.6 Global transmit disable function
334	83A.3.4 Receiver characteristics 83A.3.4.7 Global energy detect function 83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb/s Attachment Unit Interface (XLAUI) and 100 Gb/s Attachment Unit Interface (CAUI) 83A.7.3 Major capabilities/options 83A.7.4 XLAUI/CAUI transmitter requirements
335	83A.7.5 XLAUI/CAUI receiver requirements
336	Annex 83C (informative) PMA sublayer partitioning examples 83C.1 Partitioning examples with FEC 83C.1.1 FEC implemented with PCS
337	83C.1.2 FEC implemented with PMD
338	83C.1a Partitioning examples with RS-FEC 83C.1a.1 Single PMA sublayer with RS-FEC
339	83C.1a.2 Single CAUI with RS-FEC
340	Annex 91A (informative) RS-FEC codeword examples 91A.1 Input to the 64B/66B to 256B/257B transcoder
341	91A.2 Output of the RS(528,514) encoder
342	91A.3 Output of the RS(544,514) encoder 91A.4 Reed-Solomon encoder model
343	91A.4.1 Global variable declarations for RS(528,514) 91A.4.2 Global variable declarations for RS(544,514) 91A.4.3 Other global variable declarations 91A.4.4 GF(210) multiplier function 91A.4.5 Reed-Solomon encoder function
344	91A.4.6 Main function
345	Annex 92A (informative) 100GBASE-CR4 TP0 and TP5 test point parameters and channel characteristics 92A.1 Overview 92A.2 Transmitter characteristics at TP0 92A.3 Receiver characteristics at TP5 92A.4 Transmitter and receiver differential printed circuit board trace loss
346	92A.5 Channel insertion loss
348	92A.6 Channel return loss 92A.7 Channel Operating Margin (COM)
349	Annex 93A (normative) Specification methods for electrical channels 93A.1 Channel Operating Margin
351	93A.1.1 Measurement of the channel 93A.1.2 Transmitter and receiver device package models
352	93A.1.2.1 Cascade connection of two-port networks 93A.1.2.2 Two-port network for a shunt capacitance 93A.1.2.3 Two-port network for the package transmission line
353	93A.1.2.4 Assembly of transmitter and receiver device package models 93A.1.3 Path terminations
354	93A.1.4 Filters 93A.1.4.1 Receiver noise filter 93A.1.4.2 Transmitter equalizer 93A.1.4.3 Receiver equalizer
355	93A.1.5 Pulse response 93A.1.6 Determination of variable equalizer parameters
357	93A.1.7 Interference and noise amplitude 93A.1.7.1 Interference amplitude distribution 93A.1.7.2 Noise amplitude distribution
358	93A.1.7.3 Combination of interference and noise distributions
359	93A.2 Test channel calibration using COM
360	93A.3 Fitted insertion loss
361	93A.4 Insertion loss deviation
362	Annex 93B (informative) Electrical backplane reference model
363	Annex 93C (normative) Receiver interference tolerance 93C.1 Test setup
366	93C.2 Test method
368	Back cover

Additional information

Standard Title	IEEE Standard for Ethernet Amendment 2: Physical Layer Specifications and Management Parameters for 100 Gb/s Operation Over Backplanes and Copper Cables
Published Code	IEEE
Publication Date	2014
Pages Count	368

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