Shopping Cart

No products in the cart.

IEEE 802.3bq 2016

$105.63

IEEE Standard for Ethernet Amendment 3: Physical Layer and Management Parameters for 25 Gb/s and 40 Gb/s Operation, Types 25GBASE-T and 40GBASE-T

Published By Publication Date Number of Pages
IEEE 2016 211
Guaranteed Safe Checkout
Category:

If you have any questions, feel free to reach out to our online customer service team by clicking on the bottom right corner. We’re here to assist you 24/7.
Email:[email protected]

Amendment Standard – Superseded. This amendment to IEEE Std 802.3-2015 specifies new Physical Coding Sublayer (PCS) interfaces and new Physical Medium Attachment (PMA) sublayer interfaces for 25 Gb/s Ethernet and 40 Gb/s Ethernet. 25GBASE-T and 40GBASE-T specify LAN interconnects for up to 30 m of balanced twisted-pair structured cabling, for 25 Gb/s and 40 Gb/s, respectively.

PDF Catalog

PDF Pages PDF Title
1 IEEE Std 8023bq-2016 Front cover
2 Title page
4 Important Notices and Disclaimers Concerning IEEE Standards Documents
7 Participants
11 Introduction
14 Contents
24 IMPORTANT NOTICE
25 1. Introduction
1.3 Normative references
1.4 Definitions
26 1.5 Abbreviations
27 28. Physical Layer link signaling for Auto-Negotiation on twisted pair
28.3 State diagrams and variable definitions
28.3.1 State diagram variables
28.3.2 State diagram timers
28.5 Protocol implementation conformance statement (PICS) proforma for Clause 28, Physical Layer link signaling for Auto-Negotiation on twisted pair
28.5.3 Major capabilities/options
28 28.5.4 PICS proforma tables for Physical Layer link signaling for Auto-Negotiation on twisted pair
28.5.4.8 State diagrams
29 30. Management
30.2 Managed objects
30.2.5 Capabilities
30.3 Layer management for DTEs
30.3.2 PHY device managed object class
30.3.2.1 PHY device attributes
30.3.2.1.2 aPhyType
30 30.3.2.1.3 aPhyTypeList
30.5 Layer management for medium attachment units (MAUs)
30.5.1 MAU managed object class
30.5.1.1 MAU attributes
30.5.1.1.2 aMAUType
30.5.1.1.4 aMediaAvailable
30.5.1.1.19 aSNROpMarginChnlA
31 30.5.1.1.20 aSNROpMarginChnlB
30.5.1.1.21 aSNROpMarginChnlC
30.5.1.1.22 aSNROpMarginChnlD
32 30.5.1.1.24 aLDFastRetrainCount
30.5.1.1.25 aLPFastRetrainCount
30.6 Management for link Auto-Negotiation
30.6.1 Auto-Negotiation managed object class
30.6.1.1 Auto-Negotiation attributes
30.6.1.1.5 aAutoNegLocalTechnologyAbility
33 45. Management Data Input/Output (MDIO) Interface
45.2 MDIO Interface Registers
45.2.1 PMA/PMD registers
34 45.2.1.6 PMA/PMD control 2 register (Register 1.7)
45.2.1.7 PMA/PMD status 2 register (Register 1.8)
45.2.1.7.4 Transmit fault (1.8.11)
45.2.1.7.5 Receive fault (1.8.10)
35 45.2.1.8 PMD transmit disable register (Register 1.9)
45.2.1.12 40G/100G PMA/PMD extended ability register (Register 1.13)
45.2.1.9a 40GBASE-T ability (1.13.6)
36 45.2.1.14b 25G PMA/PMD extended ability register (Register 1.19)
45.2.1.14b.a 25GBASE-T ability (1.19.5)
45.2.1.62 10MultiGBASE-T status (Register 1.129)
45.2.1.62.1 LP information valid (1.129.0)
45.2.1.63 10MultiGBASE-T pair swap and polarity register (Register 1.130)
37 45.2.1.64 10MultiGBASE-T TX power backoff and PHY short reach setting (Register 1.131)
45.2.1.64.1 10MultiGBASE-T TX power backoff settings (1.131.15:10)
45.2.1.64.2 PHY short reach mode (1.131.0)
45.2.1.65 10MultiGBASE-T test mode register (Register 1.132)
38 45.2.1.65.1 Test mode control (1.132.15:13)
45.2.1.65.2 Transmitter test frequencies (1.132.12:10)
45.2.1.66 SNR operating margin channel A register (Register 1.133)
45.2.1.67 SNR operating margin channel B register (Register 1.134)
45.2.1.68 SNR operating margin channel C register (Register 1.135)
45.2.1.69 SNR operating margin channel D register (Register 1.136)
39 45.2.1.74 RX signal power channel A register (Register 1.141)
45.2.1.75 RX signal power channel B register (Register 1.142)
45.2.1.76 RX signal power channel C register (Register 1.143)
45.2.1.77 RX signal power channel D register (Register 1.144)
45.2.1.78 10MultiGBASE-T skew delay register (Registers 1.145 and 1.146)
40 45.2.1.79 10MultiGBASE-T fast retrain status and control register (Register 1.147)
45.2.1.79.1 LP fast retrain count (1.147.15:11)
45.2.1.79.2 LD fast retrain count (1.147.10:6)
45.2.1.79.5 Fast retrain signal type (1.147.2:1)
45.2.1.79.6 Fast retrain enable (1.147.0)
41 45.2.3 PCS registers
45.2.3.1 PCS control 1 register (Register 3.0)
45.2.3.1.2 Loopback (3.0.14)
45.2.3.2 PCS status 1 register (Register 3.1)
45.2.3.2.7 PCS receive link status (3.1.2)
42 45.2.3.6 PCS control 2 register (Register 3.7)
45.2.3.6.1 PCS type selection (3.7.23:0)
43 45.2.3.7 PCS status 2 register (Register 3.8)
45.2.3.7.3aa 25GBASE-T capable (3.8.9)
45.2.3.7.3b 40GBASE-T capable (3.8.6)
45.2.3.9 EEE control and capability 1 (Register 3.20)
44 45.2.3.9.4a 40GBASE-T EEE supported (3.20.7)
45.2.3.9a EEE control and capability 2 (Register 3.21)
45.2.3.9a.1 25GBASE-T EEE supported (3.21.2)
45.2.3.13 BASE-R and 10MultiGBASE-T PCS status 1 register (Register 3.32)
45 45.2.3.13.1 BASE-R and 10MultiGBASE-T receive link status (3.32.12)
45.2.3.13.4 BASE-R and 10MultiGBASE-T PCS high BER (3.32.1)
46 45.2.3.13.5 BASE-R and 10MultiGBASE-T block lock (3.32.0)
45.2.3.14 BASE-R and 10MultiGBASE-T PCS status 2 register (Register 3.33)
45.2.3.14.1 Latched block lock (3.33.15)
47 45.2.3.14.2 Latched high BER (3.33.14)
45.2.3.14.3 BER (3.33.13:8)
45.2.3.14.4 Errored blocks (3.33.7:0)
45.2.7 Auto-Negotiation registers
48 45.2.7.10 10MultiGBASE-T AN control 1 register (Register 7.32)
49 45.2.7.10.4a 40GBASE-T capability (7.32.11)
45.2.7.10.4b 25GBASE-T capability (7.32.10)
45.2.7.10.4c 25GBASE-T Fast retrain ability (7.32.9)
45.2.7.10.4d 40GBASE-T Fast retrain ability (7.32.3)
45.2.7.10.5 10GBASE-T LD PMA training reset request (7.32.2)
50 45.2.7.10.6 10GBASE-T Fast retrain ability (7.32.1)
45.2.7.10.7 10GBASE-T LD loop timing ability (7.32.0)
45.2.7.11 10MultiGBASE-T AN status 1 register (Register 7.33)
45.2.7.11.1 MASTER-SLAVE configuration fault (7.33.15)
51 45.2.7.11.2 MASTER-SLAVE configuration resolution (7.33.14)
45.2.7.11.7 10GBASE-T Link partner PMA training reset request (7.33.9)
45.2.7.11.7a Link partner 40GBASE-T capability (7.33.8)
45.2.7.11.7b Link partner 25GBASE-T capability (7.33.7)
45.2.7.11.7c 25GBASE-T Fast retrain ability (7.33.2)
52 45.2.7.11.8 10GBASE-T Fast retrain ability (7.33.1)
45.2.7.11.9 40GBASE-T Fast retrain ability (7.33.0)
45.2.7.13 EEE advertisement (Register 7.60)
53 45.2.7.13.4a 40GBASE-T EEE supported (7.60.9)
45.2.7.13.12a 25GBASE-T EEE supported (7.60.0)
45.2.7.14 EEE link partner ability (Register 7.61)
45.2.7.14a MultiGBASE-T AN control 2 (Register 7.64)
54 45.2.7.14a.1 25GBASE-T THP Bypass Request
45.2.7.14a.2 40GBASE-T THP Bypass Request
45.2.7.14b MultiGBASE-T AN status 2 (Register 7.65)
55 45.2.7.14b.1 25GBASE-T Link Partner THP Bypass Request
45.2.7.14b.2 40GBASE-T Link Partner THP Bypass Request
56 45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input/Output (MDIO) interface
45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface
45.5.3.2 PMA/PMD MMD options
45.5.3.3 PMA/PMD Management functions
45.5.3.6 PCS options
57 45.5.3.7 PCS management functions
45.5.3.8 Auto-Negotiation options
58 45.5.3.9 Auto-Negotiation management functions
59 55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T
55.3.4 PMA training side-stream scrambler polynomials
55.6 Management interfaces
55.6.1.2 10GBASE-T Auto-Negotiation page use
55.6.2 MASTER-SLAVE configuration resolution
60 55.12.3 Physical Coding Sublayer (PCS)
61 78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.3 Reconciliation sublayer operation
78.1.3.3.1 PHY LPI transmit operation
78.1.4 PHY types optionally supporting EEE
78.2 LPI mode timing parameters description
62 78.3 Capabilities Negotiation
78.5 Communication link access latency
63 80. Introduction to 40 Gb/s and 100 Gb/s networks
80.1 Overview
80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model
80.1.4 Nomenclature
64 80.1.5 Physical Layer signaling systems
65 80.4 Delay Constraints
66 81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation (XLGMII and CGMII)
81.1 Overview
81.1.7.3 Mapping of PLS_CARRIER.indication
67 81.3.4 Link fault signaling
81.3.4.1 Variables and counters
68 81.3.4.2 State diagram
69 81.5 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb/s and 100 Gb/s operation
81.5.3.7 Link Interruption
70 105. Introduction to 25 Gb/s networks
105.1 Overview
105.1.1 Scope
105.1.2 Relationship of 25 Gigabit Ethernet to the ISO OSI reference model
71 105.1.3 Nomenclature
105.2 Physical Layer signaling systems
72 105.3 Summary of 25 Gigabit Ethernet sublayers
105.3.1 Reconciliation Sublayer (RS) and 25 Gigabit Media Independent Interface (25GMII)
105.3.6 Auto-Negotiation (AN)
105.5 Delay constraints
73 113. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T
113.1 Overview
113.1.1 Nomenclature
74 113.1.2 Relationship of 25GBASE-T and 40GBASE-T to other standards
113.1.3 Operation of 25GBASE-T and 40GBASE-T
78 113.1.3.1 Summary of Physical Coding Sublayer (PCS)
79 113.1.3.2 Summary of Physical Medium Attachment (PMA) sublayer
113.1.3.3 Summary of EEE capability
80 113.1.4 Signaling
81 113.1.5 Interfaces
113.1.6 Conventions in this clause
113.2 25GBASE-T and 40GBASE-T service primitives and interfaces
82 113.2.1 Technology Dependent Interface
113.2.1.1 PMA_LINK.request
113.2.1.1.1 Semantics of the primitive
113.2.1.1.2 When generated
113.2.1.1.3 Effect of receipt
113.2.1.2 PMA_LINK.indication
113.2.1.2.1 Semantics of the primitive
83 113.2.1.2.2 When generated
113.2.1.2.3 Effect of receipt
113.2.2 PMA service interface
84 113.2.2.1 PMA_TXMODE.indication
113.2.2.1.1 Semantics of the primitive
85 113.2.2.1.2 When generated
113.2.2.1.3 Effect of receipt
113.2.2.2 PMA_CONFIG.indication
113.2.2.2.1 Semantics of the primitive
113.2.2.2.2 When generated
113.2.2.2.3 Effect of receipt
113.2.2.3 PMA_UNITDATA.request
86 113.2.2.3.1 Semantics of the primitive
113.2.2.3.2 When generated
113.2.2.3.3 Effect of receipt
113.2.2.4 PMA_UNITDATA.indication
113.2.2.4.1 Semantics of the primitive
87 113.2.2.4.2 When generated
113.2.2.4.3 Effect of receipt
113.2.2.5 PMA_SCRSTATUS.request
113.2.2.5.1 Semantics of the primitive
113.2.2.5.2 When generated
113.2.2.5.3 Effect of receipt
113.2.2.6 PMA_PCSSTATUS.request
113.2.2.6.1 Semantics of the primitive
113.2.2.6.2 When generated
88 113.2.2.6.3 Effect of receipt
113.2.2.7 PMA_RXSTATUS.indication
113.2.2.7.1 Semantics of the primitive
113.2.2.7.2 When generated
113.2.2.7.3 Effect of receipt
113.2.2.8 PMA_REMRXSTATUS.request
113.2.2.8.1 Semantics of the primitive
113.2.2.8.2 When generated
89 113.2.2.8.3 Effect of receipt
113.2.2.9 PMA_ALERTDETECT.indication
113.2.2.9.1 Semantics of the primitive
113.2.2.9.2 When generated
113.2.2.9.3 Effect of receipt
113.2.2.10 PCS_RX_LPI_STATUS.request
113.2.2.10.1 Semantics of the primitive
113.2.2.10.2 When generated
113.2.2.10.3 Effect of receipt
90 113.2.2.11 PMA_PCSDATAMODE.indication
113.2.2.11.1 Semantics of the primitive
113.2.2.11.2 When generated
113.2.2.11.3 Effect of receipt
113.2.2.12 PMA_FR_ACTIVE.indication
113.2.2.12.1 Semantics of the primitive
113.2.2.12.2 When generated
113.2.2.12.3 Effect of receipt
113.3 Physical Coding Sublayer (PCS)
113.3.1 PCS service interface (25GMII/XLGMII)
91 113.3.2 PCS functions
92 113.3.2.1 PCS Reset function
113.3.2.2 PCS Transmit function
93 113.3.2.2.1 Use of blocks
113.3.2.2.2 65B-LDPC transmission code
113.3.2.2.3 Notation conventions
96 113.3.2.2.4 Transmission order
113.3.2.2.5 Block structure
113.3.2.2.6 Control codes
101 113.3.2.2.7 Ordered sets
113.3.2.2.8 Idle (/I/)
113.3.2.2.9 LPI (/LI/)
113.3.2.2.10 Start (/S/)
102 113.3.2.2.11 Terminate (/T/)
113.3.2.2.12 ordered set (/O/)
113.3.2.2.13 Error (/E/)
113.3.2.2.14 Transmit process
113.3.2.2.15 64B/65B to 512B/513B Transcoder
105 113.3.2.2.16 Aggregation
113.3.2.2.17 PCS Scrambler
107 113.3.2.2.18 LDPC framing and LDPC encoder
113.3.2.2.19 Reed Solomon encoder
108 113.3.2.2.20 DSQ128 bit mapping
110 113.3.2.2.21 DSQ128 to 4D-PAM16
113.3.2.2.22 Block-LDPC framer
113.3.2.2.23 EEE capability
111 113.3.2.3 PCS Receive function
112 113.3.2.3.1 Frame and block synchronization
113 113.3.2.3.2 PCS descrambler
113.3.2.3.3 Invalid blocks
113.3.3 Test-pattern generators
114 113.3.4 PMA training side-stream scrambler polynomials
113.3.4.1 Generation of bits San, Sbn, Scn, Sdn
113.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn
113.3.4.3 PMA training mode descrambler polynomials
115 113.3.5 LPI signaling
116 113.3.5.1 LPI Synchronization
117 113.3.5.2 Quiet period signaling
113.3.5.3 Refresh period signaling
118 113.3.6 Detailed functions and state diagrams
113.3.6.1 State diagram conventions
113.3.6.2 State diagram parameters
113.3.6.2.1 Constants
119 113.3.6.2.2 Variables
121 113.3.6.2.3 Timers
113.3.6.2.4 Functions
123 113.3.6.2.5 Counters
124 113.3.6.3 State diagrams
113.3.7 PCS management
113.3.7.1 Status
125 113.3.7.2 Counters
131 113.3.7.3 Loopback
113.4 Physical Medium Attachment (PMA) sublayer
113.4.1 PMA functional specifications
132 113.4.2 PMA functions
113.4.2.1 PMA Reset function
113.4.2.2 PMA Transmit function
113.4.2.2.1 Alert signal
134 113.4.2.2.2 Link failure signal
113.4.2.3 PMA transmit disable function
113.4.2.3.1 Global PMA transmit disable function
113.4.2.3.2 PMA pair by pair transmit disable function
113.4.2.3.3 PMA MDIO function mapping
135 113.4.2.4 PMA Receive function
136 113.4.2.5 PHY Control function
137 113.4.2.5.1 Infofield notation
113.4.2.5.2 Start of Frame Delimiter
113.4.2.5.3 Current transmitter settings
138 113.4.2.5.4 Next transmitter settings
113.4.2.5.5 Requested transmitter settings
113.4.2.5.6 Message Field
139 113.4.2.5.7 SNR_margin
140 113.4.2.5.8 Transition counter
113.4.2.5.9 Coefficient exchange handshake
113.4.2.5.10 Ability Fields
113.4.2.5.11 Reserved fields
113.4.2.5.12 Vendor-specific field
141 113.4.2.5.13 Coefficient Field
113.4.2.5.14 CRC16
113.4.2.5.15 Startup sequence
144 113.4.2.5.16 Fast retrain function
145 113.4.2.6 Link Monitor function
113.4.2.7 Refresh Monitor function
113.4.2.8 Clock Recovery function
113.4.3 MDI
113.4.3.1 MDI signals transmitted by the PHY
146 113.4.3.2 Signals received at the MDI
147 113.4.4 Automatic MDI/MDI-X configuration
113.4.5 State variables
113.4.5.1 State diagram variables
150 113.4.5.2 Timers
151 113.4.5.3 Functions
113.4.5.4 Counters
152 113.4.6 State diagrams
113.4.6.1 PHY Control state diagram
153 113.4.6.2 Transition counter state diagrams
155 113.4.6.3 Link Monitor state diagram
156 113.4.6.4 EEE Refresh monitor state diagram
157 113.4.6.5 Fast retrain state diagram
113.5 PMA electrical specifications
113.5.1 Isolation requirement
113.5.2 Test modes
160 113.5.2.1 Test fixtures
161 113.5.3 Transmitter electrical specifications
113.5.3.1 Maximum output droop
113.5.3.2 Transmitter nonlinear distortion
162 113.5.3.3 Transmitter timing jitter
113.5.3.4 Transmitter power spectral density (PSD) and power level
163 113.5.3.5 Transmit clock frequency
113.5.4 Receiver electrical specifications
113.5.4.1 Receiver differential input signals
164 113.5.4.2 Receiver frequency tolerance
113.5.4.3 Rejection of External EM Fields
113.5.4.4 Alien crosstalk noise rejection
165 113.5.4.5 Short reach mode
113.6 Management interfaces
113.6.1 Support for Auto-Negotiation
166 113.6.1.1 25G/40GBASE-T use of registers during Auto-Negotiation
113.6.1.2 25G/40GBASE-T Auto-Negotiation page use
113.6.1.3 Sending Next Pages
168 113.6.2 MASTER-SLAVE configuration resolution
170 113.7 Link segment characteristics
171 113.7.1 Cabling system characteristics
113.7.2 Link segment transmission parameters
113.7.2.1 Insertion loss
172 113.7.2.2 Differential characteristic impedance
113.7.2.3 Return loss
113.7.2.4 Coupling parameters between duplex channels comprising one link segment
113.7.2.4.1 Differential near-end crosstalk
173 113.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss
174 113.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss
175 113.7.2.4.4 Attenuation to crosstalk ratio, far end (ACRF)
113.7.2.4.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF)
176 113.7.2.4.6 Multiple disturber power sum attenuation to crosstalk ratio, far-end (PS-ACRF)
113.7.2.5 Maximum link delay
113.7.2.6 Link delay skew
113.7.3 Coupling parameters between link segments
177 113.7.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss
113.7.3.1.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
113.7.3.2 Multiple disturber alien far-end crosstalk (MDAFEXT) loss
178 113.7.3.2.1 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF)
113.7.4 Direct attach cable assembly—Short Reach Mode
113.7.4.1 Insertion loss
179 113.7.4.2 Return loss
113.7.4.3 Coupling parameters between direct attach cable assembly duplex channels comprising one link segment
113.7.4.3.1 Differential near-end crosstalk
180 113.7.4.3.2 Multiple disturber near-end crosstalk (MDNEXT) loss
113.7.4.3.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss
113.7.4.3.4 Attenuation to crosstalk ratio, far end (ACRF)
181 113.7.4.3.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF)
113.7.4.3.6 Maximum link delay
113.7.4.3.7 Link delay skew
113.7.4.3.8 Multiple disturber alien near-end crosstalk (MDANEXT) loss
113.7.4.3.9 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
182 113.7.4.3.10 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF)
183 113.7.5 Noise environment
113.8 MDI specification
113.8.1 MDI connectors
113.8.2 MDI electrical specifications
185 113.8.2.1 MDI return loss
113.8.2.2 MDI impedance balance
186 113.8.2.3 MDI fault tolerance
113.9 Environmental specifications
113.9.1 General safety
113.9.2 Network safety
187 113.9.3 Installation and maintenance guidelines
113.9.4 Telephone voltages
113.9.5 Electromagnetic compatibility
113.9.6 Temperature and humidity
113.10 PHY labeling
113.11 Delay constraints
189 113.12 Protocol implementation conformance statement (PICS) proforma for Clause 113, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T
113.12.1 Identification
113.12.1.1 Implementation identification
113.12.1.2 Protocol summary
190 113.12.2 Major capabilities/options
113.12.3 Physical Coding Sublayer (PCS)
192 113.12.3.1 PCS Receive functions
113.12.3.2 Other PCS functions
113.12.4 Physical Medium Attachment (PMA)
195 113.12.5 Management interface
196 113.12.6 PMA Electrical Specifications
198 113.12.7 Characteristics of the link segment
113.12.8 Characteristics of the direct attach cable assembly
199 113.12.9 MDI requirements
113.12.10 General safety and environmental requirements
200 113.12.11 Timing requirements
201 Annex 28B (normative) IEEE 802.3 Selector Base Page definition
28B.3 Priority resolution
202 Annex 28C (normative) Next Page Message Code field definitions
28C.11 Message code 9—10MultiGBASE-T and 1000BASE-T technology message code
203 Annex 28D (normative) Description of extensions to Clause 28 and associated annexes
28D.8 Extensions required for Clause 113 (25GBASE-T and 40GBASE-T)
204 Annex 113A (informative) Description of cable clamp and test setup
113A.1 Overview
113A.2 Description of cable clamp
206 113A.3 Cable clamp measurement, calibration, and validation
209 113A.4 Test setup
210 Annex A (informative) Bibliography
IEEE 802.3bq 2016
$105.63