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IEEE 8802-3:2021/Amd8-2021

IEEE 8802-3:2021/Amd8-2021

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IEEE/ISO/IEC Telecommunications and exchange between information technology systems — Requirements for local and metropolitan area networks — Part 3:Standard for Ethernet
AMENDMENT 8: Physical layer specifications and management parameters for 2.5 Gb/s, 5 Gb/s, and 10 Gb/s automotive electrical ethernet

Published By Publication Date Number of Pages
IEEE 2021 210
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Adoption Standard – Active. This amendment to IEEE Std 802.3-2018 adds physical layer specifications and 2.5 Gb/s, 5 Gb/s, and 10 Gb/s operation on a single balanced pair of ductors suitable for automotive applications.

PDF Catalog

PDF Pages PDF Title
4 Blank Page
5 Title page
7 Important Notices and Disclaimers Concerning IEEE Standards Documents
10 Participants
13 Introduction
16 Contents
27 1. Introduction
1.3 Normative references
1.4 Definitions
28 1.5 Abbreviations
29 30. Management
30.3 Layer management for DTEs
30.3.2 PHY device managed object class
30.3.2.1 PHY device attributes
30.3.2.1.2 aPhyType
30.3.2.1.3 aPhyTypeList
30 30.5 Layer management for medium attachment units (MAUs)
30.5.1 MAU managed object class
30.5.1.1 MAU attributes
30.5.1.1.2 aMAUType
30.5.1.1.4 aMediaAvailable
30.6 Management for link Auto-Negotiation
30.6.1 Auto-Negotiation managed object class
30.6.1.1 Auto-Negotiation attributes
30.6.1.1.5 aAutoNegLocalTechnologyAbility
31 30.15 Layer management for Power over Data Lines (PoDL) of Single Balanced Twisted-Pair Ethernet
30.15.1 PoDL PSE managed object class
30.15.1.1 PoDL PSE attributes
30.15.1.1.4 aPoDLPSEType
30.15.1.1.5 aPoDLPSEDetectedPDType
32 44. Introduction to 10 Gb/s baseband network
44.1 Overview
44.1.1 Scope
44.1.2 Objectives
33 44.1.3 Relationship of 10 Gigabit Ethernet to the ISO OSI reference model
34 44.1.4 Summary of 10 Gigabit Ethernet sublayers
44.1.4.1 Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII)
44.1.4.4 Physical Layer signaling systems
35 44.3 Delay constraints
44.4 Protocol implementation conformance statement (PICS) proforma
36 45. Management Data Input/Output (MDIO) Interface
45.2 MDIO Interface Registers
45.2.1 PMA/PMD registers
45.2.1.7 PMA/PMD status 2 register (Register 1.8)
45.2.1.7.4 Transmit fault (1.8.11)
37 45.2.1.7.5 Receive fault (1.8.10)
45.2.1.16 BASE-T1 PMA/PMD extended ability register (1.18)
45.2.1.16.1 10GBASE-T1 ability (1.18.6)
45.2.1.16.2 5GBASE-T1 ability (1.18.5)
38 45.2.1.16.3 2.5GBASE-T1 ability (1.18.4)
45.2.1.18 2.5G/5G PMA/PMD extended ability register (Register 1.21)
45.2.1.185 BASE-T1 PMA/PMD control register (1.2100)
45.2.1.185.2 Type selection (1.2100.3:0)
45.2.1.192 MultiGBASE-T1 PMA control register (Register 1.2309)
39 45.2.1.192.1 PMA/PMD reset (1.2309.15)
45.2.1.192.2 Transmit disable (1.2309.14)
45.2.1.192.3 Low power (1.2309.11)
40 45.2.1.193 MultiGBASE-T1 PMA status register (1.2310)
41 45.2.1.193.1 MultiGBASE-T1 OAM ability (1.2310.11)
45.2.1.193.2 EEE ability (1.2310.10)
45.2.1.193.3 Receive fault ability (1.2310.9)
45.2.1.193.4 Low-power ability (1.2310.8)
45.2.1.193.5 PrecodeSel (1.2310.4:3)
45.2.1.193.6 Receive polarity (1.2310.2)
45.2.1.193.7 Receive fault (1.2310.1)
45.2.1.193.8 Receive link status (1.2310.0)
45.2.1.194 MultiGBASE-T1 training register (1.2311)
42 45.2.1.194.1 Interleave request (1.2311.12:11)
45.2.1.194.2 Precoder selection (1.2311.5)
43 45.2.1.194.3 Slow Wake request (1.2311.4)
45.2.1.194.4 User precoder selection (1.2311.3:2)
45.2.1.194.5 MultiGBASE-T1 OAM advertisement (1.2311.1)
45.2.1.194.6 EEE advertisement (1.2311.0)
45.2.1.195 MultiGBASE-T1 link partner training register (1.2312)
44 45.2.1.195.1 Link partner interleave request (1.2312.12:11)
45.2.1.195.2 Link partner Slow Wake requested (1.2312.4)
45.2.1.195.3 Link partner precoder requested (1.2312.3:2)
45.2.1.195.4 Link partner MultiGBASE-T1 OAM advertisement (1.2312.1)
45.2.1.195.5 Link partner EEE advertisement (1.2312.0)
45.2.1.196 MultiGBASE-T1 test mode control register (1.2313)
45 45.2.1.196.1 Test mode control (1.2313.15:13)
45.2.1.196.2 Local transmitter precoder override (1.2313.11)
45.2.1.196.3 Local transmit precoder setting (1.2313.10:9)
45.2.1.196.4 Jitter test control (1.2313.1:0)
46 45.2.1.197 MultiGBASE-T1 SNR operating margin register (Register 1.2314)
45.2.1.198 MultiGBASE-T1 minimum SNR margin register (Register 1.2315)
45.2.1.199 MultiGBASE-T1 user defined data (Register 1.2316)
47 45.2.1.199.1 MultiGBASE-T1 user defined data (1.2316.15:0)
45.2.1.200 MultiGBASE-T1 link partner user defined data register (Register 1.2317)
45.2.1.200.1 MultiGBASE-T1 link partner user defined data register (1.2317.15:0)
48 45.2.3 PCS registers
45.2.3.72 1000BASE-T1 OAM transmit register (Register 3.2308)
49 45.2.3.72.1 1000BASE-T1 OAM message valid (3.2308.15)
45.2.3.72.2 Toggle value (3.2308.14)
45.2.3.72.3 1000BASE-T1 OAM message received (3.2308.13)
45.2.3.72.4 Received message toggle value (3.2308.12)
45.2.3.72.5 Message number (3.2308.11:8)
50 45.2.3.72.6 Ping received (3.2308.3)
45.2.3.72.7 Ping transmit (3.2308.2)
45.2.3.72.8 Local SNR (3.2308.1:0)
45.2.3.73 1000BASE-T1 OAM message register (Registers 3.2309 to 3.2312)
51 45.2.3.74 1000BASE-T1 OAM receive register (Register 3.2313)
45.2.3.74.1 Link partner 1000BASE-T1 OAM message valid (3.2313.15)
45.2.3.74.2 Link partner toggle value (3.2313.14)
45.2.3.74.3 Link partner message number (3.2313.11:8)
45.2.3.74.4 Link partner SNR (3.2313.1:0)
52 45.2.3.75 Link partner 1000BASE-T1 OAM message register (Registers 3.2314 to 3.2317)
45.2.3.76 MultiGBASE-T1 OAM status message register (Register 3.2318 and 3.2319)
53 45.2.3.77 Link partner MultiGBASE-T1 OAM status message register (Register 3.2320 and 3.2321)
45.2.3.78 MultiGBASE-T1 PCS control register (Register 3.2322)
45.2.3.78.1 PCS reset (3.2322.15)
54 45.2.3.78.2 Loopback (3.2322.14)
45.2.3.79 MultiGBASE-T1 PCS status 1 register (Register 3.2323)
55 45.2.3.79.1 Tx LPI received (3.2323.11)
45.2.3.79.2 Rx LPI received (3.2323.10)
45.2.3.79.3 Tx LPI indication (3.2323.9)
45.2.3.79.4 Rx LPI indication (3.2323.8)
45.2.3.79.5 Fault (3.2323.7)
45.2.3.79.6 PCS receive link status (3.2323.2)
45.2.3.80 MultiGBASE-T1 PCS status 2 register (Register 3.2324)
45.2.3.80.1 Receive link status (3.2324.10)
56 45.2.3.80.2 PCS high RFER (3.2324.9)
45.2.3.80.3 PCS block lock (3.2324.8)
45.2.3.80.4 Latched high BER (3.2324.7)
45.2.3.80.5 Latched block lock (3.2324.6)
57 45.2.3.80.6 BER count (3.2324.5:0)
45.2.9 Power Unit Registers
45.2.9.2 PoDL PSE Status 1 register (Register 13.1)
45.2.9.2.7 PSE Type (13.1.9:7)
58 45.2.9.3 PoDL PSE Status 2 register (Register 13.2)
45.2.9.3.2 PD Type (13.2.2:0)
59 45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input/Output (MDIO) interface
45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface.
45.5.3.3 PMA/PMD management functions
61 45.5.3.7 PCS management functions
63 78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.4 PHY types optionally supporting EEE
78.2 LPI mode timing parameters description
64 78.3 Capabilities Negotiation
78.5 Communication link access latency
66 97. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 1000BASE-T1
97.3 Physical Coding Sublayer (PCS)
97.3.8 1000BASE-T1 Operations, Administration, and Maintenance (OAM)
97.3.8.3 State diagram variable to 1000BASE-T1 OAM register mapping
68 98. Auto-Negotiation for single differential-pair media
98.5 Detailed functions and state diagrams
98.5.1 State diagram variables
69 104. Power over Data Lines (PoDL) of Single-Pair Ethernet
104.1 Overview
104.1.3 PoDL system types
104.4 Power Sourcing Equipment (PSE)
104.4.1 PSE types
104.4.6 PSE output requirements
70 104.4.6.3 Power feeding ripple and transients
104.5 Powered Device (PD)
104.5.1 PD types
104.5.6 PD power
104.5.6.4 PD ripple and transients
71 104.6 Additional electrical specifications
104.6.2 Fault tolerance
104.7 Serial communication classification protocol (SCCP)
104.7.2 Serial communication classification protocols
104.7.2.4 Read_Scratchpad function command [0xAA]
73 104.9 Protocol implementation conformance statement (PICS) proforma for Clause 104, Power over Data Lines (PoDL) of Single-Pair Ethernet
104.9.3 Major capabilities/options
104.9.4 PICS proforma tables for Clause 104, Power over Data Lines (PoDL) of Single-Pair Ethernet
104.9.4.3 Powered Device (PD)
74 104.9.4.4 Common Electrical
75 125. Introduction to 2.5 Gb/s and 5 Gb/s networks
125.1 Overview
125.1.2 Relationship of 2.5 Gigabit and 5 Gigabit Ethernet to the ISO OSI reference model
125.1.3 Nomenclature
77 125.1.4 Physical Layer signaling systems
78 125.2 Summary of 2.5 Gigabit and 5 Gigabit Ethernet sublayers
125.2.2 Physical coding sublayer (PCS)
125.2.3 Physical Medium Attachment sublayer (PMA)
125.2.4 Auto-Negotiation
125.2.4.3 Auto-Negotiation, type single differential-pair media
125.3 Delay Constraints
80 149. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1
149.1 Overview
149.1.1 Nomenclature
149.1.2 Relationship of 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 to other standards
81 149.1.3 Operation of 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1
82 149.1.3.1 Physical Coding Sublayer (PCS)
84 149.1.3.2 Physical Medium Attachment (PMA) sublayer
149.1.3.3 EEE Capability
149.1.3.4 Link Synchronization
149.1.4 Signaling
85 149.1.5 Interfaces
149.1.6 Conventions in this clause
149.2 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 service primitives and interfaces
86 149.2.1 Technology Dependent Interface
149.2.1.1 PMA_LINK.request
149.2.1.1.1 Semantics of the primitive
149.2.1.1.2 When generated
149.2.1.1.3 Effect of receipt
149.2.1.2 PMA_LINK.indication
149.2.1.2.1 Semantics of the primitive
149.2.1.2.2 When generated
87 149.2.1.2.3 Effect of receipt
149.2.2 PMA service interface
149.2.2.1 PMA_TXMODE.indication
149.2.2.1.1 Semantics of the primitive
88 149.2.2.1.2 When generated
149.2.2.1.3 Effect of receipt
89 149.2.2.2 PMA_CONFIG.indication
149.2.2.2.1 Semantics of the primitive
149.2.2.2.2 When generated
149.2.2.2.3 Effect of receipt
149.2.2.3 PMA_UNITDATA.request
149.2.2.3.1 Semantics of the primitive
149.2.2.3.2 When generated
90 149.2.2.3.3 Effect of receipt
149.2.2.4 PMA_UNITDATA.indication
149.2.2.4.1 Semantics of the primitive
149.2.2.4.2 When generated
149.2.2.4.3 Effect of receipt
149.2.2.5 PMA_SCRSTATUS.request
149.2.2.5.1 Semantics of the primitive
149.2.2.5.2 When generated
149.2.2.5.3 Effect of receipt
91 149.2.2.6 PMA_PCSSTATUS.request
149.2.2.6.1 Semantics of the primitive
149.2.2.6.2 When generated
149.2.2.6.3 Effect of receipt
149.2.2.7 PMA_RXSTATUS.indication
149.2.2.7.1 Semantics of the primitive
149.2.2.7.2 When generated
149.2.2.7.3 Effect of receipt
92 149.2.2.8 PMA_REMRXSTATUS.request
149.2.2.8.1 Semantics of the primitive
149.2.2.8.2 When generated
149.2.2.8.3 Effect of receipt
149.2.2.9 PMA_PCSDATAMODE.indication
149.2.2.9.1 Semantics of the primitive
149.2.2.9.2 When generated
149.2.2.9.3 Effect of receipt
149.2.2.10 PMA_PCS_RX_LPI_STATUS.request
93 149.2.2.10.1 Semantics of the primitive
149.2.2.10.2 When generated
149.2.2.10.3 Effect of receipt
149.2.2.11 PMA_PCS_TX_LPI_STATUS.request
149.2.2.11.1 Semantics of the primitive
149.2.2.11.2 When generated
149.2.2.11.3 Effect of receipt
149.2.2.12 PMA_ALERTDETECT.indication
94 149.2.2.12.1 Semantics of the primitive
149.2.2.12.2 When generated
149.2.2.12.3 Effect of receipt
149.3 Physical Coding Sublayer (PCS) functions
149.3.1 PCS service interface (XGMII)
149.3.2 PCS functions
95 149.3.2.1 PCS Reset function
149.3.2.2 PCS Transmit function
97 149.3.2.2.1 Use of blocks
149.3.2.2.2 65B RS-FEC transmission code
98 149.3.2.2.3 Notation conventions
100 149.3.2.2.4 Block structure
101 149.3.2.2.5 Control codes
149.3.2.2.6 Ordered sets
149.3.2.2.7 Idle (/I/)
149.3.2.2.8 LPI (/LI/)
149.3.2.2.9 Start (/S/)
102 149.3.2.2.10 Terminate (/T/)
149.3.2.2.11 Ordered set (/O/)
103 149.3.2.2.12 Error (/E/)
149.3.2.2.13 Transmit process
149.3.2.2.14 RS-FEC framing and RS-FEC encoder
149.3.2.2.15 RS-FEC superframe and round-robin interleaving
104 149.3.2.2.16 RS-FEC recombine
149.3.2.2.17 Reed-Solomon encoder
106 149.3.2.2.18 PCS scrambler
149.3.2.2.19 Gray mapping for PAM4 encoding
107 149.3.2.2.20 Selectable precoder
149.3.2.2.21 PAM4 encoding
108 149.3.2.2.22 EEE capability
109 149.3.2.3 PCS Receive function
110 149.3.2.3.1 Frame and block synchronization
149.3.2.3.2 PCS descrambler
149.3.2.3.3 Invalid blocks
149.3.3 Test-pattern generators
111 149.3.4 Side-stream scrambler polynomials
112 149.3.5 PMA training frame
149.3.5.1 Generation of symbol Tn
149.3.5.2 PMA training mode descrambler polynomials
149.3.6 LPI signaling
113 149.3.6.1 LPI synchronization
114 149.3.6.2 Quiet period signaling
115 149.3.6.3 Refresh period signaling
149.3.7 Detailed functions and state diagrams
149.3.7.1 State diagram conventions
149.3.7.2 State diagram parameters
149.3.7.2.1 Constants
116 149.3.7.2.2 Variables
118 149.3.7.2.3 Timers
149.3.7.2.4 Functions
120 149.3.7.2.5 Counters
149.3.7.2.6 Messages
121 149.3.7.3 State diagrams
128 149.3.8 PCS management
149.3.8.1 Status
149.3.8.2 Counter
149.3.8.3 Loopback
129 149.3.9 MultiGBASE-T1 operations, administration, and maintenance (OAM)
149.3.9.1 Definitions
149.3.9.2 Functional specifications
149.3.9.2.1 MultiGBASE-T1 OAM frame structure
130 149.3.9.2.2 OAM frame data
131 149.3.9.2.3 Ping RX
149.3.9.2.4 Ping TX
149.3.9.2.5 PHY health
132 149.3.9.2.6 OAM message valid
149.3.9.2.7 OAM message toggle
149.3.9.2.8 OAM message acknowledge
149.3.9.2.9 OAM message toggle acknowledge
149.3.9.2.10 OAM message number
149.3.9.2.11 OAM message data
133 149.3.9.2.12 OAM status
149.3.9.2.13 OAM Reed-Solomon
134 149.3.9.2.14 MultiGBASE-T1 OAM frame acceptance criteria
149.3.9.2.15 PHY health indicator
149.3.9.2.16 Ping
149.3.9.2.17 OAM message exchange
136 149.3.9.3 State diagram variable to OAM register mapping
149.3.9.4 Detailed functions and state diagrams
149.3.9.4.1 State diagram conventions
137 149.3.9.4.2 State diagram parameters
149.3.9.4.3 Variables
141 149.3.9.4.4 Counters
149.3.9.4.5 Functions
142 149.3.9.4.6 State diagrams
144 149.4 Physical Medium Attachment (PMA) sublayer
149.4.1 PMA functional specifications
149.4.2 PMA functions
145 149.4.2.1 PMA Reset function
149.4.2.2 PMA Transmit function
149.4.2.2.1 Global PMA transmit disable
149.4.2.3 PMA Receive function
146 149.4.2.4 PHY Control function
147 149.4.2.4.1 Infofield notation
149.4.2.4.2 Start of Frame Delimiter
149.4.2.4.3 Partial PHY frame count (PFC24)
149.4.2.4.4 Message Field
148 149.4.2.4.5 PHY capability bits
149.4.2.4.6 Data switch partial PHY frame count
149 149.4.2.4.7 Reserved fields
149.4.2.4.8 CRC16
149.4.2.4.9 PMA MDIO function mapping
150 149.4.2.4.10 Startup sequence
149.4.2.5 Link Monitor function
151 149.4.2.6 PHY Link Synchronization
152 149.4.2.6.1 State diagram variables
153 149.4.2.6.2 State diagram timers
149.4.2.6.3 Messages
154 149.4.2.6.4 State diagrams
155 149.4.2.7 Refresh monitor function
149.4.2.8 Clock Recovery function
149.4.3 MDI
149.4.3.1 MDI signals transmitted by the PHY
149.4.3.2 Signals received at the MDI
149.4.4 State variables
149.4.4.1 State diagram variables
157 149.4.4.2 Timers
158 149.4.5 State diagrams
160 149.5 PMA electrical specifications
149.5.1 Test modes
161 149.5.1.1 Test fixtures
162 149.5.2 Transmitter electrical specifications
149.5.2.1 Maximum output droop
149.5.2.2 Transmitter linearity
149.5.2.3 Transmitter timing jitter
163 149.5.2.3.1 Transmit MDI random jitter in MASTER mode
149.5.2.3.2 Transmit MDI deterministic jitter in MASTER mode
164 149.5.2.4 Transmitter power spectral density (PSD) and power level
165 149.5.2.5 Transmitter peak differential output
149.5.2.6 Transmitter clock frequency
149.5.3 Receiver electrical specifications
149.5.3.1 Receiver differential input signals
149.5.3.2 Alien crosstalk noise rejection
166 149.6 Management interface
149.6.1 Optional Support for Auto-Negotiation
149.7 Link segment characteristics
149.7.1 Link transmission parameters
167 149.7.1.1 Insertion loss
149.7.1.2 Differential characteristic impedance
149.7.1.3 Return loss
149.7.1.3.1 2.5GBASE-T1 link segment return loss
168 149.7.1.3.2 5GBASE-T1 link segment return loss
169 149.7.1.3.3 10GBASE-T1 link segment return loss
170 149.7.1.4 Coupling attenuation
171 149.7.1.5 Screening attenuation
149.7.1.6 Maximum link delay
149.7.2 Coupling parameters between link segments
149.7.2.1 Power sum alien near-end crosstalk (PSANEXT)
172 149.7.2.2 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF)
173 149.8 MDI specification
149.8.1 MDI connectors
149.8.2 MDI electrical specification
149.8.2.1 MDI return loss
174 149.8.3 MDI fault tolerance
149.9 Environmental specifications
149.9.1 General safety
175 149.9.2 Network safety
149.9.2.1 Environmental safety
149.9.2.2 Electromagnetic compatibility
149.10 Delay constraints
177 149.11 Protocol implementation conformance statement (PICS) proforma for Clause 149, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1
149.11.1 Introduction
149.11.2 Identification
149.11.2.1 Implementation identification
149.11.2.2 Protocol summary
178 149.11.3 Major capabilities/options
149.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1
149.11.4.1 General
179 149.11.4.2 Physical Coding Sublayer (PCS)
149.11.4.2.1 PCS Transmit
181 149.11.4.2.2 PCS Receive
149.11.4.2.3 Test-pattern generators
182 149.11.4.2.4 Side-stream scrambler
149.11.4.2.5 LPI signaling
183 149.11.4.2.6 Functions and state diagrams
149.11.4.2.7 PCS loopback
184 149.11.4.2.8 OAM
149.11.4.3 Physical Medium Attachment (PMA)
149.11.4.3.1 PMA Reset function
185 149.11.4.3.2 PMA Transmit function
186 149.11.4.3.3 PMA Receive function
149.11.4.3.4 PHY Control function
187 149.11.4.3.5 Link Monitor function
188 149.11.4.3.6 PHY Link Synchronization
189 149.11.4.3.7 Refresh monitor function
149.11.4.3.8 Clock Recovery function
149.11.4.3.9 MDI
149.11.4.3.10 PMA State variables
190 149.11.4.4 PMA electrical specifications
149.11.4.4.1 Test modes
149.11.4.4.2 Transmitter electrical specifications
191 149.11.4.4.3 Receiver electrical specifications
192 149.11.4.5 Link segment characteristics
149.11.4.6 MDI specifications
149.11.4.7 Delay constraints
193 Annex 98B (normative) IEEE 802.3 Selector Base Page definition
98B.3 Technology Ability Field bit assignments
98B.4 Priority Resolution
194 Annex 149A (normative) Coupling and screening attenuation test methodology
149A.1 Introduction
149A.2 General test conditions
149A.3 Reference cable assembly
195 149A.4 Measurement setup
197 149A.5 Protocol implementation conformance statement (PICS) proforma for Annex 149A, Coupling and screening attenuation test methodology
149A.5.1 Introduction
149A.5.2 Identification
149A.5.2.1 Implementation identification
149A.5.2.2 Protocol summary
198 149A.5.3 Major capabilities/options
149A.5.4 PICS proforma tables for Coupling and screening attenuation test methodology
200 Annex 149B (informative) OAM status
149B.1 Purpose
149B.2 MultiGBASE-T1 OAM status structure
149B.3 MultiGBASE-T1 status message data
201 149B.3.1 MultiGBASE-T1 status valid
149B.3.2 Power supply warning
149B.3.3 Internal temperature warning
149B.3.4 No MAC messages warning
149B.3.5 Degraded link segment
149B.3.6 Polarity inversion
202 149B.3.7 Vendor-specific field
149B.3.8 Clear REC
149B.3.9 REC cleared
149B.3.10 Receive error counter (REC)
149B.4 Detailed functions and state diagrams
149B.4.1 State diagram conventions
149B.4.2 State diagram parameters
149B.4.2.1 Variables
203 149B.4.2.2 Counters
149B.4.2.3 Messages
204 149B.4.2.4 State diagrams
205 Annex 149C (informative) Tx Function to Rx function channel characteristics
149C.1 Overview
149C.2 Differential printed circuit board trace loss
206 149C.3 Channel insertion loss
149C.4 Channel return loss
149C.4.1 Tx/Rx function to MDI return loss
208 149C.4.2 Link segment return loss
209 149C.4.3 Channel return loss concatenation
149C.5 Coupling between ports on multiport designs

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