IEEE IEC 62530 2011

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SystemVerilog Unified Hardware Design, Specification, and Verification Language

Published By	Publication Date	Number of Pages
IEEE	2011	1294

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Description

– Active. This standard represents a merger of two previous standards: IEEE Std 1364-2005 Verilog hardware description language (HDL) and IEEE Std 1800-2005 SystemVerilog unified hardware design, specification, and verification language. The 2005 SystemVerilog standard defines extensions to the 2005 Verilog standard. These two standards were designed to be used as one language. Merging the base Verilog language and the SystemVerilog extensions into a single standard provides users with all information regarding syntax and semantics in a single document.

PDF Catalog

PDF Pages	PDF Title
1	IEC 62530:2011 Front cover
5	CONTENTS
19	List of figures
23	List of tables
27	List of syntax excerpts
33	FOREWORD
37	IEEE Standard for SystemVerilog — Unified Hardware Design, Specification, and Verification Language
42	1. Overview 1.1 Scope 1.2 Purpose
43	1.3 Merger of IEEE Std 1364-2005 and IEEE Std 1800-2005 1.4 Special terms 1.5 Conventions used in this standard
44	1.6 Syntactic description
45	1.7 Use of color in this standard 1.8 Contents of this standard
48	1.9 Deprecated clauses 1.10 Examples 1.11 Prerequisites
49	2. Normative references
51	3. Design and verification building blocks 3.1 General 3.2 Design elements 3.3 Modules
52	3.4 Programs
53	3.5 Interfaces
54	3.6 Checkers 3.7 Primitives 3.8 Subroutines 3.9 Packages
55	3.10 Configurations 3.11 Overview of hierarchy
56	3.12 Compilation and elaboration 3.12.1 Compilation units
58	3.13 Name spaces
59	3.14 Simulation time units and precision
60	3.14.1 Time value rounding 3.14.2 Specifying time units and precision 3.14.2.1 The `timescale compiler directive
61	3.14.2.2 The timeunit and timeprecision keywords 3.14.2.3 Precedence of timeunit, timeprecision and `timescale
62	3.14.3 Simulation time unit
63	4. Scheduling semantics 4.1 General 4.2 Execution of a hardware model and its verification environment 4.3 Event simulation
64	4.4 The stratified event scheduler
65	4.4.1 Active region sets and reactive region sets 4.4.2 Simulation regions 4.4.2.1 Preponed events region 4.4.2.2 Active events region 4.4.2.3 Inactive events region 4.4.2.4 NBA events region 4.4.2.5 Observed events region
66	4.4.2.6 Reactive events region 4.4.2.7 Re-Inactive events region 4.4.2.8 Re-NBA events region 4.4.2.9 Postponed events region 4.4.3 PLI regions 4.4.3.1 Preponed PLI region
67	4.4.3.2 Pre-Active PLI region 4.4.3.3 Pre-NBA PLI region 4.4.3.4 Post-NBA PLI region 4.4.3.5 Pre-Observed PLI region 4.4.3.6 Post-Observed PLI region 4.4.3.7 Pre-Re-NBA PLI region 4.4.3.8 Post-Re-NBA PLI region 4.4.3.9 Pre-Postponed PLI region 4.4.3.10 Postponed PLI region
69	4.5 The SystemVerilog simulation reference algorithm 4.6 Determinism
70	4.7 Nondeterminism 4.8 Race conditions 4.9 Scheduling implication of assignments
71	4.9.1 Continuous assignment 4.9.2 Procedural continuous assignment 4.9.3 Blocking assignment 4.9.4 Nonblocking assignment 4.9.5 Switch (transistor) processing
72	4.9.6 Port connections 4.9.7 Subroutines 4.10 The PLI callback control points
73	5. Lexical conventions 5.1 General 5.2 Lexical tokens 5.3 White space 5.4 Comments 5.5 Operators
74	5.6 Identifiers, keywords, and system names 5.6.1 Escaped identifiers 5.6.2 Keywords 5.6.3 System tasks and system functions
75	5.6.4 Compiler directives 5.7 Numbers
77	5.7.1 Integer literal constants
79	5.7.2 Real literal constants
80	5.8 Time literals 5.9 String literals
81	5.9.1 Special characters in strings
82	5.10 Structure literals
83	5.11 Array literals 5.12 Attributes
85	5.13 Built-in methods
87	6. Data types 6.1 General 6.2 Data types and data objects 6.3 Value set 6.3.1 Logic values 6.3.2 Strengths
88	6.3.2.1 Charge strength 6.3.2.2 Drive strength 6.4 Singular and aggregate types
89	6.5 Nets and variables
90	6.6 Net types
91	6.6.1 Wire and tri nets 6.6.2 Unresolved nets 6.6.3 Wired nets
92	6.6.4 Trireg net
93	6.6.4.1 Capacitive networks
95	6.6.4.2 Ideal capacitive state and charge decay
96	6.6.5 Tri0 and tri1 nets 6.6.6 Supply nets 6.7 Net declarations
98	6.8 Variable declarations
100	6.9 Vector declarations 6.9.1 Specifying vectors
101	6.9.2 Vector net accessibility 6.10 Implicit declarations
102	6.11 Integer data types 6.11.1 Integral types 6.11.2 2-state (two-value) and 4-state (four-value) data types 6.11.3 Signed and unsigned integer types
103	6.12 Real, shortreal and realtime data types 6.12.1 Operators and real numbers 6.12.2 Conversion 6.13 Void data type 6.14 Chandle data type
104	6.15 Class 6.16 String data type
107	6.16.1 Len() 6.16.2 Putc() 6.16.3 Getc() 6.16.4 Toupper()
108	6.16.5 Tolower() 6.16.6 Compare() 6.16.7 Icompare() 6.16.8 Substr() 6.16.9 Atoi(), atohex(), atooct(), atobin()
109	6.16.10 Atoreal() 6.16.11 Itoa() 6.16.12 Hextoa() 6.16.13 Octtoa() 6.16.14 Bintoa() 6.16.15 Realtoa() 6.17 Event data type
110	6.18 User-defined types
111	6.19 Enumerations
113	6.19.1 Defining new data types as enumerated types 6.19.2 Enumerated type ranges
114	6.19.3 Type checking
115	6.19.4 Enumerated types in numerical expressions 6.19.5 Enumerated type methods
116	6.19.5.1 First() 6.19.5.2 Last() 6.19.5.3 Next() 6.19.5.4 Prev() 6.19.5.5 Num() 6.19.5.6 Name()
117	6.19.5.7 Using enumerated type methods 6.20 Constants 6.20.1 Parameter declaration syntax
119	6.20.2 Value parameters
120	6.20.2.1 $ as a parameter value
121	6.20.3 Type parameters
122	6.20.4 Local parameters (localparam) 6.20.5 Specify parameters
123	6.20.6 Const constants
124	6.21 Scope and lifetime
126	6.22 Type compatibility 6.22.1 Matching types
127	6.22.2 Equivalent types
128	6.22.3 Assignment compatible
129	6.22.4 Cast compatible 6.22.5 Type incompatible 6.23 Type operator
130	6.24 Casting 6.24.1 Cast operator
132	6.24.2 $cast dynamic casting
133	6.24.3 Bit-stream casting
137	7. Aggregate data types 7.1 General 7.2 Structures
138	7.2.1 Packed structures
139	7.2.2 Assigning to structures 7.3 Unions
140	7.3.1 Packed unions
141	7.3.2 Tagged unions
142	7.4 Packed and unpacked arrays
143	7.4.1 Packed arrays 7.4.2 Unpacked arrays
144	7.4.3 Operations on arrays 7.4.4 Memories 7.4.5 Multidimensional arrays
145	7.4.6 Indexing and slicing of arrays
146	7.5 Dynamic arrays
147	7.5.1 New[ ]
148	7.5.2 Size() 7.5.3 Delete()
149	7.6 Array assignments
150	7.7 Arrays as arguments to subroutines
151	7.8 Associative arrays
152	7.8.1 Wildcard index type 7.8.2 String index
153	7.8.3 Class index 7.8.4 Integral index 7.8.5 Other user-defined types 7.8.6 Accessing invalid indices
154	7.9 Associative array methods 7.9.1 Num() and size() 7.9.2 Delete()
155	7.9.3 Exists() 7.9.4 First() 7.9.5 Last()
156	7.9.6 Next() 7.9.7 Prev() 7.9.8 Arguments to Traversal Methods
157	7.9.9 Associative array assignment 7.9.10 Associative array arguments 7.9.11 Associative array literals 7.10 Queues
158	7.10.1 Queue operators
159	7.10.2 Queue methods 7.10.2.1 Size() 7.10.2.2 Insert() 7.10.2.3 Delete() 7.10.2.4 Pop_front()
160	7.10.2.5 Pop_back() 7.10.2.6 Push_front() 7.10.2.7 Push_back() 7.10.3 Persistence of references to elements of a queue 7.10.4 Updating a queue using assignment and unpacked array concatenation
161	7.10.5 Bounded queues 7.11 Array querying functions 7.12 Array manipulation methods
162	7.12.1 Array locator methods
163	7.12.2 Array ordering methods
164	7.12.3 Array reduction methods
165	7.12.4 Iterator index querying
167	8. Classes 8.1 General 8.2 Overview
168	8.3 Syntax
169	8.4 Objects (class instance)
170	8.5 Object properties and object parameter data 8.6 Object methods
171	8.7 Constructors
172	8.8 Static class properties
173	8.9 Static methods 8.10 This
174	8.11 Assignment, renaming, and copying
175	8.12 Inheritance and subclasses
176	8.13 Overridden members
177	8.14 Super 8.15 Casting
178	8.16 Chaining constructors 8.17 Data hiding and encapsulation
179	8.18 Constant class properties
180	8.19 Virtual methods
181	8.20 Abstract classes and pure virtual methods 8.21 Polymorphism: dynamic method lookup
182	8.22 Class scope resolution operator ::
184	8.23 Out-of-block declarations
185	8.24 Parameterized classes
187	8.24.1 Class resolution operator for parameterized classes
188	8.25 Typedef class
189	8.26 Classes and structures 8.27 Memory management
191	9. Processes 9.1 General 9.2 Structured procedures
192	9.2.1 Initial procedures 9.2.2 Always procedures 9.2.2.1 General purpose always procedure
193	9.2.2.2 Combinational logic always_comb procedure 9.2.2.2.1 Implicit always_comb sensitivities 9.2.2.2.2 always_comb compared to always @*
194	9.2.2.3 Latched logic always_latch procedure 9.2.2.4 Sequential logic always_ff procedure 9.2.3 Final procedures
195	9.3 Block statements 9.3.1 Sequential blocks
196	9.3.2 Parallel blocks
198	9.3.3 Statement block start and finish times
199	9.3.4 Block names
200	9.3.5 Statement labels
201	9.4 Procedural timing controls
202	9.4.1 Delay control 9.4.2 Event control
204	9.4.2.1 Event or operator 9.4.2.2 Implicit event_expression list
205	9.4.2.3 Conditional event controls
206	9.4.2.4 Sequence events 9.4.3 Level-sensitive event control
207	9.4.4 Level-sensitive sequence controls
208	9.4.5 Intra-assignment timing controls
210	9.5 Process execution threads
211	9.6 Process control 9.6.1 Wait fork statement
212	9.6.2 Disable statement
214	9.6.3 Disable fork statement
215	9.7 Fine-grain process control
217	10. Assignment statements 10.1 General 10.2 Overview
218	10.3 Continuous assignments 10.3.1 The net declaration assignment
219	10.3.2 The continuous assignment statement
220	10.3.3 Continuous assignment delays
221	10.3.4 Continuous assignment strengths 10.4 Procedural assignments
222	10.4.1 Blocking procedural assignments 10.4.2 Nonblocking procedural assignments
226	10.5 Variable declaration assignment (variable initialization) 10.6 Procedural continuous assignments
227	10.6.1 The assign and deassign procedural statements 10.6.2 The force and release procedural statements
228	10.7 Assignment extension and truncation
229	10.8 Assignment-like contexts
230	10.9 Assignment patterns
232	10.9.1 Array assignment patterns
233	10.9.2 Structure assignment patterns
234	10.10 Unpacked array concatenation
235	10.10.1 Unpacked array concatenations compared with array assignment patterns 10.10.2 Relationship with other constructs that use concatenation syntax
236	10.10.3 Nesting of unpacked array concatenations
237	10.11 Net aliasing
239	11. Operators and expressions 11.1 General 11.2 Overview
240	11.2.1 Constant expressions 11.2.2 Aggregate expressions 11.3 Operators
241	11.3.1 Operators with real operands
242	11.3.2 Operator precedence
243	11.3.3 Using integer literals in expressions 11.3.4 Operations on logic (4-state) and bit (2-state) types
244	11.3.5 Operator expression short circuiting 11.3.6 Assignment within an expression 11.4 Operator descriptions 11.4.1 Assignment operators
245	11.4.2 Increment and decrement operators 11.4.3 Arithmetic operators
247	11.4.3.1 Arithmetic expressions with unsigned and signed types
248	11.4.4 Relational operators
249	11.4.5 Equality operators 11.4.6 Wildcard equality operators
250	11.4.7 Logical operators
251	11.4.8 Bitwise operators
252	11.4.9 Reduction operators
254	11.4.10 Shift operators 11.4.11 Conditional operator
256	11.4.12 Concatenation operators
257	11.4.12.1 Replication operator
258	11.4.12.2 String concatenation 11.4.13 Set membership operator
259	11.4.14 Streaming operators (pack/unpack)
260	11.4.14.1 Concatenation of stream_expressions
261	11.4.14.2 Re-ordering of the generic stream 11.4.14.3 Streaming concatenation as an assignment target (unpack)
262	11.4.14.4 Streaming dynamically sized data
264	11.5 Operands 11.5.1 Vector bit-select and part-select addressing
266	11.5.2 Array and memory addressing
267	11.5.3 Longest static prefix 11.6 Expression bit lengths
268	11.6.1 Rules for expression bit lengths
269	11.6.2 Example of expression bit-length problem
270	11.6.3 Example of self-determined expressions 11.7 Signed expressions
271	11.8 Expression evaluation rules 11.8.1 Rules for expression types 11.8.2 Steps for evaluating an expression
272	11.8.3 Steps for evaluating an assignment 11.8.4 Handling X and Z in signed expressions 11.9 Tagged union expressions and member access
274	11.10 String literal expressions 11.10.1 String literal operations 11.10.2 String literal value padding and potential problems
275	11.10.3 Null string literal handling 11.11 Operator overloading
277	11.12 Minimum, typical, and maximum delay expressions
278	11.13 Let construct
285	12. Procedural programming statements 12.1 General 12.2 Overview 12.3 Syntax
286	12.4 Conditional if–else statement
287	12.4.1 if–else–if construct
288	12.4.2 unique-if, unique0-if, and priority-if
289	12.4.2.1 Violation reports generated by unique-if, unique0-if, and priority-if constructs
290	12.4.2.2 If statement violation reports and multiple processes
291	12.5 Case statement
293	12.5.1 Case statement with do-not-cares 12.5.2 Constant expression in case statement
294	12.5.3 unique-case, unique0-case, and priority-case
295	12.5.3.1 Violation reports generated by unique-case, unique0-case, and priority-case constructs 12.5.3.2 Case statement violation reports and multiple processes 12.5.4 Set membership case statement
296	12.6 Pattern matching conditional statements
297	12.6.1 Pattern matching in case statements
299	12.6.2 Pattern matching in if statements
300	12.6.3 Pattern matching in conditional expressions 12.7 Loop statements
301	12.7.1 The for-loop
302	12.7.2 The repeat loop 12.7.3 The foreach loop
303	12.7.4 The while loop
304	12.7.5 The do…while loop 12.7.6 The forever loop 12.8 Jump statements
307	13. Tasks and functions (subroutines) 13.1 General 13.2 Overview 13.3 Tasks
311	13.3.1 Static and automatic tasks 13.3.2 Task memory usage and concurrent activation 13.4 Functions
314	13.4.1 Return values and void functions 13.4.2 Static and automatic functions
315	13.4.3 Constant functions
317	13.4.4 Background processes spawned by function calls 13.5 Subroutine calls and argument passing
318	13.5.1 Pass by value 13.5.2 Pass by reference
320	13.5.3 Default argument values
321	13.5.4 Argument binding by name
322	13.5.5 Optional argument list 13.6 Import and export functions 13.7 Task and function names
323	14. Clocking blocks 14.1 General 14.2 Overview 14.3 Clocking block declaration
325	14.4 Input and output skews
326	14.5 Hierarchical expressions
327	14.6 Signals in multiple clocking blocks 14.7 Clocking block scope and lifetime 14.8 Multiple clocking blocks example
328	14.9 Interfaces and clocking blocks
329	14.10 Clocking block events 14.11 Cycle delay: ##
330	14.12 Default clocking
331	14.13 Input sampling
332	14.14 Global clocking
333	14.15 Synchronous events 14.16 Synchronous drives
335	14.16.1 Drives and nonblocking assignments
336	14.16.2 Driving clocking output signals
339	15. Interprocess synchronization and communication 15.1 General 15.2 Overview 15.3 Semaphores
340	15.3.1 New() 15.3.2 Put() 15.3.3 Get() 15.3.4 Try_get()
341	15.4 Mailboxes 15.4.1 New() 15.4.2 Num()
342	15.4.3 Put() 15.4.4 Try_put() 15.4.5 Get()
343	15.4.6 Try_get() 15.4.7 Peek() 15.4.8 Try_peek()
344	15.4.9 Parameterized mailboxes 15.5 Named events 15.5.1 Triggering an event
345	15.5.2 Waiting for an event 15.5.3 Persistent trigger: triggered property
346	15.5.4 Event sequencing: wait_order()
347	15.5.5 Operations on named event variables 15.5.5.1 Merging events
348	15.5.5.2 Reclaiming events 15.5.5.3 Events comparison
349	16. Assertions 16.1 General 16.2 Overview 16.3 Immediate assertions
352	16.4 Deferred assertions
353	16.4.1 Deferred assertion reporting
354	16.4.2 Deferred assertion flush points
355	16.4.3 Deferred assertions outside procedural code 16.4.4 Disabling deferred assertions
356	16.4.5 Deferred assertions and multiple processes 16.5 Concurrent assertions overview
358	16.6 Boolean expressions 16.6.1 Operand types
359	16.6.2 Variables 16.6.3 Operators
360	16.7 Sequences
363	16.8 Declaring sequences
367	16.8.1 Typed formal arguments in sequence declarations
369	16.8.2 Local variable formal arguments in sequence declarations
371	16.9 Sequence operations 16.9.1 Operator precedence 16.9.2 Repetition in sequences
375	16.9.3 Sampled value functions
379	16.9.4 Global clocking past and future sampled value functions
382	16.9.5 AND operation
384	16.9.6 Intersection (AND with length restriction)
385	16.9.7 OR operation
388	16.9.8 First_match operation
389	16.9.9 Conditions over sequences
391	16.9.10 Sequence contained within another sequence 16.9.11 Detecting and using end point of a sequence
393	16.10 Local variables
399	16.11 Calling subroutines on match of a sequence
400	16.12 System functions 16.13 Declaring properties
404	16.13.1 Sequence property
405	16.13.2 Negation property 16.13.3 Disjunction property 16.13.4 Conjunction property 16.13.5 If-else property 16.13.6 Implication
409	16.13.7 Implies and iff properties
410	16.13.8 Property instantiation 16.13.9 Followed-by property
411	16.13.10 Nexttime property
412	16.13.11 Always property
413	16.13.12 Until property
414	16.13.13 Eventually property
416	16.13.14 Abort properties
417	16.13.15 Weak and strong operators
418	16.13.16 Case
419	16.13.17 Recursive properties
423	16.13.18 Typed formal arguments in property declarations 16.13.19 Local variable formal arguments in property declarations 16.13.20 Property examples
424	16.13.21 Finite-length versus infinite-length behavior
425	16.13.22 Nondegeneracy 16.14 Multiclock support 16.14.1 Multiclocked sequences
427	16.14.2 Multiclocked properties
428	16.14.3 Clock flow
429	16.14.4 Examples
430	16.14.5 Detecting and using end point of a sequence in multiclock context
431	16.14.6 Sequence methods
432	16.14.7 Local variable initialization assignments
433	16.15 Concurrent assertions
434	16.15.1 Assert statement
435	16.15.2 Assume statement
437	16.15.3 Cover statement
438	16.15.4 Restrict statement 16.15.5 Using concurrent assertion statements outside procedural code
439	16.15.6 Embedding concurrent assertions in procedural code
441	16.15.6.1 Arguments to procedural concurrent assertions
443	16.15.6.2 Procedural assertion flush points
444	16.15.6.3 Procedural concurrent assertions and glitches
445	16.15.6.4 Disabling procedural concurrent assertions
446	16.15.7 Inferred value functions
448	16.15.8 Nonvacuous evaluations
450	16.16 Disable iff resolution
452	16.17 Clock resolution
456	16.17.1 Semantic leading clocks for multiclocked sequences and properties
457	16.18 Expect statement
459	16.19 Clocking blocks and concurrent assertions
461	17. Checkers 17.1 Overview 17.2 Checker declaration
464	17.3 Checker instantiation
465	17.3.1 Behavior of instantiated checkers
466	17.3.2 Nested checker instantiations
467	17.4 Context inference 17.5 Checker procedures
468	17.6 Covergroups in checkers
469	17.7 Checker variables
472	17.7.1 Checker variable assignments
473	17.7.2 Checker variable randomization with assumptions
475	17.7.3 Scheduling semantics 17.8 Functions in checkers 17.9 Complex checker example
477	18. Constrained random value generation 18.1 General 18.2 Overview 18.3 Concepts and usage
480	18.4 Random variables
481	18.4.1 Rand modifier
482	18.4.2 Randc modifier 18.5 Constraint blocks
484	18.5.1 External constraint blocks 18.5.2 Constraint inheritance
485	18.5.3 Set membership 18.5.4 Distribution
487	18.5.5 Implication 18.5.6 if–else constraints
488	18.5.7 Iterative constraints 18.5.7.1 foreach iterative constraints
490	18.5.7.2 Array reduction iterative constraints 18.5.8 Global constraints
491	18.5.9 Variable ordering
493	18.5.10 Static constraint blocks 18.5.11 Functions in constraints
494	18.5.12 Constraint guards
497	18.6 Randomization methods 18.6.1 Randomize()
498	18.6.2 Pre_randomize() and post_randomize() 18.6.3 Behavior of randomization methods
499	18.7 In-line constraints—randomize() with
500	18.7.1 local:: Scope resolution
501	18.8 Disabling random variables with rand_mode()
503	18.9 Controlling constraints with constraint_mode()
504	18.10 Dynamic constraint modification 18.11 In-line random variable control
505	18.11.1 In-line constraint checker 18.12 Randomization of scope variables—std::randomize()
506	18.12.1 Adding constraints to scope variables—std::randomize() with
507	18.13 Random number system functions and methods 18.13.1 $urandom 18.13.2 $urandom_range()
508	18.13.3 srandom() 18.13.4 get_randstate() 18.13.5 set_randstate() 18.14 Random stability
509	18.14.1 Random stability properties 18.14.2 Thread stability
510	18.14.3 Object stability
511	18.15 Manually seeding randomize 18.16 Random weighted case—randcase
512	18.17 Random sequence generation—randsequence
514	18.17.1 Random production weights 18.17.2 if–else production statements
515	18.17.3 Case production statements
516	18.17.4 Repeat production statements 18.17.5 Interleaving productions—rand join
517	18.17.6 Aborting productions—break and return
518	18.17.7 Value passing between productions
523	19. Functional coverage 19.1 General 19.2 Overview
524	19.3 Defining the coverage model: covergroup
526	19.4 Using covergroup in classes
528	19.5 Defining coverage points
531	19.5.1 Specifying bins for transitions
535	19.5.2 Automatic bin creation for coverage points 19.5.3 Wildcard specification of coverage point bins
536	19.5.4 Excluding coverage point values or transitions 19.5.5 Specifying Illegal coverage point values or transitions
537	19.5.6 Value resolution
538	19.6 Defining cross coverage
541	19.6.1 Example of user-defined cross coverage and select expressions
542	19.6.2 Excluding cross products 19.6.3 Specifying Illegal cross products
543	19.7 Specifying coverage options
545	19.7.1 Covergroup type options
547	19.8 Predefined coverage methods
548	19.8.1 Overriding the built-in sample method
549	19.9 Predefined coverage system tasks and system functions 19.10 Organization of option and type_option members
550	19.11 Coverage computation
551	19.11.1 Coverpoint coverage computation
552	19.11.2 Cross coverage computation
553	19.11.3 Type coverage computation
555	20. Utility system tasks and system functions 20.1 General
556	20.2 Simulation control system tasks 20.3 Simulation time system functions
557	20.3.1 $time 20.3.2 $stime 20.3.3 $realtime
558	20.4 Timescale system tasks 20.4.1 $printtimescale
559	20.4.2 $timeformat
561	20.5 Conversion functions
562	20.6 Data query functions 20.6.1 Type name function
563	20.6.2 Expression size system function
564	20.6.3 Range system function 20.7 Array querying functions
566	20.7.1 Queries over multiple variable dimensions 20.8 Math functions
567	20.8.1 Integer math functions 20.8.2 Real math functions
568	20.9 Severity tasks 20.10 Elaboration system tasks
570	20.11 Assertion control system tasks
571	20.12 Assertion action control system tasks
573	20.13 Assertion system functions
574	20.14 Coverage system functions 20.15 Probabilistic distribution functions 20.15.1 $random function
575	20.15.2 Distribution functions
576	20.16 Stochastic analysis tasks and functions 20.16.1 $q_initialize 20.16.2 $q_add
577	20.16.3 $q_remove 20.16.4 $q_full 20.16.5 $q_exam 20.16.6 Status codes
578	20.17 Programmable logic array (PLA) modeling system tasks 20.17.1 Array types
579	20.17.2 Array logic types 20.17.3 Logic array personality declaration and loading 20.17.4 Logic array personality formats
582	20.18 Miscellaneous tasks and functions 20.18.1 $system
583	21. I/O system tasks and system functions 21.1 General 21.2 Display system tasks 21.2.1 The display and write tasks
584	21.2.1.1 Escape sequences for special characters
585	21.2.1.2 Format specifications
588	21.2.1.3 Size of displayed data
589	21.2.1.4 Unknown and high-impedance values
590	21.2.1.5 Strength format
591	21.2.1.6 Hierarchical name format 21.2.1.7 Assignment pattern format
592	21.2.1.8 String format
593	21.2.2 Strobed monitoring 21.2.3 Continuous monitoring
594	21.3 File input-output system tasks and system functions 21.3.1 Opening and closing files
595	21.3.2 File output system tasks
597	21.3.3 Formatting data to a string
598	21.3.4 Reading data from a file 21.3.4.1 Reading a character at a time 21.3.4.2 Reading a line at a time
599	21.3.4.3 Reading formatted data
601	21.3.4.4 Reading binary data
603	21.3.5 File positioning
604	21.3.6 Flushing output 21.3.7 I/O error status 21.3.8 Detecting EOF
605	21.4 Loading memory array data from a file
606	21.4.1 Reading packed data
607	21.4.2 Reading 2-state types 21.4.3 File format considerations for multidimensional unpacked arrays
608	21.5 Writing memory array data to a file 21.5.1 Writing packed data
609	21.5.2 Writing 2-state types 21.5.3 Writing addresses to output file 21.6 Command line input
612	21.7 Value change dump (VCD) files 21.7.1 Creating 4-state VCD file 21.7.1.1 Specifying name of dump file ($dumpfile)
613	21.7.1.2 Specifying variables to be dumped ($dumpvars)
614	21.7.1.3 Stopping and resuming the dump ($dumpoff/$dumpon)
615	21.7.1.4 Generating a checkpoint ($dumpall) 21.7.1.5 Limiting size of dump file ($dumplimit) 21.7.1.6 Reading dump file during simulation ($dumpflush)
616	21.7.2 Format of 4-state VCD file 21.7.2.1 Syntax of 4-state VCD file
618	21.7.2.2 Formats of variable values
619	21.7.2.3 Description of keyword commands
621	21.7.2.4 4-state VCD file format example
622	21.7.3 Creating extended VCD file 21.7.3.1 Specifying dump file name and ports to be dumped ($dumpports)
623	21.7.3.2 Stopping and resuming the dump ($dumpportsoff/$dumpportson)
624	21.7.3.3 Generating a checkpoint ($dumpportsall) 21.7.3.4 Limiting size of dump file ($dumpportslimit) 21.7.3.5 Reading dump file during simulation ($dumpportsflush)
625	21.7.3.6 Description of keyword commands 21.7.3.6.1 $vcdclose 21.7.3.7 General rules for extended VCD system tasks 21.7.4 Format of extended VCD file
626	21.7.4.1 Syntax of extended VCD file
627	21.7.4.2 Extended VCD node information
629	21.7.4.3 Value changes 21.7.4.3.1 State characters
630	21.7.4.3.2 Drivers 21.7.4.4 Extended VCD file format example
631	21.7.5 VCD SystemVerilog type mappings
633	22. Compiler directives 22.1 General 22.2 Overview 22.3 `resetall
634	22.4 `include 22.5 `define, `undef and `undefineall
635	22.5.1 `define
640	22.5.2 `undef 22.5.3 `undefineall 22.6 `ifdef, `else, `elsif, `endif, `ifndef
643	22.7 `timescale
644	22.8 `default_nettype
645	22.9 `unconnected_drive and `nounconnected_drive 22.10 `celldefine and `endcelldefine 22.11 `pragma
646	22.11.1 Standard pragmas 22.12 `line
647	22.13 `__FILE__ and `__LINE__
648	22.14 `begin_keywords, `end_keywords
649	22.14.1 Examples
650	22.14.2 IEEE Std 1364-1995 keywords 22.14.3 IEEE Std 1364-2001 keywords
651	22.14.4 IEEE Std 1364-2001-noconfig keywords 22.14.5 IEEE Std 1364-2005 keywords 22.14.6 IEEE Std 1800-2005 keywords
652	22.14.7 IEEE Std 1800-2009 keywords
654	23. Modules and hierarchy 23.1 General 23.2 Module definitions 23.2.1 Module header definition
656	23.2.2 Port declarations 23.2.2.1 Non-ANSI style port declarations
659	23.2.2.2 ANSI style list of port declarations
661	23.2.2.3 Rules for determining port kind, data type and direction
663	23.2.2.4 Default port values
664	23.2.3 Parameterized modules 23.2.4 Module contents
666	23.3 Module instances (hierarchy) 23.3.1 Top-level modules and $root 23.3.2 Module instantiation syntax
668	23.3.2.1 Connecting module instance ports by ordered list
669	23.3.2.2 Connecting module instance ports by name
670	23.3.2.3 Connecting module instance using implicit named port connections (.name)
671	23.3.2.4 Connecting module instances using wildcard named port connections ( .*)
672	23.3.3 Port connection rules 23.3.3.1 Port coercion 23.3.3.2 Port connection rules for variables
673	23.3.3.3 Port connection rules for nets 23.3.3.4 Port connection rules for interfaces 23.3.3.5 Unpacked array ports and arrays of instances
674	23.3.3.6 Single source nets (uwire) 23.3.3.7 Port connections with dissimilar net types (net and port collapsing)
675	23.3.3.8 Connecting signed values via ports
676	23.4 Nested modules
677	23.5 Extern modules
678	23.6 Hierarchical names
681	23.7 Member selects and hierarchical names
682	23.7.1 Names with package or class scope resolution operator prefixes 23.8 Upwards name referencing
684	23.8.1 Task and Function name resolution 23.9 Scope rules
686	23.10 Overriding module parameters
688	23.10.1 defparam statement
689	23.10.2 Module instance parameter value assignment 23.10.2.1 Parameter value assignment by ordered list
691	23.10.2.2 Parameter value assignment by name
692	23.10.3 Parameter dependence
693	23.10.4 Elaboration considerations 23.10.4.1 Order of elaboration 23.10.4.2 Early resolution of hierarchical names
694	23.11 Binding auxiliary code to scopes or instances
699	24. Programs 24.1 General 24.2 Overview 24.3 The program construct
701	24.3.1 Scheduling semantics of code in program constructs
702	24.3.2 Operation of program port connections in the absence of clocking blocks
703	24.4 Eliminating testbench races 24.5 Blocking tasks in cycle/event mode
704	24.6 Programwide space and anonymous programs 24.7 Program control tasks
705	25. Interfaces 25.1 General 25.2 Overview
706	25.3 Interface syntax
707	25.3.1 Example without using interfaces
708	25.3.2 Interface example using a named bundle
709	25.3.3 Interface example using a generic bundle
710	25.4 Ports in interfaces
711	25.5 Modports
713	25.5.1 Example of named port bundle 25.5.2 Example of connecting port bundle
714	25.5.3 Example of connecting port bundle to generic interface
715	25.5.4 Modport expressions
716	25.5.5 Clocking blocks and modports
717	25.6 Interfaces and specify blocks
718	25.7 Tasks and functions in interfaces
719	25.7.1 Example of using tasks in interface 25.7.2 Example of using tasks in modports
721	25.7.3 Example of exporting tasks and functions
722	25.7.4 Example of multiple task exports
724	25.8 Parameterized interfaces
726	25.9 Virtual interfaces
729	25.9.1 Virtual interfaces and clocking blocks 25.9.2 Virtual interface modports and clocking blocks
731	25.10 Access to interface objects
733	26. Packages 26.1 General 26.2 Package declarations
734	26.3 Referencing data in packages
738	26.4 Using packages in module headers
739	26.5 Search order rules
741	26.6 Exporting imported names from packages
742	26.7 The std built-in package
745	27. Generate constructs 27.1 General 27.2 Overview 27.3 Generate construct syntax
747	27.4 Loop generate constructs
751	27.5 Conditional generate constructs
754	27.6 External names for unnamed generate blocks
757	28. Gate-level and switch-level modeling 28.1 General 28.2 Overview 28.3 Gate and switch declaration syntax
758	28.3.1 The gate type specification
759	28.3.2 The drive strength specification
760	28.3.3 The delay specification 28.3.4 The primitive instance identifier 28.3.5 The range specification 28.3.6 Primitive instance connection list
763	28.4 and, nand, nor, or, xor, and xnor gates
764	28.5 buf and not gates
765	28.6 bufif1, bufif0, notif1, and notif0 gates
766	28.7 MOS switches
767	28.8 Bidirectional pass switches
768	28.9 CMOS switches
769	28.10 pullup and pulldown sources 28.11 Logic strength modeling
771	28.12 Strengths and values of combined signals 28.12.1 Combined signals of unambiguous strength
772	28.12.2 Ambiguous strengths: sources and combinations
777	28.12.3 Ambiguous strength signals and unambiguous signals
781	28.12.4 Wired logic net types
784	28.13 Strength reduction by nonresistive devices 28.14 Strength reduction by resistive devices 28.15 Strengths of net types 28.15.1 tri0 and tri1 net strengths 28.15.2 trireg strength
785	28.15.3 supply0 and supply1 net strengths 28.16 Gate and net delays
786	28.16.1 min:typ:max delays
787	28.16.2 trireg net charge decay 28.16.2.1 Charge decay process 28.16.2.2 Delay specification for charge decay time
789	29. User defined primitives (UDPs) 29.1 General 29.2 Overview 29.3 UDP definition
791	29.3.1 UDP header 29.3.2 UDP port declarations 29.3.3 Sequential UDP initial statement 29.3.4 UDP state table
792	29.3.5 Z values in UDP 29.3.6 Summary of symbols
793	29.4 Combinational UDPs
794	29.5 Level-sensitive sequential UDPs 29.6 Edge-sensitive sequential UDPs
795	29.7 Sequential UDP initialization
797	29.8 UDP instances
798	29.9 Mixing level-sensitive and edge-sensitive descriptions
799	29.10 Level-sensitive dominance
801	30. Specify blocks 30.1 General 30.2 Overview 30.3 Specify block declaration
802	30.4 Module path declarations
803	30.4.1 Module path restrictions 30.4.2 Simple module paths
804	30.4.3 Edge-sensitive paths
805	30.4.4 State-dependent paths 30.4.4.1 Conditional expression
806	30.4.4.2 Simple state-dependent paths
807	30.4.4.3 Edge-sensitive state-dependent paths
808	30.4.4.4 The ifnone condition
809	30.4.5 Full connection and parallel connection paths
810	30.4.6 Declaring multiple module paths in a single statement 30.4.7 Module path polarity
811	30.4.7.1 Unknown polarity 30.4.7.2 Positive polarity 30.4.7.3 Negative polarity 30.5 Assigning delays to module paths
812	30.5.1 Specifying transition delays on module paths
814	30.5.2 Specifying x transition delays
815	30.5.3 Delay selection 30.6 Mixing module path delays and distributed delays
816	30.7 Detailed control of pulse filtering behavior
817	30.7.1 Specify block control of pulse limit values
818	30.7.2 Global control of pulse limit values 30.7.3 SDF annotation of pulse limit values 30.7.4 Detailed pulse control capabilities
819	30.7.4.1 On-event versus on-detect pulse filtering
820	30.7.4.2 Negative pulse detection
825	31. Timing checks 31.1 General 31.2 Overview
828	31.3 Timing checks using a stability window 31.3.1 $setup
829	31.3.2 $hold
830	31.3.3 $setuphold
831	31.3.4 $removal
832	31.3.5 $recovery
833	31.3.6 $recrem
835	31.4 Timing checks for clock and control signals 31.4.1 $skew
836	31.4.2 $timeskew
838	31.4.3 $fullskew
841	31.4.4 $width
842	31.4.5 $period
843	31.4.6 $nochange
844	31.5 Edge-control specifiers
845	31.6 Notifiers: user-defined responses to timing violations
847	31.7 Enabling timing checks with conditioned events
848	31.8 Vector signals in timing checks
849	31.9 Negative timing checks
850	31.9.1 Requirements for accurate simulation
852	31.9.2 Conditions in negative timing checks
853	31.9.3 Notifiers in negative timing checks 31.9.4 Option behavior
855	32. Backannotation using the standard delay format (SDF) 32.1 General 32.2 Overview 32.3 The SDF annotator 32.4 Mapping of SDF constructs to SystemVerilog
856	32.4.1 Mapping of SDF delay constructs to SystemVerilog declarations
857	32.4.2 Mapping of SDF timing check constructs to SystemVerilog
858	32.4.3 SDF annotation of specparams
859	32.4.4 SDF annotation of interconnect delays
860	32.5 Multiple annotations
861	32.6 Multiple SDF files 32.7 Pulse limit annotation
862	32.8 SDF to SystemVerilog delay value mapping 32.9 Loading timing data from an SDF file
865	33. Configuring the contents of a design 33.1 General 33.2 Overview 33.2.1 Library notation
866	33.2.2 Basic configuration elements 33.3 Libraries 33.3.1 Specifying libraries—the library map file
867	33.3.1.1 File path resolution
868	33.3.2 Using multiple library map files 33.3.3 Mapping source files to libraries 33.4 Configurations
869	33.4.1 Basic configuration syntax 33.4.1.1 Design statement 33.4.1.2 The default clause
870	33.4.1.3 The instance clause 33.4.1.4 The cell clause 33.4.1.5 The liblist clause 33.4.1.6 The use clause 33.4.2 Hierarchical configurations
871	33.4.3 Setting parameters in configurations
874	33.5 Using libraries and configs 33.5.1 Precompiling in a single-pass use model
875	33.5.2 Elaboration-time compiling in a single-pass use model 33.5.3 Precompiling using a separate compilation tool 33.5.4 Command line considerations 33.6 Configuration examples
876	33.6.1 Default configuration from library map file 33.6.2 Using default clause 33.6.3 Using cell clause 33.6.4 Using instance clause
877	33.6.5 Using hierarchical config 33.7 Displaying library binding information 33.8 Library mapping examples
878	33.8.1 Using the command line to control library searching 33.8.2 File path specification examples 33.8.3 Resolving multiple path specifications
881	34. Protected envelopes 34.1 General 34.2 Overview 34.3 Processing protected envelopes
882	34.3.1 Encryption
883	34.3.2 Decryption 34.4 Protect pragma directives
885	34.5 Protect pragma keywords 34.5.1 begin 34.5.1.1 Syntax 34.5.1.2 Description 34.5.2 end 34.5.2.1 Syntax 34.5.2.2 Description
886	34.5.3 begin_protected 34.5.3.1 Syntax 34.5.3.2 Description 34.5.4 end_protected 34.5.4.1 Syntax 34.5.4.2 Description 34.5.5 author 34.5.5.1 Syntax 34.5.5.2 Description
887	34.5.6 author_info 34.5.6.1 Syntax 34.5.6.2 Description 34.5.7 encrypt_agent 34.5.7.1 Syntax 34.5.7.2 Description 34.5.8 encrypt_agent_info 34.5.8.1 Syntax 34.5.8.2 Description
888	34.5.9 encoding 34.5.9.1 Syntax 34.5.9.2 Description
889	34.5.10 data_keyowner 34.5.10.1 Syntax 34.5.10.2 Description 34.5.11 data_method 34.5.11.1 Syntax 34.5.11.2 Description
890	34.5.12 data_keyname 34.5.12.1 Syntax 34.5.12.2 Description
891	34.5.13 data_public_key 34.5.13.1 Syntax 34.5.13.2 Description 34.5.14 data_decrypt_key 34.5.14.1 Syntax 34.5.14.2 Description
892	34.5.15 data_block 34.5.15.1 Syntax 34.5.15.2 Description 34.5.16 digest_keyowner 34.5.16.1 Syntax 34.5.16.2 Description 34.5.17 digest_key_method 34.5.17.1 Syntax
893	34.5.17.2 Description 34.5.18 digest_keyname 34.5.18.1 Syntax 34.5.18.2 Description 34.5.19 digest_public_key 34.5.19.1 Syntax 34.5.19.2 Description
894	34.5.20 digest_decrypt_key 34.5.20.1 Syntax 34.5.20.2 Description 34.5.21 digest_method 34.5.21.1 Syntax 34.5.21.2 Description
895	34.5.22 digest_block 34.5.22.1 Syntax 34.5.22.2 Description
896	34.5.23 key_keyowner 34.5.23.1 Syntax 34.5.23.2 Description 34.5.24 key_method 34.5.24.1 Syntax 34.5.24.2 Description 34.5.25 key_keyname 34.5.25.1 Syntax 34.5.25.2 Description
897	34.5.26 key_public_key 34.5.26.1 Syntax 34.5.26.2 Description 34.5.27 key_block 34.5.27.1 Syntax 34.5.27.2 Description
898	34.5.28 decrypt_license 34.5.28.1 Syntax 34.5.28.2 Description 34.5.29 runtime_license 34.5.29.1 Syntax 34.5.29.2 Description
899	34.5.30 comment 34.5.30.1 Syntax 34.5.30.2 Description 34.5.31 reset 34.5.31.1 Syntax 34.5.31.2 Description
900	34.5.32 viewport 34.5.32.1 Syntax 34.5.32.2 Description
902	35. Direct programming interface (DPI) 35.1 General 35.2 Overview 35.2.1 Tasks and functions
903	35.2.2 Data types 35.2.2.1 Data representation 35.3 Two layers of the DPI
904	35.3.1 DPI SystemVerilog layer 35.3.2 DPI foreign language layer 35.4 Global name space of imported and exported functions
905	35.5 Imported tasks and functions 35.5.1 Required properties of imported tasks and functions—semantic constraints 35.5.1.1 Instant completion of imported functions 35.5.1.2 input, output, and inout arguments 35.5.1.3 Special properties pure and context
906	35.5.1.4 Memory management 35.5.1.5 Reentrancy of imported tasks 35.5.1.6 C++ exceptions 35.5.2 Pure functions
907	35.5.3 Context tasks and functions
909	35.5.4 Import declarations
911	35.5.5 Function result 35.5.6 Types of formal arguments
912	35.5.6.1 Open arrays 35.6 Calling imported functions
913	35.6.1 Argument passing 35.6.1.1 WYSIWYG principle
914	35.6.2 Value changes for output and inout arguments 35.7 Exported functions
915	35.8 Exported tasks 35.9 Disabling DPI tasks and functions
917	36. Programming language interface (PLI/VPI) overview 36.1 General 36.2 PLI purpose and history
918	36.3 User-defined system task and system function names 36.3.1 Defining system task and system function names 36.3.2 Overriding built-in system task and system function names
919	36.4 User-defined system task and system function arguments 36.5 User-defined system task and system function types 36.6 User-supplied PLI applications 36.7 PLI include files 36.8 VPI sizetf, compiletf and calltf routines
920	36.8.1 sizetf VPI application routine 36.8.2 compiletf VPI application routine 36.8.3 calltf VPI application routine 36.8.4 Arguments to sizetf, compiletf, and calltf application routines 36.9 PLI mechanism
921	36.9.1 Registering user-defined system tasks and system functions 36.9.2 Registering simulation callbacks
922	36.10 VPI access to SystemVerilog objects and simulation objects 36.10.1 Error handling 36.10.2 Function availability
923	36.10.3 Traversing expressions 36.11 List of VPI routines by functional category
925	36.12 VPI backwards compatibility features and limitations
926	36.12.1 VPI Incompatibilities with other standard versions
927	36.12.2 VPI Mechanisms to deal with incompatibilities 36.12.2.1 Mechanism 1: Compile-based binding to a compatibility mode
929	36.12.2.2 Mechanism 2: Selection of default VPI compatibility mode run by host simulator 36.12.3 Limitations of VPI compatibility mechanisms
931	37. VPI object model diagrams 37.1 General 37.2 VPI Handles 37.2.1 Handle creation 37.2.2 Handle release
932	37.2.3 Handle comparison 37.2.4 Validity of handles 37.3 VPI object classifications
933	37.3.1 Accessing object relationships and properties
934	37.3.2 Object type properties
935	37.3.3 Object file and line properties 37.3.4 Delays and values
936	37.3.5 Expressions with side effects
937	37.3.6 Object protection properties 37.3.7 Lifetimes of objects
938	37.3.8 Managing transient objects 37.4 Key to data model diagrams
939	37.4.1 Diagram key for objects and classes 37.4.2 Diagram key for accessing properties
940	37.4.3 Diagram key for traversing relationships
941	37.5 Module
942	37.6 Interface 37.7 Modport 37.8 Interface task or function declaration
943	37.9 Program
944	37.10 Instance
946	37.11 Instance arrays
947	37.12 Scope
948	37.13 IO declaration
949	37.14 Ports
950	37.15 Reference objects
953	37.16 Nets
957	37.17 Variables
960	37.18 Packed array variables
961	37.19 Variable select
962	37.20 Memory 37.21 Variable drivers and loads
963	37.22 Object Range
964	37.23 Typespec
966	37.24 Structures and unions
967	37.25 Named events
968	37.26 Parameter, spec param, def param, param assign
969	37.27 Class definition
970	37.28 Class typespec
972	37.29 Class variables and class objects
974	37.30 Constraint, constraint ordering, distribution
975	37.31 Primitive, prim term
976	37.32 UDP 37.33 Intermodule path
977	37.34 Constraint expression 37.35 Module path, path term
978	37.36 Timing check
979	37.37 Task and function declaration
980	37.38 Task and function call
982	37.39 Frames
983	37.40 Threads 37.41 Delay terminals
984	37.42 Net drivers and loads
985	37.43 Continuous assignment
986	37.44 Clocking block
987	37.45 Assertion
988	37.46 Concurrent assertions
989	37.47 Property declaration
990	37.48 Property specification
991	37.49 Sequence declaration
992	37.50 Sequence expression
993	37.51 Immediate assertions
994	37.52 Multiclock sequence expression 37.53 Let
995	37.54 Simple expressions
996	37.55 Expressions
999	37.56 Atomic statement
1000	37.57 Event statement 37.58 Process
1001	37.59 Assignment 37.60 Event control
1002	37.61 While, repeat 37.62 Waits 37.63 Delay control
1003	37.64 Repeat control 37.65 Forever 37.66 If, if–else
1004	37.67 Case, pattern
1005	37.68 Expect 37.69 For 37.70 Do-while, foreach
1006	37.71 Alias statement
1007	37.72 Disables 37.73 Return statement 37.74 Assign statement, deassign, force, release
1008	37.75 Callback 37.76 Time queue
1009	37.77 Active time format
1010	37.78 Attribute
1011	37.79 Iterator
1012	37.80 Generates
1015	38. VPI routine definitions 38.1 General 38.2 vpi_chk_error()
1016	38.3 vpi_compare_objects()
1018	38.4 vpi_control()
1019	38.5 vpi_flush() 38.6 vpi_get()
1020	38.7 vpi_get64() 38.8 vpi_get_cb_info()
1021	38.9 vpi_get_data()
1022	38.10 vpi_get_delays()
1024	38.11 vpi_get_str()
1025	38.12 vpi_get_systf_info()
1026	38.13 vpi_get_time()
1027	38.14 vpi_get_userdata() 38.15 vpi_get_value()
1033	38.16 vpi_get_value_array()
1037	38.17 vpi_get_vlog_info()
1038	38.18 vpi_handle()
1039	38.19 vpi_handle_by_index() 38.20 vpi_handle_by_multi_index()
1040	38.21 vpi_handle_by_name()
1041	38.22 vpi_handle_multi() 38.23 vpi_iterate()
1042	38.24 vpi_mcd_close()
1043	38.25 vpi_mcd_flush() 38.26 vpi_mcd_name()
1044	38.27 vpi_mcd_open()
1045	38.28 vpi_mcd_printf()
1046	38.29 vpi_mcd_vprintf() 38.30 vpi_printf()
1047	38.31 vpi_put_data()
1049	38.32 vpi_put_delays()
1052	38.33 vpi_put_userdata() 38.34 vpi_put_value()
1055	38.35 vpi_put_value_array()
1059	38.36 vpi_register_cb()
1060	38.36.1 Simulation event callbacks
1063	38.36.1.1 Callbacks on individual statements 38.36.1.2 Behavior by statement type
1064	38.36.1.3 Registering callbacks on module-wide basis 38.36.2 Simulation time callbacks
1065	38.36.3 Simulator action or feature callbacks
1067	38.37 vpi_register_systf() 38.37.1 System task and system function callbacks
1069	38.37.2 Initializing VPI system task or system function callbacks 38.37.3 Registering multiple system tasks and system functions
1070	38.38 vpi_release_handle()
1071	38.39 vpi_remove_cb() 38.40 vpi_scan()
1072	38.41 vpi_vprintf()
1073	39. Assertion API 39.1 General 39.2 Overview 39.3 Static information 39.3.1 Obtaining assertion handles
1074	39.3.2 Obtaining static assertion information 39.4 Dynamic information 39.4.1 Placing assertion system callbacks
1075	39.4.2 Placing assertions callbacks
1078	39.4.2.1 Placing callbacks for assertions with global clocking future sampled value functions 39.5 Control functions 39.5.1 Assertion system control
1079	39.5.2 Assertion control
1081	39.5.3 VPI functions on deferred assertions and procedural concurrent assertions
1083	40. Code coverage control and API 40.1 General 40.2 Overview 40.2.1 SystemVerilog coverage API 40.2.2 Nomenclature
1084	40.3 SystemVerilog real-time coverage access 40.3.1 Predefined coverage constants in SystemVerilog 40.3.2 Built-in coverage access system functions 40.3.2.1 $coverage_control
1087	40.3.2.2 $coverage_get_max 40.3.2.3 $coverage_get
1088	40.3.2.4 $coverage_merge 40.3.2.5 $coverage_save
1089	40.4 FSM recognition 40.4.1 Specifying signal that holds current state 40.4.2 Specifying part-select that holds current state 40.4.3 Specifying concatenation that holds current state
1090	40.4.4 Specifying signal that holds next state 40.4.5 Specifying current and next state signals in same declaration 40.4.6 Specifying possible states of FSM 40.4.7 Pragmas in one-line comments
1091	40.4.8 Example 40.5 VPI coverage extensions 40.5.1 VPI entity/relation diagrams related to coverage 40.5.2 Extensions to VPI enumerations
1092	40.5.3 Obtaining coverage information
1094	40.5.4 Controlling coverage
1097	41. Data read API
1100	Annex A (normative) Formal syntax A.1 Source text A.1.1 Library source text A.1.2 SystemVerilog source text
1102	A.1.3 Module parameters and ports
1103	A.1.4 Module items
1104	A.1.5 Configuration source text
1105	A.1.6 Interface items A.1.7 Program items A.1.8 Checker items
1106	A.1.9 Class items
1107	A.1.10 Constraints
1108	A.1.11 Package items A.2 Declarations A.2.1 Declaration types A.2.1.1 Module parameter declarations A.2.1.2 Port declarations
1109	A.2.1.3 Type declarations A.2.2 Declaration data types A.2.2.1 Net and variable types
1110	A.2.2.2 Strengths
1111	A.2.2.3 Delays A.2.3 Declaration lists A.2.4 Declaration assignments
1112	A.2.5 Declaration ranges A.2.6 Function declarations
1113	A.2.7 Task declarations A.2.8 Block item declarations
1114	A.2.9 Interface declarations A.2.10 Assertion declarations
1118	A.2.11 Covergroup declarations
1119	A.3 Primitive instances A.3.1 Primitive instantiation and instances
1120	A.3.2 Primitive strengths A.3.3 Primitive terminals A.3.4 Primitive gate and switch types
1121	A.4 Instantiations A.4.1 Instantiation A.4.1.1 Module instantiation A.4.1.2 Interface instantiation A.4.1.3 Program instantiation A.4.1.4 Checker instantiation
1122	A.4.2 Generated instantiation A.5 UDP declaration and instantiation A.5.1 UDP declaration
1123	A.5.2 UDP ports A.5.3 UDP body A.5.4 UDP instantiation
1124	A.6 Behavioral statements A.6.1 Continuous assignment and net alias statements A.6.2 Procedural blocks and assignments A.6.3 Parallel and sequential blocks
1125	A.6.4 Statements A.6.5 Timing control statements
1126	A.6.6 Conditional statements A.6.7 Case statements
1127	A.6.7.1 Patterns
1128	A.6.8 Looping statements A.6.9 Subroutine call statements A.6.10 Assertion statements
1129	A.6.11 Clocking block
1130	A.6.12 Randsequence A.7 Specify section A.7.1 Specify block declaration
1131	A.7.2 Specify path declarations A.7.3 Specify block terminals A.7.4 Specify path delays
1132	A.7.5 System timing checks A.7.5.1 System timing check commands
1133	A.7.5.2 System timing check command arguments
1134	A.7.5.3 System timing check event definitions A.8 Expressions A.8.1 Concatenations
1135	A.8.2 Subroutine calls A.8.3 Expressions
1137	A.8.4 Primaries
1138	A.8.5 Expression left-side values A.8.6 Operators
1139	A.8.7 Numbers
1140	A.8.8 Strings A.9 General A.9.1 Attributes A.9.2 Comments A.9.3 Identifiers
1142	A.9.4 White space A.10 Footnotes (normative)
1145	Annex B (normative) Keywords
1147	Annex C (normative) Deprecation C.1 General C.2 Constructs that have been deprecated C.2.1 PLI TF and ACC routine libraries C.2.2 $sampled with a clocking event argument C.2.3 ended sequence method C.2.4 vpi_free_object()
1148	C.2.5 Data Read API C.2.6 Linked Lists C.3 Accellera SystemVerilog 3.1a-compatible access to packed data C.4 Constructs identified for deprecation C.4.1 Defparam statements
1149	C.4.2 Procedural assign and deassign statements
1151	Annex D (informative) Optional system tasks and system functions D.1 General D.2 $countdrivers
1152	D.3 $getpattern
1153	D.4 $input D.5 $key and $nokey D.6 $list
1154	D.7 $log and $nolog D.8 $reset, $reset_count, and $reset_value
1155	D.9 $save, $restart, and $incsave
1156	D.10 $scale D.11 $scope D.12 $showscopes D.13 $showvars
1157	D.14 $sreadmemb and $sreadmemh
1159	Annex E (informative) Optional compiler directives E.1 General E.2 `default_decay_time E.3 `default_trireg_strength
1160	E.4 `delay_mode_distributed E.5 `delay_mode_path E.6 `delay_mode_unit E.7 `delay_mode_zero
1161	Annex F (normative) Formal semantics of concurrent assertions F.1 General F.2 Overview
1162	F.3 Abstract syntax F.3.1 Clock control
1163	F.3.2 Abstract grammars
1164	F.3.3 Notations
1165	F.3.4 Derived forms F.3.4.1 Derived assertion statements F.3.4.2 Derived sequence operators F.3.4.2.1 Derived consecutive repetition operators F.3.4.2.2 Derived delay and concatenation operators F.3.4.2.3 Derived nonconsecutive repetition operators
1166	F.3.4.2.4 Other derived operators F.3.4.3 Derived property operators F.3.4.3.1 Derived sequential property F.3.4.3.2 Derived Boolean operators F.3.4.3.3 Derived nonoverlapping implication operator F.3.4.3.4 Derived conditional operators F.3.4.3.5 Derived case operators F.3.4.3.6 Derived followed_by operators F.3.4.3.7 Derived abort operators
1167	F.3.4.3.8 Derived unbounded temporal operators F.3.4.3.9 Derived bounded temporal operators F.3.4.4 Derived sampled value functions F.3.4.5 Other derived operators F.3.4.6 Checker variable assignment
1168	F.4 Rewriting algorithms F.4.1 Rewriting sequence and property instances F.4.1.1 The rewriting algorithm
1170	F.4.2 Rewriting local variable declaration assignments
1172	F.5 Semantics F.5.1 Rewrite rules for clocks F.5.1.1 Rewrite rules for sequences
1173	F.5.1.2 Rewrite rules for properties F.5.2 Tight satisfaction without local variables
1174	F.5.3 Satisfaction without local variables F.5.3.1 Neutral satisfaction
1175	F.5.3.2 Weak and strong satisfaction by finite words
1176	F.5.3.3 Vacuity
1177	F.5.4 Local variable flow
1178	F.5.5 Tight satisfaction with local variables
1179	F.5.6 Satisfaction with local variables F.5.6.1 Neutral satisfaction
1180	F.5.6.2 Weak and strong satisfaction by finite words
1181	F.5.6.3 Vacuity F.6 Extended expressions F.6.1 Extended Booleans F.6.2 Past F.6.3 Future F.7 Recursive properties
1185	Annex G (normative) Std package G.1 General G.2 Overview G.3 Semaphore G.4 Mailbox
1186	G.5 Randomize G.6 Process
1187	Annex H (normative) DPI C layer H.1 General H.2 Overview
1188	H.3 Naming conventions H.4 Portability H.5 svdpi.h include file
1189	H.6 Semantic constraints
1190	H.6.1 Types of formal arguments H.6.2 Input arguments H.6.3 Output arguments H.6.4 Value changes for output and inout arguments H.6.5 Context and noncontext tasks and functions
1191	H.6.6 Pure functions H.6.7 Memory management
1192	H.7 Data types H.7.1 Limitations H.7.2 Duality of types: SystemVerilog types versus C types H.7.3 Data representation
1193	H.7.4 Basic types
1194	H.7.5 Normalized and linearized ranges H.7.6 Mapping between SystemVerilog ranges and C ranges
1195	H.7.7 Canonical representation of packed arrays H.7.8 Unpacked aggregate arguments H.8 Argument passing modes H.8.1 Overview H.8.2 Calling SystemVerilog tasks and functions from C
1196	H.8.3 Argument passing by value H.8.4 Argument passing by reference H.8.5 Allocating actual arguments for SystemVerilog-specific types H.8.6 Argument passing by handle—open arrays H.8.7 Input arguments
1197	H.8.8 Inout and output arguments H.8.9 Function result H.8.10 String arguments
1198	H.8.10.1 String types in aggregate arguments H.9 Context tasks and functions H.9.1 Overview of DPI and VPI context
1199	H.9.2 Context of imported and export tasks and functions H.9.3 Working with DPI context tasks and functions in C code
1201	H.9.4 Example 1—Using DPI context functions
1202	H.9.5 Relationship between DPI and VPI
1203	H.10 Include files H.10.1 Include file svdpi.h H.10.1.1 Scalars of type bit and logic H.10.1.2 Canonical representation of packed arrays
1204	H.10.1.3 Implementation-dependent representation H.10.2 Example 2—Simple packed array application
1205	H.10.3 Example 3—Application with complex mix of types
1206	H.11 Arrays H.11.1 Example 4—Using packed 2-state arguments H.11.2 Multidimensional arrays H.11.3 Example 5—Using packed struct and union arguments
1207	H.11.4 Direct access to unpacked arrays H.11.5 Utility functions for working with the canonical representation
1208	H.12 Open arrays H.12.1 Actual ranges
1209	H.12.2 Array querying functions
1210	H.12.3 Access functions H.12.4 Access to actual representation
1211	H.12.5 Access to elements via canonical representation H.12.6 Access to scalar elements (bit and logic)
1212	H.12.7 Access to array elements of other types H.12.8 Example 6—Two-dimensional open array
1213	H.12.9 Example 7—Open array
1214	H.12.10 Example 8—Access to packed arrays H.13 SV3.1a-compatible access to packed data (deprecated functionality)
1215	H.13.1 Determining the compatibility level of an implementation H.13.2 svdpi.h definitions for SV3.1a-style packed data processing
1217	H.13.3 Source-level compatibility include file svdpi_src.h H.13.4 Example 9—Deprecated SV3.1a binary compatible application
1218	H.13.5 Example 10—Deprecated SV3.1a source compatible application H.13.6 Example 11—Deprecated SV3.1a binary compatible calls of export functions
1221	Annex I (normative) svdpi.h I.1 General I.2 Overview I.3 Source code
1231	Annex J (normative) Inclusion of foreign language code J.1 General J.2 Overview
1232	J.3 Location independence J.4 Object code inclusion
1233	J.4.1 Bootstrap file J.4.2 Examples
1235	Annex K (normative) vpi_user.h K.1 General K.2 Source code
1253	Annex L (normative) vpi_compatibility.h L.1 General L.2 Source code
1257	Annex M (normative) sv_vpi_user.h M.1 General M.2 Source code
1267	Annex N (normative) Algorithm for probabilistic distribution functions N.1 General N.2 Source code
1275	Annex O (informative) Encryption/decryption flow O.1 General O.2 Overview O.3 Tool vendor secret key encryption system O.3.1 Encryption input
1276	O.3.2 Encryption output O.4 IP author secret key encryption system O.4.1 Encryption input
1277	O.4.2 Encryption output O.5 Digital envelopes
1278	O.5.1 Encryption input O.5.2 Encryption output
1279	Annex P (informative) Glossary
1283	Annex Q (informative) Mapping of IEEE Std 1364-2005 and IEEE Std 1800-2005 clauses into IEEE Std 1800-2009
1287	Annex R (informative) Bibliography
1289	Annex S (informative) IEEE List of Participants