{"id":194859,"date":"2024-10-19T12:21:51","date_gmt":"2024-10-19T12:21:51","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-802-3bt-2018\/"},"modified":"2024-10-25T04:52:53","modified_gmt":"2024-10-25T04:52:53","slug":"ieee-802-3bt-2018","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-802-3bt-2018\/","title":{"rendered":"IEEE 802.3bt 2018"},"content":{"rendered":"

Amendment Standard – Active. The maximum Powered Device (PD) power available is increased by this amendment to IEEE Std 802.3-2018 by utilizing all four pairs in the specified structured wiring plant. This represents a substantial change to the capabilities of Ethernet with standardized power. The power classification information exchanged during negotiation is extended to allow meaningful power management capability. These enhancements solve the problem of higher power and more efficient standardized Power over Ethernet (PoE) delivery systems.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Std 802.3bt\u2122-2018 front cover <\/td>\n<\/tr>\n
2<\/td>\nTitle page <\/td>\n<\/tr>\n
4<\/td>\nImportant Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n
7<\/td>\nParticipants <\/td>\n<\/tr>\n
10<\/td>\nIntroduction <\/td>\n<\/tr>\n
12<\/td>\nContents <\/td>\n<\/tr>\n
22<\/td>\n1. Introduction
1.3 Normative references
1.4 Definitions <\/td>\n<\/tr>\n
23<\/td>\n1.5 Abbreviations <\/td>\n<\/tr>\n
24<\/td>\n14. Twisted-pair medium attachment unit (MAU) and baseband medium, type 10BASE-T including type 10BASE-Te
14.3 MAU electrical specifications
14.3.1 MAU-to-MDI interface characteristics
14.3.1.1 Isolation requirement <\/td>\n<\/tr>\n
25<\/td>\n25. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX
25.4 Specific requirements and exceptions
25.4.5 Change to 9.1.7, \u201cWorst case droop of transformer\u201d
25.4.6 Replacement of 8.4.1, \u201cUTP isolation requirements\u201d
25.4.7 Addition to 10.1, \u201cReceiver\u201d <\/td>\n<\/tr>\n
26<\/td>\n25.6 Protocol implementation conformance statement (PICS) proforma for Clause 25, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX
25.6.3 Major capabilities\/options
25.6.3.1 DTE Power via MDI Power over Ethernet major capabilities\/options
25.6.4 PICS proforma tables for the Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX
25.6.4.4 DTE Power via MDI Power over Ethernet compliance <\/td>\n<\/tr>\n
27<\/td>\n30. Management
30.2 Managed objects
30.2.2 Overview of managed objects
30.2.2.1 Text description of managed objects
30.2.3 Containment <\/td>\n<\/tr>\n
28<\/td>\n30.2.5 Capabilities <\/td>\n<\/tr>\n
36<\/td>\n30.9 Management for DTE Power via MDI Power over Ethernet
30.9.1 PSE managed object class
30.9.1.1 PSE attributes
30.9.1.1.2 aPSEAdminState
30.9.1.1.3 aPSEPowerPairsControlAbility
30.9.1.1.4 aPSEPowerPairs <\/td>\n<\/tr>\n
37<\/td>\n30.9.1.1.5 aPSEPowerDetectionStatus
30.9.1.1.5a aPSEPowerDetectionStatusA <\/td>\n<\/tr>\n
38<\/td>\n30.9.1.1.5b aPSEPowerDetectionStatusB
30.9.1.1.6 aPSEPowerClassification <\/td>\n<\/tr>\n
39<\/td>\n30.9.1.1.6a aPSEPowerClassificationA
30.9.1.1.6b aPSEPowerClassificationB <\/td>\n<\/tr>\n
40<\/td>\n30.9.1.1.7 aPSEInvalidSignatureCounter
30.9.1.1.7a aPSEInvalidSignatureCounterA
30.9.1.1.7b aPSEInvalidSignatureCounterB
30.9.1.1.8 aPSEPowerDeniedCounter <\/td>\n<\/tr>\n
41<\/td>\n30.9.1.1.8a aPSEPowerDeniedCounterA
30.9.1.1.8b aPSEPowerDeniedCounterB
30.9.1.1.9 aPSEOverLoadCounter
30.9.1.1.9a aPSEOverLoadCounterA <\/td>\n<\/tr>\n
42<\/td>\n30.9.1.1.10 aPSEShortCounter aPSEOverLoadCounterB
30.9.1.1.11 aPSEMPSAbsentCounter
30.9.1.1.11a aPSEMPSAbsentCounterA <\/td>\n<\/tr>\n
43<\/td>\n30.9.1.1.11b aPSEMPSAbsentCounterB
30.9.1.2 PSE actions
30.9.1.2.1 acPSEAdminControl
30.12 Layer Management for Link Layer Discovery Protocol (LLDP)
30.12.2 LLDP Local System Group managed object class
30.12.2.1 LLDP Local System Group attributes
30.12.2.1.6 aLldpXdot3LocPowerMDISupported
30.12.2.1.7 aLldpXdot3LocPowerMDIEnabled <\/td>\n<\/tr>\n
44<\/td>\n30.12.2.1.8 aLldpXdot3LocPowerPairControllable
30.12.2.1.9 aLldpXdot3LocPowerPairs
30.12.2.1.10 aLldpXdot3LocPowerClass <\/td>\n<\/tr>\n
45<\/td>\n30.12.2.1.14 aLldpXdot3LocPowerType
30.12.2.1.17 aLldpXdot3LocPDRequestedPowerValue
30.12.2.1.17a aLldpXdot3LocPDRequestedPowerValueA <\/td>\n<\/tr>\n
46<\/td>\n30.12.2.1.17b aLldpXdot3LocPDRequestedPowerValueB
30.12.2.1.18 aLldpXdot3LocPSEAllocatedPowerValue
30.12.2.1.18a aLldpXdot3LocPSEAllocatedPowerValueA
30.12.2.1.18b aLldpXdot3LocPSEAllocatedPowerValueB <\/td>\n<\/tr>\n
47<\/td>\n30.12.2.1.18c aLldpXdot3LocPSEPoweringStatus
30.12.2.1.18d aLldpXdot3LocPDPoweredStatus
30.12.2.1.18e aLldpXdot3LocPowerPairsExt
30.12.2.1.18f aLldpXdot3LocPowerClassExtA <\/td>\n<\/tr>\n
48<\/td>\n30.12.2.1.18g aLldpXdot3LocPowerClassExtB
30.12.2.1.18h aLldpXdot3LocPowerClassExt <\/td>\n<\/tr>\n
49<\/td>\n30.12.2.1.18i aLldpXdot3LocPowerTypeExt
30.12.2.1.18j aLldpXdot3LocPDLoad
30.12.2.1.18k aLldpXdot3LocPD4PID
30.12.2.1.18l aLldpXdot3LocPSEMaxAvailPower
30.12.2.1.18m aLldpXdot3LocPSEAutoclassSupport <\/td>\n<\/tr>\n
50<\/td>\n30.12.2.1.18n aLldpXdot3LocAutoclassCompleted
30.12.2.1.18o aLldpXdot3LocAutoclassRequest
30.12.2.1.18p aLldpXdot3LocPowerDownRequest
30.12.2.1.18q aLldpXdot3LocPowerDownTime
30.12.2.1.18r aLldpXdot3LocMeasVoltageSupport <\/td>\n<\/tr>\n
51<\/td>\n30.12.2.1.18s aLldpXdot3LocMeasCurrentSupport
30.12.2.1.18t aLldpXdot3LocMeasPowerSupport
30.12.2.1.18u aLldpXdot3LocMeasEnergySupport
30.12.2.1.18v aLldpXdot3LocMeasurementSource
30.12.2.1.18w aLldpXdot3LocMeasVoltageRequest
30.12.2.1.18x aLldpXdot3LocMeasCurrentRequest <\/td>\n<\/tr>\n
52<\/td>\n30.12.2.1.18y aLldpXdot3LocMeasPowerRequest
30.12.2.1.18z aLldpXdot3LocMeasEnergyRequest
30.12.2.1.18aa aLldpXdot3LocMeasVoltageValid
30.12.2.1.18ab aLldpXdot3LocMeasCurrentValid
30.12.2.1.18ac aLldpXdot3LocMeasPowerValid <\/td>\n<\/tr>\n
53<\/td>\n30.12.2.1.18ad aLldpXdot3LocMeasEnergyValid
30.12.2.1.18ae aLldpXdot3LocMeasVoltageUncertainty
30.12.2.1.18af aLldpXdot3LocMeasCurrentUncertainty
30.12.2.1.18ag aLldpXdot3LocMeasPowerUncertainty
30.12.2.1.18ah aLldpXdot3LocMeasEnergyUncertainty <\/td>\n<\/tr>\n
54<\/td>\n30.12.2.1.18ai aLldpXdot3LocVoltageMeasurement
30.12.2.1.18aj aLldpXdot3LocCurrentMeasurement
30.12.2.1.18ak aLldpXdot3LocPowerMeasurement
30.12.2.1.18al aLldpXdot3LocEnergyMeasurement
30.12.2.1.18am aLldpXdot3LocPSEPowerPriceIndex <\/td>\n<\/tr>\n
55<\/td>\n30.12.3 LLDP Remote System Group managed object class
30.12.3.1 LLDP Remote System Group attributes
30.12.3.1.6 aLldpXdot3RemPowerMDISupported
30.12.3.1.7 aLldpXdot3RemPowerMDIEnabled
30.12.3.1.8 aLldpXdot3RemPowerPairControllable
30.12.3.1.9 aLldpXdot3RemPowerPairs <\/td>\n<\/tr>\n
56<\/td>\n30.12.3.1.10 aLldpXdot3RemPowerClass
30.12.3.1.14 aLldpXdot3RemPowerType
30.12.3.1.17 aLldpXdot3RemPDRequestedPowerValue <\/td>\n<\/tr>\n
57<\/td>\n30.12.3.1.17a aLldpXdot3RemPDRequestedPowerValueA
30.12.3.1.17b aLldpXdot3RemPDRequestedPowerValueB
30.12.3.1.18 aLldpXdot3RemPSEAllocatedPowerValue <\/td>\n<\/tr>\n
58<\/td>\n30.12.3.1.18a aLldpXdot3RemPSEAllocatedPowerValueA
30.12.3.1.18b aLldpXdot3RemPSEAllocatedPowerValueB
30.12.3.1.18c aLldpXdot3RemPSEPoweringStatus
30.12.3.1.18d aLldpXdot3RemPDPoweredStatus <\/td>\n<\/tr>\n
59<\/td>\n30.12.3.1.18e aLldpXdot3RemPowerPairsExt
30.12.3.1.18f aLldpXdot3RemPowerClassExtA
30.12.3.1.18g aLldpXdot3RemPowerClassExtB <\/td>\n<\/tr>\n
60<\/td>\n30.12.3.1.18h aLldpXdot3RemPowerClassExt
30.12.3.1.18i aLldpXdot3RemPowerTypeExt
30.12.3.1.18j aLldpXdot3RemPDLoad <\/td>\n<\/tr>\n
61<\/td>\n30.12.3.1.18k aLldpXdot3RemPD4PID
30.12.3.1.18l aLldpXdot3RemPSEMaxAvailPower
30.12.3.1.18m aLldpXdot3RemPSEAutoclassSupport
30.12.3.1.18n aLldpXdot3RemAutoclassCompleted
30.12.3.1.18o aLldpXdot3RemAutoclassRequest
30.12.3.1.18p aLldpXdot3RemPowerDownRequest <\/td>\n<\/tr>\n
62<\/td>\n30.12.3.1.18q aLldpXdot3RemPowerDownTime
30.12.3.1.18r aLldpXdot3RemMeasVoltageSupport
30.12.3.1.18s aLldpXdot3RemMeasCurrentSupport
30.12.3.1.18t aLldpXdot3RemMeasPowerSupport
30.12.3.1.18u aLldpXdot3RemMeasEnergySupport <\/td>\n<\/tr>\n
63<\/td>\n30.12.3.1.18v aLldpXdot3RemMeasurementSource
30.12.3.1.18w aLldpXdot3RemMeasVoltageRequest
30.12.3.1.18x aLldpXdot3RemMeasCurrentRequest
30.12.3.1.18y aLldpXdot3RemMeasPowerRequest
30.12.3.1.18z aLldpXdot3RemMeasEnergyRequest <\/td>\n<\/tr>\n
64<\/td>\n30.12.3.1.18aa aLldpXdot3RemMeasVoltageValid
30.12.3.1.18ab aLldpXdot3RemMeasCurrentValid
30.12.3.1.18ac aLldpXdot3RemMeasPowerValid
30.12.3.1.18ad aLldpXdot3RemMeasEnergyValid
30.12.3.1.18ae aLldpXdot3RemMeasVoltageUncertainty
30.12.3.1.18af aLldpXdot3RemMeasCurrentUncertainty <\/td>\n<\/tr>\n
65<\/td>\n30.12.3.1.18ag aLldpXdot3RemMeasPowerUncertainty
30.12.3.1.18ah aLldpXdot3RemMeasEnergyUncertainty
30.12.3.1.18ai aLldpXdot3RemVoltageMeasurement
30.12.3.1.18aj aLldpXdot3RemCurrentMeasurement
30.12.3.1.18ak aLldpXdot3RemPowerMeasurement <\/td>\n<\/tr>\n
66<\/td>\n30.12.3.1.18al aLldpXdot3RemEnergyMeasurement
30.12.3.1.18am aLldpXdot3RemPSEPowerPriceIndex <\/td>\n<\/tr>\n
67<\/td>\n33. Data Terminal Equipment (DTE) Power via Media Dependent Interface (MDI) Power over Ethernet over 2 Pairs
33.1 Overview
33.1.1 Objectives <\/td>\n<\/tr>\n
68<\/td>\n33.1.3 Relationship of DTE Power via MDI Power over Ethernet to the IEEE 802.3 Architecture <\/td>\n<\/tr>\n
69<\/td>\n33.2 Power sourcing equipment (PSE)
33.2.1 PSE location
33.2.2 Midspan PSE types <\/td>\n<\/tr>\n
70<\/td>\n33.3 Powered devices (PDs)
33.3.1 PD PI
33.4 Additional electrical specifications
33.4.2 Fault tolerance
33.4.3 Impedance balance <\/td>\n<\/tr>\n
71<\/td>\n33.4.4 Common-mode output voltage <\/td>\n<\/tr>\n
72<\/td>\n33.4.6 Differential noise voltage
33.4.7 Return loss
33.4.9 Midspan PSE device additional requirements
33.4.9.1 \u201cConnector\u201d or \u201ctelecom outlet\u201d Midspan PSE device transmission requirements <\/td>\n<\/tr>\n
73<\/td>\n33.4.9.1.1 Near End Crosstalk (NEXT) <\/td>\n<\/tr>\n
74<\/td>\n33.4.9.1.2 Insertion loss
33.4.9.1.3 Return loss
33.4.9.1a 33.4.9.1.4 Work area or equipment cable Cord Midspan PSE <\/td>\n<\/tr>\n
75<\/td>\n33.4.9.1a.1 Maximum link delay
33.4.9.1a.2 Maximum link delay skew
33.4.9.1b Coupling parameters between link segments <\/td>\n<\/tr>\n
76<\/td>\n33.4.9.1b.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
33.4.9.1b.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss
33.6 Data Link Layer classification
33.6.3 Power control state diagrams
33.6.3.3 Variables <\/td>\n<\/tr>\n
77<\/td>\n33.8 Protocol implementation conformance statement (PICS) proforma for Clause 33, DTE Power via MDI Power over Ethernet over 2 Pairs
33.8.1 Introduction
33.8.2 Identification
33.8.2.2 Protocol summary <\/td>\n<\/tr>\n
78<\/td>\n33.8.3 PICS proforma tables for DTE Power via MDI Power over Ethernet over 2 Pairs
33.8.3.4 Electrical specifications applicable to the PSE and PD <\/td>\n<\/tr>\n
79<\/td>\n40. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 1000BASE-T
40.6 PMA electrical specifications
40.6.1 PMA-to-MDI interface tests
40.6.1.1 Isolation requirement <\/td>\n<\/tr>\n
80<\/td>\n55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T
55.5 PMA electrical specifications
55.5.1 Isolation requirement <\/td>\n<\/tr>\n
81<\/td>\n79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.1 Overview
79.1.1 IEEE 802.3 LLDP frame format
79.1.1.3 Length\/Type field
79.3 IEEE 802.3 Organizationally Specific TLVs
79.3.2 Power Via MDI TLV <\/td>\n<\/tr>\n
83<\/td>\n79.3.2.1 MDI power support
79.3.2.1.1 Port class
79.3.2.1.2 PSE MDI power support
79.3.2.1.3 PSE MDI power state
79.3.2.1.4 PSE pairs control ability <\/td>\n<\/tr>\n
84<\/td>\n79.3.2.2 PSE power pair
79.3.2.3 Power class <\/td>\n<\/tr>\n
85<\/td>\n79.3.2.4 Requested pPower type\/source\/priority
79.3.2.4.1 Power type
79.3.2.4.2a PD 4PID <\/td>\n<\/tr>\n
86<\/td>\n79.3.2.5 PD requested power value
79.3.2.6 PSE allocated power value <\/td>\n<\/tr>\n
87<\/td>\n79.3.2.6a Dual-signature PD requested power value for Mode A and Mode B
79.3.2.6b PSE allocated power value Alternative A and Alternative B <\/td>\n<\/tr>\n
88<\/td>\n79.3.2.6c Power status <\/td>\n<\/tr>\n
89<\/td>\n79.3.2.6c.1 PSE powering status
79.3.2.6c.2 PD powered status
79.3.2.6c.3 PSE power pairs ext
79.3.2.6c.4 Dual-signature power Class ext Mode A <\/td>\n<\/tr>\n
90<\/td>\n79.3.2.6c.5 Dual-signature power Class ext Mode B
79.3.2.6c.6 Power Class ext
79.3.2.6d System setup
79.3.2.6d.1 Power Type ext
79.3.2.6d.2 PD Load
79.3.2.6e PSE maximum available power value <\/td>\n<\/tr>\n
91<\/td>\n79.3.2.6f Autoclass
79.3.2.6f.1 PSE Autoclass support
79.3.2.6f.2 Autoclass completed
79.3.2.6f.3 Autoclass request <\/td>\n<\/tr>\n
92<\/td>\n79.3.2.6g Power down
79.3.2.6g.1 Power down request
79.3.2.6g.2 Power down time
79.3.8 Power via MDI Measurements TLV
79.3.8.1 Measurements <\/td>\n<\/tr>\n
94<\/td>\n79.3.8.2 PSE power price index <\/td>\n<\/tr>\n
95<\/td>\n79.3.8.3 Power Via MDI Measurements TLV usage rules
79.4 IEEE 802.3 Organizationally Specific TLV selection management
79.4.2 IEEE 802.3 Organizationally Specific TLV\/LLDP Local and Remote System group managed object class cross references <\/td>\n<\/tr>\n
99<\/td>\n79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.5.3 Major capabilities\/options <\/td>\n<\/tr>\n
100<\/td>\n79.5.8 Power Via MDI TLV <\/td>\n<\/tr>\n
103<\/td>\n79.5.12 Power via MDI Measurements TLV <\/td>\n<\/tr>\n
104<\/td>\n126. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T
126.5 PMA electrical specifications
126.5.1 Isolation requirement <\/td>\n<\/tr>\n
105<\/td>\n145. Power over Ethernet
145.1 Overview <\/td>\n<\/tr>\n
106<\/td>\n145.1.1 Compatibility considerations
145.1.2 Relationship of Power over Ethernet to the IEEE 802.3 Architecture <\/td>\n<\/tr>\n
107<\/td>\n145.1.3 System parameters <\/td>\n<\/tr>\n
109<\/td>\n145.1.4 Cabling requirements <\/td>\n<\/tr>\n
110<\/td>\n145.2 Power sourcing equipment (PSE)
145.2.1 PSE Type descriptions <\/td>\n<\/tr>\n
111<\/td>\n145.2.2 PSE location
145.2.3 Midspan PSE variants <\/td>\n<\/tr>\n
118<\/td>\n145.2.4 PSE PI <\/td>\n<\/tr>\n
119<\/td>\n145.2.5 PSE state diagrams
145.2.5.1 State diagram overview and timing <\/td>\n<\/tr>\n
120<\/td>\n145.2.5.2 Conventions <\/td>\n<\/tr>\n
121<\/td>\n145.2.5.3 Constants
145.2.5.4 Variables <\/td>\n<\/tr>\n
131<\/td>\n145.2.5.5 Timers <\/td>\n<\/tr>\n
133<\/td>\n145.2.5.6 Functions <\/td>\n<\/tr>\n
138<\/td>\n145.2.5.7 State diagrams <\/td>\n<\/tr>\n
153<\/td>\n145.2.6 PSE detection of PDs
145.2.6.1 PSE detection validation circuit <\/td>\n<\/tr>\n
154<\/td>\n145.2.6.2 Detection probe requirements <\/td>\n<\/tr>\n
155<\/td>\n145.2.6.3 Detection criteria
145.2.6.4 Rejection criteria <\/td>\n<\/tr>\n
156<\/td>\n145.2.6.5 Open circuit criteria
145.2.7 Connection check
145.2.8 PSE classification of PDs and mutual identification <\/td>\n<\/tr>\n
160<\/td>\n145.2.8.1 PSE Multiple-Event Physical Layer classification <\/td>\n<\/tr>\n
163<\/td>\n145.2.8.2 Autoclass (optional) <\/td>\n<\/tr>\n
164<\/td>\n145.2.9 4PID requirements
145.2.10 Power supply output <\/td>\n<\/tr>\n
168<\/td>\n145.2.10.1 Output voltage in the power on states
145.2.10.2 Output voltage pair-to-pair difference
145.2.10.3 Voltage transients
145.2.10.4 Reflected voltage
145.2.10.5 Power feeding ripple and noise
145.2.10.6 Continuous current capability in the power on states <\/td>\n<\/tr>\n
171<\/td>\n145.2.10.6.1 PSE pair-to-pair current unbalance <\/td>\n<\/tr>\n
173<\/td>\n145.2.10.7 Current during power up <\/td>\n<\/tr>\n
175<\/td>\n145.2.10.8 Overload current
145.2.10.9 Short circuit current <\/td>\n<\/tr>\n
178<\/td>\n145.2.10.10 Turn off time
145.2.10.11 Turn off voltage
145.2.10.12 Intra-pair current unbalance
145.2.10.13 Type power <\/td>\n<\/tr>\n
179<\/td>\n145.2.10.14 Power turn on time
145.2.10.15 Error delay timing
145.2.10.16 PSE stability
145.2.11 Power supply allocation
145.2.12 PSE Maintain Power Signature (MPS) requirements <\/td>\n<\/tr>\n
180<\/td>\n145.3 Powered devices (PDs) <\/td>\n<\/tr>\n
181<\/td>\n145.3.1 PD Type descriptions
145.3.2 PD PI <\/td>\n<\/tr>\n
183<\/td>\n145.3.3 PD state diagrams
145.3.3.1 Conventions
145.3.3.2 Mode designation
145.3.3.3 Single-signature PD state diagrams
145.3.3.3.1 Constants
145.3.3.3.2 Variables <\/td>\n<\/tr>\n
186<\/td>\n145.3.3.3.3 Timers <\/td>\n<\/tr>\n
187<\/td>\n145.3.3.3.4 Functions <\/td>\n<\/tr>\n
188<\/td>\n145.3.3.3.5 State diagrams <\/td>\n<\/tr>\n
190<\/td>\n145.3.3.4 Dual-signature PD state diagram
145.3.3.4.1 Constants
145.3.3.4.2 Variables <\/td>\n<\/tr>\n
193<\/td>\n145.3.3.4.3 Timers
145.3.3.4.4 Functions <\/td>\n<\/tr>\n
194<\/td>\n145.3.3.4.5 State diagram <\/td>\n<\/tr>\n
195<\/td>\n145.3.4 PD valid and non-valid detection signatures <\/td>\n<\/tr>\n
197<\/td>\n145.3.5 PD signature configurations <\/td>\n<\/tr>\n
198<\/td>\n145.3.6 PD classification <\/td>\n<\/tr>\n
199<\/td>\n145.3.6.1 PD Multiple-Event class signature <\/td>\n<\/tr>\n
201<\/td>\n145.3.6.1.1 Mark Event behavior
145.3.6.2 Autoclass (optional) <\/td>\n<\/tr>\n
202<\/td>\n145.3.7 PSE Type identification
145.3.8 PD power <\/td>\n<\/tr>\n
205<\/td>\n145.3.8.1 Input voltage
145.3.8.2 Input average power <\/td>\n<\/tr>\n
206<\/td>\n145.3.8.2.1 Input average power exceptions
145.3.8.2.2 System stability test conditions during startup and steady state operation
145.3.8.3 Input inrush current <\/td>\n<\/tr>\n
207<\/td>\n145.3.8.4 Peak operating power <\/td>\n<\/tr>\n
208<\/td>\n145.3.8.4.1 Peak operating power exceptions
145.3.8.5 Input current slew rate
145.3.8.6 PD behavior during transients at the PSE PI <\/td>\n<\/tr>\n
209<\/td>\n145.3.8.7 Ripple and noise
145.3.8.8 Reflected voltage
145.3.8.9 PD pair-to-pair current unbalance <\/td>\n<\/tr>\n
212<\/td>\n145.3.9 PD Maintain Power Signature <\/td>\n<\/tr>\n
214<\/td>\n145.4 Additional electrical specifications
145.4.1 Isolation
145.4.1.1 Electrical isolation environments <\/td>\n<\/tr>\n
215<\/td>\n145.4.1.1.1 Environment A requirements
145.4.1.1.2 Environment B requirements
145.4.2 Fault tolerance <\/td>\n<\/tr>\n
216<\/td>\n145.4.3 Impedance balance <\/td>\n<\/tr>\n
217<\/td>\n145.4.4 Common-mode output voltage <\/td>\n<\/tr>\n
219<\/td>\n145.4.5 Pair-to-pair output noise voltage
145.4.6 Differential noise voltage <\/td>\n<\/tr>\n
220<\/td>\n145.4.7 Return loss
145.4.8 100BASE-TX transformer droop
145.4.9 Midspan PSE device additional requirements <\/td>\n<\/tr>\n
222<\/td>\n145.4.9.1 Connector Midspan PSE device transmission requirements
145.4.9.1.1 Near End Crosstalk (NEXT) <\/td>\n<\/tr>\n
223<\/td>\n145.4.9.1.2 Insertion loss
145.4.9.1.3 Return loss
145.4.9.2 Cord Midspan PSE <\/td>\n<\/tr>\n
224<\/td>\n145.4.9.2.1 Maximum link delay
145.4.9.2.2 Maximum link delay skew
145.4.9.3 Midspan signal path requirements
145.4.9.3.1 Alternative A Midspan PSE signal path transfer function <\/td>\n<\/tr>\n
225<\/td>\n145.4.9.4 Coupling parameters between link segments
145.4.9.4.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss
145.4.9.4.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss <\/td>\n<\/tr>\n
226<\/td>\n145.5 Data Link Layer classification
145.5.1 TLV frame definition
145.5.2 Data Link Layer classification timing requirements
145.5.3 Power control state diagrams <\/td>\n<\/tr>\n
227<\/td>\n145.5.3.1 Conventions
145.5.3.2 PSE power control state diagrams
145.5.3.2.1 Alternative designation
145.5.3.2.2 Variables <\/td>\n<\/tr>\n
231<\/td>\n145.5.3.2.3 Functions <\/td>\n<\/tr>\n
232<\/td>\n145.5.3.2.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n
233<\/td>\n145.5.3.2.5 State diagrams <\/td>\n<\/tr>\n
237<\/td>\n145.5.3.3 Single-signature PD power control state diagrams
145.5.3.3.1 Variables <\/td>\n<\/tr>\n
239<\/td>\n145.5.3.3.2 Timers
145.5.3.3.3 Functions <\/td>\n<\/tr>\n
240<\/td>\n145.5.3.3.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n
241<\/td>\n145.5.3.3.5 State diagrams <\/td>\n<\/tr>\n
242<\/td>\n145.5.3.4 Dual-signature PD power control state diagrams
145.5.3.4.1 Mode designation <\/td>\n<\/tr>\n
243<\/td>\n145.5.3.4.2 Variables <\/td>\n<\/tr>\n
245<\/td>\n145.5.3.4.3 Functions <\/td>\n<\/tr>\n
246<\/td>\n145.5.3.4.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n
247<\/td>\n145.5.3.4.5 State diagrams <\/td>\n<\/tr>\n
249<\/td>\n145.5.4 Power requests and allocations
145.5.5 State change procedure across a link (single-signature) <\/td>\n<\/tr>\n
250<\/td>\n145.5.5.1 PSE state change procedure across a link (single-signature)
145.5.5.2 PD state change procedure across a link (single-signature) <\/td>\n<\/tr>\n
251<\/td>\n145.5.6 State change procedure across a link (dual-signature)
145.5.6.1 Transitions between 2-pair and 4-pair mode (dual-signature) <\/td>\n<\/tr>\n
252<\/td>\n145.5.6.2 PSE state change procedure across a link (dual-signature)
145.5.6.3 PD state change procedure across a link (dual-signature)
145.5.7 Autoclass <\/td>\n<\/tr>\n
253<\/td>\n145.6 Environmental
145.6.1 General safety
145.6.2 Network safety
145.6.3 Installation and maintenance guidelines <\/td>\n<\/tr>\n
254<\/td>\n145.6.4 Patch panel considerations
145.6.5 Electromagnetic emissions
145.6.6 Temperature and humidity
145.6.7 Labeling <\/td>\n<\/tr>\n
255<\/td>\n145.7 Protocol implementation conformance statement (PICS) proforma for Clause 145, Power over Ethernet
145.7.1 Introduction
145.7.2 Identification
145.7.2.1 Implementation identification
145.7.2.2 Protocol summary <\/td>\n<\/tr>\n
256<\/td>\n145.7.2.3 PD Major capabilities\/options <\/td>\n<\/tr>\n
257<\/td>\n145.7.2.4 PSE Major capabilities\/options <\/td>\n<\/tr>\n
258<\/td>\n145.7.3 PICS proforma tables for Power over Ethernet
145.7.3.1 Power sourcing equipment <\/td>\n<\/tr>\n
263<\/td>\n145.7.3.2 Powered devices <\/td>\n<\/tr>\n
268<\/td>\n145.7.3.3 Electrical specifications applicable to the PSE and PD <\/td>\n<\/tr>\n
270<\/td>\n145.7.3.4 Electrical specifications applicable to the PSE <\/td>\n<\/tr>\n
272<\/td>\n145.7.3.5 Electrical specifications applicable to the PD
145.7.3.6 Data Link Layer classification requirements <\/td>\n<\/tr>\n
273<\/td>\n145.7.3.7 Environmental specifications applicable to PSEs and PDs
145.7.3.8 Environmental specifications applicable to the PSE <\/td>\n<\/tr>\n
274<\/td>\nAnnex A (informative) Bibliography <\/td>\n<\/tr>\n
275<\/td>\nAnnex 145A (informative) Resistance and current unbalance
145A.1 Intra pair resistance unbalance
145A.2 Pair-to-pair unbalance overview <\/td>\n<\/tr>\n
277<\/td>\n145A.3 Pair-to-pair link section resistance unbalance requirements for 4-pair operation
145A.4 PSE resistance and current unbalance <\/td>\n<\/tr>\n
278<\/td>\n145A.4.1 Direct RPSE measurement <\/td>\n<\/tr>\n
279<\/td>\n145A.5 PD resistance and current unbalance <\/td>\n<\/tr>\n
280<\/td>\nAnnex 145B (informative) Timing diagrams
145B.1 CC_DET_SEQ timing diagrams
145B.1.1 CC_DET_SEQ=0 timing diagrams <\/td>\n<\/tr>\n
281<\/td>\n145B.1.2 CC_DET_SEQ=1 timing diagrams <\/td>\n<\/tr>\n
282<\/td>\n145B.1.3 CC_DET_SEQ=2 timing diagrams <\/td>\n<\/tr>\n
283<\/td>\n145B.1.4 CC_DET_SEQ=3 timing diagrams <\/td>\n<\/tr>\n
284<\/td>\n145B.2 PSE Single-Event Physical Layer classification timing diagram
145B.3 PSE Multiple-Event Physical Layer classification timing diagram <\/td>\n<\/tr>\n
286<\/td>\nAnnex 145C (informative) Power system and parameters
145C.1 Constant power <\/td>\n<\/tr>\n
288<\/td>\n145C.2 Current <\/td>\n<\/tr>\n
289<\/td>\n145C.3 Direct current resistance (DCR) <\/td>\n<\/tr>\n
290<\/td>\n145C.4 Bundled cabling applications <\/td>\n<\/tr>\n
291<\/td>\nBack cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Ethernet Amendment 2: Physical Layer and Management Parameters for Power over Ethernet over 4 pairs<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2019<\/td>\n291<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":194863,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-194859","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/194859","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/194863"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=194859"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=194859"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=194859"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}