{"id":252088,"date":"2024-10-19T16:38:17","date_gmt":"2024-10-19T16:38:17","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-62026-72013\/"},"modified":"2024-10-25T11:56:49","modified_gmt":"2024-10-25T11:56:49","slug":"bs-en-62026-72013","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-62026-72013\/","title":{"rendered":"BS EN 62026-7:2013"},"content":{"rendered":"
IEC 62026-7:2010 specifies an interface system providing bit-level and word-level communication between a controller and control circuit devices such as sensors, actuators, and switching elements. The interface system uses cabling with round or flat profiles containing a two conductor signalling pair and optionally a two conductor power supply pair. This part establishes requirements for the interchangeability of components with such interfaces. This standard cancels and replaces IEC\/PAS 62026-7 published in 2009. This first edition constitutes a general technical revision with clarifications only and with no significant change in the technology.<\/p>\n
PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
---|---|---|---|---|---|---|---|
9<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
19<\/td>\n | INTRODUCTION <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | 1 Scope 2 Normative references <\/td>\n<\/tr>\n | ||||||
22<\/td>\n | 3 Terms, definitions, symbols and abbreviated terms 3.1 Terms and definitions <\/td>\n<\/tr>\n | ||||||
25<\/td>\n | 3.2 Symbols and abbreviated terms <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 4 Classification 4.1 General <\/td>\n<\/tr>\n | ||||||
27<\/td>\n | Figures Figure\u00a01 \u2013 Segment layer <\/td>\n<\/tr>\n | ||||||
28<\/td>\n | 4.2 Network specifications 4.3 Components Tables Table 1 \u2013 Network specifications <\/td>\n<\/tr>\n | ||||||
29<\/td>\n | 4.4 CompoNet communication model 4.5 CompoNet and CIP Figure\u00a02 \u2013 CompoNet components <\/td>\n<\/tr>\n | ||||||
30<\/td>\n | 5 Characteristics 5.1 Communication cycle Figure 3 \u2013 Time domains Table 2 \u2013 OSI reference model and CompoNet <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 5.2 Messaging protocol Figure 4 \u2013 A typical communication cycle Figure 5 \u2013 A general frame <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | Figure 6 \u2013 Preamble of frames Figure 7 \u2013 Transmission direction Table 3 \u2013 Command codes <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | Figure 8 \u2013 Transmission direction Table 4 \u2013 Command restrictions for slave MAC <\/td>\n<\/tr>\n | ||||||
34<\/td>\n | Figure 9 \u2013 OUT frame format Figure 10 \u2013 OUT command code Table 5 \u2013 Block name description Table 6 \u2013 CN target <\/td>\n<\/tr>\n | ||||||
35<\/td>\n | Table 7 \u2013 I\/O refresh <\/td>\n<\/tr>\n | ||||||
36<\/td>\n | Figure 11 \u2013 TRG frame format Figure 12 \u2013 TRG command code Figure 13 \u2013 CN frame format Table 8 \u2013 Block name description <\/td>\n<\/tr>\n | ||||||
37<\/td>\n | Figure 14 \u2013 CN command code Table 9 \u2013 Block name description Table 10 \u2013 Duplication checking function status Table 11 \u2013 A_EVENT sending request <\/td>\n<\/tr>\n | ||||||
38<\/td>\n | Figure 15 \u2013 IN frame format Table 12 \u2013 Status of CN frames Table 13 \u2013 Warning bit of CN frames Table 14 \u2013 Alarm bit of CN frames Table 15 \u2013 Block name description <\/td>\n<\/tr>\n | ||||||
39<\/td>\n | Figure 16 \u2013 IN command code Figure 17 \u2013 A_EVENT frame format Table 16 \u2013 Encoded length <\/td>\n<\/tr>\n | ||||||
40<\/td>\n | Figure 18 \u2013 A_EVENT command code Table 17 \u2013 Block name description Table 18 \u2013 Acknowledgement bit of A_EVENT Table 19 \u2013 Command type of A_EVENT <\/td>\n<\/tr>\n | ||||||
41<\/td>\n | Figure 19 \u2013 B_EVENT frame format Table 20 \u2013 Block name description <\/td>\n<\/tr>\n | ||||||
42<\/td>\n | Figure 20 \u2013 B_EVENT command code meanings Table 21 \u2013 Acknowledgement bit of B_EVENT Table 22 \u2013 Command type of B_EVENT <\/td>\n<\/tr>\n | ||||||
43<\/td>\n | Figure 21 \u2013 B_EVENT message format Figure 22 \u2013 E_CMD block Table 23 \u2013 E_CMD block meanings <\/td>\n<\/tr>\n | ||||||
44<\/td>\n | Figure 23 \u2013 Group block Figure 24 \u2013 Item block Table 24 \u2013 Group block meanings Table 25 \u2013 Item block meanings <\/td>\n<\/tr>\n | ||||||
47<\/td>\n | Figure 25 \u2013 Status Read (STR Response) event data <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | Figure 26 \u2013 Configuration event data (STW Request) <\/td>\n<\/tr>\n | ||||||
50<\/td>\n | Figure 27 \u2013 Poll data <\/td>\n<\/tr>\n | ||||||
51<\/td>\n | Figure 28 \u2013 B_EVENT general decoding phase <\/td>\n<\/tr>\n | ||||||
52<\/td>\n | Table 26 \u2013 Processing rules for a STR request Table 27 \u2013 Processing rules for an A_EVENT poll request Table 28 \u2013 Processing rules for a STW request <\/td>\n<\/tr>\n | ||||||
53<\/td>\n | Figure 29 \u2013 Flow chart for processing a matched STW request <\/td>\n<\/tr>\n | ||||||
54<\/td>\n | Figure 30 \u2013 BEACON frame format Figure 31 \u2013 BEACON command code Table 29 \u2013 STW request commands Table 30 \u2013 Block name description <\/td>\n<\/tr>\n | ||||||
55<\/td>\n | Table 31 \u2013 Control code of BEACON frames Table 32 \u2013 Speed Code of BEACON frames <\/td>\n<\/tr>\n | ||||||
56<\/td>\n | Figure 32 \u2013 Object diagram of A_Event message flow Figure 33 \u2013 A_EVENT message format <\/td>\n<\/tr>\n | ||||||
57<\/td>\n | Figure 34 \u2013 Compact message type request format (non-fragmented frame\/first fragment frame) <\/td>\n<\/tr>\n | ||||||
58<\/td>\n | Figure 35 \u2013 Expanded message type request format (non-fragmented frame\/first fragment frame) Figure 36 \u2013 Compact\/Expanded message successful response format (unfragmented frame\/first fragment frame) <\/td>\n<\/tr>\n | ||||||
59<\/td>\n | Figure 37 \u2013 Compact\/Expanded message unsuccessful response format (unfragmented frame\/first fragment frame) Figure 38 \u2013 Compact\/Expanded message request format for fragments Figure 39 \u2013 Compact\/Expanded message response format for fragments <\/td>\n<\/tr>\n | ||||||
60<\/td>\n | Figure 40 \u2013 Service data format Table 33 \u2013 Control code format <\/td>\n<\/tr>\n | ||||||
62<\/td>\n | Table 34 \u2013 A Data encoding example <\/td>\n<\/tr>\n | ||||||
63<\/td>\n | Table 35 \u2013 Fragment type values <\/td>\n<\/tr>\n | ||||||
64<\/td>\n | Table 36 \u2013 Fragmented transmission <\/td>\n<\/tr>\n | ||||||
65<\/td>\n | Table 37 \u2013 Fragmented reception <\/td>\n<\/tr>\n | ||||||
67<\/td>\n | Table 38 \u2013 Explicit message timeout values <\/td>\n<\/tr>\n | ||||||
68<\/td>\n | 5.3 CompoNet communication object classes <\/td>\n<\/tr>\n | ||||||
69<\/td>\n | Table\u00a039 \u2013 Maximum value of expected packet rate Table\u00a040 \u2013 CompoNet connection object attribute access rules <\/td>\n<\/tr>\n | ||||||
72<\/td>\n | Table\u00a041 \u2013 CompoNet Link object specific additional error codes <\/td>\n<\/tr>\n | ||||||
73<\/td>\n | Table\u00a042 \u2013 Connection instance ID for predefined master\/slave connections Table\u00a043 \u2013 Default multicast poll connection object attribute values <\/td>\n<\/tr>\n | ||||||
74<\/td>\n | Figure\u00a041 \u2013 Predefined master\/slave I\/O connection state transition diagram Table\u00a044 \u2013 Predefined master\/slave I\/O connection state event matrix <\/td>\n<\/tr>\n | ||||||
76<\/td>\n | Figure\u00a042 \u2013 Predefined master\/slave I\/O connection state transition diagram <\/td>\n<\/tr>\n | ||||||
77<\/td>\n | Figure\u00a043 \u2013 Connection flow <\/td>\n<\/tr>\n | ||||||
78<\/td>\n | Table\u00a045 \u2013 CompoNet Link class attributes Table\u00a046 \u2013 CompoNet Link class services Table\u00a047 \u2013 CompoNet Link instance attributes <\/td>\n<\/tr>\n | ||||||
79<\/td>\n | Table\u00a048 \u2013 MAC ID range <\/td>\n<\/tr>\n | ||||||
80<\/td>\n | Table\u00a049 \u2013 Data rate Table\u00a050 \u2013 Allocation choice Table\u00a051 \u2013 Data rate switch value <\/td>\n<\/tr>\n | ||||||
81<\/td>\n | Table\u00a052 \u2013 Bit definitions for node state octet Table\u00a053 \u2013 Bit definitions for node network state Table\u00a054 \u2013 CompoNet Link object common services <\/td>\n<\/tr>\n | ||||||
82<\/td>\n | Figure\u00a044 \u2013 Allocate request service data Table\u00a055 \u2013 CompoNet Link Object class specific services Table\u00a056 \u2013 Allocation choice octet contents <\/td>\n<\/tr>\n | ||||||
83<\/td>\n | Figure\u00a045 \u2013 Allocate response service data Figure\u00a046 \u2013 Release request service data Table\u00a057 \u2013 EPR value Table\u00a058 \u2013 Explicit message timer Table\u00a059 \u2013 Release master\/slave connection set request parameters <\/td>\n<\/tr>\n | ||||||
84<\/td>\n | Table\u00a060 \u2013 Release choice octet contents Table\u00a061 \u2013 Repeater class attribute Table\u00a062 \u2013 Repeater class services <\/td>\n<\/tr>\n | ||||||
85<\/td>\n | Table 63 \u2013 Instance attributes of repeater class <\/td>\n<\/tr>\n | ||||||
86<\/td>\n | 5.4 Network access state machine Figure\u00a047 \u2013 Reset service parameter Table 64 \u2013 Repeater common service Table\u00a065 \u2013 Reset attributes <\/td>\n<\/tr>\n | ||||||
87<\/td>\n | Table 66 \u2013 Data rate and network watchdog time periods <\/td>\n<\/tr>\n | ||||||
88<\/td>\n | Figure 48 \u2013 State transition diagram Table 67 \u2013 Description of the state machine <\/td>\n<\/tr>\n | ||||||
89<\/td>\n | Figure 49 \u2013 Sub-state of non-participated state Figure 50 \u2013 Sub-state of participated state <\/td>\n<\/tr>\n | ||||||
90<\/td>\n | Figure 51 \u2013 Data rate detection diagram <\/td>\n<\/tr>\n | ||||||
91<\/td>\n | Table\u00a068 \u2013 Duplicate MAC ID detection mechanism Table 69 \u2013 Repeating directions of frames <\/td>\n<\/tr>\n | ||||||
92<\/td>\n | 5.5 I\/O connection 5.6 TDMA Figure 52 \u2013 BEACON changed by repeaters Figure 53 \u2013 Multicast I\/O connections <\/td>\n<\/tr>\n | ||||||
93<\/td>\n | Figure 54 \u2013 Master MAC and Physical circuit diagram Table 70 \u2013 Master timing features <\/td>\n<\/tr>\n | ||||||
94<\/td>\n | Figure\u00a055 \u2013 Slave MAC and Physical circuit diagram Table 71 \u2013 Slave timing features <\/td>\n<\/tr>\n | ||||||
95<\/td>\n | Figure 56 \u2013 Repeater MAC and Physical circuit diagram Table 72 \u2013 Repeater timing features Table 73 \u2013 Cable propagation delay <\/td>\n<\/tr>\n | ||||||
96<\/td>\n | Figure 57 \u2013 Transmission process Table 74 \u2013 Maximum cable length Table 75 \u2013 Parameters in TimeDomain calculation <\/td>\n<\/tr>\n | ||||||
97<\/td>\n | Figure 58 \u2013 Transmission cycle model Table 76 \u2013 Frame marks <\/td>\n<\/tr>\n | ||||||
98<\/td>\n | Table 77 \u2013 TimeDomain settings for nodes at first segment layer Table 78 \u2013 TimeDomain settings for nodes at 2nd and 3rd segment layers <\/td>\n<\/tr>\n | ||||||
99<\/td>\n | Figure 59 \u2013 CnDefaultTimeDomain cycle model Table 79 \u2013 Repeater delay for CnDefaultTimeDomain calculation Table 80 \u2013 Parameters for CnDefaultTimeDomain calculation <\/td>\n<\/tr>\n | ||||||
100<\/td>\n | Figure 60 \u2013 Master event communication model Table 81 \u2013 First segment layer settings Table 82 \u2013 Settings for 2nd and 3rd segment layers <\/td>\n<\/tr>\n | ||||||
101<\/td>\n | Figure 61 \u2013 Slave event communication model Table 83 \u2013 Parameters for Event Time Domain calculations <\/td>\n<\/tr>\n | ||||||
102<\/td>\n | 5.7 Physical layer Figure 62 \u2013 Manchester encoding (inverted) Table 84 \u2013 CompoNet Manchester encoding Table 85 \u2013 Allowable connectors for the master port <\/td>\n<\/tr>\n | ||||||
103<\/td>\n | Table 86 \u2013 Master port impedance during receive Table 87 \u2013 Master port impedance during transmit <\/td>\n<\/tr>\n | ||||||
104<\/td>\n | Figure 63 \u2013 Master port transmit mask Table 88 \u2013 Master port transmit specifications for data rate of 4 Mbit\/s, 3 Mbit\/s and 1,5 Mbit\/s Table 89 \u2013 Master port transmit specifications for data rate of 93,75 kbit\/s <\/td>\n<\/tr>\n | ||||||
105<\/td>\n | Figure 64 \u2013 Output waveform test circuit for master or slave port Table 90 \u2013 Allowable connectors for permanently attached cables Table\u00a091 \u2013 Allowable connectors for the slave port <\/td>\n<\/tr>\n | ||||||
106<\/td>\n | Table 92 \u2013 Slave port impedance during receive Table 93 \u2013 Slave port impedance during transmit <\/td>\n<\/tr>\n | ||||||
107<\/td>\n | Figure 65 \u2013 Slave port transmit mask Table\u00a094 \u2013 Slave port transmit specifications for data rate of 4 Mbit\/s; 3 Mbit\/s and 1,5 Mbit\/s Table 95 \u2013 Slave port transmit specifications for data rate of 93,75 kbit\/s <\/td>\n<\/tr>\n | ||||||
108<\/td>\n | Figure 66 \u2013 Receive mask 1 <\/td>\n<\/tr>\n | ||||||
109<\/td>\n | Figure 67 \u2013 Receive mask 2 Figure 68 \u2013 Receive mask 3 <\/td>\n<\/tr>\n | ||||||
110<\/td>\n | Figure 69 \u2013 PHY\/MAC interface diagram Figure 70 \u2013 Digital receive mask 1 Table 96 \u2013 Specifications for digital receive mask 1 <\/td>\n<\/tr>\n | ||||||
111<\/td>\n | Figure\u00a071 \u2013 Digital receive mask 2 Figure 72 \u2013 Digital receive mask 3 Table 97 \u2013 Specifications for digital receive mask 2 Table 98 \u2013 Specifications for digital receive mask 3 <\/td>\n<\/tr>\n | ||||||
112<\/td>\n | Figure 73 \u2013 Logical transmit mask Table 99 \u2013 Specifications for logical transmit <\/td>\n<\/tr>\n | ||||||
113<\/td>\n | Figure 74 \u2013 Recommended circuit for a master port <\/td>\n<\/tr>\n | ||||||
114<\/td>\n | Figure 75 \u2013 Recommended circuit for a slave port Figure 76 \u2013 Transformer symbol <\/td>\n<\/tr>\n | ||||||
115<\/td>\n | Table 100 \u2013 Specification for pulse transformer Table 101 \u2013 Specifications for transformer core <\/td>\n<\/tr>\n | ||||||
116<\/td>\n | Figure 77 \u2013 Driver voltage measurement circuit Figure 78 \u2013 Propagation delay test circuit Table 102 \u2013 Specifications for transceiver <\/td>\n<\/tr>\n | ||||||
117<\/td>\n | Figure 79 \u2013 An isolation example of a master port Table 103 \u2013 Sending Table 104 \u2013 Receiving <\/td>\n<\/tr>\n | ||||||
118<\/td>\n | Figure 80 \u2013 An isolation example of an I\/O module with connectivity to other power sources Figure 81 \u2013 An isolation example of a simple slave that requires connection to devices with ungrounded signal wiring Figure 82 \u2013 An isolation example of a non-network powered slave <\/td>\n<\/tr>\n | ||||||
119<\/td>\n | Table 105 \u2013 Cable types Table 106 \u2013 Cable conductor colours <\/td>\n<\/tr>\n | ||||||
120<\/td>\n | Figure 83 \u2013 Media topology <\/td>\n<\/tr>\n | ||||||
121<\/td>\n | Figure 84 \u2013 Position of a terminator Figure\u00a085 \u2013 Number of devices per segment Table 107 \u2013 CompoNet round cable I: network limitations <\/td>\n<\/tr>\n | ||||||
122<\/td>\n | Figure 86 \u2013 Cable length limitation Illustration Figure 87 \u2013 Branch restriction Table 108 \u2013 CompoNet 4-conductor cables: network limitations <\/td>\n<\/tr>\n | ||||||
123<\/td>\n | Figure 88 \u2013 Wiring selection <\/td>\n<\/tr>\n | ||||||
124<\/td>\n | Figure 89 \u2013 General wiring method <\/td>\n<\/tr>\n | ||||||
125<\/td>\n | Figure 90 \u2013 Flexible wiring method Table 109 \u2013 Resistance characteristics Table 110 \u2013 Network power supply specifications <\/td>\n<\/tr>\n | ||||||
126<\/td>\n | Table 111 \u2013 Local power supply specifications Table\u00a0112 \u2013 Node external power supply specifications <\/td>\n<\/tr>\n | ||||||
127<\/td>\n | Figure 91 \u2013 Power dispatching method Figure 92 \u2013 Network segment powered by the master Figure 93 \u2013 Connection with power supply <\/td>\n<\/tr>\n | ||||||
128<\/td>\n | Figure 94 \u2013 Network segments powered by repeaters <\/td>\n<\/tr>\n | ||||||
129<\/td>\n | 6 Product information 7 Normal service, mounting and transport conditions 7.1 Normal service conditions Figure 95 \u2013 A simplified diagram for a repeater <\/td>\n<\/tr>\n | ||||||
130<\/td>\n | 7.2 Conditions during transport and storage 7.3 Mounting 8 Constructional and performance requirements 8.1 Indicators and configuration switches <\/td>\n<\/tr>\n | ||||||
131<\/td>\n | Table\u00a0113 \u2013 Module status indicator Table 114 \u2013 CDI status indicator <\/td>\n<\/tr>\n | ||||||
132<\/td>\n | Table 115 \u2013 Data rate switch encoding Table 116 \u2013 Addresses switches <\/td>\n<\/tr>\n | ||||||
133<\/td>\n | Table 117 \u2013 Indicator marking Table 118 \u2013 Node address switch and device type marking <\/td>\n<\/tr>\n | ||||||
134<\/td>\n | 8.2 CompoNet cable Table 119 \u2013 Connector marking <\/td>\n<\/tr>\n | ||||||
135<\/td>\n | Table 120 \u2013 Cable profile: data pair specification Table 121 \u2013 Cable profile: d.c. power pair specification <\/td>\n<\/tr>\n | ||||||
136<\/td>\n | Table 122 \u2013 Cable profile: general specification <\/td>\n<\/tr>\n | ||||||
137<\/td>\n | Table 123 \u2013 Round cable I: data pair specification Table 124 \u2013 Round cable I: d.c. power pair specification <\/td>\n<\/tr>\n | ||||||
138<\/td>\n | Table 125 \u2013 Round cable I: general specification <\/td>\n<\/tr>\n | ||||||
139<\/td>\n | Table 126 \u2013 Round cable II: data pair specification Table 127 \u2013 Round cable II: d.c. power pair specification <\/td>\n<\/tr>\n | ||||||
140<\/td>\n | Figure 96 \u2013 Outline of round cable II Table 128 \u2013 Round cable II: general specification <\/td>\n<\/tr>\n | ||||||
141<\/td>\n | Table 129 \u2013 Flat cable I: data pair specification Table 130 \u2013 Flat cable I: d.c. power pair specification <\/td>\n<\/tr>\n | ||||||
142<\/td>\n | Figure 97 \u2013 Outline of flat cable I Table 131 \u2013 Flat cable I: general specification <\/td>\n<\/tr>\n | ||||||
143<\/td>\n | Figure 98 \u2013 Dimension of flat cable I Table 132 \u2013 Flat cable II: data pair specification <\/td>\n<\/tr>\n | ||||||
144<\/td>\n | Figure 99 \u2013 Outline of flat cable II Table 133 \u2013 Flat cable II: d.c. power pair specification Table 134 \u2013 Flat cable II: general specification <\/td>\n<\/tr>\n | ||||||
145<\/td>\n | 8.3 Terminator 8.4 Connectors Figure 100 \u2013 Dimension of flat cable II <\/td>\n<\/tr>\n | ||||||
146<\/td>\n | Table 135 \u2013 Connector profile template <\/td>\n<\/tr>\n | ||||||
147<\/td>\n | Figure 101 \u2013 Engaging dimensions of plug connector <\/td>\n<\/tr>\n | ||||||
148<\/td>\n | Figure 102 \u2013 Contact space for plug connector <\/td>\n<\/tr>\n | ||||||
149<\/td>\n | Figure 103 \u2013 Engaging dimensions of jack connector <\/td>\n<\/tr>\n | ||||||
150<\/td>\n | Figure 104 \u2013 Connector hook <\/td>\n<\/tr>\n | ||||||
151<\/td>\n | Table 136 \u2013 Specification of open connector <\/td>\n<\/tr>\n | ||||||
152<\/td>\n | Figure 105 \u2013 Open connecter plug (informative) <\/td>\n<\/tr>\n | ||||||
153<\/td>\n | Figure 106 \u2013 Open connecter jack (informative) <\/td>\n<\/tr>\n | ||||||
154<\/td>\n | Figure 107 \u2013 Method to measure contact resistance (open connectors) Figure 108 \u2013 De-rating current for connectors <\/td>\n<\/tr>\n | ||||||
155<\/td>\n | Table 137 \u2013 Specification of flat connector I <\/td>\n<\/tr>\n | ||||||
157<\/td>\n | Figure 109 \u2013 Flat connector I plug <\/td>\n<\/tr>\n | ||||||
158<\/td>\n | Figure 110 \u2013 Flat connector I jack (informative) <\/td>\n<\/tr>\n | ||||||
159<\/td>\n | Figure 111 \u2013 Method to measure contact resistance (flat I, II connectors) Table 138 \u2013 Specification of flat connector II <\/td>\n<\/tr>\n | ||||||
161<\/td>\n | Figure 112 \u2013 Flat connector II plug (informative) Figure 113 \u2013 Flat connector II jack (informative) <\/td>\n<\/tr>\n | ||||||
162<\/td>\n | Figure 114 \u2013 Marking connector for trunk lines Table 139 \u2013 Specification of sealed M12 connector <\/td>\n<\/tr>\n | ||||||
163<\/td>\n | 8.5 Node power supply implementation Figure 115 \u2013 M12 connecter pinout <\/td>\n<\/tr>\n | ||||||
164<\/td>\n | Figure 116 \u2013 Link power circuits Figure 117 \u2013 Power-drop along a cable <\/td>\n<\/tr>\n | ||||||
165<\/td>\n | 8.6 Miswiring protection 8.7 Electromagnetic compatibility (EMC) Figure 118 \u2013 Power design for a node (informative) <\/td>\n<\/tr>\n | ||||||
166<\/td>\n | 9 Tests 9.1 General <\/td>\n<\/tr>\n | ||||||
167<\/td>\n | 9.2 Electrical testing Figure 119 \u2013 Operating voltage test circuit <\/td>\n<\/tr>\n | ||||||
168<\/td>\n | Figure 120 \u2013 Reverse connected power supply line <\/td>\n<\/tr>\n | ||||||
169<\/td>\n | Figure 121 \u2013 Isolation Figure 122 \u2013 Input impedance <\/td>\n<\/tr>\n | ||||||
170<\/td>\n | Figure 123 \u2013 Output slave test circuit for slave port Table 140 \u2013 Input impedance for master Table 141 \u2013 Input impedance for slave <\/td>\n<\/tr>\n | ||||||
171<\/td>\n | Figure 124 \u2013 Minimum input waveform test circuit Figure 125 \u2013 Minimum input waveform test system <\/td>\n<\/tr>\n | ||||||
172<\/td>\n | 9.3 Mechanical test 9.4 Logical test <\/td>\n<\/tr>\n | ||||||
173<\/td>\n | Figure 126 \u2013 Data link test for slave and repeater DUT <\/td>\n<\/tr>\n | ||||||
176<\/td>\n | Figure 127 \u2013 Test configuration for minimum traffic of master DUT <\/td>\n<\/tr>\n | ||||||
177<\/td>\n | Figure 128 \u2013 Test configuration for proxy of master DUT <\/td>\n<\/tr>\n | ||||||
178<\/td>\n | Annex A (normative) CompoNet common services <\/td>\n<\/tr>\n | ||||||
179<\/td>\n | Annex B (normative) CompoNet error codes Table\u00a0B.1 \u2013 Newly defined CompoNet error codes <\/td>\n<\/tr>\n | ||||||
180<\/td>\n | Annex C (normative) Connection path attribute definition <\/td>\n<\/tr>\n | ||||||
181<\/td>\n | Annex D (normative) Data type specification and encoding <\/td>\n<\/tr>\n | ||||||
184<\/td>\n | Figure\u00a0D.1 \u2013 An example to generate CRC <\/td>\n<\/tr>\n | ||||||
185<\/td>\n | Annex E (normative) Communication objects library <\/td>\n<\/tr>\n | ||||||
186<\/td>\n | Annex F (normative) Value ranges Table\u00a0F.1 \u2013 MAC ID and node address ranges <\/td>\n<\/tr>\n | ||||||
187<\/td>\n | Annex G (normative) CN default time domain Table\u00a0G.1 \u2013 CN default time domain table for 4 Mbit\/s data rate <\/td>\n<\/tr>\n | ||||||
188<\/td>\n | Table\u00a0G.2 \u2013 CN default time domain table for 3 Mbit\/s data rate <\/td>\n<\/tr>\n | ||||||
189<\/td>\n | Table G.3 \u2013 CN default time domain table for 1,5 Mbit\/s data rate <\/td>\n<\/tr>\n | ||||||
190<\/td>\n | Table G.4 \u2013 CN default time domain table for 93,75 kbit\/s data rate <\/td>\n<\/tr>\n | ||||||
191<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Low-voltage switchgear and controlgear. Controller-device interfaces (CDIs) – CompoNet<\/b><\/p>\n |