{"id":255422,"date":"2024-10-19T16:53:06","date_gmt":"2024-10-19T16:53:06","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/bs-en-iec-61643-3412020\/"},"modified":"2024-10-25T12:20:37","modified_gmt":"2024-10-25T12:20:37","slug":"bs-en-iec-61643-3412020","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/bsi\/bs-en-iec-61643-3412020\/","title":{"rendered":"BS EN IEC 61643-341:2020"},"content":{"rendered":"

IEC 61643-341:2020 specifies standard test circuits and methods for thyristor surge suppressor (TSS) components. These surge protective components, SPCs, are specially formulated thyristors designed to limit overvoltages and divert surge currents by clamping and switching actions. These SPCs are used in the construction of surge protective devices (SPDs) and equipment used in Information & Communications Technologies (ICT) networks with voltages up to AC 1 000 V and DC 1 500 V. This document is applicable to gated or non-gated TSS components with third quadrant (-v and \u2013i) characteristics of blocking, conducting or switching. This document contains information on – terminology; – letter symbols; – essential ratings and characteristics; – rating verification and characteristic measurement; This document does not apply to the conventional three-terminal thyristors as covered by IEC 60747-6. This second edition of IEC 61643-341 cancels and replaces the first edition published in 2001. This edition constitutes a technical revision.This edition includes the following significant technical changes with respect to the previous edition: Addition of performance values.<\/p>\n

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2<\/td>\nundefined <\/td>\n<\/tr>\n
5<\/td>\nAnnex ZA(normative)Normative references to international publicationswith their corresponding European publications <\/td>\n<\/tr>\n
7<\/td>\nEnglish
CONTENTS <\/td>\n<\/tr>\n
11<\/td>\nFOREWORD <\/td>\n<\/tr>\n
13<\/td>\n1 Scope
2 Normative references
3 Terms, definitions, abbreviated terms and symbols <\/td>\n<\/tr>\n
14<\/td>\n3.1 Parametric terms, letter symbols and definitions
3.2 General terms
3.3 Main terminal ratings <\/td>\n<\/tr>\n
16<\/td>\n3.4 Main terminal characteristics <\/td>\n<\/tr>\n
17<\/td>\n3.5 Additional and derived parameters
3.6 Temperature related parameters <\/td>\n<\/tr>\n
18<\/td>\n3.7 Gate terminal parameters <\/td>\n<\/tr>\n
20<\/td>\n3.8 Abbreviated terms
3.9 Circuit symbols
Figures
Figure 1 \u2013 Fixed voltage, two terminals: a) reverse blocking and b) reverse conducting <\/td>\n<\/tr>\n
21<\/td>\n4 TSS types
Figure 2 \u2013 Gated reverse blocking: a) P gate b) N gate and c) P & N gate
Figure 3 \u2013 Gated reverse conducting: a) P gate and b) N gate
Figure 4 \u2013 Bidirectional: a) 2 terminal fixed voltage and b) gated <\/td>\n<\/tr>\n
22<\/td>\nFigure 5 \u2013 Switching quadrant characteristics: a) fixed-voltage TSS and b) gated TSS
Figure 6 \u2013 TSS non-switching characteristics: a) reverse blocking b) reverse conducting
Tables
Table 1 \u2013 Types of TSS <\/td>\n<\/tr>\n
23<\/td>\n5 Service conditions
5.1 Normal service conditions
5.2 Storage temperature range, Tstgmin.to Tstgmax.
6 Mechanical requirements and identification
6.1 Robustness of terminations
6.2 Solderability
6.3 Marking
6.4 Documentation <\/td>\n<\/tr>\n
24<\/td>\n7 Standard test methods
7.1 Failure rates
7.2 Test conditions
7.2.1 General
7.2.2 Standard atmospheric conditions <\/td>\n<\/tr>\n
25<\/td>\n7.2.3 Measurement errors
7.2.4 Measurement accuracy
7.2.5 Designated impulse shape and values
7.2.6 Multiple TSS
7.2.7 Gated TSS testing
7.3 Rating test procedures
7.3.1 General <\/td>\n<\/tr>\n
26<\/td>\n7.3.2 Repetitive peak off-state voltage, VDRM
7.3.3 Repetitive peak on-state current, ITRM
Figure 7 \u2013 Test circuit for verifying repetitive peak off-state voltage (VDRM)
Figure 8 \u2013 Test circuit for verifying repetitive peak on-state current, ITRM <\/td>\n<\/tr>\n
27<\/td>\n7.3.4 Non-repetitive peak on-state current, ITSM
Figure 9 \u2013 Repetitive peak on-state current waveforms <\/td>\n<\/tr>\n
28<\/td>\n7.3.5 Non-repetitive peak pulse current, IPP
Figure 10 \u2013 Test circuit for verifying non-repetitive peak on-state current, ITSM <\/td>\n<\/tr>\n
29<\/td>\n7.3.6 Repetitive peak reverse voltage, VRRM
7.3.7 Non-repetitive surge forward current, IFSM
7.3.8 Repetitive peak forward current, IFRM
Figure 11 \u2013 Test circuit for verifying non-repetitive peak pulse current, IPP <\/td>\n<\/tr>\n
30<\/td>\n7.3.9 Critical rate of rise of on-state current, di\/dt
Figure 12 \u2013 Test circuit for verifying critical rate of rise of on-state current (di\/dt) <\/td>\n<\/tr>\n
31<\/td>\n7.4 Characteristic test procedures
7.4.1 General
7.4.2 Off-state current, ID
Figure 13 \u2013 Half sine-wave di\/dt test circuit <\/td>\n<\/tr>\n
32<\/td>\n7.4.3 Repetitive peak off-state current, IDRM
7.4.4 Repetitive peak reverse current, IRRM
7.4.5 Breakover voltage, V(BO) and current, I(BO)
Figure 14 \u2013 Test circuit for off-state current, ID at VD <\/td>\n<\/tr>\n
33<\/td>\nFigure 15 \u2013 Test circuit for breakover, V(BO) and I(BO) and on-state voltage, VT
Figure 16 \u2013 Voltage and current waveforms versus time for a fixed-voltage TSS showing switch-on, on-state and switch-off events <\/td>\n<\/tr>\n
34<\/td>\n7.4.6 On-state voltage, VT
Table 2 \u2013 Breakover ramp rate test values <\/td>\n<\/tr>\n
35<\/td>\nFigure 17 \u2013 Waveform expansions of Figure 16 <\/td>\n<\/tr>\n
36<\/td>\nFigure 18 \u2013 Voltage and current waveforms versus time for a gated TSS showing switch-on, on-state and switch-off events <\/td>\n<\/tr>\n
37<\/td>\nFigure 19 \u2013 Waveform expansions of Figure 18 <\/td>\n<\/tr>\n
38<\/td>\n7.4.7 Holding current, IH
Figure 20 \u2013 Test circuit for holding current, IH <\/td>\n<\/tr>\n
39<\/td>\n7.4.8 Off-state capacitance, Co
Figure 21 \u2013 Test circuit for holding current with additional DC bias
Figure 22 \u2013 Test circuit for capacitance measurement <\/td>\n<\/tr>\n
40<\/td>\nFigure 23 \u2013 Test circuit for capacitance measurement with external DC bias <\/td>\n<\/tr>\n
41<\/td>\nFigure 24 \u2013 Test circuit for capacitance measurement of multi-terminal TSS <\/td>\n<\/tr>\n
42<\/td>\n7.4.9 Forward voltage, VF
7.4.10 Peak forward recovery voltage, VFRM
Figure 25 \u2013 Diode voltage and current waveforms versus time showing VFRM and rising current di\/dt <\/td>\n<\/tr>\n
43<\/td>\n7.4.11 Critical rate of off-state voltage rise, dv\/dt
7.4.12 Variation of holding current with temperature
7.4.13 Gate-to-adjacent terminal peak off-state voltage and peak off-state gate current, VGDM, IGDM
Figure 26 \u2013 Test circuit for exponential critical rate of off-state voltage rise, dv\/dt <\/td>\n<\/tr>\n
44<\/td>\n7.4.14 Gate reverse current, adjacent terminal open, IGAO, IGKO
Figure 27 \u2013 Test circuit for gate-to-adjacent terminal peak off-statevoltage and current, VGDM and IGDM
Figure 28 \u2013 Test circuit for gate reverse current, adjacent terminal open, IGAO, IGKO <\/td>\n<\/tr>\n
45<\/td>\n7.4.15 Gate reverse current, main terminals short-circuited, IGAS, IGKS
Figure 29 \u2013 Test circuit for gate reverse current,main terminals short-circuited, IGAS, IGKS <\/td>\n<\/tr>\n
46<\/td>\nAnnex A (informative) Common impulse waveshapes
A.1 General
A.2 Types of impulse generator
A.3 Impulse generator parameters
A.3.1 Glossary of terms <\/td>\n<\/tr>\n
47<\/td>\nA.3.2 Virtual parameters <\/td>\n<\/tr>\n
48<\/td>\nFigure A.1 \u2013 Current or voltage impulse amplitude versus time showing a 10 % to 90 % T1 front time and T2 time to half value
Figure A.2 \u2013 Voltage impulse amplitude versus time showing a 30 % to 90 % T1 front time and T2 time to half value <\/td>\n<\/tr>\n
49<\/td>\nA.4 Impulse generators typically used for surge protector testing
A.4.1 General
A.4.2 Impulse generators with a defined voltage waveform
A.4.3 Impulse generators with a defined current waveform
Table A.1 \u2013 Voltage impulse generators <\/td>\n<\/tr>\n
50<\/td>\nA.4.4 Generators with defined voltage and current waveforms
Table A.2 \u2013 Current impulse generators <\/td>\n<\/tr>\n
51<\/td>\nTable A.3 \u2013 Voltage and current impulse generators <\/td>\n<\/tr>\n
52<\/td>\nTable A.4 \u2013 Other voltage and current impulse generators <\/td>\n<\/tr>\n
53<\/td>\nAnnex B (informative) Glossary of IEC 60747-6 [10] thyristor terms
B.1 General
B.2 Thyristor types <\/td>\n<\/tr>\n
54<\/td>\nB.3 Basic terms defining the static voltage-current characteristics of triode thyristors <\/td>\n<\/tr>\n
56<\/td>\nB.4 Basic terms defining the static voltage-current characteristics of diode thyristors <\/td>\n<\/tr>\n
57<\/td>\nB.5 Particulars of the static voltage-current characteristics of triode and diode thyristors
Figure B.1 \u2013 Particulars of the static characteristic of unidirectional thyristors <\/td>\n<\/tr>\n
58<\/td>\nFigure B.2 \u2013 Particulars of the static characteristic of bidirectional thyristors <\/td>\n<\/tr>\n
59<\/td>\nB.6 Terms related to ratings and characteristics; principal voltages <\/td>\n<\/tr>\n
60<\/td>\nB.7 Terms related to ratings and characteristics; principal currents <\/td>\n<\/tr>\n
62<\/td>\nB.8 Terms related to ratings and characteristics; gate voltages and currents <\/td>\n<\/tr>\n
64<\/td>\nB.9 Terms related to ratings and characteristics; powers, energies and losses <\/td>\n<\/tr>\n
65<\/td>\nFigure B.3 \u2013 a) Approximation of the on-state VT-IT characteristicb) Approximation of the reverse VR-IR characteristic <\/td>\n<\/tr>\n
66<\/td>\nB.10 Letter symbols
B.10.1 General
Table B.1 \u2013 Additional general subscripts <\/td>\n<\/tr>\n
67<\/td>\nB.10.2 List of letter symbols
Table B.2 \u2013 Principal voltages, anode-cathode voltages
Table B.3 \u2013 Principal currents, anode currents, cathode currents <\/td>\n<\/tr>\n
68<\/td>\nTable B.4 \u2013 Gate voltages
Table B.5 \u2013 Gate currents
Table B.6 \u2013 Sundry quantities
Table B.7 \u2013 Power loss <\/td>\n<\/tr>\n
69<\/td>\nAnnex C (informative) Additional parametric tests
C.1 General
C.2 Temperature derating
C.3 Thermal resistance, Rth <\/td>\n<\/tr>\n
70<\/td>\nC.4 Transient thermal impedance, Zth(t)
Figure C.1 \u2013 Test circuit for thermal resistance and impedance <\/td>\n<\/tr>\n
71<\/td>\nC.5 Gate reverse current, on-state, IGAT, IGKT
Figure C.2 \u2013 Thermal impedance versus time <\/td>\n<\/tr>\n
72<\/td>\nC.6 Gate reverse current, forward conducting state, IGAF, IGKF
Figure C.3 \u2013 Test circuit for gate reverse current, on-state, IGAT, IGKT <\/td>\n<\/tr>\n
73<\/td>\nC.7 Gate switching charge, QGS
Figure C.4 \u2013 Test circuit for gate reverse current, forward conducting state, IGAF, IGKF <\/td>\n<\/tr>\n
74<\/td>\nFigure C.5 \u2013 Test circuit for gate switching current, gate switching charge andgate-to-adjacent terminal breakover voltage, IGSM, QGS, VGK(BO), VGA(BO) <\/td>\n<\/tr>\n
75<\/td>\nC.8 Peak gate switching current, IGSM
Figure C.6 \u2013 Test circuit of an integrated gate diode TSS for gate switching current,gate switching charge and gate-to-adjacent terminal breakovervoltage IGSM, QGS, VGK(BO), VGA(BO) <\/td>\n<\/tr>\n
76<\/td>\nC.9 Gate-to-adjacent terminal breakover voltage, VGK(BO), VGA(BO)
Figure C.7 \u2013 Overall and expanded clamping waveforms for a P-type gate TSS showing VGK(BO) and QGS measurement (diK\/dt = 10 A\/\u00b5s, VGG = \u201372 V) <\/td>\n<\/tr>\n
77<\/td>\nAnnex D (normative) Preferred values
D.1 General
D.2 V(BO) and VDRM
Figure D.1 \u2013 V(BO)\/VDRM ratio against VDRM <\/td>\n<\/tr>\n
78<\/td>\nD.3 CO, VDRM and IPP
Figure D.2 \u2013 V(BO) vs VDRM
Figure D.3 \u2013 Capacitance variation with DC bias <\/td>\n<\/tr>\n
79<\/td>\nD.4 IH
D.5 IPP and time to half value (duration)
Figure D.4 \u2013 IPP versus Duration for various 10\/1 000 current ratings <\/td>\n<\/tr>\n
80<\/td>\nBibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

Components for low-voltage surge protection – Performance requirements and test circuits for thyristor surge suppressors (TSS)<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
BSI<\/b><\/a><\/td>\n2020<\/td>\n82<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":255426,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[574,2641],"product_tag":[],"class_list":{"0":"post-255422","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-31-080-10","7":"product_cat-bsi","9":"first","10":"instock","11":"sold-individually","12":"shipping-taxable","13":"purchasable","14":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/255422","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/255426"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=255422"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=255422"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=255422"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}