This part of IEC 61191 gives guidelines for dealing with voiding in surface-mount solder joints of printed board assemblies for use in automotive electronics. This technical report focuses exclusively on voids in solder joints connecting packaged electronic or electromechanical components with printed boards (PBs). Voids in other solder joints (e.g. in a joint between a silicon die and a substrate within an electronic component, solder joints of through-hole components, etc.) are not considered. The technical background for the occurrence of voids in solder joints, the potential impact of voiding on printed board assembly reliability and functionality, the investigation of voiding levels in sample- and series-production by use of X-ray inspection as well as typical voiding levels in different types of solder joints are discussed. Recommendations for the control of voiding in series production are also given.<\/p>\n
Annex A collects typical voiding levels of components and recommendations for acceptability.<\/p>\n
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| 2<\/td>\n | undefined <\/td>\n<\/tr>\n | ||||||
| 4<\/td>\n | CONTENTS <\/td>\n<\/tr>\n | ||||||
| 6<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | INTRODUCTION <\/td>\n<\/tr>\n | ||||||
| 9<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions <\/td>\n<\/tr>\n | ||||||
| 10<\/td>\n | 4 Technical background of voiding in solder joints and potential impact on assembly reliability 4.1 Void categories Figures Figure 1 \u2013 Example of inclusion\/macro void <\/td>\n<\/tr>\n | ||||||
| 11<\/td>\n | Figure 2 \u2013 Example of design induced void Figure 3 \u2013 Example of shrinkage void <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | Figure 4 \u2013 Example of planar micro voids Figure 5 \u2013 Example of intermetallic voids <\/td>\n<\/tr>\n | ||||||
| 13<\/td>\n | 4.2 Void occurrence in surface-mount technology solder joints Figure 6 \u2013 Example of pinholes Figure 7 \u2013 Example of blowhole voids <\/td>\n<\/tr>\n | ||||||
| 14<\/td>\n | Figure 8 \u2013 Theoretical model for voiding behaviour of preballed components <\/td>\n<\/tr>\n | ||||||
| 15<\/td>\n | Figure 9 \u2013 Online X-ray images and trend of void level during melting phase <\/td>\n<\/tr>\n | ||||||
| 16<\/td>\n | 4.3 Influence of voiding on solder joint performance 4.3.1 Introductory remarks Figure 10 \u2013 Principal influencing parameters affecting solder joint reliability <\/td>\n<\/tr>\n | ||||||
| 17<\/td>\n | 4.3.2 Thermomechanical reliability <\/td>\n<\/tr>\n | ||||||
| 18<\/td>\n | Figure 11 \u2013 Correlation of BGA lifetime with average and maximum void levels <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | 4.3.3 Mechanical reliability Figure 12 \u2013 Correlation void level standoff chip resistor 1206 and shear force after TC <\/td>\n<\/tr>\n | ||||||
| 20<\/td>\n | 4.3.4 Thermal functionality Figure 13 \u2013 Sketch of heat transfer with exposed pad solder joints <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | 4.3.5 Electrical functionality Figure 14 \u2013 Calculation of void influence within exposed pads on overall Rth <\/td>\n<\/tr>\n | ||||||
| 22<\/td>\n | 5 Determination of voiding levels in solder joints 5.1 Instrumentation available for investigation of voiding in solder joints 5.1.1 General 5.1.2 X-ray inspection equipment operating in two-dimensional mode <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | 5.1.3 X-ray inspection equipment operating in three-dimensional mode <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | 5.2 Challenges for the X-ray inspection of voiding: two case studies 5.2.1 Influence of shadowing effects on measuring reproducibility \u2013 first results for 3D X-ray inspection equipment Figure 15 \u2013 Average voiding results for different shadowing conditions <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | 5.2.2 Influence of X-ray parameters Figure 16 \u2013 Gauge reproducibility of void measurement with different shadowing <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | 5.2.3 Manual determination of voiding levels in solder joints in sample production Figure 17 \u2013 Void measurement of BGA region with varying X-ray parameters <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | 6 Recommendations for sample qualification <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | 7 Recommendations for mass production 7.1 General remarks 7.2 Ramp-up quality assurance for voiding 7.3 X-ray sampling inspection 7.3.1 General 7.3.2 Control limits 7.3.3 Exceeding the control limits <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | 7.4 Process control without X-ray sampling inspection <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | Annex A (informative)Types of voids and guidelines for acceptability A.1 Types of voids \u2013 Summary Table A.1 \u2013 Types of voids with indication of root cause, occurrence in automotive electronic assemblies, detectability, effect on thermomechanical reliability,thermal and electrical function and overall assessment <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | A.2 Typical voiding levels of components and guidelines for acceptability A.2.1 General <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | A.2.2 Ball-grid array (BGA) components with collapsing balls A.2.3 Bottom-termination components involving a lead-frame construction, as quad-flat no lead packages, dual-flat no lead packages <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | A.2.4 Exposed pads of components with gull wing solder joints as quad-flat packages A.2.5 Transistors with thermal plane as D2PAK and TOLL (TO lead-less) <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | A.2.6 Rectangular or square end chip components (2, 3 or 5 side terminations) A.2.7 Light-emitting diodes A.3 Further components currently under discussion A.4 Tabular summary <\/td>\n<\/tr>\n | ||||||
| 35<\/td>\n | Table A.2 \u2013 Recommendations for acceptable minimum solder coverage or maximum void level as well as ranges for process indicators <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" Printed board assemblies – Voiding in solder joints of printed board assemblies for use in automotive electronic control units. Best practices<\/b><\/p>\n |