{"id":397278,"date":"2024-10-20T04:29:20","date_gmt":"2024-10-20T04:29:20","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1012-2012-2\/"},"modified":"2024-10-26T08:16:54","modified_gmt":"2024-10-26T08:16:54","slug":"ieee-1012-2012-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1012-2012-2\/","title":{"rendered":"IEEE 1012-2012"},"content":{"rendered":"
Revision Standard – Superseded. Verification and validation (V&V) processes are used to determine whether the development products of a given activity conform to the requirements of that activity and whether the product satisfies its intended use and user needs. V&V life cycle process requirements are specified for different integrity levels. The scope of V&V processes encompasses systems, software, and hardware, and it includes their interfaces. This standard applies to systems, software, and hardware being developed, maintained, or reused [legacy, commercial off-the-shelf (COTS), non developmental items]. The term software also includes firmware and microcode, and each of the terms system, software, and hardware includes documentation. V&V processes include the analysis, evaluation, review, inspection, assessment, and testing of products.<\/p>\n
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1<\/td>\n | IEEE Std 1012-2012 Front Cover <\/td>\n<\/tr>\n | ||||||
3<\/td>\n | Title Page <\/td>\n<\/tr>\n | ||||||
6<\/td>\n | Notice to users Laws and regulations Copyrights Updating of IEEE documents Errata <\/td>\n<\/tr>\n | ||||||
7<\/td>\n | Patents <\/td>\n<\/tr>\n | ||||||
8<\/td>\n | Participants <\/td>\n<\/tr>\n | ||||||
10<\/td>\n | Introduction <\/td>\n<\/tr>\n | ||||||
12<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
15<\/td>\n | Important notice 1. Overview 1.1 Scope <\/td>\n<\/tr>\n | ||||||
16<\/td>\n | 1.2 Purpose <\/td>\n<\/tr>\n | ||||||
17<\/td>\n | 1.3 Field of application <\/td>\n<\/tr>\n | ||||||
18<\/td>\n | 1.4 V&V objectives 1.5 Organization of the standard <\/td>\n<\/tr>\n | ||||||
20<\/td>\n | 1.6 Audience <\/td>\n<\/tr>\n | ||||||
21<\/td>\n | 1.7 Conformance 1.8 Disclaimer 2. Normative references 3. Definitions, abbreviations, and acronyms 3.1 Definitions <\/td>\n<\/tr>\n | ||||||
25<\/td>\n | 3.2 Abbreviations and acronyms <\/td>\n<\/tr>\n | ||||||
26<\/td>\n | 4. Relationships between V&V and life cycle processes <\/td>\n<\/tr>\n | ||||||
29<\/td>\n | 5. Integrity levels <\/td>\n<\/tr>\n | ||||||
31<\/td>\n | 6. V&V processes overview 6.1 General <\/td>\n<\/tr>\n | ||||||
32<\/td>\n | 6.2 V&V testing <\/td>\n<\/tr>\n | ||||||
33<\/td>\n | 7. Common V&V activities 7.1 Activity: V&V Management <\/td>\n<\/tr>\n | ||||||
34<\/td>\n | 7.2 Activity: Acquisition Support V&V <\/td>\n<\/tr>\n | ||||||
35<\/td>\n | 7.3 Activity: Supply Planning V&V 7.4 Activity: Project Planning V&V 7.5 Activity: Configuration Management V&V <\/td>\n<\/tr>\n | ||||||
47<\/td>\n | 8. System V&V activities 8.1 Activity: Stakeholder Requirements Definition V&V The purpose of the Stakeholder Requirements Definition Process is to define the requirements for a system that can provide the services needed by users and other stakeholders in a defined environment. It identifies stakeholders, or stakeholder classes… The V&V effort shall perform, as specified in Table 2b for the selected integrity level, the following Stakeholder Requirements Definition V&V tasks described in Table 1b: 8.2 Activity: Requirements Analysis V&V <\/td>\n<\/tr>\n | ||||||
48<\/td>\n | 8.3 Activity: Architectural Design V&V <\/td>\n<\/tr>\n | ||||||
49<\/td>\n | 8.4 Activity: Implementation V&V 8.5 Activity: Integration V&V <\/td>\n<\/tr>\n | ||||||
50<\/td>\n | 8.6 Activity: Transition V&V 8.7 Activity: Operation V&V <\/td>\n<\/tr>\n | ||||||
51<\/td>\n | 8.8 Activity: Maintenance V&V <\/td>\n<\/tr>\n | ||||||
52<\/td>\n | 8.9 Activity: Disposal V&V <\/td>\n<\/tr>\n | ||||||
82<\/td>\n | 9. Software V&V activities 9.1 Activity: Software Concept V&V 9.2 Activity: Software Requirements V&V <\/td>\n<\/tr>\n | ||||||
83<\/td>\n | 9.3 Activity: Software Design V&V 9.4 Activity: Software Construction V&V <\/td>\n<\/tr>\n | ||||||
84<\/td>\n | 9.5 Activity: Software Integration Test V&V 9.6 Activity: Software Qualification Test V&V <\/td>\n<\/tr>\n | ||||||
85<\/td>\n | 9.7 Activity: Software Acceptance Test V&V 9.8 Activity: Software Installation and Checkout V&V <\/td>\n<\/tr>\n | ||||||
86<\/td>\n | 9.9 Activity: Software Operation V&V 9.10 Activity: Software Maintenance V&V <\/td>\n<\/tr>\n | ||||||
87<\/td>\n | 9.11 Activity: Software Disposal V&V <\/td>\n<\/tr>\n | ||||||
124<\/td>\n | 10. Hardware V&V activities 10.1 Activity: Hardware Concept V&V 10.2 Activity: Hardware Requirements V&V <\/td>\n<\/tr>\n | ||||||
125<\/td>\n | 10.3 Activity: Hardware Design V&V 10.4 Activity: Hardware Fabrication V&V <\/td>\n<\/tr>\n | ||||||
126<\/td>\n | 10.5 Activity: Hardware Integration Test V&V 10.6 Activity: Hardware Qualification Test V&V <\/td>\n<\/tr>\n | ||||||
127<\/td>\n | 10.7 Activity: Hardware Acceptance Test V&V 10.8 Activity: Hardware Transition V&V <\/td>\n<\/tr>\n | ||||||
128<\/td>\n | 10.9 Activity: Hardware Operation V&V 10.10 Activity: Hardware Maintenance V&V <\/td>\n<\/tr>\n | ||||||
129<\/td>\n | 10.11 Activity: Hardware Disposal V&V <\/td>\n<\/tr>\n | ||||||
161<\/td>\n | 11. V&V reporting, administrative, and documentation requirements 11.1 V&V reporting requirements <\/td>\n<\/tr>\n | ||||||
164<\/td>\n | 11.2 V&V administrative requirements 11.3 V&V documentation requirements <\/td>\n<\/tr>\n | ||||||
165<\/td>\n | 12. V&V plan outline 12.1 Overview <\/td>\n<\/tr>\n | ||||||
166<\/td>\n | 12.2 VVP Section 1: Purpose 12.3 VVP Section 2: Referenced documents 12.4 VVP Section 3: Definitions 12.5 VVP Section 4: V&V overview 12.5.1 VVP Section 4.1: Organization <\/td>\n<\/tr>\n | ||||||
167<\/td>\n | 12.5.2 VVP Section 4.2: Master schedule 12.5.3 VVP Section 4.3: Integrity level scheme 12.5.4 VVP Section 4.4: Resources summary 12.5.5 VVP Section 4.5: Responsibilities 12.5.6 VVP Section 4.6: Tools, techniques, and methods <\/td>\n<\/tr>\n | ||||||
168<\/td>\n | 12.6 VVP Section 5: V&V processes 12.6.1 VVP Section 5.1: Common V&V Processes, Activities, and Tasks 12.6.2 VVP Section 5.2: System V&V Processes, Activities, and Tasks 12.6.3 VVP Section 5.3: Software V&V Processes, Activities, and Tasks 12.6.4 VVP Section 5.4: Hardware V&V Processes, Activities, and Tasks 12.7 VVP Section 6: V&V reporting requirements 12.8 VVP Section 7: V&V administrative requirements 12.8.1 General 12.8.2 VVP Section 7.1: Anomaly resolution and reporting 12.8.3 VVP Section 7.2: Task iteration policy <\/td>\n<\/tr>\n | ||||||
169<\/td>\n | 12.8.4 VVP Section 7.3: Deviation policy 12.8.5 VVP Section 7.4: Control procedures 12.8.6 VVP Section 7.5: Standards, practices, and conventions 12.9 VVP Section 8: V&V test documentation requirements <\/td>\n<\/tr>\n | ||||||
170<\/td>\n | Annex A (informative) Mapping of IEEE 1012 V&V activities and tasks A.1 Mapping of ISO\/IEC 15288 V&V requirements to IEEE 1012 V&V activities and tasks <\/td>\n<\/tr>\n | ||||||
172<\/td>\n | A.2 Mapping of IEEE 1012 V&V activities to ISO\/IEC 15288 system life cycle processes and activities <\/td>\n<\/tr>\n | ||||||
173<\/td>\n | A.3 Mapping of ISO\/IEC 12207 V&V requirements to IEEE 1012 V&V activities and tasks <\/td>\n<\/tr>\n | ||||||
175<\/td>\n | A.4 Mapping of IEEE 1012 V&V activities to IEEE 12207 software life cycle processes and activities <\/td>\n<\/tr>\n | ||||||
177<\/td>\n | Annex B (informative) A risk-based, integrity-level scheme <\/td>\n<\/tr>\n | ||||||
179<\/td>\n | Annex C (informative) Definition of independent V&V (IV&V) C.1 Technical independence C.2 Managerial independence C.3 Financial independence C.4 Forms of independence <\/td>\n<\/tr>\n | ||||||
180<\/td>\n | C.4.1 Classical IV&V C.4.2 Modified IV&V C.4.3 Integrated IV&V C.4.4 Internal IV&V <\/td>\n<\/tr>\n | ||||||
181<\/td>\n | C.4.5 Embedded V&V <\/td>\n<\/tr>\n | ||||||
182<\/td>\n | Annex D (informative) V&V of reuse software D.1 Purpose <\/td>\n<\/tr>\n | ||||||
183<\/td>\n | D.2 V&V of software developed in a reuse process D.2.1 V&V of assets in development D.2.2 V&V of reused assets D.3 V&V of software developed and reused outside of a reuse process <\/td>\n<\/tr>\n | ||||||
189<\/td>\n | Annex E (informative) V&V measures E.1 Introduction E.2 Measures for evaluating anomaly density <\/td>\n<\/tr>\n | ||||||
190<\/td>\n | E.3 Measures for evaluating V&V effectiveness E.4 Measures for evaluating V&V efficiency <\/td>\n<\/tr>\n | ||||||
192<\/td>\n | Annex F (informative) Example of V&V relationships to other project responsibilities <\/td>\n<\/tr>\n | ||||||
193<\/td>\n | Annex G (informative) Optional V&V tasks <\/td>\n<\/tr>\n | ||||||
199<\/td>\n | Annex H (informative) Environmental factors considerations H.1 Introduction H.2 In the agreement processes H.3 In the organizational project-enabling processes <\/td>\n<\/tr>\n | ||||||
200<\/td>\n | H.4 In the project processes H.5 In the technical processes <\/td>\n<\/tr>\n | ||||||
202<\/td>\n | Annex I (informative) V&V of system, software, and hardware integration I.1 Introduction I.2 Examples of system failures caused by integration issues <\/td>\n<\/tr>\n | ||||||
203<\/td>\n | I.2.1 Year 2000 System Integration Issue I.2.2 System architecture integration issues <\/td>\n<\/tr>\n | ||||||
204<\/td>\n | I.3 System, software, and hardware interaction issues <\/td>\n<\/tr>\n | ||||||
207<\/td>\n | Annex J (informative) Hazard, security, and risk analyses J.1 Hazard analysis <\/td>\n<\/tr>\n | ||||||
212<\/td>\n | Annex K (informative) Example of assigning and changing the system integrity level of \u201csupporting system functions\u201d <\/td>\n<\/tr>\n | ||||||
214<\/td>\n | Annex L (informative) Mapping of ISO\/IEC\/IEEE 15288 and IEEE 12207 process outcomes to V&V tasks <\/td>\n<\/tr>\n | ||||||
223<\/td>\n | Annex M (informative) Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" IEEE Standard for System and Software Verification and Validation<\/b><\/p>\n |