{"id":397803,"date":"2024-10-20T04:32:21","date_gmt":"2024-10-20T04:32:21","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-802-3-2012\/"},"modified":"2024-10-26T08:20:27","modified_gmt":"2024-10-26T08:20:27","slug":"ieee-802-3-2012","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-802-3-2012\/","title":{"rendered":"IEEE 802.3-2012"},"content":{"rendered":"

Revision Standard – Superseded. Ethernet local area network operation is specified for selected speeds of operation from 1 Mb\/s to 100 Gb\/s using a common media access control (MAC) specification and management information base (MIB). The Carrier Sense Multiple Access with Collision Detection (CSMA\/CD) MAC protocol specifies shared medium (half duplex) operation, as well as full duplex operation. Speed specific Media Independent Interfaces (MIIs) allow use of selected Physical Layer devices (PHY) for operation over coaxial, twisted-pair or fiber optic cables. System considerations for multisegment shared access networks describe the use of Repeaters that are defined for operational speeds up to 1000 Mb\/s. Local Area Network (LAN) operation is supported at all speeds. Other specified capabilities include various PHY types for access networks, PHYs suitable for metropolitan area network applications, and the provision of power over selected twisted-pair PHY types.<\/p>\n

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Std 802.3\u2122-2012, SECTION SIX
Contents <\/td>\n<\/tr>\n
21<\/td>\n78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.1 LPI Signaling <\/td>\n<\/tr>\n
22<\/td>\n78.1.1.1 Interlayer service interfaces
78.1.1.2 Responsibilities of LPI Client
78.1.2 LPI Client service interface
78.1.2.1 LP_IDLE.request
78.1.2.1.1 Function <\/td>\n<\/tr>\n
23<\/td>\n78.1.2.1.2 Semantics of the service primitive
78.1.2.1.3 When generated
78.1.2.1.4 Effect of receipt
78.1.2.2 LP_IDLE.indication
78.1.2.2.1 Function
78.1.2.2.2 Semantics of the service primitive
78.1.2.2.3 When generated
78.1.2.2.4 Effect of receipt <\/td>\n<\/tr>\n
24<\/td>\n78.1.3 Reconciliation sublayer operation
78.1.3.1 RS LPI assert function <\/td>\n<\/tr>\n
25<\/td>\n78.1.3.2 LPI detect function
78.1.3.3 PHY LPI operation
78.1.3.3.1 PHY LPI transmit operation <\/td>\n<\/tr>\n
26<\/td>\n78.1.3.3.2 PHY LPI receive operation
78.1.4 EEE Supported PHY types
78.2 LPI mode timing parameters description <\/td>\n<\/tr>\n
27<\/td>\n78.3 Capabilities Negotiation <\/td>\n<\/tr>\n
28<\/td>\n78.4 Data Link Layer Capabilities <\/td>\n<\/tr>\n
29<\/td>\n78.4.1 Data Link Layer capabilities timing requirements
78.4.2 Control state diagrams
78.4.2.1 Conventions
78.4.2.2 Constants
78.4.2.3 Variables <\/td>\n<\/tr>\n
31<\/td>\n78.4.2.4 Functions <\/td>\n<\/tr>\n
32<\/td>\n78.4.2.5 State diagrams <\/td>\n<\/tr>\n
34<\/td>\n78.4.3 State change procedure across a link <\/td>\n<\/tr>\n
35<\/td>\n78.4.3.1 Transmitting link partner\u2019s state change procedure across a link
78.4.3.2 Receiving link partner\u2019s state change procedure across a link <\/td>\n<\/tr>\n
36<\/td>\n78.5 Communication link access latency <\/td>\n<\/tr>\n
37<\/td>\n78.5.1 10 Gb\/s PHY extension using XGXS
78.6 Protocol implementation conformance statement (PICS) proforma for EEE Data Link Layer Capabilities
78.6.1 Introduction <\/td>\n<\/tr>\n
38<\/td>\n78.6.2 Identification
78.6.2.1 Implementation identification
78.6.2.2 Protocol summary
78.6.3 Major capabilities\/options <\/td>\n<\/tr>\n
39<\/td>\n78.6.4 DLL requirements <\/td>\n<\/tr>\n
41<\/td>\n79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.1 Overview
79.1.1 IEEE 802.3 LLDP frame format <\/td>\n<\/tr>\n
42<\/td>\n79.1.1.1 Destination Address field
79.1.1.2 Source Address field
79.1.1.3 Length\/Type field
79.1.1.4 LLDPDU field
79.1.1.5 Pad field
79.1.1.6 Frame Check Sequence field
79.2 Requirements of the IEEE 802.3 Organizationally Specific TLV set
79.3 IEEE 802.3 Organizationally Specific TLVs <\/td>\n<\/tr>\n
43<\/td>\n79.3.1 MAC\/PHY Configuration\/Status TLV
79.3.1.1 Auto-negotiation support\/status
79.3.1.2 PMD auto-negotiation advertised capability field
79.3.1.3 Operational MAU type <\/td>\n<\/tr>\n
44<\/td>\n79.3.1.4 MAC\/PHY Configuration\/Status TLV usage rules
79.3.2 Power Via MDI TLV
79.3.2.1 MDI power support <\/td>\n<\/tr>\n
45<\/td>\n79.3.2.2 PSE power pair
79.3.2.3 Power class
79.3.2.4 Requested power type\/source\/priority <\/td>\n<\/tr>\n
46<\/td>\n79.3.2.4.1 Power type
79.3.2.4.2 Power source
79.3.2.4.3 Power priority
79.3.2.5 PD requested power value <\/td>\n<\/tr>\n
47<\/td>\n79.3.2.6 PSE allocated power value
79.3.2.7 Power Via MDI TLV usage rules
79.3.3 Link Aggregation TLV (deprecated)
79.3.3.1 Aggregation status <\/td>\n<\/tr>\n
48<\/td>\n79.3.3.2 Aggregated port ID
79.3.3.3 Link Aggregation TLV usage rules
79.3.4 Maximum Frame Size TLV
79.3.4.1 Maximum frame size
79.3.4.2 Maximum Frame Size TLV usage rules <\/td>\n<\/tr>\n
49<\/td>\n79.3.5 EEE TLV
79.3.5.1 Transmit Tw
79.3.5.2 Receive Tw
79.3.5.3 Fallback Tw <\/td>\n<\/tr>\n
50<\/td>\n79.3.5.4 Echo Transmit and Receive Tw
79.3.5.5 EEE TLV usage rules
79.4 IEEE 802.3 Organizationally Specific TLV selection management
79.4.1 IEEE 802.3 Organizationally Specific TLV selection variable\/LLDP Configuration managed object class cross reference
79.4.2 IEEE 802.3 Organizationally Specific TLV\/LLDP Local and Remote System group managed object class cross references <\/td>\n<\/tr>\n
53<\/td>\n79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.5.1 Introduction
79.5.2 Identification
79.5.2.1 Implementation identification
79.5.2.2 Protocol summary <\/td>\n<\/tr>\n
54<\/td>\n79.5.3 Major capabilities\/options
79.5.4 IEEE 802.3 Organizationally Specific TLV
79.5.5 MAC\/PHY Configuration\/Status TLV <\/td>\n<\/tr>\n
55<\/td>\n79.5.6 EEE TLV <\/td>\n<\/tr>\n
56<\/td>\n79.5.7 Power Via MDI TLV <\/td>\n<\/tr>\n
57<\/td>\n79.5.8 Link Aggregation TLV
79.5.9 Maximum Frame Size TLV <\/td>\n<\/tr>\n
59<\/td>\n80. Introduction to 40 Gb\/s and 100 Gb\/s networks
80.1 Overview
80.1.1 Scope
80.1.2 Objectives
80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n
61<\/td>\n80.1.4 Nomenclature
80.1.5 Physical Layer signaling systems <\/td>\n<\/tr>\n
62<\/td>\n80.2 Summary of 40 Gigabit and 100 Gigabit Ethernet sublayers
80.2.1 Reconciliation Sublayer (RS) and Media Independent Interface
80.2.2 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
63<\/td>\n80.2.3 Forward Error Correction (FEC) sublayer
80.2.4 Physical Medium Attachment (PMA) sublayer
80.2.5 Physical Medium Dependent (PMD) sublayer
80.2.6 Auto-Negotiation
80.2.7 Management interface (MDIO\/MDC)
80.2.8 Management <\/td>\n<\/tr>\n
64<\/td>\n80.3 Service interface specification method and notation
80.3.1 Inter-sublayer service interface
80.3.2 Instances of the Inter-sublayer service interface <\/td>\n<\/tr>\n
67<\/td>\n80.3.3 Semantics of inter-sublayer service interface primitives
80.3.3.1 IS_UNITDATA_i.request
80.3.3.1.1 Semantics of the service primitive
80.3.3.1.2 When generated
80.3.3.1.3 Effect of receipt
80.3.3.2 IS_UNITDATA_i.indication
80.3.3.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n
68<\/td>\n80.3.3.2.2 When generated
80.3.3.2.3 Effect of receipt
80.3.3.3 IS_SIGNAL.indication
80.3.3.3.1 Semantics of the service primitive
80.3.3.3.2 When generated
80.3.3.3.3 Effect of receipt
80.4 Delay constraints <\/td>\n<\/tr>\n
69<\/td>\n80.5 Skew constraints <\/td>\n<\/tr>\n
73<\/td>\n80.6 State diagrams
80.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n
75<\/td>\n81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation (XLGMII and CGMII)
81.1 Overview <\/td>\n<\/tr>\n
76<\/td>\n81.1.1 Summary of major concepts
81.1.2 Application
81.1.3 Rate of operation
81.1.4 Delay constraints <\/td>\n<\/tr>\n
77<\/td>\n81.1.5 Allocation of functions
81.1.6 XLGMII\/CGMII structure <\/td>\n<\/tr>\n
78<\/td>\n81.1.7 Mapping of XLGMII\/CGMII signals to PLS service primitives
81.1.7.1 Mapping of PLS_DATA.request
81.1.7.1.1 Function
81.1.7.1.2 Semantics of the service primitive
81.1.7.1.3 When generated
81.1.7.1.4 Effect of receipt <\/td>\n<\/tr>\n
79<\/td>\n81.1.7.2 Mapping of PLS_DATA.indication
81.1.7.2.1 Function
81.1.7.2.2 Semantics of the service primitive
81.1.7.2.3 When generated
81.1.7.2.4 Effect of receipt
81.1.7.3 Mapping of PLS_CARRIER.indication
81.1.7.4 Mapping of PLS_SIGNAL.indication
81.1.7.5 Mapping of PLS_DATA_VALID.indication
81.1.7.5.1 Function
81.1.7.5.2 Semantics of the service primitive <\/td>\n<\/tr>\n
80<\/td>\n81.1.7.5.3 When generated
81.1.7.5.4 Effect of receipt
81.2 XLGMII\/CGMII data stream <\/td>\n<\/tr>\n
81<\/td>\n81.2.1 Inter-frame
81.2.2 Preamble and start of frame delimiter <\/td>\n<\/tr>\n
82<\/td>\n81.2.3 Data
81.2.4 End of frame delimiter
81.2.5 Definition of Start of Packet and End of Packet Delimiters
81.3 XLGMII\/CGMII functional specifications
81.3.1 Transmit
81.3.1.1 TX_CLK <\/td>\n<\/tr>\n
83<\/td>\n81.3.1.2 TXC (transmit control)
81.3.1.3 TXD (transmit data) <\/td>\n<\/tr>\n
85<\/td>\n81.3.1.4 Start control character alignment <\/td>\n<\/tr>\n
86<\/td>\n81.3.2 Receive
81.3.2.1 RX_CLK (receive clock)
81.3.2.2 RXC (receive control) <\/td>\n<\/tr>\n
88<\/td>\n81.3.2.3 RXD (receive data) <\/td>\n<\/tr>\n
89<\/td>\n81.3.3 Error and fault handling
81.3.3.1 Response to error indications by the XLGMII\/CGMII <\/td>\n<\/tr>\n
90<\/td>\n81.3.3.2 Conditions for generation of transmit Error control characters
81.3.3.3 Response to received invalid frame sequences
81.3.4 Link fault signaling <\/td>\n<\/tr>\n
91<\/td>\n81.3.4.1 Variables and counters
81.3.4.2 State Diagram <\/td>\n<\/tr>\n
93<\/td>\n81.4 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation
81.4.1 Introduction
81.4.2 Identification
81.4.2.1 Implementation identification
81.4.2.2 Protocol summary <\/td>\n<\/tr>\n
94<\/td>\n81.4.2.3 Major capabilities\/options
81.4.3 PICS proforma tables for Reconciliation Sublayer and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation
81.4.3.1 General
81.4.3.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n
95<\/td>\n81.4.3.3 Data stream structure <\/td>\n<\/tr>\n
96<\/td>\n81.4.3.4 XLGMII\/CGMII signal functional specifications <\/td>\n<\/tr>\n
97<\/td>\n81.4.3.5 Link fault signaling state diagram <\/td>\n<\/tr>\n
99<\/td>\n82. Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R
82.1 Overview
82.1.1 Scope
82.1.2 Relationship of 40GBASE-R and 100GBASE-R to other standards <\/td>\n<\/tr>\n
100<\/td>\n82.1.3 Summary of 40GBASE-R and 100GBASE-R sublayers
82.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
101<\/td>\n82.1.4 Inter-sublayer interfaces
82.1.4.1 PCS service interface (XLGMII\/CGMII)
82.1.4.2 Physical Medium Attachment (PMA) or Forward Error Correction (FEC) service interface
82.1.5 Functional block diagram <\/td>\n<\/tr>\n
102<\/td>\n82.2 Physical Coding Sublayer (PCS)
82.2.1 Functions within the PCS <\/td>\n<\/tr>\n
103<\/td>\n82.2.2 Use of blocks <\/td>\n<\/tr>\n
104<\/td>\n82.2.3 64B\/66B transmission code
82.2.3.1 Notation conventions
82.2.3.2 Transmission order <\/td>\n<\/tr>\n
107<\/td>\n82.2.3.3 Block structure <\/td>\n<\/tr>\n
108<\/td>\n82.2.3.4 Control codes <\/td>\n<\/tr>\n
109<\/td>\n82.2.3.5 Valid and invalid blocks
82.2.3.6 Idle (\/I\/)
82.2.3.7 Start (\/S\/)
82.2.3.8 Terminate (\/T\/) <\/td>\n<\/tr>\n
110<\/td>\n82.2.3.9 ordered_set (\/O\/)
82.2.3.10 Error (\/E\/)
82.2.4 Transmit process
82.2.5 Scrambler
82.2.6 Block distribution <\/td>\n<\/tr>\n
111<\/td>\n82.2.7 Alignment marker insertion <\/td>\n<\/tr>\n
113<\/td>\n82.2.8 BIP calculations <\/td>\n<\/tr>\n
114<\/td>\n82.2.9 PMA or FEC Interface <\/td>\n<\/tr>\n
115<\/td>\n82.2.10 Test-pattern generators
82.2.11 Block synchronization
82.2.12 PCS lane deskew
82.2.13 PCS lane reorder <\/td>\n<\/tr>\n
116<\/td>\n82.2.14 Alignment marker removal
82.2.15 Descrambler
82.2.16 Receive process
82.2.17 Test-pattern checker <\/td>\n<\/tr>\n
117<\/td>\n82.2.18 Detailed functions and state diagrams
82.2.18.1 State diagram conventions
82.2.18.2 State variables
82.2.18.2.1 Constants
82.2.18.2.2 Variables <\/td>\n<\/tr>\n
119<\/td>\n82.2.18.2.3 Functions <\/td>\n<\/tr>\n
120<\/td>\n82.2.18.2.4 Counters <\/td>\n<\/tr>\n
121<\/td>\n82.2.18.2.5 Timers
82.2.18.3 State diagrams <\/td>\n<\/tr>\n
122<\/td>\n82.3 PCS Management
82.3.1 PMD MDIO function mapping <\/td>\n<\/tr>\n
123<\/td>\n82.4 Loopback
82.5 Delay constraints <\/td>\n<\/tr>\n
124<\/td>\n82.6 Auto-Negotiation <\/td>\n<\/tr>\n
130<\/td>\n82.7 Protocol implementation conformance statement (PICS) proforma for Clause 82, Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R
82.7.1 Introduction
82.7.2 Identification
82.7.2.1 Implementation identification
82.7.2.2 Protocol summary <\/td>\n<\/tr>\n
131<\/td>\n82.7.3 Major capabilities\/options <\/td>\n<\/tr>\n
132<\/td>\n82.7.4 PICS Proforma Tables for PCS, type 40GBASE-R and 100GBASE-R
82.7.4.1 Coding rules
82.7.4.2 Scrambler and Descrambler <\/td>\n<\/tr>\n
133<\/td>\n82.7.4.3 Deskew and Reordering
82.7.4.4 Alignment Markers
82.7.5 Test-pattern modes <\/td>\n<\/tr>\n
134<\/td>\n82.7.5.1 Bit order
82.7.6 Management <\/td>\n<\/tr>\n
135<\/td>\n82.7.6.1 State diagrams <\/td>\n<\/tr>\n
136<\/td>\n82.7.6.2 Loopback
82.7.6.3 Delay constraints
82.7.6.5 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n
137<\/td>\n83. Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R
83.1 Overview
83.1.1 Scope
83.1.2 Position of the PMA in the 40GBASE-R or 100GBASE-R sublayers
83.1.3 Summary of functions
83.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n
140<\/td>\n83.2 PMA interfaces
83.3 PMA service interface <\/td>\n<\/tr>\n
142<\/td>\n83.4 Service interface below PMA <\/td>\n<\/tr>\n
143<\/td>\n83.5 Functions within the PMA
83.5.1 Per input-lane clock and data recovery
83.5.2 Bit-level multiplexing <\/td>\n<\/tr>\n
146<\/td>\n83.5.3 Skew and Skew Variation
83.5.3.1 Skew generation toward SP1
83.5.3.2 Skew tolerance at SP1
83.5.3.3 Skew generation toward SP2
83.5.3.4 Skew tolerance at SP5
83.5.3.5 Skew generation at SP6 <\/td>\n<\/tr>\n
147<\/td>\n83.5.3.6 Skew tolerance at SP6
83.5.4 Delay constraints
83.5.5 Clocking architecture
83.5.6 Signal drivers <\/td>\n<\/tr>\n
148<\/td>\n83.5.7 Link status
83.5.8 PMA local loopback mode
83.5.9 PMA remote loopback mode (optional) <\/td>\n<\/tr>\n
149<\/td>\n83.5.10 PMA test patterns (optional) <\/td>\n<\/tr>\n
150<\/td>\n83.6 PMA MDIO function mapping <\/td>\n<\/tr>\n
155<\/td>\n83.7 Protocol implementation conformance statement (PICS) proforma for Clause 83, Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R
83.7.1 Introduction
83.7.2 Identification
83.7.2.1 Implementation identification
83.7.2.2 Protocol summary <\/td>\n<\/tr>\n
156<\/td>\n83.7.3 Major capabilities\/options <\/td>\n<\/tr>\n
158<\/td>\n83.7.4 Skew generation and tolerance
83.7.5 Test patterns <\/td>\n<\/tr>\n
159<\/td>\n83.7.6 Loopback modes <\/td>\n<\/tr>\n
161<\/td>\n84. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4
84.1 Overview
84.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
162<\/td>\n84.3 PCS requirements for Auto-Negotiation (AN) service interface <\/td>\n<\/tr>\n
163<\/td>\n84.4 Delay constraints
84.5 Skew constraints
84.6 PMD MDIO function mapping
84.7 PMD functional specifications
84.7.1 Link block diagram
84.7.2 PMD transmit function <\/td>\n<\/tr>\n
165<\/td>\n84.7.3 PMD receive function
84.7.4 Global PMD signal detect function
84.7.5 PMD lane-by-lane signal detect function
84.7.6 Global PMD transmit disable function <\/td>\n<\/tr>\n
166<\/td>\n84.7.7 PMD lane-by-lane transmit disable function
84.7.8 Loopback mode
84.7.9 PMD_fault function
84.7.10 PMD transmit fault function
84.7.11 PMD receive fault function <\/td>\n<\/tr>\n
167<\/td>\n84.7.12 PMD control function
84.8 40GBASE-KR4 electrical characteristics
84.8.1 Transmitter characteristics
84.8.1.1 Test fixture
84.8.2 Receiver characteristics
84.8.2.1 Receiver interference tolerance
84.9 Interconnect characteristics
84.10 Environmental specifications
84.10.1 General safety <\/td>\n<\/tr>\n
168<\/td>\n84.10.2 Network safety
84.10.3 Installation and maintenance guidelines
84.10.4 Electromagnetic compatibility
84.10.5 Temperature and humidity <\/td>\n<\/tr>\n
169<\/td>\n84.11 Protocol implementation conformance statement (PICS) proforma for Clause 84, Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4
84.11.1 Introduction
84.11.2 Identification
84.11.2.1 Implementation identification
84.11.2.2 Protocol summary <\/td>\n<\/tr>\n
170<\/td>\n84.11.3 Major capabilities\/options <\/td>\n<\/tr>\n
171<\/td>\n84.11.4 PICS proforma tables for Clause 84, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-KR4
84.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
172<\/td>\n84.11.4.2 Management functions
84.11.4.3 Transmitter electrical characteristics
84.11.4.4 Receiver electrical characteristics <\/td>\n<\/tr>\n
173<\/td>\n84.11.4.5 Environmental specifications <\/td>\n<\/tr>\n
175<\/td>\n85. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.1 Overview <\/td>\n<\/tr>\n
176<\/td>\n85.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
177<\/td>\n85.3 PCS requirements for Auto-Negotiation (AN) service interface
85.4 Delay constraints
85.5 Skew constraints <\/td>\n<\/tr>\n
178<\/td>\n85.6 PMD MDIO function mapping <\/td>\n<\/tr>\n
180<\/td>\n85.7 PMD functional specifications
85.7.1 Link block diagram <\/td>\n<\/tr>\n
181<\/td>\n85.7.2 PMD Transmit function
85.7.3 PMD Receive function
85.7.4 Global PMD signal detect function <\/td>\n<\/tr>\n
182<\/td>\n85.7.5 PMD lane-by-lane signal detect function
85.7.6 Global PMD transmit disable function
85.7.7 PMD lane-by-lane transmit disable function
85.7.8 Loopback mode <\/td>\n<\/tr>\n
183<\/td>\n85.7.9 PMD_fault function
85.7.10 PMD transmit fault function
85.7.11 PMD receive fault function
85.7.12 PMD control function
85.8 MDI Electrical specifications for 40GBASE-CR4 and 100GBASE-CR10
85.8.1 Signal levels <\/td>\n<\/tr>\n
184<\/td>\n85.8.2 Signal paths
85.8.3 Transmitter characteristics <\/td>\n<\/tr>\n
185<\/td>\n85.8.3.1 Transmitter differential output return loss
85.8.3.2 Transmitter noise parameter measurements <\/td>\n<\/tr>\n
186<\/td>\n85.8.3.3 Transmitter output waveform <\/td>\n<\/tr>\n
188<\/td>\n85.8.3.3.1 Coefficient initialization
85.8.3.3.2 Coefficient step size
85.8.3.3.3 Coefficient range
85.8.3.3.4 Waveform acquisition
85.8.3.3.5 Linear fit to the waveform measurement at TP2 <\/td>\n<\/tr>\n
189<\/td>\n85.8.3.3.6 Transfer function between the transmit function and TP2 <\/td>\n<\/tr>\n
190<\/td>\n85.8.3.4 Insertion loss TP0 to TP2 or TP3 to TP5 <\/td>\n<\/tr>\n
191<\/td>\n85.8.3.5 Test fixture <\/td>\n<\/tr>\n
192<\/td>\n85.8.3.6 Test fixture impedance
85.8.3.7 Test fixture insertion loss
85.8.3.8 Data dependent jitter (DDJ)
85.8.3.9 Signaling rate range <\/td>\n<\/tr>\n
193<\/td>\n85.8.4 Receiver characteristics at TP3 summary
85.8.4.1 Receiver differential input return loss <\/td>\n<\/tr>\n
194<\/td>\n85.8.4.2 Receiver interference tolerance test
85.8.4.2.1 Test setup <\/td>\n<\/tr>\n
195<\/td>\n85.8.4.2.2 Test channel
85.8.4.2.3 Test channel calibration <\/td>\n<\/tr>\n
196<\/td>\n85.8.4.2.4 Pattern generator
85.8.4.2.5 Test procedure
85.8.4.3 Bit error ratio
85.8.4.4 Signaling rate range
85.8.4.5 AC coupling <\/td>\n<\/tr>\n
197<\/td>\n85.9 Channel characteristics
85.10 Cable assembly characteristics
85.10.1 Characteristic impedance and reference impedance
85.10.2 Cable assembly insertion loss <\/td>\n<\/tr>\n
199<\/td>\n85.10.3 Cable assembly insertion loss deviation (ILD) <\/td>\n<\/tr>\n
200<\/td>\n85.10.4 Cable assembly return loss <\/td>\n<\/tr>\n
201<\/td>\n85.10.5 Cable assembly multiple disturber near-end crosstalk (MDNEXT) loss
85.10.6 Cable assembly multiple disturber far-end crosstalk (MDFEXT) loss <\/td>\n<\/tr>\n
202<\/td>\n85.10.7 Cable assembly integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n
204<\/td>\n85.10.8 Cable assembly test fixture
85.10.9 Mated test fixtures <\/td>\n<\/tr>\n
205<\/td>\n85.10.9.1 Mated test fixtures insertion loss
85.10.9.2 Mated test fixtures return loss <\/td>\n<\/tr>\n
206<\/td>\n85.10.9.3 Mated test fixtures common-mode conversion loss <\/td>\n<\/tr>\n
207<\/td>\n85.10.9.4 Mated test fixtures integrated crosstalk noise
85.10.10 Shielding
85.10.11 Crossover function <\/td>\n<\/tr>\n
208<\/td>\n85.11 MDI specification
85.11.1 40GBASE-CR4 MDI connectors
85.11.1.1 Style-1 40GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n
209<\/td>\n85.11.1.1.1 Style-1 AC coupling <\/td>\n<\/tr>\n
210<\/td>\n85.11.1.2 Style-2 40GBASE-CR4 MDI connectors
85.11.1.2.1 Style-2 40GBASE-CR4 Connector pin assignments <\/td>\n<\/tr>\n
211<\/td>\n85.11.2 100GBASE-CR10 MDI connectors <\/td>\n<\/tr>\n
213<\/td>\n85.11.2.1 100GBASE-CR10 MDI AC coupling
85.11.3 Electronic keying
85.12 Environmental specifications <\/td>\n<\/tr>\n
214<\/td>\n85.13 Protocol implementation conformance statement (PICS) proforma for Clause 85, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.13.1 Introduction
85.13.2 Identification
85.13.2.1 Implementation identification
85.13.2.2 Protocol summary <\/td>\n<\/tr>\n
215<\/td>\n85.13.3 Major capabilities\/options <\/td>\n<\/tr>\n
216<\/td>\n85.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n
217<\/td>\n85.13.4.2 Management functions
85.13.4.3 Transmitter specifications <\/td>\n<\/tr>\n
218<\/td>\n85.13.4.4 Receiver specifications <\/td>\n<\/tr>\n
219<\/td>\n85.13.4.5 Cable assembly specifications <\/td>\n<\/tr>\n
220<\/td>\n85.13.4.6 MDI connector specifications
85.13.4.7 Environmental specifications <\/td>\n<\/tr>\n
221<\/td>\n86. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.1 Overview <\/td>\n<\/tr>\n
223<\/td>\n86.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
224<\/td>\n86.3 Delay and Skew
86.3.1 Delay constraints
86.3.2 Skew and Skew Variation constraints
86.4 PMD MDIO function mapping <\/td>\n<\/tr>\n
225<\/td>\n86.5 PMD functional specifications
86.5.1 PMD block diagram <\/td>\n<\/tr>\n
226<\/td>\n86.5.2 PMD transmit function
86.5.3 PMD receive function
86.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
227<\/td>\n86.5.5 PMD lane-by-lane signal detect function
86.5.6 PMD reset function
86.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n
228<\/td>\n86.5.8 PMD lane-by-lane transmit disable function (optional)
86.5.9 PMD fault function (optional)
86.5.10 PMD transmit fault function (optional)
86.5.11 PMD receive fault function (optional)
86.6 Lane assignments
86.7 PMD to MDI specifications for 40GBASE-SR4 or 100GBASE-SR10 <\/td>\n<\/tr>\n
229<\/td>\n86.7.1 Transmitter optical specifications <\/td>\n<\/tr>\n
230<\/td>\n86.7.2 Characteristics of signal within, and at the receiving end of, a compliant optical channel <\/td>\n<\/tr>\n
231<\/td>\n86.7.3 40GBASE\u2013SR4 or 100GBASE\u2013SR10 receiver optical specifications <\/td>\n<\/tr>\n
232<\/td>\n86.7.4 40GBASE\u2013SR4 or 100GBASE\u2013SR10 illustrative link power budget
86.8 Definitions of optical and dual-use parameters and measurement methods
86.8.1 Test points and compliance boards
86.8.2 Test patterns and related subclauses <\/td>\n<\/tr>\n
235<\/td>\n86.8.2.1 Multi-lane testing considerations
86.8.3 Parameters applicable to both electrical and optical signals
86.8.3.1 Skew and Skew Variation <\/td>\n<\/tr>\n
236<\/td>\n86.8.3.2 Eye diagrams
86.8.3.2.1 Eye mask acceptable hit count examples
86.8.3.3 Jitter
86.8.3.3.1 J2 Jitter
86.8.3.3.2 J9 Jitter <\/td>\n<\/tr>\n
237<\/td>\n86.8.4 Optical parameter definitions
86.8.4.1 Wavelength and spectral width
86.8.4.2 Average optical power
86.8.4.3 Optical Modulation Amplitude (OMA)
86.8.4.4 Transmitter and dispersion penalty (TDP)
86.8.4.5 Extinction ratio
86.8.4.6 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n
238<\/td>\n86.8.4.6.1 Optical transmitter eye mask <\/td>\n<\/tr>\n
239<\/td>\n86.8.4.7 Stressed receiver sensitivity
86.8.4.8 Receiver jitter tolerance <\/td>\n<\/tr>\n
240<\/td>\n86.9 Safety, installation, environment, and labeling
86.9.1 General safety
86.9.2 Laser safety
86.9.3 Installation
86.9.4 Environment
86.9.5 PMD labeling
86.10 Optical channel
86.10.1 Fiber optic cabling model <\/td>\n<\/tr>\n
241<\/td>\n86.10.2 Characteristics of the fiber optic cabling (channel)
86.10.2.1 Optical fiber cable
86.10.2.2 Optical fiber connection <\/td>\n<\/tr>\n
242<\/td>\n86.10.2.2.1 Connection insertion loss
86.10.2.2.2 Maximum discrete reflectance
86.10.3 Medium Dependent Interface (MDI)
86.10.3.1 Optical lane assignments for 40GBASE-SR4 <\/td>\n<\/tr>\n
243<\/td>\n86.10.3.2 Optical lane assignments for 100GBASE-SR10
86.10.3.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
245<\/td>\n86.11 Protocol implementation conformance statement (PICS) proforma for Clause 86, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.11.1 Introduction
86.11.2 Identification
86.11.2.1 Implementation identification
86.11.2.2 Protocol summary <\/td>\n<\/tr>\n
246<\/td>\n86.11.3 Major capabilities\/options <\/td>\n<\/tr>\n
247<\/td>\n86.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
248<\/td>\n86.11.4.2 Management functions
86.11.4.3 Optical specifications for 40GBASE\u2013SR4 or 100GBASE\u2013SR10 <\/td>\n<\/tr>\n
249<\/td>\n86.11.4.4 Definitions of parameters and measurement methods
86.11.4.5 Environmental and safety specifications <\/td>\n<\/tr>\n
250<\/td>\n86.11.4.6 Optical channel and MDI <\/td>\n<\/tr>\n
251<\/td>\n87. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE\u2013LR4
87.1 Overview
87.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
253<\/td>\n87.3 Delay and Skew
87.3.1 Delay constraints
87.3.2 Skew constraints
87.4 PMD MDIO function mapping
87.5 PMD functional specifications
87.5.1 PMD block diagram <\/td>\n<\/tr>\n
254<\/td>\n87.5.2 PMD transmit function <\/td>\n<\/tr>\n
255<\/td>\n87.5.3 PMD receive function
87.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
256<\/td>\n87.5.5 PMD lane-by-lane signal detect function
87.5.6 PMD reset function
87.5.7 PMD global transmit disable function (optional)
87.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n
257<\/td>\n87.5.9 PMD fault function (optional)
87.5.10 PMD transmit fault function (optional)
87.5.11 PMD receive fault function (optional)
87.6 Wavelength-division-multiplexed lane assignments
87.7 PMD to MDI optical specifications for 40GBASE\u2013LR4 <\/td>\n<\/tr>\n
258<\/td>\n87.7.1 40GBASE\u2013LR4 transmitter optical specifications <\/td>\n<\/tr>\n
259<\/td>\n87.7.2 40GBASE\u2013LR4 receive optical specifications
87.7.3 40GBASE\u2013LR4 illustrative link power budget <\/td>\n<\/tr>\n
260<\/td>\n87.8 Definition of optical parameters and measurement methods
87.8.1 Test patterns for optical parameters
87.8.2 Skew and Skew Variation <\/td>\n<\/tr>\n
261<\/td>\n87.8.3 Wavelength
87.8.4 Average optical power
87.8.5 Optical Modulation Amplitude (OMA) <\/td>\n<\/tr>\n
262<\/td>\n87.8.6 Transmitter and dispersion penalty
87.8.6.1 Reference transmitter requirements
87.8.6.2 Channel requirements <\/td>\n<\/tr>\n
263<\/td>\n87.8.6.3 Reference receiver requirements
87.8.6.4 Test procedure
87.8.7 Extinction ratio
87.8.8 Relative Intensity Noise (RIN20OMA)
87.8.9 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n
264<\/td>\n87.8.10 Receiver sensitivity
87.8.11 Stressed receiver sensitivity
87.8.11.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n
265<\/td>\n87.8.11.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n
267<\/td>\n87.8.11.3 Stressed receiver conformance test signal verification
87.8.11.4 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n
268<\/td>\n87.8.11.5 Stressed receiver conformance test procedure for WDM conformance testing <\/td>\n<\/tr>\n
269<\/td>\n87.8.12 Receiver 3 dB electrical upper cutoff frequency
87.9 Safety, installation, environment, and labeling
87.9.1 General safety
87.9.2 Laser safety <\/td>\n<\/tr>\n
270<\/td>\n87.9.3 Installation
87.9.4 Environment
87.9.4.1 Electromagnetic emission
87.9.4.2 Temperature, humidity, and handling
87.9.5 PMD labeling requirements <\/td>\n<\/tr>\n
271<\/td>\n87.10 Fiber optic cabling model
87.11 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n
272<\/td>\n87.11.1 Optical fiber cable
87.11.2 Optical fiber connection
87.11.2.1 Connection insertion loss
87.11.2.2 Maximum discrete reflectance
87.11.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
273<\/td>\n87.12 Protocol implementation conformance statement (PICS) proforma for Clause 87, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4
87.12.1 Introduction
87.12.2 Identification
87.12.2.1 Implementation identification
87.12.2.2 Protocol summary <\/td>\n<\/tr>\n
274<\/td>\n87.12.3 Major capabilities\/options <\/td>\n<\/tr>\n
275<\/td>\n87.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4
87.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n
276<\/td>\n87.12.4.2 Management functions
87.12.4.3 PMD to MDI optical specifications for 40GBASE-LR4 <\/td>\n<\/tr>\n
277<\/td>\n87.12.4.4 Optical measurement methods
87.12.4.5 Environmental specifications
87.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
279<\/td>\n88. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE\u2013LR4 and 100GBASE\u2013ER4
88.1 Overview
88.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
281<\/td>\n88.3 Delay and Skew
88.3.1 Delay constraints
88.3.2 Skew constraints
88.4 PMD MDIO function mapping
88.5 PMD functional specifications
88.5.1 PMD block diagram <\/td>\n<\/tr>\n
283<\/td>\n88.5.2 PMD transmit function
88.5.3 PMD receive function
88.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
284<\/td>\n88.5.5 PMD lane-by-lane signal detect function
88.5.6 PMD reset function
88.5.7 PMD global transmit disable function (optional)
88.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n
285<\/td>\n88.5.9 PMD fault function (optional)
88.5.10 PMD transmit fault function (optional)
88.5.11 PMD receive fault function (optional)
88.6 Wavelength-division-multiplexed lane assignments
88.7 PMD to MDI optical specifications for 100GBASE\u2013LR4 and 100GBASE\u2013ER4 <\/td>\n<\/tr>\n
286<\/td>\n88.7.1 100GBASE\u2013LR4 and 100GBASE\u2013ER4 transmitter optical specifications <\/td>\n<\/tr>\n
288<\/td>\n88.7.2 100GBASE\u2013LR4 and 100GBASE\u2013ER4 receive optical specifications <\/td>\n<\/tr>\n
289<\/td>\n88.7.3 100GBASE\u2013LR4 and 100GBASE\u2013ER4 illustrative link power budgets
88.8 Definition of optical parameters and measurement methods
88.8.1 Test patterns for optical parameters
88.8.2 Wavelength <\/td>\n<\/tr>\n
290<\/td>\n88.8.3 Average optical power
88.8.4 Optical Modulation Amplitude (OMA) <\/td>\n<\/tr>\n
291<\/td>\n88.8.5 Transmitter and dispersion penalty (TDP)
88.8.5.1 Reference transmitter requirements
88.8.5.2 Channel requirements <\/td>\n<\/tr>\n
292<\/td>\n88.8.5.3 Reference receiver requirements
88.8.5.4 Test procedure
88.8.6 Extinction ratio
88.8.7 Relative Intensity Noise (RIN20OMA)
88.8.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n
293<\/td>\n88.8.9 Receiver sensitivity
88.8.10 Stressed receiver sensitivity
88.8.11 Receiver 3 dB electrical upper cutoff frequency
88.9 Safety, installation, environment, and labeling
88.9.1 General safety
88.9.2 Laser safety <\/td>\n<\/tr>\n
294<\/td>\n88.9.3 Installation
88.9.4 Environment
88.9.5 Electromagnetic emission
88.9.6 Temperature, humidity, and handling
88.9.7 PMD labeling requirements <\/td>\n<\/tr>\n
295<\/td>\n88.10 Fiber optic cabling model
88.11 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n
296<\/td>\n88.11.1 Optical fiber cable
88.11.2 Optical fiber connection
88.11.2.1 Connection insertion loss
88.11.2.2 Maximum discrete reflectance
88.11.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
297<\/td>\n88.12 Protocol implementation conformance statement (PICS) proforma for Clause 88, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE\u2013LR4 and 100GBASE\u2013ER4
88.12.1 Introduction
88.12.2 Identification
88.12.2.1 Implementation identification
88.12.2.2 Protocol summary <\/td>\n<\/tr>\n
298<\/td>\n88.12.3 Major capabilities\/options <\/td>\n<\/tr>\n
299<\/td>\n88.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 100GBASE\u2013LR4 and 100GBASE\u2013ER4
88.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n
300<\/td>\n88.12.4.2 Management functions
88.12.4.3 PMD to MDI optical specifications for 100GBASE\u2013LR4
88.12.4.4 PMD to MDI optical specifications for 100GBASE\u2013ER4 <\/td>\n<\/tr>\n
301<\/td>\n88.12.4.5 Optical measurement methods
88.12.4.6 Environmental specifications
88.12.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
303<\/td>\n89. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.1 Overview <\/td>\n<\/tr>\n
304<\/td>\n89.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
305<\/td>\n89.3 Delay and skew
89.3.1 Delay constraints
89.3.2 Skew constraints
89.4 PMD MDIO function mapping <\/td>\n<\/tr>\n
306<\/td>\n89.5 PMD functional specifications
89.5.1 PMD block diagram
89.5.2 PMD transmit function
89.5.3 PMD receive function <\/td>\n<\/tr>\n
307<\/td>\n89.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
308<\/td>\n89.5.5 PMD reset function
89.5.6 PMD global transmit disable function (optional)
89.5.7 PMD fault function (optional)
89.5.8 PMD transmit fault function (optional)
89.5.9 PMD receive fault function (optional)
89.6 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n
309<\/td>\n89.6.1 40GBASE-FR transmitter optical specifications
89.6.2 40GBASE-FR receive optical specifications <\/td>\n<\/tr>\n
310<\/td>\n89.6.3 40GBASE-FR illustrative link power budget
89.6.4 Comparison of power budget methodology <\/td>\n<\/tr>\n
311<\/td>\n89.7 Definition of optical parameters and measurement methods
89.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n
312<\/td>\n89.7.2 Skew and Skew Variation
89.7.3 Wavelength
89.7.4 Average optical power
89.7.5 Dispersion penalty
89.7.5.1 Channel requirements <\/td>\n<\/tr>\n
313<\/td>\n89.7.5.2 Reference receiver requirements
89.7.5.3 Test procedure
89.7.6 Extinction ratio <\/td>\n<\/tr>\n
314<\/td>\n89.7.7 Relative Intensity Noise (RIN20OMA)
89.7.8 Transmitter optical waveform (transmit eye)
89.7.9 Receiver sensitivity
89.7.10 Receiver jitter tolerance
89.7.11 Receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n
315<\/td>\n89.8 Safety, installation, environment, and labeling
89.8.1 General safety
89.8.2 Laser safety
89.8.3 Installation
89.8.4 Environment <\/td>\n<\/tr>\n
316<\/td>\n89.8.4.1 Electromagnetic emission
89.8.4.2 Temperature, humidity, and handling
89.8.5 PMD labeling requirements
89.9 Fiber optic cabling model
89.10 Characteristics of the fiber optic cabling (channel)
89.10.1 Optical fiber cable <\/td>\n<\/tr>\n
317<\/td>\n89.10.2 Optical fiber connection
89.10.2.1 Connection insertion loss
89.10.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n
318<\/td>\n89.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
319<\/td>\n89.11 Protocol implementation conformance statement (PICS) proforma for Clause 89, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.11.1 Introduction
89.11.2 Identification
89.11.2.1 Implementation identification
89.11.2.2 Protocol summary <\/td>\n<\/tr>\n
320<\/td>\n89.11.3 Major capabilities\/options
89.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
321<\/td>\n89.11.4.2 Management functions
89.11.4.3 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n
322<\/td>\n89.11.4.4 Optical measurement methods
89.11.4.5 Environmental specifications
89.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
323<\/td>\n90. Ethernet support for time synchronization protocols
90.1 Introduction
90.2 Overview
90.3 Relationship with other IEEE standards
90.4 Time Synchronization Service Interface (TSSI)
90.4.1 Introduction <\/td>\n<\/tr>\n
324<\/td>\n90.4.1.1 Interlayer service interfaces
90.4.1.2 Responsibilities of TimeSync Client <\/td>\n<\/tr>\n
325<\/td>\n90.4.2 TSSI
90.4.3 Detailed service specification
90.4.3.1 TS_TX.indication primitive
90.4.3.1.1 Semantics
90.4.3.1.2 Condition for generation
90.4.3.1.3 Effect of receipt
90.4.3.2 TS_RX.indication primitive
90.4.3.2.1 Semantics <\/td>\n<\/tr>\n
326<\/td>\n90.4.3.2.2 Condition for generation
90.4.3.2.3 Effect of receipt
90.5 generic Reconciliation Sublayer (gRS)
90.5.1 TS_SFD_Detect_TX function
90.5.2 TS_SFD_Detect_RX function <\/td>\n<\/tr>\n
327<\/td>\n90.6 Overview of management features <\/td>\n<\/tr>\n
328<\/td>\n90.7 Data delay measurement <\/td>\n<\/tr>\n
330<\/td>\n90.8 Protocol implementation conformance statement (PICS) proforma for Clause 90, Ethernet support for time synchronization protocols
90.8.1 Introduction
90.8.2 Identification
90.8.2.1 Implementation identification
90.8.2.2 Protocol summary <\/td>\n<\/tr>\n
331<\/td>\n90.8.3 TSSI indication
90.8.4 Data delay reporting <\/td>\n<\/tr>\n
333<\/td>\nAnnex 83A (normative) 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s Attachment Unit Interface (CAUI)
83A.1 Overview <\/td>\n<\/tr>\n
334<\/td>\n83A.1.1 Summary of major concepts
83A.1.2 Rate of operation
83A.2 XLAUI\/CAUI link block diagram <\/td>\n<\/tr>\n
335<\/td>\n83A.2.1 Transmitter compliance points <\/td>\n<\/tr>\n
336<\/td>\n83A.2.2 Receiver compliance points
83A.3 XLAUI\/CAUI electrical characteristics
83A.3.1 Signal levels <\/td>\n<\/tr>\n
337<\/td>\n83A.3.2 Signal paths
83A.3.3 Transmitter characteristics
83A.3.3.1 Output amplitude <\/td>\n<\/tr>\n
338<\/td>\n83A.3.3.2 Rise\/fall time <\/td>\n<\/tr>\n
339<\/td>\n83A.3.3.3 Differential output return loss
83A.3.3.4 Common-mode output return loss <\/td>\n<\/tr>\n
340<\/td>\n83A.3.3.5 Transmitter eye mask and transmitter jitter definition <\/td>\n<\/tr>\n
341<\/td>\n83A.3.4 Receiver characteristics <\/td>\n<\/tr>\n
342<\/td>\n83A.3.4.1 Bit error ratio
83A.3.4.2 Input signal definition
83A.3.4.3 Differential input return loss <\/td>\n<\/tr>\n
343<\/td>\n83A.3.4.4 Differential to common-mode input return loss <\/td>\n<\/tr>\n
344<\/td>\n83A.3.4.5 AC coupling
83A.3.4.6 Jitter tolerance <\/td>\n<\/tr>\n
345<\/td>\n83A.4 Interconnect characteristics <\/td>\n<\/tr>\n
346<\/td>\n83A.4.1 Characteristic impedance <\/td>\n<\/tr>\n
347<\/td>\n83A.5 Electrical parameter measurement methods
83A.5.1 Transmit jitter
83A.5.2 Receiver tolerance <\/td>\n<\/tr>\n
348<\/td>\n83A.6 Environmental specifications
83A.6.1 General safety
83A.6.2 Network safety
83A.6.3 Installation and maintenance guidelines
83A.6.4 Electromagnetic compatibility
83A.6.5 Temperature and humidity <\/td>\n<\/tr>\n
349<\/td>\n83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s Attachment Unit Interface (CAUI)
83A.7.1 Introduction
83A.7.2 Identification
83A.7.2.1 Implementation identification
83A.7.2.2 Protocol summary <\/td>\n<\/tr>\n
350<\/td>\n83A.7.3 Major capabilities\/options
83A.7.4 XLAUI\/CAUI transmitter requirements <\/td>\n<\/tr>\n
351<\/td>\n83A.7.5 XLAUI\/CAUI receiver requirements
83A.7.6 Electrical measurement methods
83A.7.7 Environmental specifications <\/td>\n<\/tr>\n
353<\/td>\nAnnex 83B (normative) Chip-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100Gb\/s Attachment Unit Interface (CAUI)
83B.1 Overview <\/td>\n<\/tr>\n
355<\/td>\n83B.2 Compliance point specifications for chip-module XLAUI\/CAUI <\/td>\n<\/tr>\n
357<\/td>\n83B.2.1 Module specifications <\/td>\n<\/tr>\n
360<\/td>\n83B.2.2 Host specifications <\/td>\n<\/tr>\n
361<\/td>\n83B.2.3 Host input signal tolerance <\/td>\n<\/tr>\n
362<\/td>\n83B.3 Environmental specifications
83B.3.1 General safety
83B.3.2 Network safety
83B.3.3 Installation and maintenance guidelines
83B.3.4 Electromagnetic compatibility <\/td>\n<\/tr>\n
363<\/td>\n83B.3.5 Temperature and humidity <\/td>\n<\/tr>\n
364<\/td>\n83B.4 Protocol implementation conformance statement (PICS) proforma for Annex 83B, Chip-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s Attachment Unit Interface (CAUI)
83B.4.1 Introduction
83B.4.2 Identification
83B.4.2.1 Implementation identification
83B.4.2.2 Protocol summary <\/td>\n<\/tr>\n
365<\/td>\n83B.4.3 Major capabilities\/options
83B.4.4 Module requirements
83B.4.5 Host requirements <\/td>\n<\/tr>\n
366<\/td>\n83B.4.6 Environmental specifications <\/td>\n<\/tr>\n
367<\/td>\nAnnex 83C (informative) PMA sublayer partitioning examples
83C.1 Partitioning examples with FEC
83C.1.1 FEC implemented with PCS <\/td>\n<\/tr>\n
368<\/td>\n83C.1.2 FEC implemented with PMD
83C.2 Partitioning examples without FEC
83C.2.1 Single PMA sublayer without FEC <\/td>\n<\/tr>\n
369<\/td>\n83C.2.2 Single XLAUI\/CAUI without FEC
83C.2.3 Separate SERDES for optical module interface <\/td>\n<\/tr>\n
371<\/td>\nAnnex 85A (informative) 40GBASE-CR4 and 100GBASE-CR10 TP0 and TP5 test point parameters
85A.1 Overview
85A.2 Transmitter characteristics at TP0 <\/td>\n<\/tr>\n
372<\/td>\n85A.3 Receiver characteristics at TP5
85A.4 Transmitter and receiver differential printed circuit board trace loss <\/td>\n<\/tr>\n
373<\/td>\n85A.5 Channel insertion loss <\/td>\n<\/tr>\n
374<\/td>\n85A.6 Channel return loss
85A.7 Channel insertion loss deviation (ILD) <\/td>\n<\/tr>\n
375<\/td>\n85A.8 Channel integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n
377<\/td>\nAnnex 86A (normative) Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.1 Overview
86A.2 Block diagram and test points
86A.3 Lane assignments <\/td>\n<\/tr>\n
378<\/td>\n86A.4 Electrical specifications for nPPI
86A.4.1 nPPI host to module electrical specifications
86A.4.1.1 Differential return losses at TP1 and TP1a <\/td>\n<\/tr>\n
379<\/td>\n86A.4.2 nPPI module to host electrical specifications <\/td>\n<\/tr>\n
381<\/td>\n86A.4.2.1 Differential return losses at TP4 and TP4a <\/td>\n<\/tr>\n
382<\/td>\n86A.5 Definitions of electrical parameters and measurement methods
86A.5.1 Test points and compliance boards <\/td>\n<\/tr>\n
383<\/td>\n86A.5.1.1 Compliance board parameters
86A.5.1.1.1 Reference insertion losses of HCB and MCB <\/td>\n<\/tr>\n
384<\/td>\n86A.5.1.1.2 Electrical specifications of mated HCB and MCB <\/td>\n<\/tr>\n
386<\/td>\n86A.5.2 Test patterns and related subclauses <\/td>\n<\/tr>\n
387<\/td>\n86A.5.3 Parameter definitions
86A.5.3.1 AC common-mode voltage
86A.5.3.2 Termination mismatch <\/td>\n<\/tr>\n
388<\/td>\n86A.5.3.3 Transition time
86A.5.3.4 Data Dependent Pulse Width Shrinkage (DDPWS)
86A.5.3.5 Signal to noise ratio Qsq <\/td>\n<\/tr>\n
389<\/td>\n86A.5.3.6 Eye mask for TP1a and TP4
86A.5.3.7 Reference impedances for electrical measurements
86A.5.3.8 Host input signal tolerance <\/td>\n<\/tr>\n
390<\/td>\n86A.5.3.8.1 Introduction
86A.5.3.8.2 Test equipment and setup <\/td>\n<\/tr>\n
391<\/td>\n86A.5.3.8.3 Stressed eye jitter characteristics <\/td>\n<\/tr>\n
392<\/td>\n86A.5.3.8.4 Calibration
86A.5.3.8.5 Calibration procedure <\/td>\n<\/tr>\n
393<\/td>\n86A.5.3.8.6 Test procedure <\/td>\n<\/tr>\n
394<\/td>\n86A.6 Recommended electrical channel <\/td>\n<\/tr>\n
395<\/td>\n86A.7 Safety, installation, environment, and labeling
86A.7.1 General safety
86A.7.2 Installation
86A.7.3 Environment
86A.7.4 PMD labeling <\/td>\n<\/tr>\n
396<\/td>\n86A.8 Protocol implementation conformance statement (PICS) proforma for Annex 86A, Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.8.1 Introduction
86A.8.2 Identification
86A.8.2.1 Implementation identification
86A.8.2.2 Protocol summary <\/td>\n<\/tr>\n
397<\/td>\n86A.8.3 Major capabilities\/options
86A.8.4 PICS proforma tables for Parallel Physical Interface (nPPI) for 40GBASE- SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.8.4.1 PMD functional specifications <\/td>\n<\/tr>\n
398<\/td>\n86A.8.4.2 Electrical specifications for nPPI
86A.8.4.3 Definitions of parameters and measurement methods <\/td>\n<\/tr>\n
399<\/td>\n86A.8.4.4 Environmental and safety specifications <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Ethernet<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2012<\/td>\n400<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":397804,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-397803","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/397803","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/397804"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=397803"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=397803"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=397803"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}