{"id":398305,"date":"2024-10-20T04:35:06","date_gmt":"2024-10-20T04:35:06","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-802-3-2015-7\/"},"modified":"2024-10-26T08:23:24","modified_gmt":"2024-10-26T08:23:24","slug":"ieee-802-3-2015-7","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-802-3-2015-7\/","title":{"rendered":"IEEE 802.3-2015"},"content":{"rendered":"

Revision Standard – Superseded. Ethernet local area network operation is specified for selected speeds of operation from 1 Mb\/s to 100 Gb\/s using a common media access control (MAC) specification and management information base (MIB). The Carrier Sense Multiple Access with Collision Detection (CSMA\/CD) MAC protocol specifies shared medium (half duplex) operation, as well as full duplex operation. Speed specific Media Independent Interfaces (MIIs) allow use of selected Physical Layer devices (PHY) for operation over coaxial, twisted pair or fiber optic cables, or electrical backplanes. System considerations for multisegment shared access networks describe the use of Repeaters which are defined for operational speeds up to 1000 Mb\/s. Local Area Network (LAN) operation is supported at all speeds. Other specified capabilities include: various PHY types for access networks, PHYs suitable for metropolitan area network applications, and the provision of power over selected twisted pair PHY types.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Standard for Ethernet
SECTION SIX
Contents <\/td>\n<\/tr>\n
32<\/td>\n78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.1 LPI Signaling <\/td>\n<\/tr>\n
33<\/td>\n78.1.1.1 Reconciliation sublayer service interfaces
78.1.1.2 Responsibilities of LPI Client
78.1.2 LPI Client service interface <\/td>\n<\/tr>\n
34<\/td>\n78.1.2.1 LP_IDLE.request
78.1.2.1.1 Function
78.1.2.1.2 Semantics of the service primitive
78.1.2.1.3 When generated
78.1.2.1.4 Effect of receipt
78.1.2.2 LP_IDLE.indication
78.1.2.2.1 Function
78.1.2.2.2 Semantics of the service primitive
78.1.2.2.3 When generated <\/td>\n<\/tr>\n
35<\/td>\n78.1.2.2.4 Effect of receipt
78.1.3 Reconciliation sublayer operation
78.1.3.1 RS LPI assert function <\/td>\n<\/tr>\n
36<\/td>\n78.1.3.2 LPI detect function
78.1.3.3 PHY LPI operation
78.1.3.3.1 PHY LPI transmit operation <\/td>\n<\/tr>\n
37<\/td>\n78.1.3.3.2 PHY LPI receive operation <\/td>\n<\/tr>\n
38<\/td>\n78.1.4 PHY types optionally supporting EEE <\/td>\n<\/tr>\n
39<\/td>\n78.2 LPI mode timing parameters description <\/td>\n<\/tr>\n
40<\/td>\n78.3 Capabilities Negotiation
78.4 Data Link Layer Capabilities <\/td>\n<\/tr>\n
41<\/td>\n78.4.1 Data Link Layer capabilities timing requirements <\/td>\n<\/tr>\n
42<\/td>\n78.4.2 Control state diagrams
78.4.2.1 Conventions
78.4.2.2 Constants
78.4.2.3 Variables <\/td>\n<\/tr>\n
46<\/td>\n78.4.2.4 Functions
78.4.2.5 State diagrams <\/td>\n<\/tr>\n
50<\/td>\n78.4.3 State change procedure across a link <\/td>\n<\/tr>\n
51<\/td>\n78.4.3.1 Transmitting link partner\u2019s state change procedure across a link <\/td>\n<\/tr>\n
52<\/td>\n78.4.3.2 Receiving link partner\u2019s state change procedure across a link <\/td>\n<\/tr>\n
53<\/td>\n78.5 Communication link access latency <\/td>\n<\/tr>\n
55<\/td>\n78.5.1 10 Gb\/s PHY extension using XGXS
78.5.2 40 Gb\/s and 100 Gb\/s PHY extension using XLAUI or CAUI-n <\/td>\n<\/tr>\n
56<\/td>\n78.6 Protocol implementation conformance statement (PICS) proforma for EEE Data Link Layer Capabilities
78.6.1 Introduction
78.6.2 Identification
78.6.2.1 Implementation identification
78.6.2.2 Protocol summary <\/td>\n<\/tr>\n
57<\/td>\n78.6.3 Major capabilities\/options
78.6.4 DLL requirements <\/td>\n<\/tr>\n
58<\/td>\n79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.1 Overview
79.1.1 IEEE 802.3 LLDP frame format <\/td>\n<\/tr>\n
59<\/td>\n79.1.1.1 Destination Address field
79.1.1.2 Source Address field
79.1.1.3 Length\/Type field
79.1.1.4 LLDPDU field
79.1.1.5 Pad field
79.1.1.6 Frame Check Sequence field
79.2 Requirements of the IEEE 802.3 Organizationally Specific TLV set <\/td>\n<\/tr>\n
60<\/td>\n79.3 IEEE 802.3 Organizationally Specific TLVs
79.3.1 MAC\/PHY Configuration\/Status TLV
79.3.1.1 Auto-negotiation support\/status
79.3.1.2 PMD auto-negotiation advertised capability field <\/td>\n<\/tr>\n
61<\/td>\n79.3.1.3 Operational MAU type
79.3.1.4 MAC\/PHY Configuration\/Status TLV usage rules
79.3.2 Power Via MDI TLV <\/td>\n<\/tr>\n
62<\/td>\n79.3.2.1 MDI power support
79.3.2.2 PSE power pair
79.3.2.3 Power class
79.3.2.4 Requested power type\/source\/priority
79.3.2.4.1 Power type <\/td>\n<\/tr>\n
63<\/td>\n79.3.2.4.2 Power source
79.3.2.4.3 Power priority
79.3.2.5 PD requested power value <\/td>\n<\/tr>\n
64<\/td>\n79.3.2.6 PSE allocated power value
79.3.2.7 Power Via MDI TLV usage rules
79.3.3 Link Aggregation TLV (deprecated) <\/td>\n<\/tr>\n
65<\/td>\n79.3.3.1 Aggregation status
79.3.3.2 Aggregated port ID
79.3.3.3 Link Aggregation TLV usage rules
79.3.4 Maximum Frame Size TLV <\/td>\n<\/tr>\n
66<\/td>\n79.3.4.1 Maximum frame size
79.3.4.2 Maximum Frame Size TLV usage rules <\/td>\n<\/tr>\n
67<\/td>\n79.3.5 EEE TLV
79.3.5.1 Transmit Tw
79.3.5.2 Receive Tw
79.3.5.3 Fallback Tw <\/td>\n<\/tr>\n
68<\/td>\n79.3.5.4 Echo Transmit and Receive Tw
79.3.5.5 EEE TLV usage rules
79.3.6 EEE Fast Wake TLV
79.3.6.1 Transmit fast wake
79.3.6.2 Receive fast wake <\/td>\n<\/tr>\n
69<\/td>\n79.3.6.3 Echo of Transmit fast wake and Receive fast wake
79.3.6.4 EEE Fast Wake TLV usage rules
79.4 IEEE 802.3 Organizationally Specific TLV selection management
79.4.1 IEEE 802.3 Organizationally Specific TLV selection variable\/LLDP Configuration managed object class cross reference
79.4.2 IEEE 802.3 Organizationally Specific TLV\/LLDP Local and Remote System group managed object class cross references <\/td>\n<\/tr>\n
72<\/td>\n79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements
79.5.1 Introduction
79.5.2 Identification
79.5.2.1 Implementation identification
79.5.2.2 Protocol summary <\/td>\n<\/tr>\n
73<\/td>\n79.5.3 Major capabilities\/options
79.5.4 IEEE 802.3 Organizationally Specific TLV <\/td>\n<\/tr>\n
74<\/td>\n79.5.5 MAC\/PHY Configuration\/Status TLV
79.5.6 EEE TLV <\/td>\n<\/tr>\n
75<\/td>\n79.5.7 EEE Fast Wake TLV
79.5.8 Power Via MDI TLV <\/td>\n<\/tr>\n
76<\/td>\n79.5.9 Link Aggregation TLV
79.5.10 Maximum Frame Size TLV <\/td>\n<\/tr>\n
77<\/td>\n80. Introduction to 40 Gb\/s and 100 Gb\/s networks
80.1 Overview
80.1.1 Scope
80.1.2 Objectives
80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n
78<\/td>\n80.1.4 Nomenclature <\/td>\n<\/tr>\n
80<\/td>\n80.1.5 Physical Layer signaling systems <\/td>\n<\/tr>\n
81<\/td>\n80.2 Summary of 40 Gigabit and 100 Gigabit Ethernet sublayers
80.2.1 Reconciliation Sublayer (RS) and Media Independent Interface
80.2.2 Physical Coding Sublayer (PCS)
80.2.3 Forward Error Correction (FEC) sublayers <\/td>\n<\/tr>\n
82<\/td>\n80.2.4 Physical Medium Attachment (PMA) sublayer
80.2.5 Physical Medium Dependent (PMD) sublayer
80.2.6 Auto-Negotiation
80.2.7 Management interface (MDIO\/MDC)
80.2.8 Management
80.3 Service interface specification method and notation <\/td>\n<\/tr>\n
83<\/td>\n80.3.1 Inter-sublayer service interface
80.3.2 Instances of the Inter-sublayer service interface <\/td>\n<\/tr>\n
84<\/td>\n80.3.3 Semantics of inter-sublayer service interface primitives
80.3.3.1 IS_UNITDATA_i.request
80.3.3.1.1 Semantics of the service primitive
80.3.3.1.2 When generated
80.3.3.1.3 Effect of receipt
80.3.3.2 IS_UNITDATA_i.indication <\/td>\n<\/tr>\n
89<\/td>\n80.3.3.2.1 Semantics of the service primitive
80.3.3.2.2 When generated
80.3.3.2.3 Effect of receipt
80.3.3.3 IS_SIGNAL.indication
80.3.3.3.1 Semantics of the service primitive
80.3.3.3.2 When generated
80.3.3.3.3 Effect of receipt
80.3.3.4 IS_TX_MODE.request <\/td>\n<\/tr>\n
90<\/td>\n80.3.3.4.1 Semantics of the service primitive
80.3.3.4.2 When generated
80.3.3.4.3 Effect of receipt
80.3.3.5 IS_RX_MODE.request
80.3.3.5.1 Semantics of the service primitive
80.3.3.5.2 When generated
80.3.3.5.3 Effect of receipt
80.3.3.6 IS_RX_LPI_ACTIVE.request
80.3.3.6.1 Semantics of the service primitive <\/td>\n<\/tr>\n
91<\/td>\n80.3.3.6.2 When generated
80.3.3.6.3 Effect of receipt
80.3.3.7 IS_ENERGY_DETECT.indication
80.3.3.7.1 Semantics of the service primitive
80.3.3.7.2 When generated
80.3.3.7.3 Effect of receipt
80.3.3.8 IS_RX_TX_MODE.indication
80.3.3.8.1 Semantics of the service primitive
80.3.3.8.2 When generated
80.3.3.8.3 Effect of receipt <\/td>\n<\/tr>\n
92<\/td>\n80.4 Delay constraints
80.5 Skew constraints <\/td>\n<\/tr>\n
99<\/td>\n80.6 State diagrams
80.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n
100<\/td>\n81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation (XLGMII and CGMII)
81.1 Overview <\/td>\n<\/tr>\n
101<\/td>\n81.1.1 Summary of major concepts
81.1.2 Application
81.1.3 Rate of operation
81.1.4 Delay constraints <\/td>\n<\/tr>\n
102<\/td>\n81.1.5 Allocation of functions
81.1.6 XLGMII\/CGMII structure <\/td>\n<\/tr>\n
103<\/td>\n81.1.7 Mapping of XLGMII\/CGMII signals to PLS service primitives
81.1.7.1 Mapping of PLS_DATA.request
81.1.7.1.1 Function
81.1.7.1.2 Semantics of the service primitive
81.1.7.1.3 When generated
81.1.7.1.4 Effect of receipt <\/td>\n<\/tr>\n
104<\/td>\n81.1.7.2 Mapping of PLS_DATA.indication
81.1.7.2.1 Function
81.1.7.2.2 Semantics of the service primitive
81.1.7.2.3 When generated
81.1.7.2.4 Effect of receipt
81.1.7.3 Mapping of PLS_CARRIER.indication
81.1.7.4 Mapping of PLS_SIGNAL.indication <\/td>\n<\/tr>\n
105<\/td>\n81.1.7.5 Mapping of PLS_DATA_VALID.indication
81.1.7.5.1 Function
81.1.7.5.2 Semantics of the service primitive
81.1.7.5.3 When generated
81.1.7.5.4 Effect of receipt
81.2 XLGMII\/CGMII data stream <\/td>\n<\/tr>\n
106<\/td>\n81.2.1 Inter-frame
81.2.2 Preamble and start of frame delimiter <\/td>\n<\/tr>\n
107<\/td>\n81.2.3 Data
81.2.4 End of frame delimiter
81.2.5 Definition of Start of Packet and End of Packet Delimiters
81.3 XLGMII\/CGMII functional specifications
81.3.1 Transmit
81.3.1.1 TX_CLK <\/td>\n<\/tr>\n
108<\/td>\n81.3.1.2 TXC (transmit control)
81.3.1.3 TXD (transmit data) <\/td>\n<\/tr>\n
110<\/td>\n81.3.1.4 Start control character alignment <\/td>\n<\/tr>\n
111<\/td>\n81.3.1.5 Transmit direction LPI transition
81.3.2 Receive
81.3.2.1 RX_CLK (receive clock) <\/td>\n<\/tr>\n
112<\/td>\n81.3.2.2 RXC (receive control) <\/td>\n<\/tr>\n
113<\/td>\n81.3.2.3 RXD (receive data) <\/td>\n<\/tr>\n
114<\/td>\n81.3.2.4 Receive direction LPI transition <\/td>\n<\/tr>\n
115<\/td>\n81.3.3 Error and fault handling
81.3.3.1 Response to error indications by the XLGMII\/CGMII
81.3.3.2 Conditions for generation of transmit Error control characters
81.3.3.3 Response to received invalid frame sequences <\/td>\n<\/tr>\n
116<\/td>\n81.3.4 Link fault signaling
81.3.4.1 Variables and counters <\/td>\n<\/tr>\n
117<\/td>\n81.3.4.2 State diagram
81.4 LPI assertion and detection <\/td>\n<\/tr>\n
119<\/td>\n81.4.1 LPI messages
81.4.2 Transmit LPI state diagram
81.4.2.1 Variables and counters <\/td>\n<\/tr>\n
120<\/td>\n81.4.2.2 State Diagram
81.4.3 Considerations for transmit system behavior <\/td>\n<\/tr>\n
121<\/td>\n81.4.4 Considerations for receive system behavior <\/td>\n<\/tr>\n
122<\/td>\n81.5 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation
81.5.1 Introduction
81.5.2 Identification
81.5.2.1 Implementation identification
81.5.2.2 Protocol summary <\/td>\n<\/tr>\n
123<\/td>\n81.5.2.3 Major capabilities\/options
81.5.3 PICS proforma tables for Reconciliation Sublayer and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation
81.5.3.1 General <\/td>\n<\/tr>\n
124<\/td>\n81.5.3.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n
125<\/td>\n81.5.3.3 Data stream structure
81.5.3.4 XLGMII\/CGMII signal functional specifications <\/td>\n<\/tr>\n
126<\/td>\n81.5.3.5 Link fault signaling state diagram
81.5.3.6 LPI functions <\/td>\n<\/tr>\n
127<\/td>\n82. Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R
82.1 Overview
82.1.1 Scope
82.1.2 Relationship of 40GBASE-R and 100GBASE-R to other standards <\/td>\n<\/tr>\n
128<\/td>\n82.1.3 Summary of 40GBASE-R and 100GBASE-R sublayers
82.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
129<\/td>\n82.1.4 Inter-sublayer interfaces
82.1.4.1 PCS service interface (XLGMII\/CGMII)
82.1.4.2 Physical Medium Attachment (PMA) or Forward Error Correction (FEC) service interface <\/td>\n<\/tr>\n
130<\/td>\n82.1.5 Functional block diagram <\/td>\n<\/tr>\n
131<\/td>\n82.2 Physical Coding Sublayer (PCS)
82.2.1 Functions within the PCS <\/td>\n<\/tr>\n
132<\/td>\n82.2.2 Use of blocks
82.2.3 64B\/66B transmission code
82.2.3.1 Notation conventions <\/td>\n<\/tr>\n
133<\/td>\n82.2.3.2 Transmission order
82.2.3.3 Block structure <\/td>\n<\/tr>\n
136<\/td>\n82.2.3.4 Control codes <\/td>\n<\/tr>\n
137<\/td>\n82.2.3.5 Valid and invalid blocks
82.2.3.6 Idle (\/I\/) <\/td>\n<\/tr>\n
138<\/td>\n82.2.3.7 Start (\/S\/)
82.2.3.8 Terminate (\/T\/)
82.2.3.9 ordered set (\/O\/)
82.2.3.10 Error (\/E\/)
82.2.4 Transmit process <\/td>\n<\/tr>\n
139<\/td>\n82.2.5 Scrambler
82.2.6 Block distribution
82.2.7 Alignment marker insertion <\/td>\n<\/tr>\n
142<\/td>\n82.2.8 BIP calculations
82.2.9 Rapid alignment marker insertion <\/td>\n<\/tr>\n
144<\/td>\n82.2.10 PMA or FEC Interface <\/td>\n<\/tr>\n
145<\/td>\n82.2.11 Test-pattern generators
82.2.12 Block synchronization
82.2.13 PCS lane deskew <\/td>\n<\/tr>\n
146<\/td>\n82.2.14 PCS lane reorder
82.2.15 Alignment marker removal
82.2.16 Descrambler
82.2.17 Receive process <\/td>\n<\/tr>\n
147<\/td>\n82.2.18 Test-pattern checker
82.2.19 Detailed functions and state diagrams
82.2.19.1 State diagram conventions
82.2.19.2 State variables
82.2.19.2.1 Constants <\/td>\n<\/tr>\n
148<\/td>\n82.2.19.2.2 Variables <\/td>\n<\/tr>\n
151<\/td>\n82.2.19.2.3 Functions <\/td>\n<\/tr>\n
152<\/td>\n82.2.19.2.4 Counters <\/td>\n<\/tr>\n
153<\/td>\n82.2.19.2.5 Timers <\/td>\n<\/tr>\n
154<\/td>\n82.2.19.3 State diagrams
82.2.19.3.1 LPI state diagrams <\/td>\n<\/tr>\n
155<\/td>\n82.3 PCS Management
82.3.1 PMD MDIO function mapping <\/td>\n<\/tr>\n
157<\/td>\n82.4 Loopback
82.5 Delay constraints
82.6 Auto-Negotiation <\/td>\n<\/tr>\n
166<\/td>\n82.7 Protocol implementation conformance statement (PICS) proforma for Clause 82, Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R
82.7.1 Introduction
82.7.2 Identification
82.7.2.1 Implementation identification
82.7.2.2 Protocol summary <\/td>\n<\/tr>\n
167<\/td>\n82.7.3 Major capabilities\/options <\/td>\n<\/tr>\n
168<\/td>\n82.7.4 PICS Proforma Tables for PCS, type 40GBASE-R and 100GBASE-R
82.7.4.1 Coding rules
82.7.4.2 Scrambler and Descrambler
82.7.4.3 Deskew and Reordering <\/td>\n<\/tr>\n
169<\/td>\n82.7.4.4 Alignment Markers
82.7.5 Test-pattern modes
82.7.5.1 Bit order
82.7.6 Management <\/td>\n<\/tr>\n
170<\/td>\n82.7.6.1 State diagrams <\/td>\n<\/tr>\n
171<\/td>\n82.7.6.2 Loopback
82.7.6.3 Delay constraints
82.7.6.4 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n
172<\/td>\n82.7.6.5 LPI functions <\/td>\n<\/tr>\n
173<\/td>\n83. Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R
83.1 Overview
83.1.1 Scope
83.1.2 Position of the PMA in the 40GBASE-R or 100GBASE-R sublayers
83.1.3 Summary of functions
83.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n
176<\/td>\n83.2 PMA interfaces
83.3 PMA service interface <\/td>\n<\/tr>\n
179<\/td>\n83.4 Service interface below PMA <\/td>\n<\/tr>\n
180<\/td>\n83.5 Functions within the PMA
83.5.1 Per input-lane clock and data recovery
83.5.2 Bit-level multiplexing <\/td>\n<\/tr>\n
182<\/td>\n83.5.3 Skew and Skew Variation
83.5.3.1 Skew generation toward SP0
83.5.3.2 Skew generation toward SP1
83.5.3.3 Skew tolerance at SP1
83.5.3.4 Skew generation toward SP2
83.5.3.5 Skew tolerance at SP5
83.5.3.6 Skew generation at SP6 <\/td>\n<\/tr>\n
183<\/td>\n83.5.3.7 Skew tolerance at SP6
83.5.3.8 Skew generation toward SP7
83.5.4 Delay constraints
83.5.5 Clocking architecture <\/td>\n<\/tr>\n
184<\/td>\n83.5.6 Signal drivers
83.5.7 Link status
83.5.8 PMA local loopback mode
83.5.9 PMA remote loopback mode (optional) <\/td>\n<\/tr>\n
185<\/td>\n83.5.10 PMA test patterns (optional) <\/td>\n<\/tr>\n
187<\/td>\n83.5.11 Energy Efficient Ethernet
83.5.11.1 PMA quiet and alert signals
83.5.11.2 Detection of PMA quiet and alert signals <\/td>\n<\/tr>\n
188<\/td>\n83.5.11.3 Additional transmit functions in the Tx direction <\/td>\n<\/tr>\n
189<\/td>\n83.5.11.4 Additional receive functions in the Tx direction
83.5.11.5 Additional transmit functions in the Rx direction <\/td>\n<\/tr>\n
190<\/td>\n83.5.11.6 Additional receive functions in the Rx direction
83.5.11.7 Support for BASE-R FEC
83.6 PMA MDIO function mapping <\/td>\n<\/tr>\n
194<\/td>\n83.7 Protocol implementation conformance statement (PICS) proforma for Clause 83, Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R
83.7.1 Introduction
83.7.2 Identification
83.7.2.1 Implementation identification
83.7.2.2 Protocol summary <\/td>\n<\/tr>\n
195<\/td>\n83.7.3 Major capabilities\/options <\/td>\n<\/tr>\n
197<\/td>\n83.7.4 Skew generation and tolerance
83.7.5 Test patterns <\/td>\n<\/tr>\n
198<\/td>\n83.7.6 Loopback modes
83.7.7 EEE deep sleep with XLAUI\/CAUI <\/td>\n<\/tr>\n
199<\/td>\n84. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4
84.1 Overview
84.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
201<\/td>\n84.3 PCS requirements for Auto-Negotiation (AN) service interface
84.4 Delay constraints
84.5 Skew constraints <\/td>\n<\/tr>\n
202<\/td>\n84.6 PMD MDIO function mapping <\/td>\n<\/tr>\n
203<\/td>\n84.7 PMD functional specifications
84.7.1 Link block diagram
84.7.2 PMD transmit function
84.7.3 PMD receive function <\/td>\n<\/tr>\n
204<\/td>\n84.7.4 Global PMD signal detect function
84.7.5 PMD lane-by-lane signal detect function
84.7.6 Global PMD transmit disable function <\/td>\n<\/tr>\n
205<\/td>\n84.7.7 PMD lane-by-lane transmit disable function
84.7.8 Loopback mode
84.7.9 PMD_fault function
84.7.10 PMD transmit fault function
84.7.11 PMD receive fault function <\/td>\n<\/tr>\n
206<\/td>\n84.7.12 PMD control function
84.8 40GBASE-KR4 electrical characteristics
84.8.1 Transmitter characteristics
84.8.1.1 Test fixture
84.8.2 Receiver characteristics
84.8.2.1 Receiver interference tolerance
84.9 Interconnect characteristics
84.10 Environmental specifications
84.10.1 General safety <\/td>\n<\/tr>\n
207<\/td>\n84.10.2 Network safety
84.10.3 Installation and maintenance guidelines
84.10.4 Electromagnetic compatibility
84.10.5 Temperature and humidity <\/td>\n<\/tr>\n
208<\/td>\n84.11 Protocol implementation conformance statement (PICS) proforma for Clause 84, Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4
84.11.1 Introduction
84.11.2 Identification
84.11.2.1 Implementation identification
84.11.2.2 Protocol summary <\/td>\n<\/tr>\n
209<\/td>\n84.11.3 Major capabilities\/options <\/td>\n<\/tr>\n
210<\/td>\n84.11.4 PICS proforma tables for Clause 84, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-KR4
84.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
211<\/td>\n84.11.4.2 Management functions
84.11.4.3 Transmitter electrical characteristics <\/td>\n<\/tr>\n
212<\/td>\n84.11.4.4 Receiver electrical characteristics
84.11.4.5 Environmental specifications <\/td>\n<\/tr>\n
213<\/td>\n85. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.1 Overview <\/td>\n<\/tr>\n
214<\/td>\n85.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
215<\/td>\n85.3 PCS requirements for Auto-Negotiation (AN) service interface
85.4 Delay constraints <\/td>\n<\/tr>\n
216<\/td>\n85.5 Skew constraints
85.6 PMD MDIO function mapping <\/td>\n<\/tr>\n
218<\/td>\n85.7 PMD functional specifications
85.7.1 Link block diagram <\/td>\n<\/tr>\n
220<\/td>\n85.7.2 PMD Transmit function
85.7.3 PMD Receive function
85.7.4 Global PMD signal detect function <\/td>\n<\/tr>\n
221<\/td>\n85.7.5 PMD lane-by-lane signal detect function
85.7.6 Global PMD transmit disable function
85.7.7 PMD lane-by-lane transmit disable function
85.7.8 Loopback mode <\/td>\n<\/tr>\n
222<\/td>\n85.7.9 PMD_fault function
85.7.10 PMD transmit fault function
85.7.11 PMD receive fault function
85.7.12 PMD control function
85.8 MDI Electrical specifications for 40GBASE-CR4 and 100GBASE-CR10
85.8.1 Signal levels <\/td>\n<\/tr>\n
223<\/td>\n85.8.2 Signal paths
85.8.3 Transmitter characteristics <\/td>\n<\/tr>\n
224<\/td>\n85.8.3.1 Transmitter differential output return loss
85.8.3.2 Transmitter noise parameter measurements <\/td>\n<\/tr>\n
225<\/td>\n85.8.3.3 Transmitter output waveform <\/td>\n<\/tr>\n
227<\/td>\n85.8.3.3.1 Coefficient initialization
85.8.3.3.2 Coefficient step size
85.8.3.3.3 Coefficient range
85.8.3.3.4 Waveform acquisition
85.8.3.3.5 Linear fit to the waveform measurement at TP2 <\/td>\n<\/tr>\n
228<\/td>\n85.8.3.3.6 Transfer function between the transmit function and TP2 <\/td>\n<\/tr>\n
229<\/td>\n85.8.3.4 Insertion loss TP0 to TP2 or TP3 to TP5 <\/td>\n<\/tr>\n
230<\/td>\n85.8.3.5 Test fixture <\/td>\n<\/tr>\n
231<\/td>\n85.8.3.6 Test fixture impedance
85.8.3.7 Test fixture insertion loss
85.8.3.8 Data dependent jitter (DDJ)
85.8.3.9 Signaling rate range <\/td>\n<\/tr>\n
232<\/td>\n85.8.4 Receiver characteristics at TP3 summary
85.8.4.1 Receiver differential input return loss <\/td>\n<\/tr>\n
233<\/td>\n85.8.4.2 Receiver interference tolerance test
85.8.4.2.1 Test setup <\/td>\n<\/tr>\n
234<\/td>\n85.8.4.2.2 Test channel
85.8.4.2.3 Test channel calibration <\/td>\n<\/tr>\n
235<\/td>\n85.8.4.2.4 Pattern generator
85.8.4.2.5 Test procedure
85.8.4.3 Bit error ratio
85.8.4.4 Signaling rate range
85.8.4.5 AC-coupling <\/td>\n<\/tr>\n
236<\/td>\n85.9 Channel characteristics
85.10 Cable assembly characteristics
85.10.1 Characteristic impedance and reference impedance
85.10.2 Cable assembly insertion loss <\/td>\n<\/tr>\n
238<\/td>\n85.10.3 Cable assembly insertion loss deviation (ILD) <\/td>\n<\/tr>\n
239<\/td>\n85.10.4 Cable assembly return loss <\/td>\n<\/tr>\n
240<\/td>\n85.10.5 Cable assembly multiple disturber near-end crosstalk (MDNEXT) loss
85.10.6 Cable assembly multiple disturber far-end crosstalk (MDFEXT) loss <\/td>\n<\/tr>\n
241<\/td>\n85.10.7 Cable assembly integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n
243<\/td>\n85.10.8 Cable assembly test fixture
85.10.9 Mated test fixtures <\/td>\n<\/tr>\n
244<\/td>\n85.10.9.1 Mated test fixtures insertion loss
85.10.9.2 Mated test fixtures return loss <\/td>\n<\/tr>\n
245<\/td>\n85.10.9.3 Mated test fixtures common-mode conversion loss <\/td>\n<\/tr>\n
246<\/td>\n85.10.9.4 Mated test fixtures integrated crosstalk noise
85.10.10 Shielding
85.10.11 Crossover function <\/td>\n<\/tr>\n
247<\/td>\n85.11 MDI specification
85.11.1 40GBASE-CR4 MDI connectors
85.11.1.1 Style-1 40GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n
248<\/td>\n85.11.1.1.1 Style-1 AC-coupling <\/td>\n<\/tr>\n
249<\/td>\n85.11.1.2 Style-2 40GBASE-CR4 MDI connectors
85.11.1.2.1 Style-2 40GBASE-CR4 Connector pin assignments <\/td>\n<\/tr>\n
250<\/td>\n85.11.2 100GBASE-CR10 MDI connectors <\/td>\n<\/tr>\n
252<\/td>\n85.11.2.1 100GBASE-CR10 MDI AC-coupling
85.11.3 Electronic keying
85.12 Environmental specifications <\/td>\n<\/tr>\n
253<\/td>\n85.13 Protocol implementation conformance statement (PICS) proforma for Clause 85, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.13.1 Introduction
85.13.2 Identification
85.13.2.1 Implementation identification
85.13.2.2 Protocol summary <\/td>\n<\/tr>\n
254<\/td>\n85.13.3 Major capabilities\/options <\/td>\n<\/tr>\n
255<\/td>\n85.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10
85.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n
256<\/td>\n85.13.4.2 Management functions <\/td>\n<\/tr>\n
257<\/td>\n85.13.4.3 Transmitter specifications
85.13.4.4 Receiver specifications <\/td>\n<\/tr>\n
258<\/td>\n85.13.4.5 Cable assembly specifications <\/td>\n<\/tr>\n
259<\/td>\n85.13.4.6 MDI connector specifications
85.13.4.7 Environmental specifications <\/td>\n<\/tr>\n
260<\/td>\n86. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.1 Overview <\/td>\n<\/tr>\n
262<\/td>\n86.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
263<\/td>\n86.3 Delay and Skew
86.3.1 Delay constraints
86.3.2 Skew and Skew Variation constraints
86.4 PMD MDIO function mapping <\/td>\n<\/tr>\n
264<\/td>\n86.5 PMD functional specifications
86.5.1 PMD block diagram <\/td>\n<\/tr>\n
265<\/td>\n86.5.2 PMD transmit function
86.5.3 PMD receive function
86.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
266<\/td>\n86.5.5 PMD lane-by-lane signal detect function
86.5.6 PMD reset function
86.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n
267<\/td>\n86.5.8 PMD lane-by-lane transmit disable function (optional)
86.5.9 PMD fault function (optional)
86.5.10 PMD transmit fault function (optional)
86.5.11 PMD receive fault function (optional)
86.6 Lane assignments
86.7 PMD to MDI specifications for 40GBASE-SR4 or 100GBASE-SR10 <\/td>\n<\/tr>\n
268<\/td>\n86.7.1 Transmitter optical specifications <\/td>\n<\/tr>\n
269<\/td>\n86.7.2 Characteristics of signal within, and at the receiving end of, a compliant optical channel <\/td>\n<\/tr>\n
270<\/td>\n86.7.3 40GBASE\u2013SR4 or 100GBASE\u2013SR10 receiver optical specifications <\/td>\n<\/tr>\n
271<\/td>\n86.7.4 40GBASE\u2013SR4 or 100GBASE\u2013SR10 illustrative link power budget
86.8 Definitions of optical and dual-use parameters and measurement methods
86.8.1 Test points and compliance boards
86.8.2 Test patterns and related subclauses <\/td>\n<\/tr>\n
274<\/td>\n86.8.2.1 Multi-lane testing considerations
86.8.3 Parameters applicable to both electrical and optical signals
86.8.3.1 Skew and Skew Variation <\/td>\n<\/tr>\n
275<\/td>\n86.8.3.2 Eye diagrams
86.8.3.2.1 Eye mask acceptable hit count examples
86.8.3.3 Jitter
86.8.3.3.1 J2 Jitter
86.8.3.3.2 J9 Jitter <\/td>\n<\/tr>\n
276<\/td>\n86.8.4 Optical parameter definitions
86.8.4.1 Wavelength and spectral width
86.8.4.2 Average optical power
86.8.4.3 Optical Modulation Amplitude (OMA)
86.8.4.4 Transmitter and dispersion penalty (TDP)
86.8.4.5 Extinction ratio
86.8.4.6 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n
277<\/td>\n86.8.4.6.1 Optical transmitter eye mask <\/td>\n<\/tr>\n
278<\/td>\n86.8.4.7 Stressed receiver sensitivity
86.8.4.8 Receiver jitter tolerance <\/td>\n<\/tr>\n
279<\/td>\n86.9 Safety, installation, environment, and labeling
86.9.1 General safety
86.9.2 Laser safety
86.9.3 Installation
86.9.4 Environment
86.9.5 PMD labeling
86.10 Optical channel
86.10.1 Fiber optic cabling model <\/td>\n<\/tr>\n
280<\/td>\n86.10.2 Characteristics of the fiber optic cabling (channel)
86.10.2.1 Optical fiber cable
86.10.2.2 Optical fiber connection <\/td>\n<\/tr>\n
281<\/td>\n86.10.2.2.1 Connection insertion loss
86.10.2.2.2 Maximum discrete reflectance
86.10.3 Medium Dependent Interface (MDI)
86.10.3.1 Optical lane assignments for 40GBASE-SR4 <\/td>\n<\/tr>\n
282<\/td>\n86.10.3.2 Optical lane assignments for 100GBASE-SR10
86.10.3.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
284<\/td>\n86.11 Protocol implementation conformance statement (PICS) proforma for Clause 86, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.11.1 Introduction
86.11.2 Identification
86.11.2.1 Implementation identification
86.11.2.2 Protocol summary <\/td>\n<\/tr>\n
285<\/td>\n86.11.3 Major capabilities\/options <\/td>\n<\/tr>\n
286<\/td>\n86.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 40GBASE\u2013SR4 and 100GBASE\u2013SR10
86.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
287<\/td>\n86.11.4.2 Management functions
86.11.4.3 Optical specifications for 40GBASE\u2013SR4 or 100GBASE\u2013SR10 <\/td>\n<\/tr>\n
288<\/td>\n86.11.4.4 Definitions of parameters and measurement methods
86.11.4.5 Environmental and safety specifications <\/td>\n<\/tr>\n
289<\/td>\n86.11.4.6 Optical channel and MDI <\/td>\n<\/tr>\n
290<\/td>\n87. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4
87.1 Overview
87.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
292<\/td>\n87.3 Delay and Skew
87.3.1 Delay constraints
87.3.2 Skew constraints
87.4 PMD MDIO function mapping
87.5 PMD functional specifications
87.5.1 PMD block diagram <\/td>\n<\/tr>\n
293<\/td>\n87.5.2 PMD transmit function <\/td>\n<\/tr>\n
294<\/td>\n87.5.3 PMD receive function
87.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
295<\/td>\n87.5.5 PMD lane-by-lane signal detect function
87.5.6 PMD reset function
87.5.7 PMD global transmit disable function (optional)
87.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n
296<\/td>\n87.5.9 PMD fault function (optional)
87.5.10 PMD transmit fault function (optional)
87.5.11 PMD receive fault function (optional)
87.6 Wavelength-division-multiplexed lane assignments
87.7 PMD to MDI optical specifications for 40GBASE-LR4 and 40GBASE-ER4 <\/td>\n<\/tr>\n
297<\/td>\n87.7.1 40GBASE-LR4 and 40GBASE-ER4 transmitter optical specifications <\/td>\n<\/tr>\n
298<\/td>\n87.7.2 40GBASE-LR4 and 40GBASE-ER4 receive optical specifications <\/td>\n<\/tr>\n
299<\/td>\n87.7.3 40GBASE-LR4 and 40GBASE-ER4 illustrative link power budgets
87.8 Definition of optical parameters and measurement methods <\/td>\n<\/tr>\n
300<\/td>\n87.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n
301<\/td>\n87.8.2 Skew and Skew Variation
87.8.3 Wavelength
87.8.4 Average optical power
87.8.5 Optical Modulation Amplitude (OMA)
87.8.6 Transmitter and dispersion penalty
87.8.6.1 Reference transmitter requirements <\/td>\n<\/tr>\n
302<\/td>\n87.8.6.2 Channel requirements
87.8.6.3 Reference receiver requirements <\/td>\n<\/tr>\n
303<\/td>\n87.8.6.4 Test procedure
87.8.7 Extinction ratio
87.8.8 Relative Intensity Noise (RIN20OMA)
87.8.9 Transmitter optical waveform (transmit eye)
87.8.10 Receiver sensitivity
87.8.11 Stressed receiver sensitivity <\/td>\n<\/tr>\n
304<\/td>\n87.8.11.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n
305<\/td>\n87.8.11.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n
307<\/td>\n87.8.11.3 Stressed receiver conformance test signal verification
87.8.11.4 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n
308<\/td>\n87.8.11.5 Stressed receiver conformance test procedure for WDM conformance testing <\/td>\n<\/tr>\n
309<\/td>\n87.8.12 Receiver 3 dB electrical upper cutoff frequency
87.9 Safety, installation, environment, and labeling
87.9.1 General safety
87.9.2 Laser safety <\/td>\n<\/tr>\n
310<\/td>\n87.9.3 Installation
87.9.4 Environment
87.9.4.1 Electromagnetic emission
87.9.4.2 Temperature, humidity, and handling
87.9.5 PMD labeling requirements
87.10 Fiber optic cabling model <\/td>\n<\/tr>\n
311<\/td>\n87.11 Characteristics of the fiber optic cabling (channel)
87.11.1 Optical fiber cable <\/td>\n<\/tr>\n
312<\/td>\n87.11.2 Optical fiber connection
87.11.2.1 Connection insertion loss
87.11.2.2 Maximum discrete reflectance
87.11.3 Medium Dependent Interface (MDI) requirements
87.12 Requirements for interoperation between 40GBASE-LR4 and 40GBASE-ER4 <\/td>\n<\/tr>\n
313<\/td>\n87.13 Protocol implementation conformance statement (PICS) proforma for Clause 87, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4
87.13.1 Introduction
87.13.2 Identification
87.13.2.1 Implementation identification
87.13.2.2 Protocol summary <\/td>\n<\/tr>\n
314<\/td>\n87.13.3 Major capabilities\/options <\/td>\n<\/tr>\n
315<\/td>\n87.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4
87.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n
316<\/td>\n87.13.4.2 Management functions
87.13.4.3 PMD to MDI optical specifications for 40GBASE-LR4
87.13.4.4 PMD to MDI optical specifications for 40GBASE-ER4 <\/td>\n<\/tr>\n
317<\/td>\n87.13.4.5 Optical measurement methods
87.13.4.6 Environmental specifications
87.13.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
318<\/td>\n88. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4
88.1 Overview
88.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
320<\/td>\n88.3 Delay and Skew
88.3.1 Delay constraints
88.3.2 Skew constraints
88.4 PMD MDIO function mapping
88.5 PMD functional specifications
88.5.1 PMD block diagram <\/td>\n<\/tr>\n
321<\/td>\n88.5.2 PMD transmit function <\/td>\n<\/tr>\n
322<\/td>\n88.5.3 PMD receive function
88.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
323<\/td>\n88.5.5 PMD lane-by-lane signal detect function
88.5.6 PMD reset function
88.5.7 PMD global transmit disable function (optional)
88.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n
324<\/td>\n88.5.9 PMD fault function (optional)
88.5.10 PMD transmit fault function (optional)
88.5.11 PMD receive fault function (optional)
88.6 Wavelength-division-multiplexed lane assignments <\/td>\n<\/tr>\n
325<\/td>\n88.7 PMD to MDI optical specifications for 100GBASE-LR4 and 100GBASE-ER4
88.7.1 100GBASE-LR4 and 100GBASE-ER4 transmitter optical specifications <\/td>\n<\/tr>\n
327<\/td>\n88.7.2 100GBASE-LR4 and 100GBASE-ER4 receive optical specifications <\/td>\n<\/tr>\n
328<\/td>\n88.7.3 100GBASE-LR4 and 100GBASE-ER4 illustrative link power budgets
88.8 Definition of optical parameters and measurement methods
88.8.1 Test patterns for optical parameters
88.8.2 Wavelength <\/td>\n<\/tr>\n
329<\/td>\n88.8.3 Average optical power
88.8.4 Optical Modulation Amplitude (OMA) <\/td>\n<\/tr>\n
330<\/td>\n88.8.5 Transmitter and dispersion penalty (TDP)
88.8.5.1 Reference transmitter requirements
88.8.5.2 Channel requirements <\/td>\n<\/tr>\n
331<\/td>\n88.8.5.3 Reference receiver requirements
88.8.5.4 Test procedure
88.8.6 Extinction ratio
88.8.7 Relative Intensity Noise (RIN20OMA)
88.8.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n
332<\/td>\n88.8.9 Receiver sensitivity
88.8.10 Stressed receiver sensitivity
88.8.11 Receiver 3 dB electrical upper cutoff frequency
88.9 Safety, installation, environment, and labeling
88.9.1 General safety
88.9.2 Laser safety <\/td>\n<\/tr>\n
333<\/td>\n88.9.3 Installation
88.9.4 Environment
88.9.5 Electromagnetic emission
88.9.6 Temperature, humidity, and handling
88.9.7 PMD labeling requirements <\/td>\n<\/tr>\n
334<\/td>\n88.10 Fiber optic cabling model
88.11 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n
335<\/td>\n88.11.1 Optical fiber cable
88.11.2 Optical fiber connection
88.11.2.1 Connection insertion loss
88.11.2.2 Maximum discrete reflectance
88.11.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
336<\/td>\n88.12 Protocol implementation conformance statement (PICS) proforma for Clause 88, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4
88.12.1 Introduction
88.12.2 Identification
88.12.2.1 Implementation identification
88.12.2.2 Protocol summary <\/td>\n<\/tr>\n
337<\/td>\n88.12.3 Major capabilities\/options <\/td>\n<\/tr>\n
338<\/td>\n88.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 100GBASE-LR4 and 100GBASE-ER4
88.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n
339<\/td>\n88.12.4.2 Management functions
88.12.4.3 PMD to MDI optical specifications for 100GBASE-LR4
88.12.4.4 PMD to MDI optical specifications for 100GBASE-ER4 <\/td>\n<\/tr>\n
340<\/td>\n88.12.4.5 Optical measurement methods
88.12.4.6 Environmental specifications
88.12.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
341<\/td>\n89. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.1 Overview <\/td>\n<\/tr>\n
342<\/td>\n89.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
343<\/td>\n89.3 Delay and skew
89.3.1 Delay constraints
89.3.2 Skew constraints
89.4 PMD MDIO function mapping <\/td>\n<\/tr>\n
344<\/td>\n89.5 PMD functional specifications
89.5.1 PMD block diagram
89.5.2 PMD transmit function
89.5.3 PMD receive function <\/td>\n<\/tr>\n
345<\/td>\n89.5.4 PMD global signal detect function <\/td>\n<\/tr>\n
346<\/td>\n89.5.5 PMD reset function
89.5.6 PMD global transmit disable function (optional)
89.5.7 PMD fault function (optional)
89.5.8 PMD transmit fault function (optional)
89.5.9 PMD receive fault function (optional)
89.6 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n
347<\/td>\n89.6.1 40GBASE-FR transmitter optical specifications
89.6.2 40GBASE-FR receive optical specifications <\/td>\n<\/tr>\n
348<\/td>\n89.6.3 40GBASE-FR illustrative link power budget
89.6.4 Comparison of power budget methodology <\/td>\n<\/tr>\n
349<\/td>\n89.7 Definition of optical parameters and measurement methods
89.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n
350<\/td>\n89.7.2 Skew and Skew Variation
89.7.3 Wavelength
89.7.4 Average optical power
89.7.5 Dispersion penalty
89.7.5.1 Channel requirements <\/td>\n<\/tr>\n
351<\/td>\n89.7.5.2 Reference receiver requirements
89.7.5.3 Test procedure
89.7.6 Extinction ratio <\/td>\n<\/tr>\n
352<\/td>\n89.7.7 Relative Intensity Noise (RIN20OMA)
89.7.8 Transmitter optical waveform (transmit eye)
89.7.9 Receiver sensitivity
89.7.10 Receiver jitter tolerance
89.7.11 Receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n
353<\/td>\n89.8 Safety, installation, environment, and labeling
89.8.1 General safety
89.8.2 Laser safety
89.8.3 Installation
89.8.4 Environment <\/td>\n<\/tr>\n
354<\/td>\n89.8.4.1 Electromagnetic emission
89.8.4.2 Temperature, humidity, and handling
89.8.5 PMD labeling requirements
89.9 Fiber optic cabling model
89.10 Characteristics of the fiber optic cabling (channel)
89.10.1 Optical fiber cable <\/td>\n<\/tr>\n
355<\/td>\n89.10.2 Optical fiber connection
89.10.2.1 Connection insertion loss
89.10.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n
356<\/td>\n89.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
357<\/td>\n89.11 Protocol implementation conformance statement (PICS) proforma for Clause 89, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.11.1 Introduction
89.11.2 Identification
89.11.2.1 Implementation identification
89.11.2.2 Protocol summary <\/td>\n<\/tr>\n
358<\/td>\n89.11.3 Major capabilities\/options
89.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR
89.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n
359<\/td>\n89.11.4.2 Management functions
89.11.4.3 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n
360<\/td>\n89.11.4.4 Optical measurement methods
89.11.4.5 Environmental specifications
89.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
361<\/td>\n90. Ethernet support for time synchronization protocols
90.1 Introduction
90.2 Overview
90.3 Relationship with other IEEE standards
90.4 Time Synchronization Service Interface (TSSI)
90.4.1 Introduction <\/td>\n<\/tr>\n
362<\/td>\n90.4.1.1 Interlayer service interfaces
90.4.1.2 Responsibilities of TimeSync Client <\/td>\n<\/tr>\n
363<\/td>\n90.4.2 TSSI
90.4.3 Detailed service specification
90.4.3.1 TS_TX.indication primitive
90.4.3.1.1 Semantics
90.4.3.1.2 Condition for generation
90.4.3.1.3 Effect of receipt
90.4.3.2 TS_RX.indication primitive
90.4.3.2.1 Semantics <\/td>\n<\/tr>\n
364<\/td>\n90.4.3.2.2 Condition for generation
90.4.3.2.3 Effect of receipt
90.5 generic Reconciliation Sublayer (gRS)
90.5.1 TS_SFD_Detect_TX function
90.5.2 TS_SFD_Detect_RX function <\/td>\n<\/tr>\n
365<\/td>\n90.6 Overview of management features <\/td>\n<\/tr>\n
366<\/td>\n90.7 Data delay measurement <\/td>\n<\/tr>\n
368<\/td>\n90.8 Protocol implementation conformance statement (PICS) proforma for Clause 90, Ethernet support for time synchronization protocols
90.8.1 Introduction
90.8.2 Identification
90.8.2.1 Implementation identification
90.8.2.2 Protocol summary <\/td>\n<\/tr>\n
369<\/td>\n90.8.3 TSSI indication
90.8.4 Data delay reporting <\/td>\n<\/tr>\n
370<\/td>\n91. Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs
91.1 Overview
91.1.1 Scope
91.1.2 Position of RS-FEC in the 100GBASE-R sublayers
91.2 FEC service interface <\/td>\n<\/tr>\n
371<\/td>\n91.3 PMA compatibility <\/td>\n<\/tr>\n
372<\/td>\n91.4 Delay constraints
91.5 Functions within the RS-FEC sublayer
91.5.1 Functional block diagram
91.5.2 Transmit function
91.5.2.1 Lane block synchronization
91.5.2.2 Alignment lock and deskew
91.5.2.3 Lane reorder
91.5.2.4 Alignment marker removal <\/td>\n<\/tr>\n
374<\/td>\n91.5.2.5 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n
375<\/td>\n91.5.2.6 Alignment marker mapping and insertion <\/td>\n<\/tr>\n
377<\/td>\n91.5.2.7 Reed-Solomon encoder <\/td>\n<\/tr>\n
379<\/td>\n91.5.2.8 Symbol distribution
91.5.2.9 Transmit bit ordering
91.5.3 Receive function
91.5.3.1 Alignment lock and deskew <\/td>\n<\/tr>\n
381<\/td>\n91.5.3.2 Lane reorder
91.5.3.3 Reed-Solomon decoder <\/td>\n<\/tr>\n
382<\/td>\n91.5.3.4 Alignment marker removal
91.5.3.5 256B\/257B to 64B\/66B transcoder <\/td>\n<\/tr>\n
383<\/td>\n91.5.3.6 Block distribution <\/td>\n<\/tr>\n
384<\/td>\n91.5.3.7 Alignment marker mapping and insertion
91.5.3.8 Receive bit ordering <\/td>\n<\/tr>\n
385<\/td>\n91.5.4 Detailed functions and state diagrams
91.5.4.1 State diagram conventions <\/td>\n<\/tr>\n
387<\/td>\n91.5.4.2 State variables
91.5.4.2.1 Variables <\/td>\n<\/tr>\n
389<\/td>\n91.5.4.2.2 Functions
91.5.4.2.3 Counters <\/td>\n<\/tr>\n
390<\/td>\n91.5.4.3 State diagrams <\/td>\n<\/tr>\n
394<\/td>\n91.6 RS-FEC MDIO function mapping <\/td>\n<\/tr>\n
396<\/td>\n91.6.1 FEC_bypass_correction_enable
91.6.2 FEC_bypass_indication_enable
91.6.3 FEC_bypass_correction_ability
91.6.4 FEC_bypass_indication_ability
91.6.5 hi_ser
91.6.6 amps_lock
91.6.7 fec_align_status
91.6.8 FEC_corrected_cw_counter <\/td>\n<\/tr>\n
397<\/td>\n91.6.9 FEC_uncorrected_cw_counter
91.6.10 FEC_lane_mapping
91.6.11 FEC_symbol_error_counter_i
91.6.12 align_status
91.6.13 BIP_error_counter_i
91.6.14 lane_mapping
91.6.15 block_lock
91.6.16 am_lock <\/td>\n<\/tr>\n
398<\/td>\n91.7 Protocol implementation conformance statement (PICS) proforma for Clause 91, Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs
91.7.1 Introduction
91.7.2 Identification
91.7.2.1 Implementation identification
91.7.2.2 Protocol summary <\/td>\n<\/tr>\n
399<\/td>\n91.7.3 Major capabilities\/options
91.7.4 PICS proforma tables for Reed-Solomon Forward Error Correction (RS-FEC) sublayer for 100GBASE-R PHYs
91.7.4.1 Transmit function <\/td>\n<\/tr>\n
400<\/td>\n91.7.4.2 Receive function <\/td>\n<\/tr>\n
402<\/td>\n91.7.4.3 State diagrams <\/td>\n<\/tr>\n
403<\/td>\n92. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4
92.1 Overview <\/td>\n<\/tr>\n
404<\/td>\n92.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
405<\/td>\n92.3 PCS requirements for Auto-Negotiation (AN) service interface
92.4 Delay constraints
92.5 Skew constraints <\/td>\n<\/tr>\n
406<\/td>\n92.6 PMD MDIO function mapping <\/td>\n<\/tr>\n
407<\/td>\n92.7 PMD functional specifications
92.7.1 Link block diagram <\/td>\n<\/tr>\n
409<\/td>\n92.7.2 PMD Transmit function
92.7.3 PMD Receive function
92.7.4 Global PMD signal detect function
92.7.5 PMD lane-by-lane signal detect function <\/td>\n<\/tr>\n
410<\/td>\n92.7.6 Global PMD transmit disable function
92.7.7 PMD lane-by-lane transmit disable function
92.7.8 Loopback mode
92.7.9 PMD fault function
92.7.10 PMD transmit fault function <\/td>\n<\/tr>\n
411<\/td>\n92.7.11 PMD receive fault function
92.7.12 PMD control function <\/td>\n<\/tr>\n
412<\/td>\n92.8 100GBASE-CR4 electrical characteristics
92.8.1 Signal levels
92.8.2 Signal paths
92.8.3 Transmitter characteristics <\/td>\n<\/tr>\n
413<\/td>\n92.8.3.1 Signal levels <\/td>\n<\/tr>\n
414<\/td>\n92.8.3.2 Transmitter differential output return loss
92.8.3.3 Common-mode to differential mode output return loss <\/td>\n<\/tr>\n
415<\/td>\n92.8.3.4 Common-mode to common-mode output return loss <\/td>\n<\/tr>\n
416<\/td>\n92.8.3.5 Transmitter output waveform <\/td>\n<\/tr>\n
417<\/td>\n92.8.3.5.1 Linear fit to the measured waveform
92.8.3.5.2 Steady-state voltage and linear fit pulse peak <\/td>\n<\/tr>\n
418<\/td>\n92.8.3.5.3 Coefficient initialization
92.8.3.5.4 Coefficient step size
92.8.3.5.5 Coefficient range
92.8.3.6 Insertion loss TP0 to TP2 or TP3 to TP5 <\/td>\n<\/tr>\n
419<\/td>\n92.8.3.7 Transmitter output noise and distortion
92.8.3.8 Transmitter output jitter <\/td>\n<\/tr>\n
420<\/td>\n92.8.3.8.1 Even-odd jitter
92.8.3.8.2 Effective bounded uncorrelated jitter and effective random jitter <\/td>\n<\/tr>\n
421<\/td>\n92.8.3.9 Signaling rate range
92.8.4 Receiver characteristics <\/td>\n<\/tr>\n
422<\/td>\n92.8.4.1 Receiver input amplitude tolerance
92.8.4.2 Receiver differential input return loss
92.8.4.3 Differential to common-mode input return loss
92.8.4.4 Receiver interference tolerance test <\/td>\n<\/tr>\n
423<\/td>\n92.8.4.4.1 Test setup
92.8.4.4.2 Test channel <\/td>\n<\/tr>\n
424<\/td>\n92.8.4.4.3 Test channel calibration
92.8.4.4.4 Pattern generator <\/td>\n<\/tr>\n
425<\/td>\n92.8.4.4.5 Test procedure
92.8.4.5 Receiver jitter tolerance
92.8.4.6 Signaling rate range
92.9 Channel characteristics
92.10 Cable assembly characteristics <\/td>\n<\/tr>\n
426<\/td>\n92.10.1 Characteristic impedance and reference impedance
92.10.2 Cable assembly insertion loss <\/td>\n<\/tr>\n
428<\/td>\n92.10.3 Cable assembly differential return loss
92.10.4 Differential to common-mode return loss <\/td>\n<\/tr>\n
429<\/td>\n92.10.5 Differential to common-mode conversion loss <\/td>\n<\/tr>\n
430<\/td>\n92.10.6 Common-mode to common-mode return loss
92.10.7 Cable assembly Channel Operating Margin
92.10.7.1 Channel signal path <\/td>\n<\/tr>\n
431<\/td>\n92.10.7.1.1 TP0 to TP1 and TP4 to TP5 signal paths
92.10.7.2 Channel crosstalk paths <\/td>\n<\/tr>\n
432<\/td>\n92.11 Test fixtures
92.11.1 TP2 or TP3 test fixture
92.11.1.1 Test fixture return loss
92.11.1.2 Test fixture insertion loss <\/td>\n<\/tr>\n
434<\/td>\n92.11.2 Cable assembly test fixture
92.11.3 Mated test fixtures
92.11.3.1 Mated test fixtures insertion loss <\/td>\n<\/tr>\n
435<\/td>\n92.11.3.2 Mated test fixtures return loss <\/td>\n<\/tr>\n
436<\/td>\n92.11.3.3 Mated test fixtures common-mode conversion insertion loss
92.11.3.4 Mated test fixtures common-mode return loss <\/td>\n<\/tr>\n
438<\/td>\n92.11.3.5 Mated test fixtures common-mode to differential mode return loss
92.11.3.6 Mated test fixtures integrated crosstalk noise <\/td>\n<\/tr>\n
439<\/td>\n92.11.3.6.1 Mated test fixture multiple disturber near-end crosstalk (MDNEXT) loss
92.11.3.6.2 Mated test fixture multiple disturber far-end crosstalk (MDFEXT) loss
92.11.3.6.3 Mated test fixture integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n
440<\/td>\n92.12 MDI specification <\/td>\n<\/tr>\n
441<\/td>\n92.12.1 100GBASE-CR4 MDI connectors
92.12.1.1 Style-1 100GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n
442<\/td>\n92.12.1.2 Style-2 100GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n
443<\/td>\n92.13 Environmental specifications <\/td>\n<\/tr>\n
444<\/td>\n92.14 Protocol implementation conformance statement (PICS) proforma for Clause 92, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4
92.14.1 Introduction
92.14.2 Identification
92.14.2.1 Implementation identification
92.14.2.2 Protocol summary <\/td>\n<\/tr>\n
445<\/td>\n92.14.3 Major capabilities\/options <\/td>\n<\/tr>\n
446<\/td>\n92.14.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4
92.14.4.1 PMD functional specifications <\/td>\n<\/tr>\n
447<\/td>\n92.14.4.2 Management functions <\/td>\n<\/tr>\n
448<\/td>\n92.14.4.3 Transmitter specifications <\/td>\n<\/tr>\n
449<\/td>\n92.14.4.4 Receiver specifications <\/td>\n<\/tr>\n
450<\/td>\n92.14.4.5 Cable assembly specifications <\/td>\n<\/tr>\n
451<\/td>\n92.14.4.6 MDI connector specifications
92.14.4.7 Environmental specifications <\/td>\n<\/tr>\n
452<\/td>\n93. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4
93.1 Overview <\/td>\n<\/tr>\n
453<\/td>\n93.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
454<\/td>\n93.3 PCS requirements for Auto-Negotiation (AN) service interface
93.4 Delay constraints
93.5 Skew constraints <\/td>\n<\/tr>\n
455<\/td>\n93.6 PMD MDIO function mapping <\/td>\n<\/tr>\n
456<\/td>\n93.7 PMD functional specifications
93.7.1 Link block diagram
93.7.2 PMD Transmit function <\/td>\n<\/tr>\n
457<\/td>\n93.7.3 PMD Receive function
93.7.4 Global PMD signal detect function
93.7.5 PMD lane-by-lane signal detect function <\/td>\n<\/tr>\n
458<\/td>\n93.7.6 Global PMD transmit disable function
93.7.7 PMD lane-by-lane transmit disable function
93.7.8 Loopback mode <\/td>\n<\/tr>\n
459<\/td>\n93.7.9 PMD fault function
93.7.10 PMD transmit fault function
93.7.11 PMD receive fault function
93.7.12 PMD control function <\/td>\n<\/tr>\n
460<\/td>\n93.8 100GBASE-KR4 electrical characteristics
93.8.1 Transmitter characteristics
93.8.1.1 Transmitter test fixture <\/td>\n<\/tr>\n
462<\/td>\n93.8.1.2 Signaling rate and range
93.8.1.3 Signal levels <\/td>\n<\/tr>\n
463<\/td>\n93.8.1.4 Transmitter output return loss
93.8.1.5 Transmitter output waveform <\/td>\n<\/tr>\n
465<\/td>\n93.8.1.5.1 Linear fit to the measured waveform
93.8.1.5.2 Steady-state voltage and linear fit pulse peak
93.8.1.5.3 Coefficient initialization
93.8.1.5.4 Coefficient step size
93.8.1.5.5 Coefficient range <\/td>\n<\/tr>\n
466<\/td>\n93.8.1.6 Transmitter output noise and distortion
93.8.1.7 Transmitter output jitter
93.8.2 Receiver characteristics
93.8.2.1 Receiver test fixture <\/td>\n<\/tr>\n
467<\/td>\n93.8.2.2 Receiver input return loss
93.8.2.3 Receiver interference tolerance <\/td>\n<\/tr>\n
468<\/td>\n93.8.2.4 Receiver jitter tolerance <\/td>\n<\/tr>\n
470<\/td>\n93.9 Channel characteristics
93.9.1 Channel Operating Margin
93.9.2 Insertion loss
93.9.3 Return loss <\/td>\n<\/tr>\n
472<\/td>\n93.9.4 AC-coupling
93.10 Environmental specifications
93.10.1 General safety <\/td>\n<\/tr>\n
473<\/td>\n93.10.2 Network safety
93.10.3 Installation and maintenance guidelines
93.10.4 Electromagnetic compatibility
93.10.5 Temperature and humidity <\/td>\n<\/tr>\n
474<\/td>\n93.11 Protocol implementation conformance statement (PICS) proforma for Clause 93, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4
93.11.1 Introduction
93.11.2 Identification
93.11.2.1 Implementation identification
93.11.2.2 Protocol summary <\/td>\n<\/tr>\n
475<\/td>\n93.11.3 Major capabilities\/options <\/td>\n<\/tr>\n
476<\/td>\n93.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4
93.11.4.1 Functional specifications <\/td>\n<\/tr>\n
477<\/td>\n93.11.4.2 Transmitter characteristics <\/td>\n<\/tr>\n
479<\/td>\n93.11.4.3 Receiver characteristics <\/td>\n<\/tr>\n
480<\/td>\n93.11.4.4 Channel characteristics
93.11.4.5 Environmental specifications <\/td>\n<\/tr>\n
481<\/td>\n94. Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4
94.1 Overview <\/td>\n<\/tr>\n
482<\/td>\n94.2 Physical Medium Attachment (PMA) Sublayer
94.2.1 PMA Service Interface <\/td>\n<\/tr>\n
483<\/td>\n94.2.1.1 PMA:IS_UNITDATA_i.request
94.2.1.1.1 Semantics of the service primitive
94.2.1.1.2 When generated
94.2.1.1.3 Effect of receipt
94.2.1.2 PMA:IS_UNITDATA_i.indication
94.2.1.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n
484<\/td>\n94.2.1.2.2 When generated
94.2.1.2.3 Effect of receipt
94.2.1.3 PMA:IS_SIGNAL.indication
94.2.1.3.1 Semantics of the service primitive
94.2.1.3.2 When generated
94.2.1.3.3 Effect of receipt
94.2.1.4 PMA:IS_TX_MODE.request
94.2.1.4.1 Semantics of the service primitive
94.2.1.4.2 When generated
94.2.1.4.3 Effect of receipt <\/td>\n<\/tr>\n
485<\/td>\n94.2.1.5 PMA:IS_RX_MODE.request
94.2.1.5.1 Semantics of the service primitive
94.2.1.5.2 When generated
94.2.1.5.3 Effect of receipt
94.2.1.6 PMA:IS_ENERGY_DETECT.indication
94.2.1.6.1 Semantics of the service primitive
94.2.1.6.2 When generated
94.2.1.6.3 Effect of receipt
94.2.1.7 PMA:IS_RX_TX_MODE.indication <\/td>\n<\/tr>\n
486<\/td>\n94.2.1.7.1 Semantics of the service primitive
94.2.1.7.2 When generated
94.2.1.7.3 Effect of receipt
94.2.2 PMA Transmit Functional Specifications <\/td>\n<\/tr>\n
487<\/td>\n94.2.2.1 FEC Interface
94.2.2.2 Overhead Frame
94.2.2.3 Overhead <\/td>\n<\/tr>\n
488<\/td>\n94.2.2.4 Termination Blocks <\/td>\n<\/tr>\n
489<\/td>\n94.2.2.5 Gray Mapping
94.2.2.6 Precoding
94.2.2.7 PAM4 encoding <\/td>\n<\/tr>\n
490<\/td>\n94.2.2.8 PMD Interface
94.2.3 PMA Receive Functional Specifications <\/td>\n<\/tr>\n
491<\/td>\n94.2.3.1 Overhead
94.2.4 Skew constraints
94.2.5 Delay constraints
94.2.6 Link status
94.2.7 PMA local loopback mode <\/td>\n<\/tr>\n
492<\/td>\n94.2.8 PMA remote loopback mode (optional)
94.2.9 PMA test patterns
94.2.9.1 JP03A test pattern
94.2.9.2 JP03B test pattern
94.2.9.3 Quaternary PRBS13 test pattern <\/td>\n<\/tr>\n
493<\/td>\n94.2.9.4 Transmitter linearity test pattern
94.2.10 PMA MDIO function mapping <\/td>\n<\/tr>\n
494<\/td>\n94.3 Physical Medium Dependent (PMD) Sublayer
94.3.1 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
495<\/td>\n94.3.1.1 PMD:IS_UNITDATA_i.request
94.3.1.1.1 Semantics of the service primitive
94.3.1.1.2 When generated
94.3.1.1.3 Effect of receipt
94.3.1.2 PMD:IS_UNITDATA_i.indication
94.3.1.2.1 Semantics of the service primitive
94.3.1.2.2 When generated
94.3.1.2.3 Effect of receipt <\/td>\n<\/tr>\n
496<\/td>\n94.3.1.3 PMD:IS_SIGNAL.indication
94.3.1.3.1 Semantics of the service primitive
94.3.1.3.2 When generated
94.3.1.3.3 Effect of receipt
94.3.2 PCS requirements for Auto-Negotiation (AN) service interface
94.3.3 Delay constraints
94.3.4 Skew constraints <\/td>\n<\/tr>\n
497<\/td>\n94.3.5 PMD MDIO function mapping <\/td>\n<\/tr>\n
498<\/td>\n94.3.6 PMD functional specifications
94.3.6.1 Link block diagram <\/td>\n<\/tr>\n
499<\/td>\n94.3.6.2 PMD Transmit function
94.3.6.3 PMD Receive function
94.3.6.4 Global PMD signal detect function
94.3.6.5 PMD lane-by-lane signal detect function
94.3.6.6 Global PMD transmit disable function <\/td>\n<\/tr>\n
500<\/td>\n94.3.6.7 PMD lane-by-lane transmit disable function
94.3.6.8 Loopback mode
94.3.7 PMD fault function
94.3.8 PMD transmit fault function <\/td>\n<\/tr>\n
501<\/td>\n94.3.9 PMD receive fault function
94.3.10 PMD control function
94.3.10.1 Overview
94.3.10.2 Training frame structure <\/td>\n<\/tr>\n
502<\/td>\n94.3.10.3 Training frame words
94.3.10.4 Frame marker
94.3.10.5 Control channel encoding
94.3.10.5.1 Differential Manchester encoding
94.3.10.5.2 Control channel structure
94.3.10.6 Coefficient update field <\/td>\n<\/tr>\n
504<\/td>\n94.3.10.6.1 Preset
94.3.10.6.2 Initialize
94.3.10.6.3 Parity
94.3.10.6.4 Coefficient (k) update
94.3.10.7 Status report field <\/td>\n<\/tr>\n
505<\/td>\n94.3.10.7.1 Parity
94.3.10.7.2 Training frame countdown
94.3.10.7.3 Receiver ready <\/td>\n<\/tr>\n
506<\/td>\n94.3.10.7.4 Coefficient (k) status
94.3.10.7.5 Coefficient update process
94.3.10.8 Training pattern <\/td>\n<\/tr>\n
508<\/td>\n94.3.10.9 Transition from training to data
94.3.10.10 Frame lock state diagram
94.3.10.11 Training state diagram
94.3.10.12 Coefficient update state diagram <\/td>\n<\/tr>\n
509<\/td>\n94.3.11 PMD LPI function
94.3.11.1 Alert Signal
94.3.11.1.1 Frame marker
94.3.11.1.2 Coefficient update field
94.3.11.1.3 Status report field
94.3.11.1.4 Parity <\/td>\n<\/tr>\n
510<\/td>\n94.3.11.1.5 Mode
94.3.11.1.6 Alert frame countdown
94.3.11.1.7 PMA alignment offset
94.3.11.1.8 Receiver ready
94.3.11.1.9 Transition from alert to data <\/td>\n<\/tr>\n
511<\/td>\n94.3.12 PMD Transmitter electrical characteristics
94.3.12.1 Test fixture
94.3.12.1.1 Test fixture impedance <\/td>\n<\/tr>\n
512<\/td>\n94.3.12.1.2 Test fixture insertion loss <\/td>\n<\/tr>\n
513<\/td>\n94.3.12.2 Signaling rate and range <\/td>\n<\/tr>\n
514<\/td>\n94.3.12.3 Signal levels <\/td>\n<\/tr>\n
515<\/td>\n94.3.12.4 Transmitter output return loss <\/td>\n<\/tr>\n
516<\/td>\n94.3.12.5 Transmitter output waveform <\/td>\n<\/tr>\n
517<\/td>\n94.3.12.5.1 Transmitter linearity <\/td>\n<\/tr>\n
518<\/td>\n94.3.12.5.2 Linear fit to the measured waveform
94.3.12.5.3 Steady-state voltage and linear fit pulse peak
94.3.12.5.4 Coefficient initialization <\/td>\n<\/tr>\n
519<\/td>\n94.3.12.5.5 Coefficient step size
94.3.12.5.6 Coefficient range
94.3.12.6 Transmitter output jitter
94.3.12.6.1 Clock random jitter and clock deterministic jitter <\/td>\n<\/tr>\n
520<\/td>\n94.3.12.6.2 Even-odd jitter <\/td>\n<\/tr>\n
521<\/td>\n94.3.12.7 Transmitter output noise and distortion
94.3.13 PMD Receiver electrical characteristics
94.3.13.1 Test fixture <\/td>\n<\/tr>\n
522<\/td>\n94.3.13.2 Receiver input return loss
94.3.13.3 Receiver interference tolerance <\/td>\n<\/tr>\n
525<\/td>\n94.3.13.4 Receiver jitter tolerance
94.3.13.4.1 Test setup
94.3.13.4.2 Test method
94.4 Channel characteristics
94.4.1 Channel Operating Margin
94.4.2 Channel insertion loss <\/td>\n<\/tr>\n
527<\/td>\n94.4.3 Channel return loss <\/td>\n<\/tr>\n
528<\/td>\n94.4.4 Channel AC-coupling
94.5 Environmental specifications
94.5.1 General safety
94.5.2 Network safety <\/td>\n<\/tr>\n
529<\/td>\n94.5.3 Installation and maintenance guidelines
94.5.4 Electromagnetic compatibility
94.5.5 Temperature and humidity <\/td>\n<\/tr>\n
530<\/td>\n94.6 Protocol implementation conformance statement (PICS) proforma for Clause 94, Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4
94.6.1 Introduction
94.6.2 Identification
94.6.2.1 Implementation identification
94.6.2.2 Protocol summary <\/td>\n<\/tr>\n
531<\/td>\n94.6.3 Major capabilities\/options
94.6.4 PICS proforma tables for Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4
94.6.4.1 PMA functional specifications <\/td>\n<\/tr>\n
532<\/td>\n94.6.4.2 PMD functional specifications <\/td>\n<\/tr>\n
536<\/td>\n94.6.4.3 PMD transmitter characteristics <\/td>\n<\/tr>\n
537<\/td>\n94.6.4.4 PMD receiver characteristics <\/td>\n<\/tr>\n
538<\/td>\n94.6.4.5 Channel characteristics
94.6.4.6 Environment specifications <\/td>\n<\/tr>\n
539<\/td>\n95. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4
95.1 Overview <\/td>\n<\/tr>\n
540<\/td>\n95.1.1 Bit error ratio
95.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n
541<\/td>\n95.3 Delay and Skew
95.3.1 Delay constraints
95.3.2 Skew constraints <\/td>\n<\/tr>\n
542<\/td>\n95.4 PMD MDIO function mapping
95.5 PMD functional specifications <\/td>\n<\/tr>\n
543<\/td>\n95.5.1 PMD block diagram
95.5.2 PMD transmit function
95.5.3 PMD receive function <\/td>\n<\/tr>\n
544<\/td>\n95.5.4 PMD global signal detect function
95.5.5 PMD lane-by-lane signal detect function
95.5.6 PMD reset function <\/td>\n<\/tr>\n
545<\/td>\n95.5.7 PMD global transmit disable function (optional)
95.5.8 PMD lane-by-lane transmit disable function (optional)
95.5.9 PMD fault function (optional)
95.5.10 PMD transmit fault function (optional)
95.5.11 PMD receive fault function (optional)
95.6 Lane assignments <\/td>\n<\/tr>\n
546<\/td>\n95.7 PMD to MDI optical specifications for 100GBASE-SR4
95.7.1 100GBASE-SR4 transmitter optical specifications <\/td>\n<\/tr>\n
547<\/td>\n95.7.2 100GBASE-SR4 receive optical specifications
95.7.3 100GBASE-SR4 illustrative link power budget
95.8 Definition of optical parameters and measurement methods <\/td>\n<\/tr>\n
548<\/td>\n95.8.1 Test patterns for optical parameters
95.8.1.1 Multi-lane testing considerations <\/td>\n<\/tr>\n
549<\/td>\n95.8.2 Center wavelength and spectral width
95.8.3 Average optical power
95.8.4 Optical Modulation Amplitude (OMA) <\/td>\n<\/tr>\n
550<\/td>\n95.8.5 Transmitter and dispersion eye closure (TDEC)
95.8.5.1 TDEC conformance test setup
95.8.5.2 TDEC measurement method <\/td>\n<\/tr>\n
553<\/td>\n95.8.6 Extinction ratio
95.8.7 Transmitter optical waveform (transmit eye)
95.8.8 Stressed receiver sensitivity
95.8.8.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n
554<\/td>\n95.8.8.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n
556<\/td>\n95.8.8.3 J2 and J4 Jitter
95.8.8.4 Stressed receiver conformance test signal verification
95.8.8.5 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n
557<\/td>\n95.9 Safety, installation, environment, and labeling
95.9.1 General safety
95.9.2 Laser safety
95.9.3 Installation
95.9.4 Environment
95.9.5 Electromagnetic emission
95.9.6 Temperature, humidity, and handling <\/td>\n<\/tr>\n
558<\/td>\n95.9.7 PMD labeling requirements
95.10 Fiber optic cabling model <\/td>\n<\/tr>\n
559<\/td>\n95.11 Characteristics of the fiber optic cabling (channel)
95.11.1 Optical fiber cable
95.11.2 Optical fiber connection
95.11.2.1 Connection insertion loss
95.11.2.2 Maximum discrete reflectance
95.11.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n
560<\/td>\n95.11.3.1 Optical lane assignments
95.11.3.2 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n
561<\/td>\n95.12 Protocol implementation conformance statement (PICS) proforma for Clause 95, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4
95.12.1 Introduction
95.12.2 Identification
95.12.2.1 Implementation identification
95.12.2.2 Protocol summary <\/td>\n<\/tr>\n
562<\/td>\n95.12.3 Major capabilities\/options <\/td>\n<\/tr>\n
563<\/td>\n95.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4
95.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n
564<\/td>\n95.12.4.2 Management functions
95.12.4.3 PMD to MDI optical specifications for 100GBASE-SR4 <\/td>\n<\/tr>\n
565<\/td>\n95.12.4.4 Optical measurement methods
95.12.4.5 Environmental specifications <\/td>\n<\/tr>\n
566<\/td>\n95.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n
567<\/td>\nAnnex 83A (normative) 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10)
83A.1 Overview <\/td>\n<\/tr>\n
568<\/td>\n83A.1.1 Summary of major concepts
83A.1.2 Rate of operation
83A.2 XLAUI\/CAUI-10 link block diagram <\/td>\n<\/tr>\n
569<\/td>\n83A.2.1 Transmitter compliance points <\/td>\n<\/tr>\n
570<\/td>\n83A.2.2 Receiver compliance points
83A.3 XLAUI\/CAUI-10 electrical characteristics
83A.3.1 Signal levels <\/td>\n<\/tr>\n
571<\/td>\n83A.3.2 Signal paths
83A.3.3 EEE operation
83A.3.4 Transmitter characteristics <\/td>\n<\/tr>\n
572<\/td>\n83A.3.4.1 Output amplitude <\/td>\n<\/tr>\n
573<\/td>\n83A.3.4.1.1 Amplitude and swing
83A.3.4.2 Rise\/fall time
83A.3.4.3 Differential output return loss <\/td>\n<\/tr>\n
574<\/td>\n83A.3.4.4 Common-mode output return loss <\/td>\n<\/tr>\n
575<\/td>\n83A.3.4.5 Transmitter eye mask and transmitter jitter definition <\/td>\n<\/tr>\n
576<\/td>\n83A.3.4.6 Global transmit disable function
83A.3.5 Receiver characteristics
83A.3.5.1 Bit error ratio
83A.3.5.2 Input signal definition <\/td>\n<\/tr>\n
577<\/td>\n83A.3.5.3 Differential input return loss <\/td>\n<\/tr>\n
578<\/td>\n83A.3.5.4 Differential to common-mode input return loss <\/td>\n<\/tr>\n
579<\/td>\n83A.3.5.5 AC-coupling
83A.3.5.6 Jitter tolerance
83A.3.5.7 Global energy detect function <\/td>\n<\/tr>\n
580<\/td>\n83A.4 Interconnect characteristics <\/td>\n<\/tr>\n
581<\/td>\n83A.4.1 Characteristic impedance <\/td>\n<\/tr>\n
582<\/td>\n83A.5 Electrical parameter measurement methods
83A.5.1 Transmit jitter
83A.5.2 Receiver tolerance <\/td>\n<\/tr>\n
583<\/td>\n83A.6 Environmental specifications
83A.6.1 General safety
83A.6.2 Network safety
83A.6.3 Installation and maintenance guidelines
83A.6.4 Electromagnetic compatibility
83A.6.5 Temperature and humidity <\/td>\n<\/tr>\n
584<\/td>\n83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10)
83A.7.1 Introduction
83A.7.2 Identification
83A.7.2.1 Implementation identification
83A.7.2.2 Protocol summary <\/td>\n<\/tr>\n
585<\/td>\n83A.7.3 Major capabilities\/options
83A.7.4 XLAUI\/CAUI-10 transmitter requirements <\/td>\n<\/tr>\n
586<\/td>\n83A.7.5 XLAUI\/CAUI-10 receiver requirements
83A.7.6 Electrical measurement methods
83A.7.7 Environmental specifications <\/td>\n<\/tr>\n
587<\/td>\nAnnex 83B (normative) Chip-to-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100Gb\/s ten-lane Attachment Unit Interface (CAUI-10)
83B.1 Overview <\/td>\n<\/tr>\n
589<\/td>\n83B.2 Compliance point specifications for chip-to-module XLAUI\/CAUI-10 <\/td>\n<\/tr>\n
591<\/td>\n83B.2.1 Module specifications <\/td>\n<\/tr>\n
594<\/td>\n83B.2.2 Host specifications <\/td>\n<\/tr>\n
595<\/td>\n83B.2.3 Host input signal tolerance <\/td>\n<\/tr>\n
596<\/td>\n83B.3 Environmental specifications
83B.3.1 General safety
83B.3.2 Network safety
83B.3.3 Installation and maintenance guidelines
83B.3.4 Electromagnetic compatibility <\/td>\n<\/tr>\n
597<\/td>\n83B.3.5 Temperature and humidity <\/td>\n<\/tr>\n
598<\/td>\n83B.4 Protocol implementation conformance statement (PICS) proforma for Annex 83B, Chip-to-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10)
83B.4.1 Introduction
83B.4.2 Identification
83B.4.2.1 Implementation identification
83B.4.2.2 Protocol summary <\/td>\n<\/tr>\n
599<\/td>\n83B.4.3 Major capabilities\/options
83B.4.4 Module requirements
83B.4.5 Host requirements <\/td>\n<\/tr>\n
600<\/td>\n83B.4.6 Environmental specifications <\/td>\n<\/tr>\n
601<\/td>\nAnnex 83C (informative) PMA sublayer partitioning examples
83C.1 Partitioning examples with FEC
83C.1.1 FEC implemented with PCS <\/td>\n<\/tr>\n
602<\/td>\n83C.1.2 FEC implemented with PMD <\/td>\n<\/tr>\n
603<\/td>\n83C.2 Partitioning examples with RS-FEC
83C.2.1 Single PMA sublayer with RS-FEC <\/td>\n<\/tr>\n
604<\/td>\n83C.2.2 Single CAUI-10 with RS-FEC <\/td>\n<\/tr>\n
605<\/td>\n83C.3 Partitioning examples without FEC
83C.3.1 Single PMA sublayer without FEC
83C.3.2 Single XLAUI\/CAUI-4 without FEC <\/td>\n<\/tr>\n
606<\/td>\n83C.3.3 Separate SERDES for optical module interface <\/td>\n<\/tr>\n
607<\/td>\nAnnex 83D (normative) Chip-to-chip 100Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83D.1 Overview <\/td>\n<\/tr>\n
609<\/td>\n83D.2 CAUI-4 chip-to-chip compliance point definition
83D.3 CAUI-4 chip-to-chip electrical characteristics
83D.3.1 CAUI-4 transmitter characteristics <\/td>\n<\/tr>\n
610<\/td>\n83D.3.1.1 Transmitter equalization settings <\/td>\n<\/tr>\n
611<\/td>\n83D.3.2 Optional EEE operation <\/td>\n<\/tr>\n
612<\/td>\n83D.3.3 CAUI-4 receiver characteristics
83D.3.3.1 Receiver interference tolerance <\/td>\n<\/tr>\n
613<\/td>\n83D.3.3.2 Transmitter equalization feedback (optional) <\/td>\n<\/tr>\n
614<\/td>\n83D.3.4 Global energy detect function for optional EEE operation
83D.4 CAUI-4 chip-to-chip channel characteristics <\/td>\n<\/tr>\n
615<\/td>\n83D.5 Example usage of the optional transmitter equalization feedback
83D.5.1 Overview <\/td>\n<\/tr>\n
616<\/td>\n83D.5.2 Tuning equalization settings on lane 0 in the transmit direction <\/td>\n<\/tr>\n
617<\/td>\n83D.5.3 Tuning equalization settings on lane 0 in the receive direction <\/td>\n<\/tr>\n
618<\/td>\n83D.6 Protocol implementation conformance statement (PICS) proforma for Annex 83D, Chip-to-chip 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83D.6.1 Introduction
83D.6.2 Identification
83D.6.2.1 Implementation identification
83D.6.2.2 Protocol summary <\/td>\n<\/tr>\n
619<\/td>\n83D.6.3 Major capabilities\/options
83D.6.4 PICS proforma tables for chip-to-chip 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83D.6.4.1 Transmitter <\/td>\n<\/tr>\n
620<\/td>\n83D.6.4.2 Receiver
83D.6.4.3 Channel <\/td>\n<\/tr>\n
621<\/td>\nAnnex 83E (normative) Chip-to-module 100Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83E.1 Overview <\/td>\n<\/tr>\n
622<\/td>\n83E.1.1 Bit error ratio <\/td>\n<\/tr>\n
623<\/td>\n83E.2 CAUI-4 chip-to-module compliance point definitions
83E.3 CAUI-4 chip-to-module electrical characteristics
83E.3.1 CAUI-4 host output characteristics <\/td>\n<\/tr>\n
624<\/td>\n83E.3.1.1 Signaling rate and range
83E.3.1.2 Signal levels <\/td>\n<\/tr>\n
625<\/td>\n83E.3.1.3 Output return loss <\/td>\n<\/tr>\n
626<\/td>\n83E.3.1.4 Differential termination mismatch
83E.3.1.5 Transition time <\/td>\n<\/tr>\n
627<\/td>\n83E.3.1.6 Host output eye width and eye height
83E.3.1.6.1 Reference receiver for host output eye width and eye height evaluation <\/td>\n<\/tr>\n
629<\/td>\n83E.3.2 CAUI-4 module output characteristics
83E.3.2.1 Module output eye width and eye height
83E.3.2.1.1 Reference receiver for module output eye width and eye height evaluation <\/td>\n<\/tr>\n
630<\/td>\n83E.3.3 CAUI-4 host input characteristics <\/td>\n<\/tr>\n
631<\/td>\n83E.3.3.1 Input return loss <\/td>\n<\/tr>\n
632<\/td>\n83E.3.3.2 Host stressed input test
83E.3.3.2.1 Host stressed input test procedure <\/td>\n<\/tr>\n
634<\/td>\n83E.3.4 CAUI-4 module input characteristics
83E.3.4.1 Module stressed input test
83E.3.4.1.1 Module stressed input test procedure <\/td>\n<\/tr>\n
637<\/td>\n83E.4 CAUI-4 measurement methodology
83E.4.1 HCB\/MCB characteristics
83E.4.2 Eye width and eye height measurement method <\/td>\n<\/tr>\n
638<\/td>\n83E.4.2.1 Vertical eye closure <\/td>\n<\/tr>\n
639<\/td>\n83E.5 Protocol implementation conformance statement (PICS) proforma for Annex 83E, Chip-to-module 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83E.5.1 Introduction
83E.5.2 Identification
83E.5.2.1 Implementation identification
83E.5.2.2 Protocol summary <\/td>\n<\/tr>\n
640<\/td>\n83E.5.3 Major capabilities\/options
83E.5.4 PICS proforma tables for chip-to-module 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4)
83E.5.4.1 Host output <\/td>\n<\/tr>\n
641<\/td>\n83E.5.4.2 Module output
83E.5.4.3 Host input
83E.5.4.4 Module input <\/td>\n<\/tr>\n
642<\/td>\nAnnex 85A (informative) 40GBASE-CR4 and 100GBASE-CR10 TP0 and TP5 test point parameters
85A.1 Overview
85A.2 Transmitter characteristics at TP0 <\/td>\n<\/tr>\n
643<\/td>\n85A.3 Receiver characteristics at TP5
85A.4 Transmitter and receiver differential printed circuit board trace loss <\/td>\n<\/tr>\n
644<\/td>\n85A.5 Channel insertion loss <\/td>\n<\/tr>\n
645<\/td>\n85A.6 Channel return loss
85A.7 Channel insertion loss deviation (ILD) <\/td>\n<\/tr>\n
646<\/td>\n85A.8 Channel integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n
648<\/td>\nAnnex 86A (normative) Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.1 Overview
86A.2 Block diagram and test points
86A.3 Lane assignments <\/td>\n<\/tr>\n
649<\/td>\n86A.4 Electrical specifications for nPPI
86A.4.1 nPPI host to module electrical specifications <\/td>\n<\/tr>\n
650<\/td>\n86A.4.1.1 Differential return losses at TP1 and TP1a <\/td>\n<\/tr>\n
652<\/td>\n86A.4.2 nPPI module to host electrical specifications
86A.4.2.1 Differential return losses at TP4 and TP4a <\/td>\n<\/tr>\n
653<\/td>\n86A.5 Definitions of electrical parameters and measurement methods
86A.5.1 Test points and compliance boards <\/td>\n<\/tr>\n
654<\/td>\n86A.5.1.1 Compliance board parameters
86A.5.1.1.1 Reference insertion losses of HCB and MCB <\/td>\n<\/tr>\n
655<\/td>\n86A.5.1.1.2 Electrical specifications of mated HCB and MCB <\/td>\n<\/tr>\n
658<\/td>\n86A.5.2 Test patterns and related subclauses
86A.5.3 Parameter definitions
86A.5.3.1 AC common-mode voltage
86A.5.3.2 Termination mismatch <\/td>\n<\/tr>\n
659<\/td>\n86A.5.3.3 Transition time
86A.5.3.4 Data Dependent Pulse Width Shrinkage (DDPWS) <\/td>\n<\/tr>\n
660<\/td>\n86A.5.3.5 Signal to noise ratio Qsq <\/td>\n<\/tr>\n
661<\/td>\n86A.5.3.6 Eye mask for TP1a and TP4
86A.5.3.7 Reference impedances for electrical measurements
86A.5.3.8 Host input signal tolerance
86A.5.3.8.1 Introduction
86A.5.3.8.2 Test equipment and setup <\/td>\n<\/tr>\n
662<\/td>\n86A.5.3.8.3 Stressed eye jitter characteristics <\/td>\n<\/tr>\n
663<\/td>\n86A.5.3.8.4 Calibration <\/td>\n<\/tr>\n
664<\/td>\n86A.5.3.8.5 Calibration procedure
86A.5.3.8.6 Test procedure <\/td>\n<\/tr>\n
665<\/td>\n86A.6 Recommended electrical channel <\/td>\n<\/tr>\n
666<\/td>\n86A.7 Safety, installation, environment, and labeling
86A.7.1 General safety
86A.7.2 Installation
86A.7.3 Environment
86A.7.4 PMD labeling <\/td>\n<\/tr>\n
667<\/td>\n86A.8 Protocol implementation conformance statement (PICS) proforma for Annex 86A, Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.8.1 Introduction
86A.8.2 Identification
86A.8.2.1 Implementation identification
86A.8.2.2 Protocol summary <\/td>\n<\/tr>\n
668<\/td>\n86A.8.3 Major capabilities\/options
86A.8.4 PICS proforma tables for Parallel Physical Interface (nPPI) for 40GBASE- SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI)
86A.8.4.1 PMD functional specifications <\/td>\n<\/tr>\n
669<\/td>\n86A.8.4.2 Electrical specifications for nPPI
86A.8.4.3 Definitions of parameters and measurement methods <\/td>\n<\/tr>\n
670<\/td>\n86A.8.4.4 Environmental and safety specifications <\/td>\n<\/tr>\n
671<\/td>\nAnnex 91A (informative) RS-FEC codeword examples
91A.1 Input to the 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n
672<\/td>\n91A.2 Output of the RS(528,514) encoder
91A.3 Output of the RS(544,514) encoder <\/td>\n<\/tr>\n
673<\/td>\n91A.4 Reed-Solomon encoder model
91A.4.1 Global variable declarations for RS(528,514) <\/td>\n<\/tr>\n
674<\/td>\n91A.4.2 Global variable declarations for RS(544,514)
91A.4.3 Other global variable declarations
91A.4.4 GF(210) multiplier function
91A.4.5 Reed-Solomon encoder function <\/td>\n<\/tr>\n
675<\/td>\n91A.4.6 Main function <\/td>\n<\/tr>\n
676<\/td>\nAnnex 92A (informative) 100GBASE-CR4 TP0 and TP5 test point parameters and channel characteristics
92A.1 Overview
92A.2 Transmitter characteristics at TP0
92A.3 Receiver characteristics at TP5
92A.4 Transmitter and receiver differential printed circuit board trace loss <\/td>\n<\/tr>\n
677<\/td>\n92A.5 Channel insertion loss <\/td>\n<\/tr>\n
679<\/td>\n92A.6 Channel return loss
92A.7 Channel Operating Margin (COM) <\/td>\n<\/tr>\n
680<\/td>\nAnnex 93A (normative) Specification methods for electrical channels
93A.1 Channel Operating Margin <\/td>\n<\/tr>\n
682<\/td>\n93A.1.1 Measurement of the channel
93A.1.2 Transmitter and receiver device package models <\/td>\n<\/tr>\n
683<\/td>\n93A.1.2.1 Cascade connection of two-port networks
93A.1.2.2 Two-port network for a shunt capacitance
93A.1.2.3 Two-port network for the package transmission line <\/td>\n<\/tr>\n
684<\/td>\n93A.1.2.4 Assembly of transmitter and receiver device package models <\/td>\n<\/tr>\n
685<\/td>\n93A.1.3 Path terminations
93A.1.4 Filters
93A.1.4.1 Receiver noise filter
93A.1.4.2 Transmitter equalizer <\/td>\n<\/tr>\n
686<\/td>\n93A.1.4.3 Receiver equalizer
93A.1.5 Pulse response
93A.1.6 Determination of variable equalizer parameters <\/td>\n<\/tr>\n
688<\/td>\n93A.1.7 Interference and noise amplitude
93A.1.7.1 Interference amplitude distribution <\/td>\n<\/tr>\n
689<\/td>\n93A.1.7.2 Noise amplitude distribution
93A.1.7.3 Combination of interference and noise distributions <\/td>\n<\/tr>\n
690<\/td>\n93A.2 Test channel calibration using COM <\/td>\n<\/tr>\n
691<\/td>\n93A.3 Fitted insertion loss <\/td>\n<\/tr>\n
692<\/td>\n93A.4 Insertion loss deviation <\/td>\n<\/tr>\n
693<\/td>\nAnnex 93B (informative) Electrical backplane reference model <\/td>\n<\/tr>\n
694<\/td>\nAnnex 93C (normative) Receiver interference tolerance
93C.1 Test setup <\/td>\n<\/tr>\n
697<\/td>\n93C.2 Test method <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Ethernet<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
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