{"id":400484,"date":"2024-10-20T04:50:20","date_gmt":"2024-10-20T04:50:20","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-1481-2019-2\/"},"modified":"2024-10-26T08:38:08","modified_gmt":"2024-10-26T08:38:08","slug":"ieee-1481-2019-2","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-1481-2019-2\/","title":{"rendered":"IEEE 1481-2019"},"content":{"rendered":"

Revision Standard – Active. Ways for integrated circuit designers to analyze chip timing and power consistently across a broad set of electric design automation (EDA) applications are covered in this standard. Methods by which integrated circuit vendors can express timing and power information once per given technology are also covered. In addition, the means by which EDA vendors can meet their application performance and capacity needs are discussed.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nIEEE Std 1481-2019 <\/td>\n<\/tr>\n
2<\/td>\nTitle Page <\/td>\n<\/tr>\n
4<\/td>\nNotice and Disclaimer of Liability Concerning the Use of IEEE Standards Documents
Translations <\/td>\n<\/tr>\n
5<\/td>\nOfficial statements
Comments on standards
Laws and regulations
Copyrights
Photocopies <\/td>\n<\/tr>\n
6<\/td>\nUpdating of IEEE Standards documents
Errata
Patents <\/td>\n<\/tr>\n
7<\/td>\nParticipants <\/td>\n<\/tr>\n
8<\/td>\nIntroduction
Acknowledgments <\/td>\n<\/tr>\n
9<\/td>\nContents <\/td>\n<\/tr>\n
17<\/td>\nFigures <\/td>\n<\/tr>\n
18<\/td>\nTables <\/td>\n<\/tr>\n
28<\/td>\nBNF Syntax <\/td>\n<\/tr>\n
31<\/td>\n1. Overview
1.1 Scope
1.2 Purpose
1.3 Introduction <\/td>\n<\/tr>\n
32<\/td>\n1.4 Word usage <\/td>\n<\/tr>\n
33<\/td>\n2. Normative references
3. Definitions <\/td>\n<\/tr>\n
41<\/td>\n4. Acronyms and abbreviations <\/td>\n<\/tr>\n
42<\/td>\n5. Typographical conventions
5.1 Syntactic elements <\/td>\n<\/tr>\n
43<\/td>\n5.2 Conventions
6. DPCS flow
6.1 Overview <\/td>\n<\/tr>\n
45<\/td>\n6.1.1 Procedural interface
6.1.2 Global policies and conventions
6.2 Flow of control
6.3 DPCM\u2014application relationships <\/td>\n<\/tr>\n
46<\/td>\n6.3.1 Technology library
6.3.2 Subrule
6.4 Interoperability
7. Delay calculation language (DCL)
7.1 Character set
7.2 Lexical elements <\/td>\n<\/tr>\n
47<\/td>\n7.2.1 Whitespace
7.2.2 Comments
7.2.3 Tokens
7.2.3.1 Keyword <\/td>\n<\/tr>\n
49<\/td>\n7.2.3.2 Identifier <\/td>\n<\/tr>\n
50<\/td>\n7.2.3.3 Double quoted character sequence
7.2.3.4 Predefined references to Standard Structure fields <\/td>\n<\/tr>\n
53<\/td>\n7.2.3.5 Compiler generated predefined identifiers <\/td>\n<\/tr>\n
57<\/td>\n7.3 Context
7.3.1 Space
7.3.2 Plane
7.3.3 Context operation
7.3.4 Library parallelism <\/td>\n<\/tr>\n
58<\/td>\n7.3.5 Application parallelism
7.4 Data types
7.4.1 Base types
7.4.2 Native data types
7.4.3 Mathematical calculation data types <\/td>\n<\/tr>\n
59<\/td>\n7.4.3.1 C types
7.4.3.2 COMPLEX type
7.4.4 Pointer data types
7.4.4.1 STRING
7.4.4.2 PIN
7.4.4.3 PINLIST
7.4.4.4 VOID
7.4.5 Aggregate data types <\/td>\n<\/tr>\n
60<\/td>\n7.4.5.1 Result types
7.4.5.1.1 TRANSIENT attribute <\/td>\n<\/tr>\n
61<\/td>\n7.4.5.2 Abstract type
7.4.5.3 Statement types <\/td>\n<\/tr>\n
62<\/td>\n7.4.5.3.1 Array types <\/td>\n<\/tr>\n
63<\/td>\n7.4.5.3.2 Modification of data
7.4.5.3.2.1 Var permissions
7.4.5.3.3 Type conversions
7.4.5.3.3.1 Implicit conversions <\/td>\n<\/tr>\n
64<\/td>\n7.4.5.3.3.2 Explicit conversions
7.4.5.3.3.3 Abstract type conversion <\/td>\n<\/tr>\n
65<\/td>\n7.4.5.3.3.4 Transient conversions
7.4.5.3.3.5 SHARED attribute
7.4.5.3.3.6 SYNC attribute
7.5 Identifiers
7.5.1 Name spaces of identifiers
7.5.2 Storage durations of objects <\/td>\n<\/tr>\n
66<\/td>\n7.5.3 Scope of identifiers <\/td>\n<\/tr>\n
67<\/td>\n7.5.4 Linkages of identifiers
7.5.4.1 EXPORT
7.5.4.2 IMPORT
7.5.4.3 FORWARD
7.5.4.4 OPTIONAL
7.5.4.5 Chaining of EXPOSE identifiers
7.6 Operator descriptions
7.6.1 String prefix operator
7.6.2 Explicit string prefix operator <\/td>\n<\/tr>\n
68<\/td>\n7.6.3 Embedded string prefix operator
7.6.4 String prefix semantics
7.6.5 Assignment operator
7.6.6 New operator
7.6.6.1 Memory management <\/td>\n<\/tr>\n
69<\/td>\n7.6.6.2 AGGREGATE directive
7.6.6.3 Destructor statements
7.6.7 SCOPE operator(s) <\/td>\n<\/tr>\n
70<\/td>\n7.6.8 Launch operator
7.6.9 Purity operator <\/td>\n<\/tr>\n
71<\/td>\n7.6.10 Force operator
7.7 Timing propagation <\/td>\n<\/tr>\n
72<\/td>\n7.7.1 Timing checks
7.7.2 Test mode operators
7.7.2.1 CGHT
7.7.2.1.1 CGPW
7.7.2.2 CGST
7.7.2.3 CPW <\/td>\n<\/tr>\n
73<\/td>\n7.7.2.4 CST
7.7.2.5 DHT
7.7.2.6 DIFFERENTIAL_SKEW
7.7.2.7 DPW
7.7.2.8 DST
7.7.2.9 HOLD
7.7.2.10 NOCHANGE <\/td>\n<\/tr>\n
74<\/td>\n7.7.2.11 RECOVERY
7.7.2.12 REMOVAL
7.7.2.13 SETUP
7.7.2.14 SKEW
7.8 Expressions <\/td>\n<\/tr>\n
75<\/td>\n7.8.1 Array subscripting
7.8.2 Statement calls
7.8.3 General syntax
7.8.4 Method statement calls <\/td>\n<\/tr>\n
76<\/td>\n7.8.5 Assign variable reference
7.8.6 Store variable reference
7.8.7 Mathematical expressions <\/td>\n<\/tr>\n
77<\/td>\n7.8.8 Mathematical operators <\/td>\n<\/tr>\n
78<\/td>\n7.8.9 Discrete math expression <\/td>\n<\/tr>\n
79<\/td>\n7.8.10 INT discrete
7.8.11 PINLIST discrete
7.8.12 Logical expressions and operators
7.8.13 MODE expressions
7.8.13.1 Pin range
7.8.13.2 Pin range syntax <\/td>\n<\/tr>\n
80<\/td>\n7.8.13.3 Pin range semantics
7.8.13.4 Constraints <\/td>\n<\/tr>\n
81<\/td>\n7.8.14 Embedded C code expressions <\/td>\n<\/tr>\n
82<\/td>\n7.8.15 Computation order
7.8.15.1 Precedence for mathematical expressions
7.8.15.2 Precedence for logical expressions <\/td>\n<\/tr>\n
83<\/td>\n7.8.15.3 Passed parameters
7.8.15.4 WHEN clause
7.8.15.4.1 Break
7.8.15.4.2 Continue
7.8.15.5 REPEAT – UNTIL clause
7.8.15.6 WHILE loops
7.8.15.7 FOR clause
7.8.15.8 LOCK clause
7.8.15.8.1 WRITE_LOCK <\/td>\n<\/tr>\n
84<\/td>\n7.8.15.8.2 READ_LOCK
7.8.15.8.3 WAIT
7.8.15.8.4 BUSY
7.8.15.8.5 RETRY
7.9 DCL mathematical statements
7.9.1 Statement names
7.9.1.1 PASSED clause <\/td>\n<\/tr>\n
85<\/td>\n7.9.1.2 RESULT clause
7.9.1.3 Result prototypes
7.9.1.3.1 Conditional logic <\/td>\n<\/tr>\n
86<\/td>\n7.9.1.4 Default variable <\/td>\n<\/tr>\n
87<\/td>\n7.9.1.5 LOCAL clause
7.9.1.5.1 LOCAL conditional logic
7.9.1.5.2 Local variables
7.9.1.5.3 Local variable definition
7.9.1.5.4 Local clause placement <\/td>\n<\/tr>\n
88<\/td>\n7.9.1.6 DEFAULT clause
7.9.2 Modifiers
7.9.2.1 Statement purity <\/td>\n<\/tr>\n
89<\/td>\n7.9.2.2 Statement consistency
7.9.2.3 Locking modifiers <\/td>\n<\/tr>\n
90<\/td>\n7.9.2.3.1 AUTOLOCK
7.9.2.3.2 LOCK
7.9.2.4 Context modifiers
7.9.2.4.1 COMMON
7.9.2.5 Access modifiers
7.9.2.5.1 SHARED
7.9.2.5.2 SYNC
7.9.3 Prototypes <\/td>\n<\/tr>\n
91<\/td>\n7.9.3.1 Prototype modifiers
7.9.3.2 TABLEDEF prototype <\/td>\n<\/tr>\n
92<\/td>\n7.9.3.3 LOAD_TABLE, UNLOAD_TABLE and WRITE_TABLE prototypes
7.9.3.4 ADD_ROW and DELETE_ROW prototypes
7.9.3.5 DELAY and SLEW prototypes
7.9.3.6 CHECK prototype
7.9.3.7 SUBMODEL prototype <\/td>\n<\/tr>\n
93<\/td>\n7.9.4 Statement failure
7.9.5 Type definition statements
7.9.5.1 TYPEDEF
7.9.5.1.1 TYPEDEF RESULT clause <\/td>\n<\/tr>\n
94<\/td>\n7.9.6 Interfacing statements
7.9.6.1 EXPOSE statement
7.9.6.1.1 FIRST modifier
7.9.6.1.2 LEADING modifier <\/td>\n<\/tr>\n
95<\/td>\n7.9.6.1.3 TRAILING modifier
7.9.6.1.4 LAST modifier
7.9.6.2 EXTERNAL statement
7.9.6.2.1 PROXY
7.9.6.3 INTERNAL statement <\/td>\n<\/tr>\n
96<\/td>\n7.9.7 DCL to C communication
7.9.7.1 Built-in label
7.9.7.2 dcm_rc
7.9.8 Constant statement <\/td>\n<\/tr>\n
97<\/td>\n7.9.9 Calculation statements
7.9.9.1 CALC statement
7.9.9.2 ASSIGN statement
7.9.9.3 DELAY statement <\/td>\n<\/tr>\n
98<\/td>\n7.9.9.3.1 EARLY and LATE clauses and result variables
7.9.9.3.2 DEFAULT modifier for DELAY statements
7.9.9.4 SLEW statement
7.9.9.4.1 EARLY and LATE clauses and result fields
7.9.9.4.2 DEFAULT modifier for slew statements <\/td>\n<\/tr>\n
99<\/td>\n7.9.9.5 CHECK
7.9.10 METHOD statement <\/td>\n<\/tr>\n
100<\/td>\n7.9.10.1 Default action statement
7.9.10.2 Selection of action statement
7.10 Predefined types
7.10.1 ACTIVITY_HISTORY_TYPE
7.10.1.1 next <\/td>\n<\/tr>\n
101<\/td>\n7.10.1.2 refobj
7.10.1.3 reserved
7.10.1.4 activityCode
7.10.2 HISTORY_TYPE
7.10.2.1 info <\/td>\n<\/tr>\n
102<\/td>\n7.10.2.2 activity
7.10.2.3 kind
7.10.3 LOAD_HISTORY_TYPE
7.10.3.1 ruleHistory <\/td>\n<\/tr>\n
103<\/td>\n7.10.3.2 reserved1, reserved2, reserved3, reserved4
7.10.3.3 techName
7.10.4 CELL_LIST_TYPE
7.10.5 TECH_TYPE
7.10.5.1 TECH_TYPE field: name
7.10.5.2 TECH_TYPE field: DEFAULT
7.10.5.3 TECH_TYPE fields: dcmInfo and reserved
7.10.6 DELAY_REC_TYPE <\/td>\n<\/tr>\n
104<\/td>\n7.10.7 SLEW_REC_TYPE
7.10.8 CHECK_REC_TYPE
7.10.9 CCDB_TYPE
7.10.10 CELL_DATA_TYPE
7.10.11 PCDB_TYPE <\/td>\n<\/tr>\n
105<\/td>\n7.10.12 PIN_ASSOCIATION
7.10.13 PATH_DATA_TYPE
7.10.14 STD STRUCT <\/td>\n<\/tr>\n
106<\/td>\n7.11 Predefined variables
7.11.1 ARGV
7.11.2 CONTROL_PARM
7.12 Built-in function calls <\/td>\n<\/tr>\n
107<\/td>\n7.12.1 ABS
7.12.2 Complex number components
7.12.2.1 IMAG_PART
7.12.2.2 REAL_PART
7.12.3 EXPAND
7.12.4 Array functions
7.12.4.1 IS_EMPTY <\/td>\n<\/tr>\n
108<\/td>\n7.12.4.2 NUM_DIMENSIONS
7.12.4.3 NUM_ELEMENTS
7.12.5 Messaging functions
7.12.5.1 ISSUE_MESSAGE
7.12.5.1.1 Arguments <\/td>\n<\/tr>\n
109<\/td>\n7.12.5.1.2 Result
7.12.5.2 PRINT_VALUE
7.12.5.3 SOURCE_STRANDS_MSB
7.12.5.4 SOURCE_STRANDS_LSB <\/td>\n<\/tr>\n
110<\/td>\n7.12.5.5 SINK_STRANDS_MSB
7.12.5.6 SINK_STRANDS_LSB
7.13 Tables
7.13.1 TABLEDEF statement <\/td>\n<\/tr>\n
111<\/td>\n7.13.1.1 QUALIFIERS clause
7.13.1.2 DATA clause
7.13.1.3 KEY clause
7.13.1.4 OVERRIDE modifier <\/td>\n<\/tr>\n
112<\/td>\n7.13.1.5 SUPPRESS modifier
7.13.1.6 DESCRIPTOR modifier
7.13.1.7 DYNAMIC modifier
7.13.1.8 DEFAULT clause
7.13.2 Table visibility rules <\/td>\n<\/tr>\n
113<\/td>\n7.13.3 TABLE statement
7.13.3.1 Static tables <\/td>\n<\/tr>\n
114<\/td>\n7.13.3.2 PROTOTYPE_RECORD row
7.13.3.3 DEFAULT row
7.13.3.4 Default operator as table row qualifier <\/td>\n<\/tr>\n
115<\/td>\n7.13.3.5 Default operator in a table reference
7.13.3.6 String prefix operator
7.13.3.7 Qualifier matching
7.13.3.8 COMPRESSED modifier
7.13.3.9 Duplicate table rows
7.13.3.10 Dynamic tables <\/td>\n<\/tr>\n
116<\/td>\n7.13.3.10.1 Dynamic table syntax
7.13.3.10.2 Limitations
7.13.3.10.3 Dynamic table manipulation
7.13.4 LOAD_TABLE statement
7.13.4.1 Restrictions <\/td>\n<\/tr>\n
117<\/td>\n7.13.4.2 TABLEDEF clause
7.13.4.3 Result value
7.13.4.4 FILE clause
7.13.4.5 SUFFIX clause
7.13.4.6 FILTER clause
7.13.4.7 PATH clause
7.13.4.8 DEFAULT clause <\/td>\n<\/tr>\n
118<\/td>\n7.13.4.9 REPLACE modifier
7.13.4.10 Descriptor
7.13.5 UNLOAD_TABLE statement
7.13.5.1 Descriptor <\/td>\n<\/tr>\n
119<\/td>\n7.13.5.2 APPENDABLE modifier
7.13.5.3 BINARY modifier
7.13.5.4 FREE_SPACE modifier
7.13.5.5 INTERNAL modifier
7.13.6 WRITE_TABLE statement
7.13.6.1 Descriptor
7.13.7 ADD_ROW statement <\/td>\n<\/tr>\n
120<\/td>\n7.13.7.1 TABLEDEF clause
7.13.7.2 Passed parameters
7.13.7.3 DEFAULT clause
7.13.7.4 REPLACE modifier
7.13.7.5 Result value
7.13.7.5.1 Descriptor
7.13.8 DELETE_ROW statement <\/td>\n<\/tr>\n
121<\/td>\n7.13.8.1 TABLEDEF clause
7.13.8.2 Passed parameters
7.13.8.3 Result value
7.13.8.4 DEFAULT clause
7.13.8.4.1 Descriptor
7.14 Built-in library functions
7.14.1 Numeric conversion functions
7.14.1.1 floor <\/td>\n<\/tr>\n
122<\/td>\n7.14.1.2 ifloor
7.14.1.3 ceil
7.14.1.4 iceil
7.14.1.5 rint
7.14.1.6 round <\/td>\n<\/tr>\n
123<\/td>\n7.14.1.7 trunc
7.14.1.8 itrunc
7.14.2 Tech_family functions
7.14.2.1 map_tech_family
7.14.2.2 current_tech_type <\/td>\n<\/tr>\n
124<\/td>\n7.14.2.3 subrule_tech_type
7.14.2.4 is_expose_in_tech
7.14.2.5 get_technology_list
7.14.3 Trigonometric functions
7.14.3.1 cos
7.14.3.2 sin <\/td>\n<\/tr>\n
125<\/td>\n7.14.3.3 tan
7.14.4 Context manipulation functions
7.14.4.1 new_plane
7.14.4.2 get_plane_name
7.14.4.3 get_space_name
7.14.4.4 get_max_spaces <\/td>\n<\/tr>\n
126<\/td>\n7.14.4.5 get_max_planes
7.14.4.6 get_space_coordinate
7.14.4.7 get_plane_coordinate
7.14.4.8 set_busy_wait <\/td>\n<\/tr>\n
127<\/td>\n7.14.5 Debug controls
7.14.5.1 change_debug_level
7.14.5.2 get_caller_stack
7.14.6 Utility functions
7.14.6.1 GET_LOAD_HISTORY
7.14.6.1.1 loadHistory <\/td>\n<\/tr>\n
128<\/td>\n7.14.6.1.2 reserved
7.14.6.2 GET_CELL_LIST
7.14.7 Table functions
7.14.7.1 GET_ROW_COUNT
7.14.7.2 STEP_TABLE <\/td>\n<\/tr>\n
129<\/td>\n7.14.8 Subrule controls
7.14.8.1 GET_LOAD_PATH
7.14.8.2 GET_RULE_NAME
7.14.8.3 ADD_RULE
7.14.8.3.1 ruleName
7.14.8.3.2 rulePath
7.14.8.3.3 tablePath <\/td>\n<\/tr>\n
130<\/td>\n7.14.8.3.4 controlParm
7.15 Library control statements
7.15.1 Meta-variables
7.15.2 TECH_FAMILY
7.15.3 RULENAME
7.15.4 CONTROL_PARM
7.15.5 SUBRULE statement <\/td>\n<\/tr>\n
131<\/td>\n7.15.5.1 OPTIONAL modifier
7.15.5.2 RULE_PATH clause
7.15.5.3 TABLE_PATH clause
7.15.6 Path list expansion rules <\/td>\n<\/tr>\n
132<\/td>\n7.15.7 SUBRULES statement
7.15.7.1 FILE_PATH clause
7.15.7.2 FILE clause
7.15.8 Control file
7.15.8.1 Directives <\/td>\n<\/tr>\n
133<\/td>\n7.15.8.2 Default record fields
7.15.8.3 Load and default record fields <\/td>\n<\/tr>\n
134<\/td>\n7.15.8.4 Using a default value in the load or default record
7.15.9 TECH_FAMILY statement
7.15.9.1 TECH_FAMILY name <\/td>\n<\/tr>\n
135<\/td>\n7.15.9.2 MAIN option
7.15.10 SUBRULE and SUBRULES statements
7.16 Modeling
7.16.1 Types of modeling
7.16.1.1 Timing
7.16.1.2 Function modeling <\/td>\n<\/tr>\n
136<\/td>\n7.16.1.3 Vector power and vector timing modeling
7.16.2 Model organization
7.16.2.1 MODEL statement <\/td>\n<\/tr>\n
137<\/td>\n7.16.2.1.1 Model name matching
7.16.3 MODELPROC statement <\/td>\n<\/tr>\n
138<\/td>\n7.16.3.1 MODELPROC flow of control
7.16.3.2 MONOLITHIC modifier
7.16.4 SUBMODEL statement <\/td>\n<\/tr>\n
139<\/td>\n7.16.4.1 Model consistency information
7.16.4.2 The PASSED clause
7.16.4.3 The RESULT clause
7.16.4.4 KEY clause <\/td>\n<\/tr>\n
140<\/td>\n7.16.4.5 USING clause
7.16.4.6 CONSISTENT clause
7.16.4.7 The END clause
7.16.5 Modeling statements
7.16.5.1 PATH_SEPARATOR statement
7.16.5.2 PATH statement <\/td>\n<\/tr>\n
142<\/td>\n7.16.5.2.1 VAR clause
7.16.5.2.2 Path list
7.16.5.2.3 FROM clause
7.16.5.2.4 TO clause <\/td>\n<\/tr>\n
143<\/td>\n7.16.5.2.5 PROPAGATION sequence <\/td>\n<\/tr>\n
144<\/td>\n7.16.5.2.6 Data type sequence
7.16.5.2.7 DATA_TYPE clause <\/td>\n<\/tr>\n
145<\/td>\n7.16.5.2.8 SOURCE_STRANDS clause
7.16.5.2.9 SINK_STRANDS clause
7.16.5.2.10 ROUTE clause
7.16.5.3 BUS statement <\/td>\n<\/tr>\n
146<\/td>\n7.16.5.4 TEST statement
7.16.5.4.1 Compare_list <\/td>\n<\/tr>\n
147<\/td>\n7.16.5.4.2 COMPARE clause
7.16.5.4.3 EDGES clause <\/td>\n<\/tr>\n
148<\/td>\n7.16.5.4.4 TEST_TYPE clause
7.16.5.4.5 CHECKS clause <\/td>\n<\/tr>\n
149<\/td>\n7.16.5.4.6 METHODS clause
7.16.5.4.7 STORE clause
7.16.6 TEST_BUS statement <\/td>\n<\/tr>\n
150<\/td>\n7.16.7 INPUT statement <\/td>\n<\/tr>\n
151<\/td>\n7.16.7.1 Propagation clause
7.16.7.2 METHODS clause
7.16.7.3 STORE clause <\/td>\n<\/tr>\n
153<\/td>\n7.16.7.4 KEY store modifier
7.16.8 OUTPUT statement <\/td>\n<\/tr>\n
154<\/td>\n7.16.8.1 METHODS clause
7.16.8.2 STORE clause
7.16.9 DO statement
7.16.9.1 DO statement scope
7.16.9.2 DO statement nodes
7.16.9.3 Looping constructs
7.16.9.4 FOR loops <\/td>\n<\/tr>\n
155<\/td>\n7.16.9.5 WHILE loops
7.16.9.6 REPEAT loops
7.16.9.7 BREAK processing
7.16.9.8 CONTINUE processing <\/td>\n<\/tr>\n
156<\/td>\n7.16.9.9 Statement reference
7.16.9.10 DO statement brace scope <\/td>\n<\/tr>\n
157<\/td>\n7.16.9.11 Node_sequence grammar
7.16.9.11.1 NODE clause
7.16.9.11.2 COND_NODE clause
7.16.9.11.3 PIN clause <\/td>\n<\/tr>\n
158<\/td>\n7.16.9.11.4 REPLACE operator
7.16.9.11.5 PRIMITIVE clause <\/td>\n<\/tr>\n
171<\/td>\n7.16.9.11.6 MODIFIERS clause <\/td>\n<\/tr>\n
172<\/td>\n7.16.9.11.7 OBJTYPE clause <\/td>\n<\/tr>\n
173<\/td>\n7.16.9.12 Function_sequence grammar <\/td>\n<\/tr>\n
174<\/td>\n7.16.9.12.1 FUNCTION clause
7.16.9.13 Vector_sequence grammar
7.16.9.14 VECTOR clause <\/td>\n<\/tr>\n
175<\/td>\n7.16.9.15 IMPORT and EXPORT sequences
7.16.10 PROPERTIES statement <\/td>\n<\/tr>\n
176<\/td>\n7.16.11 SETVAR statement <\/td>\n<\/tr>\n
177<\/td>\n7.17 Embedded C code
7.18 Definition of a subrule <\/td>\n<\/tr>\n
178<\/td>\n7.19 Pragma
7.19.1 IMPORT_EXPORT_TAG
8. Power modeling and calculation
8.1 Power overview <\/td>\n<\/tr>\n
179<\/td>\n8.2 Caching state information
8.2.1 Initializing the state cache
8.2.2 State cache lifetime
8.3 Caching load and slew information <\/td>\n<\/tr>\n
180<\/td>\n8.3.1 Loading the load and slew cache
8.3.2 Load and slew cache lifetime <\/td>\n<\/tr>\n
181<\/td>\n8.4 Simulation switching events
8.5 Partial swing events
8.6 Power calculation <\/td>\n<\/tr>\n
183<\/td>\n8.7 Accumulation of power consumption by the design
8.8 Group Pin List syntax and semantics
8.8.1 Syntax <\/td>\n<\/tr>\n
184<\/td>\n8.8.2 Semantics
8.8.2.1 Interpreting ANYIN or ANYOUT in a GroupPinString
8.8.2.2 Interpreting ALLIN or ALLOUT in a GroupPinString
8.8.3 Example
8.9 Group Condition List syntax and semantics <\/td>\n<\/tr>\n
185<\/td>\n8.9.1 Syntax
8.9.2 Semantics
8.9.3 Example
8.10 Sensitivity list syntax and semantics <\/td>\n<\/tr>\n
186<\/td>\n8.10.1 Syntax
8.10.2 Semantics
8.10.3 Example
8.11 Group condition language <\/td>\n<\/tr>\n
187<\/td>\n8.11.1 Syntax
8.11.2 Semantics
8.11.2.1 Semantic rules for PinName and PinNameId
8.11.2.1.1 Interpreting ANYIN and ANYOUT in a condition_expression <\/td>\n<\/tr>\n
188<\/td>\n8.11.2.1.2 Interpreting ALLIN and ALLOUT in a condition_expression
8.11.2.2 Semantic rules for PinName_Identifier (named Pid)
8.11.2.3 Semantic rules for PinName_Level (named Plevel)
8.11.2.4 Semantic rules for PinName_State (shorthand operators) <\/td>\n<\/tr>\n
189<\/td>\n8.11.2.5 Condition expression labels
8.11.2.6 Condition expression operators
8.11.2.6.1 Semantics for Z (high Z) state
8.11.2.6.2 Semantics for X (unknown) state
8.11.3 Condition expression operator precedence
8.11.4 Condition expressions referencing pin states and transitions <\/td>\n<\/tr>\n
190<\/td>\n8.11.5 Semantics of nonexistent pins
9. Application and library interaction
9.1 behavior model domain <\/td>\n<\/tr>\n
191<\/td>\n9.2 vectorTiming and vectorPower model domains
9.2.1 Power unit conversion
9.2.2 Vector power calculation <\/td>\n<\/tr>\n
192<\/td>\n10. Procedural interface (PI)
10.1 Overview
10.1.1 DPCM <\/td>\n<\/tr>\n
193<\/td>\n10.1.2 Application
10.1.3 libdcmlr
10.2 Control and data flow
10.3 Architectural requirements <\/td>\n<\/tr>\n
194<\/td>\n10.4 Data ownership technique
10.4.1 Persistence of data passed across the PI
10.4.2 Data cache guidelines for the DPCM <\/td>\n<\/tr>\n
195<\/td>\n10.4.3 Application\/DPCM interaction
10.4.4 Application initializes message\/memory handling
10.4.5 Application loads and initializes the DPCM
10.4.6 Application requests timing models for cell instances
10.5 Model domain issues
10.5.1 Model domain selection <\/td>\n<\/tr>\n
196<\/td>\n10.5.2 Model domain determination
10.5.3 DPCM invokes application modeling callback functions
10.5.4 Application requests propagation delay <\/td>\n<\/tr>\n
197<\/td>\n10.5.5 DPCM calls application EXTERNAL functions
10.6 Reentry requirements
10.7 Application responsibilities when using a DPCM
10.7.1 Standard Structure rules <\/td>\n<\/tr>\n
198<\/td>\n10.7.2 User object registration
10.7.3 Selection of early and late slew values <\/td>\n<\/tr>\n
199<\/td>\n10.7.4 Semantics of slew values
10.7.5 Slew calculations
10.8 Application use of the DPCM
10.8.1 Initialization of the DPCM <\/td>\n<\/tr>\n
200<\/td>\n10.8.1.1 Standard Structure management
10.8.1.2 Tech_family
10.8.2 Context creation
10.8.3 Dynamic linking <\/td>\n<\/tr>\n
201<\/td>\n10.8.3.1 Linking order
10.8.4 Subrule initialization <\/td>\n<\/tr>\n
202<\/td>\n10.8.5 Use of the DPCM
10.8.6 Application control
10.8.7 Application execution
10.8.8 Termination of DPCM <\/td>\n<\/tr>\n
203<\/td>\n10.9 DPCM library organization
10.9.1 Multiple technologies
10.9.2 Model names
10.9.3 DPCM error handling <\/td>\n<\/tr>\n
204<\/td>\n10.10 C level language for EXPOSE and EXTERNAL functions
10.10.1 Integer return code
10.10.2 The Standard Structure pointer
10.10.3 Result structure pointer
10.10.4 Passed arguments <\/td>\n<\/tr>\n
205<\/td>\n10.10.5 DCL array indexing
10.10.6 Conversion to C data types
10.10.7 include files <\/td>\n<\/tr>\n
206<\/td>\n10.11 PIN and BLOCK data structure requirements <\/td>\n<\/tr>\n
207<\/td>\n10.12 DCM_STD_STRUCT Standard Structure <\/td>\n<\/tr>\n
209<\/td>\n10.12.1 Alternate semantics for Standard Structure fields <\/td>\n<\/tr>\n
210<\/td>\n10.12.2 Reserved fields
10.12.3 Standard Structure value restriction
10.13 DCMTransmittedInfo structure
10.14 Environment or user variables
10.15 Procedural interface (PI) functions summary
10.15.1 Expose functions <\/td>\n<\/tr>\n
218<\/td>\n10.15.2 External functions <\/td>\n<\/tr>\n
221<\/td>\n10.15.3 Deprecated functions <\/td>\n<\/tr>\n
223<\/td>\n10.16 Implicit functions
10.16.1 libdcmlr <\/td>\n<\/tr>\n
224<\/td>\n10.16.2 Run-time library utility functions
10.16.2.1 Module control functions
10.16.3 Memory control functions <\/td>\n<\/tr>\n
225<\/td>\n10.16.4 Message and error control functions <\/td>\n<\/tr>\n
226<\/td>\n10.16.5 Calculation functions
10.16.6 Modeling functions
10.17 PI function table description <\/td>\n<\/tr>\n
227<\/td>\n10.17.1 Arguments
10.17.1.1 Standard Structure fields <\/td>\n<\/tr>\n
228<\/td>\n10.17.2 DCL syntax
10.17.3 C syntax
10.18 PI function descriptions
10.18.1 Interconnect loading related functions
10.18.1.1 appGetTotalLoadCapacitanceByPin
10.18.1.2 appGetTotalLoadCapacitanceByName <\/td>\n<\/tr>\n
229<\/td>\n10.18.1.3 appGetTotalPinCapacitanceByPin
10.18.1.4 appGetTotalPinCapacitanceByName <\/td>\n<\/tr>\n
230<\/td>\n10.18.1.5 appGetSourcePinCapacitanceByPin
10.18.1.6 appGetSourcePinCapacitanceByName <\/td>\n<\/tr>\n
231<\/td>\n10.18.1.7 dpcmGetDefCellSize
10.18.1.8 appGetCellCoordinates <\/td>\n<\/tr>\n
232<\/td>\n10.18.1.9 appGetCellOrientation
10.18.1.10 dpcmGetEstLoadCapacitance <\/td>\n<\/tr>\n
233<\/td>\n10.18.1.11 dpcmGetEstWireCapacitance
10.18.1.12 dpcmGetEstWireResistance <\/td>\n<\/tr>\n
234<\/td>\n10.18.1.13 dpcmGetPinCapacitance
10.18.1.14 dpcmGetCellIOlists <\/td>\n<\/tr>\n
235<\/td>\n10.18.2 Interconnect delay related functions
10.18.2.1 appGetRC <\/td>\n<\/tr>\n
236<\/td>\n10.18.2.2 dpcmGetDelayGradient
10.18.2.3 dpcmGetSlewGradient <\/td>\n<\/tr>\n
237<\/td>\n10.18.2.4 dpcmGetEstimateRC
10.18.2.5 dpcmGetDefPortSlew
10.18.2.6 dpcmGetDefPortCapacitance <\/td>\n<\/tr>\n
238<\/td>\n10.18.3 Functions accessing netlist information
10.18.3.1 appGetNumDriversByPin
10.18.3.2 appGetNumDriversByName <\/td>\n<\/tr>\n
239<\/td>\n10.18.3.3 appForEachParallelDriverByPin <\/td>\n<\/tr>\n
241<\/td>\n10.18.3.4 appForEachParallelDriverByName <\/td>\n<\/tr>\n
242<\/td>\n10.18.3.5 appGetNumPinsByPin
10.18.3.6 appGetNumPinsByName <\/td>\n<\/tr>\n
243<\/td>\n10.18.3.7 appGetNumSinksByPin
10.18.3.8 appGetNumSinksByName <\/td>\n<\/tr>\n
244<\/td>\n10.18.3.9 dpcmAddWireLoadModel <\/td>\n<\/tr>\n
245<\/td>\n10.18.3.10 dpcmGetWireLoadModel <\/td>\n<\/tr>\n
246<\/td>\n10.18.3.11 dpcmGetWireLoadModelForBlockSize
10.18.3.12 appGetInstanceCount <\/td>\n<\/tr>\n
247<\/td>\n10.18.4 Functions exporting limit information
10.18.4.1 dpcmGetCapacitanceLimit
10.18.4.2 dpcmGetSlewLimit <\/td>\n<\/tr>\n
248<\/td>\n10.18.4.3 dpcmGetXovers
10.18.5 Functions getting\/setting model information
10.18.5.1 dpcmGetFunctionalModeArray <\/td>\n<\/tr>\n
249<\/td>\n10.18.5.2 dpcmGetBaseFunctionalMode <\/td>\n<\/tr>\n
250<\/td>\n10.18.5.3 appGetCurrentFunctionalMode
10.18.5.4 dpcmGetControlExistence <\/td>\n<\/tr>\n
251<\/td>\n10.18.5.5 dpcmSetLevel <\/td>\n<\/tr>\n
252<\/td>\n10.18.5.5.1 Accuracy levels <\/td>\n<\/tr>\n
253<\/td>\n10.18.5.6 dpcmGetLibraryAccuracyLevelArrays
10.18.5.7 dpcmSetLibraryAccuracyLevel <\/td>\n<\/tr>\n
254<\/td>\n10.18.5.8 dpcmGetExposePurityAndConsistency <\/td>\n<\/tr>\n
255<\/td>\n10.18.5.9 dpcmGetRailVoltageArray
10.18.5.10 dpcmGetBaseRailVoltage <\/td>\n<\/tr>\n
256<\/td>\n10.18.5.11 appGetCurrentRailVoltage
10.18.5.12 dpcmGetWireLoadModelArray <\/td>\n<\/tr>\n
257<\/td>\n10.18.5.13 dpcmGetBaseWireLoadModel
10.18.5.14 appGetCurrentWireLoadModel <\/td>\n<\/tr>\n
258<\/td>\n10.18.5.15 dpcmGetBaseTemperature
10.18.5.16 dpcmGetBaseOpRange
10.18.5.17 dpcmGetOpRangeArray <\/td>\n<\/tr>\n
259<\/td>\n10.18.5.18 appGetCurrentTemperature
10.18.5.19 appGetCurrentOpRange <\/td>\n<\/tr>\n
260<\/td>\n10.18.5.20 dpcmGetTimingStateArray <\/td>\n<\/tr>\n
261<\/td>\n10.18.5.21 appGetCurrentTimingState
10.18.6 Functions importing instance name information
10.18.6.1 dpcmGetCellList <\/td>\n<\/tr>\n
262<\/td>\n10.18.6.2 appGetCellName <\/td>\n<\/tr>\n
263<\/td>\n10.18.6.3 appGetHierPinName
10.18.6.4 appGetHierBlockName <\/td>\n<\/tr>\n
264<\/td>\n10.18.6.5 appGetHierNetName
10.18.7 Process information functions
10.18.7.1 dpcmGetThresholds <\/td>\n<\/tr>\n
265<\/td>\n10.18.7.2 appGetThresholds <\/td>\n<\/tr>\n
266<\/td>\n10.18.8 Miscellaneous standard interface functions
10.18.8.1 appGetExternalStatus
10.18.8.2 appGetVersionInfo <\/td>\n<\/tr>\n
267<\/td>\n10.18.8.3 appGetResource
10.18.8.4 dpcmGetRuleUnitToSeconds
10.18.8.5 dpcmGetRuleUnitToOhms <\/td>\n<\/tr>\n
268<\/td>\n10.18.8.6 dpcmGetRuleUnitToFarads
10.18.8.7 dpcmGetRuleUnitToHenries <\/td>\n<\/tr>\n
269<\/td>\n10.18.8.8 dpcmGetRuleUnitToWatts
10.18.8.9 dpcmGetRuleUnitToJoules <\/td>\n<\/tr>\n
270<\/td>\n10.18.8.10 dpcmGetTimeResolution
10.18.8.11 dpcmGetParasiticCoordinateTypes <\/td>\n<\/tr>\n
271<\/td>\n10.18.8.12 dpcmIsSlewTime
10.18.8.13 dpcmDebug <\/td>\n<\/tr>\n
272<\/td>\n10.18.8.14 dpcmGetVersionInfo
10.18.8.15 dpcmHoldControl <\/td>\n<\/tr>\n
273<\/td>\n10.18.8.16 dpcmFillPinCache <\/td>\n<\/tr>\n
274<\/td>\n10.18.8.17 dpcmFreePinCache
10.18.8.18 appRegisterCellInfo <\/td>\n<\/tr>\n
275<\/td>\n10.18.9 Power-related functions
10.18.9.1 dpcmGetCellPowerInfo <\/td>\n<\/tr>\n
276<\/td>\n10.18.9.2 dpcmGetCellPowerWithState
10.18.9.3 dpcmGetAETCellPowerWithSensitivity <\/td>\n<\/tr>\n
278<\/td>\n10.18.9.4 dpcmGetPinPower
10.18.9.5 dpcmAETGetSettlingTime <\/td>\n<\/tr>\n
279<\/td>\n10.18.9.6 dpcmAETGetSimultaneousSwitchTime
10.18.9.7 dpcmGroupGetSettlingTime <\/td>\n<\/tr>\n
280<\/td>\n10.18.9.8 dpcmGroupGetSimultaneousSwitchTime
10.18.9.9 dpcmCalcPartialSwingEnergy <\/td>\n<\/tr>\n
281<\/td>\n10.18.9.10 dpcmSetInitialState <\/td>\n<\/tr>\n
282<\/td>\n10.18.9.11 dpcmFreeStateCache
10.18.9.12 appGetStateCache
10.18.9.13 dpcmGetNetEnergy <\/td>\n<\/tr>\n
283<\/td>\n10.19 Application context
10.19.1 pathData association
10.20 Application and library interaction <\/td>\n<\/tr>\n
284<\/td>\n10.20.1 behavior model domain
10.20.2 vectorTiming and vectorPower model domains <\/td>\n<\/tr>\n
285<\/td>\n10.20.3 Power unit conversion
10.20.4 Vector power calculation <\/td>\n<\/tr>\n
286<\/td>\n10.21 Parasitic analysis
10.21.1 Assumptions
10.21.2 Parasitic networks
10.21.3 Basic definitions <\/td>\n<\/tr>\n
287<\/td>\n10.21.3.1 Logical pins and internal nodes
10.21.3.2 Physical ports
10.21.3.3 Nodes
10.21.3.4 Terminating points
10.21.3.5 Parasitic elements
10.21.3.6 Subnets <\/td>\n<\/tr>\n
288<\/td>\n10.21.4 Parasitic element data structure <\/td>\n<\/tr>\n
289<\/td>\n10.21.4.1 elementType <\/td>\n<\/tr>\n
290<\/td>\n10.21.4.2 Node index variable values
10.21.4.3 Parasitic element values <\/td>\n<\/tr>\n
291<\/td>\n10.21.4.4 Clamping diodes
10.21.4.5 ownerPrivate pointer <\/td>\n<\/tr>\n
292<\/td>\n10.21.5 Coordinates
10.21.6 Parasitic subnets <\/td>\n<\/tr>\n
293<\/td>\n10.21.6.1 Changed
10.21.6.2 parasiticElementArray
10.21.6.3 portMap
10.21.6.4 nodeMap
10.21.6.5 nodeTypeList <\/td>\n<\/tr>\n
294<\/td>\n10.21.6.6 Link pointers
10.21.6.7 techFamily
10.21.6.8 elementPosition
10.21.6.9 ownerPrivate pointer
10.21.6.10 Linked lists of subnets <\/td>\n<\/tr>\n
296<\/td>\n10.21.6.11 Parasitic subnet structure construction
10.21.6.12 dpcmCreateSubnetStructure <\/td>\n<\/tr>\n
297<\/td>\n10.21.6.13 Example array
10.21.6.14 dpcmGetDefaultInterconnectTechnology <\/td>\n<\/tr>\n
298<\/td>\n10.21.6.15 dpcmScaleParasitics <\/td>\n<\/tr>\n
299<\/td>\n10.21.6.16 extractionOpPointIndex
10.21.6.17 positiveExtractionVoltage
10.21.6.18 negativeExtractionVoltage
10.21.6.19 extractionTemperature
10.21.6.20 extractionProcessPoint
10.21.7 Pin parasitics <\/td>\n<\/tr>\n
300<\/td>\n10.21.7.1 dpcmGetSinkPinParasitics <\/td>\n<\/tr>\n
301<\/td>\n10.21.7.2 dpcmGetSourcePinParasitics <\/td>\n<\/tr>\n
302<\/td>\n10.21.7.3 dpcmGetPortNames
10.21.8 Modeling internal nodes <\/td>\n<\/tr>\n
303<\/td>\n10.21.8.1 Mapping parasitic subnet nodes to model nodes
10.21.8.2 dpcmIdentifyInternalNode <\/td>\n<\/tr>\n
304<\/td>\n10.21.9 Load and interconnect models <\/td>\n<\/tr>\n
305<\/td>\n10.21.9.1 dpcmBuildLoadModels
10.21.9.2 dpcmBuildInterconnectModels <\/td>\n<\/tr>\n
306<\/td>\n10.21.9.3 appGetInterconnectModels <\/td>\n<\/tr>\n
307<\/td>\n10.21.9.4 appGetLoadModels <\/td>\n<\/tr>\n
308<\/td>\n10.21.10 Obtaining parasitic networks
10.21.10.1 appGetParasiticNetworksByPin
10.21.10.2 appGetParasiticNetworksByName <\/td>\n<\/tr>\n
309<\/td>\n10.21.11 Persistent storage of load and interconnect models
10.21.11.1 Application save and restore <\/td>\n<\/tr>\n
310<\/td>\n10.21.11.1.1 dpcmPassivateLoadModels
10.21.11.1.2 dpcmPassivateInterconnectModels <\/td>\n<\/tr>\n
311<\/td>\n10.21.11.1.3 dpcmRestoreLoadModels
10.21.11.1.4 dpcmRestoreInterconnectModels <\/td>\n<\/tr>\n
312<\/td>\n10.21.12 Calculating effective capacitances and driving resistances
10.21.12.1 appGetCeff <\/td>\n<\/tr>\n
313<\/td>\n10.21.12.2 dpcmCalcCeff
10.21.12.3 dpcmCalcSteadyStateResistanceRange <\/td>\n<\/tr>\n
314<\/td>\n10.21.12.4 dpcmCalcTristateResistanceRange <\/td>\n<\/tr>\n
315<\/td>\n10.21.12.5 appSetCeff
10.21.13 Parasitic estimation <\/td>\n<\/tr>\n
316<\/td>\n10.21.13.1 Shapes
10.21.13.1.1 dpcmCalcCouplingCapacitance <\/td>\n<\/tr>\n
317<\/td>\n10.21.13.1.2 dpcmCalcSubstrateCapacitance
10.21.13.1.3 dpcmCalcSegmentResistance <\/td>\n<\/tr>\n
318<\/td>\n10.21.13.2 Layer definitions
10.21.13.2.1 dpcmGetLayerArray <\/td>\n<\/tr>\n
319<\/td>\n10.21.13.2.2 dpcmGetRuleUnitToMeters <\/td>\n<\/tr>\n
320<\/td>\n10.21.13.2.3 dpcmGetRuleUnitToAmps
10.21.14 Threshold voltages
10.21.14.1 appGetDriverThresholds <\/td>\n<\/tr>\n
321<\/td>\n10.21.15 Obtaining aggressor window overlaps
10.21.15.1 appGetAggressorOverlapWindows <\/td>\n<\/tr>\n
323<\/td>\n10.21.15.2 appSetAggressorInteractWindows <\/td>\n<\/tr>\n
324<\/td>\n10.21.15.3 Modeling the effect of propagated noise on delay
10.21.15.4 appGetOverlapNWFs <\/td>\n<\/tr>\n
326<\/td>\n10.21.15.5 appSetDriverInteractWindows <\/td>\n<\/tr>\n
327<\/td>\n10.21.15.6 dpcmCalcOutputResistances <\/td>\n<\/tr>\n
328<\/td>\n10.22 Noise analysis <\/td>\n<\/tr>\n
329<\/td>\n10.22.1 Types of noise
10.22.1.1 noiseType
10.22.1.1.1 dpcmGetLibraryNoiseTypesArray <\/td>\n<\/tr>\n
330<\/td>\n10.22.2 Noise models <\/td>\n<\/tr>\n
332<\/td>\n10.22.2.1 appNewNoiseCone
10.22.2.2 Interconnect noise cones
10.22.2.3 Modeling internal nodes <\/td>\n<\/tr>\n
333<\/td>\n10.22.3 Noise waveforms <\/td>\n<\/tr>\n
336<\/td>\n10.22.3.1 dpcmGetPWFarray
10.22.3.2 dpcmCreatePWF <\/td>\n<\/tr>\n
337<\/td>\n10.22.3.3 dpcmCopyNWFarray <\/td>\n<\/tr>\n
338<\/td>\n10.22.3.4 dpcmCopyPWFarray
10.22.3.5 dpcmCreatePWFdriverModel <\/td>\n<\/tr>\n
339<\/td>\n10.22.3.6 dpcmGetPWFdriverModelArray
10.22.4 Noise network models <\/td>\n<\/tr>\n
341<\/td>\n10.22.4.1 Noise pin parasitics <\/td>\n<\/tr>\n
342<\/td>\n10.22.4.1.1 dpcmGetSinkPinNoiseParasitics
10.22.4.1.2 dpcmGetSourcePinNoiseParasitics <\/td>\n<\/tr>\n
343<\/td>\n10.22.4.1.3 dpcmBuildNoiseInterconnectModels <\/td>\n<\/tr>\n
344<\/td>\n10.22.4.1.4 dpcmBuildNoiseLoadModels <\/td>\n<\/tr>\n
345<\/td>\n10.22.5 Calculating composite noise at cell inputs
10.22.5.1 driverPinNoise <\/td>\n<\/tr>\n
347<\/td>\n10.22.5.1.1 dpcmCalcInputNoise <\/td>\n<\/tr>\n
348<\/td>\n10.22.6 Calculating composite noise at cell outputs
10.22.6.1 relatedPinNoise <\/td>\n<\/tr>\n
350<\/td>\n10.22.6.1.1 dpcmCalcOutputNoise <\/td>\n<\/tr>\n
351<\/td>\n10.22.6.2 Handling parallel drivers
10.22.6.2.1 appForEachNoiseParallelDriver
10.22.6.2.2 dpcmSetParallelRelatedNoise <\/td>\n<\/tr>\n
352<\/td>\n10.22.6.2.3 appSetParallelOutputNoise
10.22.7 Setting noise budgets <\/td>\n<\/tr>\n
353<\/td>\n10.22.7.1 dpcmSetNoiseLimit
10.22.8 Reporting noise violations
10.22.8.1 noiseViolationInfo <\/td>\n<\/tr>\n
354<\/td>\n10.22.8.1.1 appSetNoiseViolation
10.22.8.1.2 dpcmGetNoiseViolationDetails <\/td>\n<\/tr>\n
355<\/td>\n10.23 Delay and slew calculations for differential circuits
10.23.1 Sample figures <\/td>\n<\/tr>\n
357<\/td>\n10.23.2 appGetArrivalOffsetsByName
10.23.2.1 appGetArrivalOffsetArraysByName <\/td>\n<\/tr>\n
358<\/td>\n10.23.3 API extensions for function modeling
10.23.3.1 Standard Structure extensions <\/td>\n<\/tr>\n
359<\/td>\n10.23.3.2 Node representation
10.23.3.3 Path or arc representation
10.23.3.4 PathDataBlock data structure <\/td>\n<\/tr>\n
360<\/td>\n10.23.3.5 Arc ordering
10.23.3.6 Priority operation <\/td>\n<\/tr>\n
361<\/td>\n10.23.3.7 Precedence <\/td>\n<\/tr>\n
362<\/td>\n10.23.3.8 Boolean assignment operation
10.23.3.8.1 Nonblocking assignments
10.23.3.8.2 Blocking assignments <\/td>\n<\/tr>\n
363<\/td>\n10.23.3.8.3 Strand ranges
10.23.3.8.4 Buses
10.23.3.8.5 Fanout distributions <\/td>\n<\/tr>\n
364<\/td>\n10.23.3.8.6 Bundling
10.23.3.9 Extensions for retain modeling
10.23.3.10 Extensions for skew testing <\/td>\n<\/tr>\n
365<\/td>\n10.23.4 Explicit APIs for user-defined primitives
10.23.4.1 dpcmPerformPrimitive
10.23.4.2 appGetArcStructure <\/td>\n<\/tr>\n
366<\/td>\n10.23.4.3 dpcmGetNodeSensitivity <\/td>\n<\/tr>\n
367<\/td>\n10.23.5 APIs for hierarchy
10.23.5.1 Direct callback base hierarchy
10.23.5.1.1 dpcmModelMoreFunctionDetail
10.23.6 Built-in APIs for function modeling <\/td>\n<\/tr>\n
368<\/td>\n10.23.6.1 LOCATE_INPUT
10.23.6.2 LOCATE_OUTPUT
10.23.6.3 LOCATE_NODE
10.23.7 API Extensions for VECTOR modeling
10.23.7.1 Vector domains
10.23.7.2 Standard Structure fields for VECTOR clause in vectorTiming domain
10.23.7.3 VECTOR clause for delay and slew <\/td>\n<\/tr>\n
369<\/td>\n10.23.7.4 VECTOR clause for timing check
10.23.7.5 Vector target node generation
10.23.8 APIs for XWF <\/td>\n<\/tr>\n
371<\/td>\n10.23.8.1 XWF definition
10.23.8.2 Freeing XWF memory allocation
10.23.8.3 XWF API definitions
10.23.8.3.1 appSetXWF <\/td>\n<\/tr>\n
372<\/td>\n10.23.8.3.2 appGetXWF
10.23.8.3.3 dpcmCalcXWF <\/td>\n<\/tr>\n
373<\/td>\n10.23.9 Extensions and changes to voltages and temperature APIs
10.23.9.1 dpcmGetCellRailVoltageArray <\/td>\n<\/tr>\n
374<\/td>\n10.23.9.2 dpcmGetBaseCellRailVoltageArray <\/td>\n<\/tr>\n
375<\/td>\n10.23.9.3 dpcmGetBaseCellTemperature
10.23.10 Operating conditions <\/td>\n<\/tr>\n
376<\/td>\n10.23.10.1 Operating points
10.23.10.1.1 dpcmGetOpPointArray
10.23.10.1.2 dpcmGetBaseOpPoint <\/td>\n<\/tr>\n
377<\/td>\n10.23.10.1.3 dpcmSetCurrentOpPoint <\/td>\n<\/tr>\n
378<\/td>\n10.23.11 On-chip process variation <\/td>\n<\/tr>\n
380<\/td>\n10.23.11.1 Process points
10.23.11.1.1 dpcmSetCurrentProcessPoint <\/td>\n<\/tr>\n
381<\/td>\n10.23.11.1.2 dpcmGetBaseProcessPoint
10.23.11.2 PVT ranges
10.23.11.2.1 dpcmGetProcessPointRange <\/td>\n<\/tr>\n
382<\/td>\n10.23.11.3 Rail voltage rangep.187
10.23.11.3.1 dpcmGetRailVoltageRangeArray
10.23.11.3.2 dpcmGetCellRailVoltageRangeArray <\/td>\n<\/tr>\n
383<\/td>\n10.23.11.4 Temperature range
10.23.11.4.1 dcmGetTemperatureRange <\/td>\n<\/tr>\n
384<\/td>\n10.23.11.4.2 dpcmGetCellTemperatureRange
10.23.12 Accessing properties and attributes <\/td>\n<\/tr>\n
385<\/td>\n10.23.12.1.1 APIs for annotations within PIN object
10.23.12.1.2 dpcmGetPinPinTypeArray <\/td>\n<\/tr>\n
386<\/td>\n10.23.12.1.3 dpcmGetPinPinType
10.23.12.1.4 dpcmGetPinSignalTypeArray <\/td>\n<\/tr>\n
388<\/td>\n10.23.12.1.5 dpcmGetPinSignalType
10.23.12.1.6 dpcmGetPinActionArray
10.23.12.1.7 dpcmGetPinAction <\/td>\n<\/tr>\n
389<\/td>\n10.23.12.1.8 dpcmGetPinPolarityArray <\/td>\n<\/tr>\n
390<\/td>\n10.23.12.1.9 dpcmGetPinPolarity
10.23.12.1.10 dpcmGetPinEnablePin
10.23.12.1.11 dpcmGetPinConnectClass <\/td>\n<\/tr>\n
391<\/td>\n10.23.12.1.12 dpcmGetPinScanPosition
10.23.12.1.13 dpcmGetPinStuckArray <\/td>\n<\/tr>\n
392<\/td>\n10.23.12.1.14 dpcmGetPinStuck
10.23.12.1.15 dpcmGetDifferentialPairPin <\/td>\n<\/tr>\n
393<\/td>\n10.23.12.2 APIs for annotations within VECTOR objects
10.23.12.2.1 dpcmGetPathLabel
10.23.12.2.2 dpcmGetPowerStateLabel <\/td>\n<\/tr>\n
394<\/td>\n10.23.12.3 APIs for annotations within CELL objects
10.23.12.3.1 dpcmGetCellTypeArray <\/td>\n<\/tr>\n
396<\/td>\n10.23.12.3.2 dpcmGetCellType
10.23.12.3.3 dpcmGetCellSwapClassArray <\/td>\n<\/tr>\n
397<\/td>\n10.23.12.3.4 dpcmGetCellSwapClass
10.23.12.4 dpcmGetCellRestrictClassArray <\/td>\n<\/tr>\n
398<\/td>\n10.23.12.4.1 dpcmGetCellRestrictClass <\/td>\n<\/tr>\n
399<\/td>\n10.23.12.4.2 dpcmGetCellScanTypeArray
10.23.12.4.3 dpcmGetCellScanType <\/td>\n<\/tr>\n
400<\/td>\n10.23.12.4.4 dpcmGetCellNonScanCell <\/td>\n<\/tr>\n
402<\/td>\n10.23.12.4.5 appSetVectorOperations <\/td>\n<\/tr>\n
403<\/td>\n10.23.12.4.6 dpcmGetLevelShifter <\/td>\n<\/tr>\n
405<\/td>\n10.23.13 APIs for attribute within a PIN object
10.23.13.1 dpcmGetPinTiePolarity
10.23.13.2 dpcmGetPinReadPolarity <\/td>\n<\/tr>\n
406<\/td>\n10.23.13.3 dpcmGetPinWritePolarity
10.23.13.4 dpcmGetSimultaneousSwitchTimes <\/td>\n<\/tr>\n
407<\/td>\n10.23.13.5 appGetSwitchingBits
10.23.13.6 dpcmGetFrequencyLimit <\/td>\n<\/tr>\n
408<\/td>\n10.23.13.7 appGetPinFrequency
10.23.13.8 dpcmGetBasePinFrequency <\/td>\n<\/tr>\n
409<\/td>\n10.23.13.9 dpcmGetPinJitter
10.23.13.10 dpcmGetInductanceLimit <\/td>\n<\/tr>\n
410<\/td>\n10.23.13.11 dpcmGetOutputSourceResistances
10.23.13.12 appSetPull <\/td>\n<\/tr>\n
411<\/td>\n10.23.13.13 dpcmGetPull <\/td>\n<\/tr>\n
412<\/td>\n10.23.13.14 dpcmGetPinDriveStrength
10.23.13.15 dpcmGetCellVectorPower <\/td>\n<\/tr>\n
413<\/td>\n10.23.14 Connectivity
10.23.14.1 dpcmGetPinCellConnectivityArrays <\/td>\n<\/tr>\n
414<\/td>\n10.23.14.2 dpcmGetLibraryConnectClassArray
10.23.14.3 dpcmGetLibraryConnectivityRules <\/td>\n<\/tr>\n
415<\/td>\n10.23.15 Control of timing arc existence and state <\/td>\n<\/tr>\n
416<\/td>\n10.23.15.1 dpcmGetExistenceGraph <\/td>\n<\/tr>\n
417<\/td>\n10.23.15.2 dpcmGetTimingStateGraphs <\/td>\n<\/tr>\n
419<\/td>\n10.23.15.3 dpcmGetTimingStateStrings <\/td>\n<\/tr>\n
420<\/td>\n10.23.15.4 dpcmGetVectorEdgeNumbers
10.23.16 Modeling cores <\/td>\n<\/tr>\n
421<\/td>\n10.23.16.1 appSetSignalDivision <\/td>\n<\/tr>\n
422<\/td>\n10.23.16.2 appSetSignalMultiplication <\/td>\n<\/tr>\n
424<\/td>\n10.23.16.3 appSetSignalGeneration <\/td>\n<\/tr>\n
425<\/td>\n10.23.17 Default pin slews and interface version calls
10.23.17.1 dpcmGetDefPinSlews <\/td>\n<\/tr>\n
426<\/td>\n10.23.17.2 appGetInterfaceVersion <\/td>\n<\/tr>\n
427<\/td>\n10.23.18 API to access library required resources
10.23.18.1 Expose APIs for resources
10.23.18.1.1 dpcmSetResource
10.23.18.1.2 dpcmGetAllResources <\/td>\n<\/tr>\n
428<\/td>\n10.23.19 Resource types <\/td>\n<\/tr>\n
429<\/td>\n10.23.20 Library extensions for phase locked loop processing <\/td>\n<\/tr>\n
430<\/td>\n10.23.21 API definitions for external conditions
10.23.21.1 appGetExternalDelayByPin <\/td>\n<\/tr>\n
432<\/td>\n10.23.21.2 appGetExternalDelayByName <\/td>\n<\/tr>\n
433<\/td>\n10.23.21.3 appGetLogicLevelByName <\/td>\n<\/tr>\n
434<\/td>\n10.23.21.4 appGetLogicLevelByPin
10.23.22 Extensions for listing pins
10.23.22.1 dpcmGetPinIndexArrays <\/td>\n<\/tr>\n
435<\/td>\n10.23.22.2 dpcmGetSupplyPins
10.23.23 Memory BIST mapping <\/td>\n<\/tr>\n
436<\/td>\n10.23.23.1 dpcmGetPhysicalBISTMap
10.23.23.2 dpcmGetLogicalBISTMap <\/td>\n<\/tr>\n
437<\/td>\n10.23.24 dpcmGetCellTestProcedure <\/td>\n<\/tr>\n
438<\/td>\n10.24 Interconnect delay calculation intraface
10.24.1 Control and data flows <\/td>\n<\/tr>\n
439<\/td>\n10.24.2 Model generation functions
10.24.2.1 icmBuildLoadModels <\/td>\n<\/tr>\n
440<\/td>\n10.24.2.2 icmBuildInterconnectModels <\/td>\n<\/tr>\n
441<\/td>\n10.24.3 Calculation functions
10.24.3.1 icmCalcInterconnectDelaySlew <\/td>\n<\/tr>\n
442<\/td>\n10.24.4 Cell calculation functions
10.24.4.1 icmCalcCellDelaySlew <\/td>\n<\/tr>\n
443<\/td>\n10.24.4.2 ccmCalcDelaySlew <\/td>\n<\/tr>\n
444<\/td>\n10.24.4.3 ccmEarlyLateIdentical <\/td>\n<\/tr>\n
445<\/td>\n10.24.4.4 ccmGetICMcontrolParams
10.24.4.5 icmCalcOutputResistances <\/td>\n<\/tr>\n
446<\/td>\n10.24.4.6 icmCalcTotalLoadCapacitances
10.24.4.7 icmCalcXWF <\/td>\n<\/tr>\n
447<\/td>\n10.24.5 ICM initialization
10.24.5.1 icmInit <\/td>\n<\/tr>\n
448<\/td>\n10.24.5.2 ICM DCL header file (icm.h) <\/td>\n<\/tr>\n
453<\/td>\n10.24.5.3 ICM DCL initialization example <\/td>\n<\/tr>\n
454<\/td>\n10.25 DCL run-time support
10.25.1 Array manipulation functions
10.25.1.1 dcmRT_copy_DCM_ARRAY <\/td>\n<\/tr>\n
455<\/td>\n10.25.1.2 dcmRT_new_DCM_ARRAY <\/td>\n<\/tr>\n
457<\/td>\n10.25.1.3 dcm_sizeof_DCM_ARRAY
10.25.1.4 dcmRT_claim_DCM_ARRAY
10.25.1.5 dcmRT_disclaim_DCM_ARRAY <\/td>\n<\/tr>\n
458<\/td>\n10.25.2 Memory management
10.25.3 Structure manipulation functions
10.25.3.1 dcmRT_claim_DCM_STRUCT <\/td>\n<\/tr>\n
459<\/td>\n10.25.3.2 dcmRT_disclaim_DCM_STRUCT
10.25.3.3 Locking options
10.25.3.3.1 dcmRT_longlock_DCM_STRUCT <\/td>\n<\/tr>\n
460<\/td>\n10.25.3.3.2 dcmRT_longunlock_DCM_STRUCT
10.25.3.3.2.1 Context
10.25.3.3.2.2 Sync structures <\/td>\n<\/tr>\n
461<\/td>\n10.25.3.3.2.3 Options
10.25.3.3.2.4 Error code
10.25.3.4 dcmRT_getNumDimensions
10.25.3.5 dcmRT_getNumElementsPer <\/td>\n<\/tr>\n
462<\/td>\n10.25.3.6 dcmRT_getNumElements
10.25.3.7 dcmRT_getElementType
10.25.3.8 dcmRT_arraycmp <\/td>\n<\/tr>\n
463<\/td>\n10.25.4 Initialization functions
10.25.4.1 dcmRT_InitRuleSystem
10.25.4.2 dcmRT_BindRule <\/td>\n<\/tr>\n
465<\/td>\n10.25.4.3 dcmRT_AppendRule <\/td>\n<\/tr>\n
466<\/td>\n10.25.4.4 dcmRT_UnbindRule
10.25.4.5 dcmRT_FindFunction <\/td>\n<\/tr>\n
467<\/td>\n10.25.4.6 dcmRT_FindAppFunction
10.25.4.7 dcmRT_QuietFindFunction <\/td>\n<\/tr>\n
468<\/td>\n10.25.4.8 dcmRT_MakeRC
10.25.4.9 dcmRT_HardErrorRC <\/td>\n<\/tr>\n
469<\/td>\n10.25.4.10 dcmRT_SetMessageIntercept
10.25.4.11 dcmRT_IssueMessage <\/td>\n<\/tr>\n
470<\/td>\n10.25.4.12 dcmRT_new_DCM_STD_STRUCT
10.25.4.13 dcmRT_delete_DCM_STD_STRUCT
10.25.4.14 dcmRT_setTechnology <\/td>\n<\/tr>\n
471<\/td>\n10.25.4.15 dcmRT_getTechnology
10.25.4.16 dcmRT_getAllTechs <\/td>\n<\/tr>\n
472<\/td>\n10.25.4.17 dcmRT_freeAllTechs
10.25.4.18 dcmRT_isGeneric
10.25.4.19 dcmRT_takeMappingOfNugget <\/td>\n<\/tr>\n
473<\/td>\n10.25.4.20 dcmRT_registerUserObject
10.25.4.21 dcmRT_DeleteRegisteredUserObjects <\/td>\n<\/tr>\n
474<\/td>\n10.25.4.22 dcmRT_DeleteOneUserObject
10.26 Calculation functions
10.26.1 delay <\/td>\n<\/tr>\n
475<\/td>\n10.26.2 slew
10.26.3 check <\/td>\n<\/tr>\n
477<\/td>\n10.27 Modeling functions
10.27.1 modelSearch <\/td>\n<\/tr>\n
479<\/td>\n10.27.2 Mode operators <\/td>\n<\/tr>\n
480<\/td>\n10.27.3 Arrival time merging <\/td>\n<\/tr>\n
481<\/td>\n10.27.4 Edge propagation communication to the application <\/td>\n<\/tr>\n
483<\/td>\n10.27.5 Edge propagation communication to the DPCM <\/td>\n<\/tr>\n
484<\/td>\n10.27.6 newTimingPin
10.27.7 newDelayMatrixRow <\/td>\n<\/tr>\n
485<\/td>\n10.27.8 newNetSinkPropagateSegments <\/td>\n<\/tr>\n
487<\/td>\n10.27.9 newNetSourcePropagateSegments <\/td>\n<\/tr>\n
488<\/td>\n10.27.10 newPropagateSegment <\/td>\n<\/tr>\n
489<\/td>\n10.27.11 newTestMatrixRow <\/td>\n<\/tr>\n
490<\/td>\n10.27.12 newAltTestSegment
10.27.13 Interactions between interconnect modeling and modeling functions <\/td>\n<\/tr>\n
491<\/td>\n10.28 Deprecated functions
10.28.1 Parasitic handling
10.28.1.1 appGetPiModel <\/td>\n<\/tr>\n
492<\/td>\n10.28.1.2 appGetPolesAndResidues <\/td>\n<\/tr>\n
493<\/td>\n10.28.1.3 appGetCeffective <\/td>\n<\/tr>\n
494<\/td>\n10.28.1.4 appGetRLCnetworkByPin <\/td>\n<\/tr>\n
495<\/td>\n10.28.1.5 appGetRLCnetworkByName
10.28.1.6 dpcmCalcPiModel <\/td>\n<\/tr>\n
496<\/td>\n10.28.1.7 dpcmCalcPolesAndResidues <\/td>\n<\/tr>\n
497<\/td>\n10.28.1.8 dpcmCalcCeffective
10.28.1.9 dpcmSetRLCmember <\/td>\n<\/tr>\n
499<\/td>\n10.28.1.10 dpcmAppendPinAdmittance
10.28.1.11 dpcmDeleteRLCnetwork <\/td>\n<\/tr>\n
500<\/td>\n10.28.2 Array manipulation functions
10.28.2.1 dcm_copy_DCM_ARRAY
10.28.2.2 dcm_new_DCM_ARRAY <\/td>\n<\/tr>\n
501<\/td>\n10.28.2.3 dcm_sizeof_DCM_ARRAY
10.28.2.4 dcm_lock_DCM_ARRAY <\/td>\n<\/tr>\n
502<\/td>\n10.28.2.5 dcm_unlock_DCM_ARRAY
10.28.3 Memory management
10.28.3.1 dcm_lock_DCM_STRUCT <\/td>\n<\/tr>\n
503<\/td>\n10.28.3.2 dcm_unlock_DCM_STRUCT
10.28.3.3 dcm_getNumDimensions
10.28.3.4 dcm_getNumElementsPer <\/td>\n<\/tr>\n
504<\/td>\n10.28.3.5 dcm_getNumElements
10.28.3.6 dcm_getElementType
10.28.3.7 dcm_arraycmp <\/td>\n<\/tr>\n
505<\/td>\n10.28.4 Initialization functions
10.28.4.1 dcmCellList
10.28.4.2 dcmSetNewStorageManager <\/td>\n<\/tr>\n
506<\/td>\n10.28.4.3 dcmMalloc
10.28.4.4 dcmFree
10.28.4.5 dcmRealloc <\/td>\n<\/tr>\n
507<\/td>\n10.28.4.6 dcmBindRule
10.28.4.7 dcmAddRule
10.28.4.8 dcmUnbindRule <\/td>\n<\/tr>\n
508<\/td>\n10.28.4.9 dcmFindFunction
10.28.4.10 dcmFindAppFunction <\/td>\n<\/tr>\n
509<\/td>\n10.28.4.11 dcmQuietFindFunction
10.28.4.12 dcmMakeRC
10.28.4.13 dcmHardErrorRC <\/td>\n<\/tr>\n
510<\/td>\n10.28.4.14 dcmSetMessageIntercept
10.28.4.15 dcmIssueMessage <\/td>\n<\/tr>\n
511<\/td>\n10.28.4.16 dcm_rule_init <\/td>\n<\/tr>\n
512<\/td>\n10.28.4.17 DCM_new_DCM_STD_STRUCT
10.28.4.18 DCM_delete_DCM_STD_STRUCT
10.28.4.19 dcm_setTechnology <\/td>\n<\/tr>\n
513<\/td>\n10.28.4.20 dcm_getTechnology
10.28.4.21 dcm_getAllTechs <\/td>\n<\/tr>\n
514<\/td>\n10.28.4.22 dcm_freeAllTechs
10.28.4.23 dcm_isGeneric
10.28.4.24 dcm_mapNugget <\/td>\n<\/tr>\n
515<\/td>\n10.28.4.25 dcm_takeMappingOfNugget
10.28.4.26 dcm_registerUserObject <\/td>\n<\/tr>\n
516<\/td>\n10.28.4.27 dcm_DeleteRegisteredUserObjects
10.28.4.28 dcm_DeleteOneUserObject
10.29 Standard Structure (std_stru.h) file <\/td>\n<\/tr>\n
536<\/td>\n10.30 Standard macros (std_macs.h) file <\/td>\n<\/tr>\n
544<\/td>\n10.31 Standard interface structures (dcmintf.h) file <\/td>\n<\/tr>\n
548<\/td>\n10.32 Standard loading (dcmload.h) file <\/td>\n<\/tr>\n
552<\/td>\n10.33 Standard debug (dcmdebug.h) file <\/td>\n<\/tr>\n
579<\/td>\n10.34 Standard array (dcmgarray.h) file <\/td>\n<\/tr>\n
583<\/td>\n10.35 Standard user array defines (dcmuarray.h) file <\/td>\n<\/tr>\n
587<\/td>\n10.36 Standard platform-dependency (dcmpltfm.h) file <\/td>\n<\/tr>\n
593<\/td>\n10.37 Standard state variables (dcmstate.h) file <\/td>\n<\/tr>\n
596<\/td>\n11. Parasitics <\/td>\n<\/tr>\n
597<\/td>\n11.1 Introduction
11.2 Targeted applications for SPEF
11.3 SPEF specification
11.3.1 Grammar
11.3.1.1 Alphanumeric definition <\/td>\n<\/tr>\n
598<\/td>\n11.3.1.2 Names definition <\/td>\n<\/tr>\n
599<\/td>\n11.3.2 Escaping rules
11.3.2.1 Special characters
11.3.2.2 Character escaping mechanism for identifiers in SPEF
11.3.3 File syntax
11.3.3.1 Basic file definition
11.3.3.2 Header definition <\/td>\n<\/tr>\n
600<\/td>\n11.3.3.3 Name map definition
11.3.3.4 Power and ground nets definition <\/td>\n<\/tr>\n
601<\/td>\n11.3.3.5 External definition
11.3.3.6 Hierarchical SPEF (entities) definition
11.3.3.7 Process and temperature variation definition <\/td>\n<\/tr>\n
602<\/td>\n11.3.3.8 Internal definition
11.3.3.8.1 Detailed net definition <\/td>\n<\/tr>\n
603<\/td>\n11.3.3.8.2 Reduced net definition <\/td>\n<\/tr>\n
604<\/td>\n11.3.3.8.3 Detailed physical-only net definition <\/td>\n<\/tr>\n
605<\/td>\n11.3.3.8.4 Reduced physical-only net definition
11.3.4 Comments
11.3.5 File semantics <\/td>\n<\/tr>\n
624<\/td>\n11.4 Examples
11.4.1 Basic *D_NET file <\/td>\n<\/tr>\n
627<\/td>\n11.4.2 Basic *R_NET file <\/td>\n<\/tr>\n
628<\/td>\n11.4.3 *R_NET with poles and residues plus name mapping <\/td>\n<\/tr>\n
629<\/td>\n11.4.4 *D_NET with triplet par_value <\/td>\n<\/tr>\n
632<\/td>\n11.4.5 *R_NET with poles and residues plus triplet par_value <\/td>\n<\/tr>\n
634<\/td>\n11.4.6 Merging SPEF files
11.4.6.1 topLevel.spef <\/td>\n<\/tr>\n
635<\/td>\n11.4.6.2 subBLOCK.spef <\/td>\n<\/tr>\n
636<\/td>\n11.4.6.3 Resulting merged SPEF file <\/td>\n<\/tr>\n
638<\/td>\n11.4.7 A SPEF file header section with *VARIATION_PARAMETERS definition
11.4.8 CAP and RES statements with sensitivity information in a SPEF file <\/td>\n<\/tr>\n
639<\/td>\nAnnex A (informative) Implementation requirements
A.1 Compiler limits <\/td>\n<\/tr>\n
641<\/td>\nBack Cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Integrated Circuit (IC) Open Library Architecture (OLA) (Redline)<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2019<\/td>\n641<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":400490,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-400484","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/400484","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/400490"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=400484"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=400484"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=400484"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}