{"id":400734,"date":"2024-10-20T04:52:06","date_gmt":"2024-10-20T04:52:06","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-8802-32021-amd9-2021\/"},"modified":"2024-10-26T08:39:44","modified_gmt":"2024-10-26T08:39:44","slug":"ieee-8802-32021-amd9-2021","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-8802-32021-amd9-2021\/","title":{"rendered":"IEEE 8802-3:2021\/Amd9-2021"},"content":{"rendered":"

Adoption Standard – Active. This amendment to IEEE Std 802.3-2018 extends the operation of Ethernet passive optical networks (EPONs) to multiple channels of 25 Gb\/s providing both symmetric and asymmetric operation for the following data rates downstream\/upstream): 25\/10 Gb\/s, 25\/25 Gb\/s, 50\/10 Gb\/s, 50\/25 Gb\/s, and 50\/50 Gb\/s. This standard specifies the 25 Gb\/s EPON Multi-Channel Reconciliation Sublayer (MCRS), Nx25G-EPON Physical Coding Sublayers (PCSs), Physical Media Attachment (PMA) sublayers, and Physical Medium Dependent (PMD) sublayers that support both symmetric and asymmetric data rates while maintaining backward compatibility with already deployed 10 Gb\/s EPON equipment. Backward compatibility with deployed 1G-EPON and ITU-T G.984 GPON is maintained with 25GBASE-PQ for the specific case of 1G-EPON and GPON ONUs using reduced-band (40 nm) lasers. The EPON operation is defined for distances of at least 20 km, and for a split ratio of at least 1:32.<\/p>\n

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PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
4<\/td>\nBlank Page <\/td>\n<\/tr>\n
5<\/td>\nTitle page <\/td>\n<\/tr>\n
7<\/td>\nImportant Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n
10<\/td>\nParticipants <\/td>\n<\/tr>\n
13<\/td>\nIntroduction <\/td>\n<\/tr>\n
16<\/td>\nContents <\/td>\n<\/tr>\n
27<\/td>\n1. Introduction
1.3 Normative references
1.4 Definitions <\/td>\n<\/tr>\n
29<\/td>\n1.5 Abbreviations <\/td>\n<\/tr>\n
30<\/td>\n30. Management
30.3 Layer management for DTEs
30.3.2 PHY device managed object class
30.3.2.1 PHY device attributes
30.3.2.1.2 aPhyType
30.3.2.1.3 aPhyTypeList <\/td>\n<\/tr>\n
31<\/td>\n30.3.5 MPCP managed object class
30.3.5.1 MPCP Attributes
30.3.5.1.2 aMPCPAdminState
30.3.5.1.3 aMPCPMode
30.3.5.1.4 aMPCPLinkID
30.5 Layer management for medium attachment units (MAUs)
30.5.1 MAU managed object class
30.5.1.1 MAU attributes
30.5.1.1.2 aMAUType <\/td>\n<\/tr>\n
35<\/td>\n45. Management Data Input\/Output (MDIO) Interface
45.2 MDIO Interface Registers
45.2.1 PMA\/PMD registers
45.2.1.23a PMA\/PMD control 3 register (Register 1.29)
45.2.1.23a.1 Downstream differential encoding (1.29.15)
45.2.1.23a.2 PMA\/PMD type selection (1.29.5:0) <\/td>\n<\/tr>\n
37<\/td>\n45.2.1.134a Nx25G-EPON PMA\/PMD extended ability register (Registers 1.1000 through 1.1002) <\/td>\n<\/tr>\n
39<\/td>\n45.2.1.134a.1 25GBASE-PQX-U3 (1.1000.15)
45.2.1.134a.2 25GBASE-PQX-U2 (1.1000.14)
45.2.1.134a.3 25GBASE-PQX-D3 (1.1000.13)
45.2.1.134a.4 25GBASE-PQX-D2 (1.1000.12)
45.2.1.134a.5 25GBASE-PQG-U3 (1.1000.11)
45.2.1.134a.6 25GBASE-PQG-U2 (1.1000.10) <\/td>\n<\/tr>\n
40<\/td>\n45.2.1.134a.7 25GBASE-PQG-D3 (1.1000.9)
45.2.1.134a.8 25GBASE-PQG-D2 (1.1000.8)
45.2.1.134a.9 25\/10GBASE-PQX-U3 (1.1000.7)
45.2.1.134a.10 25\/10GBASE-PQX-U2 (1.1000.6)
45.2.1.134a.11 25\/10GBASE-PQX-D3 (1.1000.5)
45.2.1.134a.12 25\/10GBASE-PQX-D2 (1.1000.4)
45.2.1.134a.13 25\/10GBASE-PQG-U3 (1.1000.3)
45.2.1.134a.14 25\/10GBASE-PQG-U2 (1.1000.2)
45.2.1.134a.15 25\/10GBASE-PQG-D3 (1.1000.1) <\/td>\n<\/tr>\n
41<\/td>\n45.2.1.134a.16 25\/10GBASE-PQG-D2 (1.1000.0)
45.2.1.134a.17 50\/25GBASE-PQX-U3 (1.1001.15)
45.2.1.134a.18 50\/25GBASE-PQX-U2 (1.1001.14)
45.2.1.134a.19 50\/25GBASE-PQX-D3 (1.1001.13)
45.2.1.134a.20 50\/25GBASE-PQX-D2 (1.1001.12)
45.2.1.134a.21 50\/25GBASE-PQG-U3 (1.1001.11)
45.2.1.134a.22 50\/25GBASE-PQG-U2 (1.1001.10)
45.2.1.134a.23 50\/25GBASE-PQG-D3 (1.1001.9)
45.2.1.134a.24 50\/25GBASE-PQG-D2 (1.1001.8) <\/td>\n<\/tr>\n
42<\/td>\n45.2.1.134a.25 50\/10GBASE-PQX-U3 (1.1001.7)
45.2.1.134a.26 50\/10GBASE-PQX-U2 (1.1001.6)
45.2.1.134a.27 50\/10GBASE-PQX-D3 (1.1001.5)
45.2.1.134a.28 50\/10GBASE-PQX-D2 (1.1001.4)
45.2.1.134a.29 50\/10GBASE-PQG-U3 (1.1001.3)
45.2.1.134a.30 50\/10GBASE-PQG-U2 (1.1001.2)
45.2.1.134a.31 50\/10GBASE-PQG-D3 (1.1001.1)
45.2.1.134a.32 50\/10GBASE-PQG-D2 (1.1001.0)
45.2.1.134a.33 50GBASE-PQX-U3 (1.1002.7) <\/td>\n<\/tr>\n
43<\/td>\n45.2.1.134a.34 50GBASE-PQX-U2 (1.1002.6)
45.2.1.134a.35 50GBASE-PQX-D3 (1.1002.5)
45.2.1.134a.36 50GBASE-PQX-D2 (1.1002.4)
45.2.1.134a.37 50GBASE-PQG-U3 (1.1002.3)
45.2.1.134a.38 50GBASE-PQG-U2 (1.1002.2)
45.2.1.134a.39 50GBASE-PQG-D3 (1.1002.1)
45.2.1.134a.40 50GBASE-PQG-D2 (1.1002.0) <\/td>\n<\/tr>\n
44<\/td>\n45.2.3 PCS registers
45.2.3.1 PCS control 1 register (Register 3.0) <\/td>\n<\/tr>\n
45<\/td>\n45.2.3.6 PCS control 2 register (Register 3.7)
45.2.3.6.1 PCS type selection (3.7.34:0)
45.2.3.8 PCS status 3 register (Register 3.9) <\/td>\n<\/tr>\n
46<\/td>\n45.2.3.8.aa 25GBASE-PQ capable (3.9.7)
45.2.3.8.ab 25\/10GBASE-PQ capable (3.9.6)
45.2.3.8.ac 25GBASE-PQ Rx only capable (3.9.5)
45.2.3.8.ad 25GBASE-PQ Tx only capable (3.9.4)
45.2.3.41 10\/1GBASE-PRX and 10GBASE-PR10G-EPON and Nx25G-EPON corrected FEC codewords counter (Register 3.76, 3.77) <\/td>\n<\/tr>\n
47<\/td>\n45.2.3.42 10\/1GBASE-PRX and 10GBASE-PR10G-EPON and Nx25G-EPON uncorrected FEC codewords counter (Register 3.78, 3.79)
45.2.3.43 10GBASE-PR and, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor interval timer control register (Register 3.80) <\/td>\n<\/tr>\n
48<\/td>\n45.2.3.44 10GBASE-PR and, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor status (Register 3.81)
45.2.3.44.1 10GBASE-PR and, 10\/1GBASE-PRX, and Nx25G-EPON PCS high BER (3.81.0) <\/td>\n<\/tr>\n
49<\/td>\n45.2.3.44.2 10GBASE-PR and, 10\/1GBASE-PRX, and Nx25G-EPON PCS latched high BER (3.81.1)
45.2.3.45 10GBASE-PR and, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor threshold control (Register 3.82)
45.2.3.45a Nx25G-EPON synchronization pattern registers (Registers 3.83 through 3.134) <\/td>\n<\/tr>\n
50<\/td>\n45.2.3.45a.1 SP3 bit 257 (3.83.5)
45.2.3.45a.2 SP3 balanced (3.83.4)
45.2.3.45a.3 SP2 bit 257 (3.83.3)
45.2.3.45a.4 SP2 balanced (3.83.2) <\/td>\n<\/tr>\n
51<\/td>\n45.2.3.45a.5 SP1 bit 257 (3.83.1)
45.2.3.45a.6 SP1 balanced (3.83.0)
45.2.3.45a.7 SP1 pattern (3.84.0 through 3.99.15)
45.2.3.45a.8 SP1 length (3.100.15:0)
45.2.3.45a.9 SP2 pattern (3.101.0 through 3.116.15)
45.2.3.45a.10 SP2 length (3.117.15:0)
45.2.3.45a.11 SP3 pattern (3.118.0 through 3.133.15)
45.2.3.45a.12 SP3 length (3.134.15:0) <\/td>\n<\/tr>\n
52<\/td>\n45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input\/Output (MDIO) interface
45.5.1 Introduction
45.5.2 Identification
45.5.2.1 Implementation identification
45.5.2.2 Protocol summary <\/td>\n<\/tr>\n
53<\/td>\n45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) interface
45.5.3.3 PMA\/PMD management functions
45.5.3.7 PCS management functions <\/td>\n<\/tr>\n
54<\/td>\n56. Introduction to Ethernet for subscriber access networks
56.1 Overview
56.1.2 Summary of P2MP sublayers <\/td>\n<\/tr>\n
56<\/td>\n56.1.2.1 Multipoint MAC Control Protocol (MPCP)
56.1.2.2 Reconciliation Sublayer (RS) and media independent interfaces
56.1.3 Physical Layer signaling systems <\/td>\n<\/tr>\n
63<\/td>\n67. System considerations for Ethernet subscriber access networks
67.1 Overview <\/td>\n<\/tr>\n
65<\/td>\n141. Physical Medium Dependent (PMD) sublayer and medium for Nx25G-EPON passive optical networks
141.1 Overview
141.1.1 Terminology
141.1.2 Positioning of the PMD sublayer within the IEEE 802.3 architecture
141.1.3 PHY link types <\/td>\n<\/tr>\n
68<\/td>\n141.2 PMD nomenclature
141.2.1 Introduction
141.2.2 PMD rate classes
141.2.3 PMD coexistence classes
141.2.4 PMD transmission direction classes
141.2.5 PMD power classes <\/td>\n<\/tr>\n
69<\/td>\n141.2.6 PMD naming
141.2.7 Supported combinations of OLT and ONU PMDs <\/td>\n<\/tr>\n
70<\/td>\n141.2.7.1 PHY Links supporting medium power budget <\/td>\n<\/tr>\n
71<\/td>\n141.2.7.2 PHY Links supporting high power budget
141.3 PMD functional specifications
141.3.1 PMD service interface
141.3.1.1 Channel-to-wavelength mapping <\/td>\n<\/tr>\n
72<\/td>\n141.3.1.2 Delay constraints
141.3.1.3 PMD_UNITDATA[i].request
141.3.1.4 PMD_UNITDATA[i].indication <\/td>\n<\/tr>\n
73<\/td>\n141.3.1.5 PMD_SIGNAL[i].request
141.3.1.6 PMD_SIGNAL[i].indication
141.3.2 PMD block diagram <\/td>\n<\/tr>\n
74<\/td>\n141.3.3 PMD transmit function
141.3.4 PMD receive function
141.3.5 PMD signal detect function
141.3.5.1 ONU PMD signal detect <\/td>\n<\/tr>\n
75<\/td>\n141.3.5.2 OLT PMD signal detect
141.3.5.3 Nx25G-EPON signal detect functions
141.4 Wavelength allocation <\/td>\n<\/tr>\n
76<\/td>\n141.5 PMD to MDI optical specifications for OLT PMDs
141.5.1 Transmitter optical specifications
141.5.2 Receiver optical specifications <\/td>\n<\/tr>\n
81<\/td>\n141.6 PMD to MDI optical specifications for ONU PMDs
141.6.1 Transmitter optical specifications <\/td>\n<\/tr>\n
84<\/td>\n141.6.2 Receiver optical specifications <\/td>\n<\/tr>\n
86<\/td>\n141.7 Definitions of optical parameters and measurement methods
141.7.1 Insertion loss
141.7.2 Test patterns
141.7.3 Wavelength and spectral width measurement
141.7.4 Optical power measurements
141.7.5 Extinction ratio measurements
141.7.6 Optical Modulation Amplitude (OMA) test procedure
141.7.7 Relative intensity noise optical modulation amplitude (RINxOMA) measuring procedure <\/td>\n<\/tr>\n
87<\/td>\n141.7.8 Transmit optical waveform (transmit eye)
141.7.9 Transmitter and dispersion penalty (TDP) for 25G
141.7.9.1 Reference transmitter requirements
141.7.9.2 Channel requirements
141.7.9.3 Reference receiver requirements
141.7.9.4 Test procedure <\/td>\n<\/tr>\n
88<\/td>\n141.7.10 Receive sensitivity
141.7.11 Stressed receiver conformance test
141.7.12 Jitter measurements
141.7.13 Laser on\/off timing measurement
141.7.13.1 Definitions
141.7.13.2 Test specification <\/td>\n<\/tr>\n
90<\/td>\n141.7.14 Receiver settling timing measurement
141.7.14.1 Definitions
141.7.14.2 Test specification <\/td>\n<\/tr>\n
91<\/td>\n141.8 Environmental, safety, and labeling
141.8.1 General safety
141.8.2 Laser safety
141.8.3 Installation
141.8.4 Environment
141.8.5 PMD labeling <\/td>\n<\/tr>\n
92<\/td>\n141.9 Characteristics of the fiber optic cabling
141.9.1 Fiber optic cabling model
141.9.2 Optical fiber and cable
141.9.3 Optical fiber connection <\/td>\n<\/tr>\n
93<\/td>\n141.9.4 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n
94<\/td>\n141.10 Protocol implementation conformance statement (PICS) proforma for Clause 141, Physical Medium Dependent (PMD) sublayer and medium for Nx25G-EPON passive optical networks
141.10.1 Introduction
141.10.2 Identification
141.10.2.1 Implementation identification
141.10.2.2 Protocol summary <\/td>\n<\/tr>\n
95<\/td>\n141.10.3 Major capabilities\/options <\/td>\n<\/tr>\n
98<\/td>\n141.10.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium for passive optical networks, type 25\/10GBASE-PQ, 25GBASE-PQ, 50\/10GBASE-PQ, 50\/25GBASE-PQ, and 50GBASE-PQ
141.10.4.1 PMD functional specifications <\/td>\n<\/tr>\n
99<\/td>\n141.10.4.2 PMD to MDI optical specifications for 25\/10GBASE-PQG-D2
141.10.4.3 PMD to MDI optical specifications for 25\/10GBASE-PQG-D3
141.10.4.4 PMD to MDI optical specifications for 25\/10GBASE-PQX-D2 <\/td>\n<\/tr>\n
100<\/td>\n141.10.4.5 PMD to MDI optical specifications for 25\/10GBASE-PQX-D3
141.10.4.6 PMD to MDI optical specifications for 25GBASE-PQG-D2
141.10.4.7 PMD to MDI optical specifications for 25GBASE-PQG-D3
141.10.4.8 PMD to MDI optical specifications for 25GBASE-PQX-D2 <\/td>\n<\/tr>\n
101<\/td>\n141.10.4.9 PMD to MDI optical specifications for 25GBASE-PQX-D3
141.10.4.10 PMD to MDI optical specifications for 50\/10GBASE-PQG-D2
141.10.4.11 PMD to MDI optical specifications for 50\/10GBASE-PQG-D3
141.10.4.12 PMD to MDI optical specifications for 50\/10GBASE-PQX-D2 <\/td>\n<\/tr>\n
102<\/td>\n141.10.4.13 PMD to MDI optical specifications for 50\/10GBASE-PQX-D3
141.10.4.14 PMD to MDI optical specifications for 50\/25GBASE-PQG-D2
141.10.4.15 PMD to MDI optical specifications for 50\/25GBASE-PQG-D3
141.10.4.16 PMD to MDI optical specifications for 50\/25GBASE-PQX-D2 <\/td>\n<\/tr>\n
103<\/td>\n141.10.4.17 PMD to MDI optical specifications for 50\/25GBASE-PQX-D3
141.10.4.18 PMD to MDI optical specifications for 50GBASE-PQG-D2
141.10.4.19 PMD to MDI optical specifications for 50GBASE-PQG-D3
141.10.4.20 PMD to MDI optical specifications for 50GBASE-PQX-D2 <\/td>\n<\/tr>\n
104<\/td>\n141.10.4.21 PMD to MDI optical specifications for 50GBASE-PQX-D3
141.10.4.22 PMD to MDI optical specifications for 25\/10GBASE-PQG-U2
141.10.4.23 PMD to MDI optical specifications for 25\/10GBASE-PQG-U3
141.10.4.24 PMD to MDI optical specifications for 25\/10GBASE-PQX-U2 <\/td>\n<\/tr>\n
105<\/td>\n141.10.4.25 PMD to MDI optical specifications for 25\/10GBASE-PQX-U3
141.10.4.26 PMD to MDI optical specifications for 25GBASE-PQG-U2
141.10.4.27 PMD to MDI optical specifications for 25GBASE-PQG-U3
141.10.4.28 PMD to MDI optical specifications for 25GBASE-PQX-U2 <\/td>\n<\/tr>\n
106<\/td>\n141.10.4.29 PMD to MDI optical specifications for 25GBASE-PQX-U3
141.10.4.30 PMD to MDI optical specifications for 50\/10GBASE-PQG-U2
141.10.4.31 PMD to MDI optical specifications for 50\/10GBASE-PQG-U3
141.10.4.32 PMD to MDI optical specifications for 50\/10GBASE-PQX-U2 <\/td>\n<\/tr>\n
107<\/td>\n141.10.4.33 PMD to MDI optical specifications for 50\/10GBASE-PQX-U3
141.10.4.34 PMD to MDI optical specifications for 50\/25GBASE-PQG-U2
141.10.4.35 PMD to MDI optical specifications for 50\/25GBASE-PQG-U3
141.10.4.36 PMD to MDI optical specifications for 50\/25GBASE-PQX-U2 <\/td>\n<\/tr>\n
108<\/td>\n141.10.4.37 PMD to MDI optical specifications for 50\/25GBASE-PQX-U3
141.10.4.38 PMD to MDI optical specifications for 50GBASE-PQG-U2
141.10.4.39 PMD to MDI optical specifications for 50GBASE-PQG-U3
141.10.4.40 PMD to MDI optical specifications for 50GBASE-PQX-U2 <\/td>\n<\/tr>\n
109<\/td>\n141.10.4.41 PMD to MDI optical specifications for 50GBASE-PQX-U3
141.10.4.42 Definitions of optical parameters and measurement methods <\/td>\n<\/tr>\n
110<\/td>\n141.10.4.43 Characteristics of the fiber optic cabling and MDI
141.10.4.44 Environmental specifications <\/td>\n<\/tr>\n
111<\/td>\n142. Physical Coding Sublayer and Physical Media Attachment for Nx25G-EPON
142.1 Overview
142.1.1 Conventions
142.1.1.1 State diagrams
142.1.1.2 Hexadecimal notation <\/td>\n<\/tr>\n
114<\/td>\n142.1.1.3 Timers
142.1.1.4 Operations on variables <\/td>\n<\/tr>\n
115<\/td>\n142.1.1.5 Operations on wrap-around variables
142.1.1.6 FIFO access operations <\/td>\n<\/tr>\n
116<\/td>\n142.1.2 Delay constraints
142.1.3 Burst transmission <\/td>\n<\/tr>\n
117<\/td>\n142.1.3.1 Default synchronization pattern parameters <\/td>\n<\/tr>\n
118<\/td>\n142.2 PCS transmit data path
142.2.1 64B\/66B line encoder <\/td>\n<\/tr>\n
120<\/td>\n142.2.2 Scrambler
142.2.3 64B\/66B to 256B\/257B transcoder
142.2.4 FEC encoder
142.2.4.1 Low-density parity-check coding <\/td>\n<\/tr>\n
123<\/td>\n142.2.4.2 FEC encoder processing <\/td>\n<\/tr>\n
125<\/td>\n142.2.4.3 Interleaver <\/td>\n<\/tr>\n
130<\/td>\n142.2.5 Transmit data path state diagrams
142.2.5.1 Constants <\/td>\n<\/tr>\n
131<\/td>\n142.2.5.2 Variables <\/td>\n<\/tr>\n
133<\/td>\n142.2.5.3 Functions <\/td>\n<\/tr>\n
134<\/td>\n142.2.5.4 State diagrams
142.2.5.4.1 PCS Input process <\/td>\n<\/tr>\n
135<\/td>\n142.2.5.4.2 PCS Framer process <\/td>\n<\/tr>\n
136<\/td>\n142.2.5.4.3 PCS Transmit process <\/td>\n<\/tr>\n
137<\/td>\n142.3 PCS receive data path
142.3.1 FEC decoder
142.3.1.1 Receive interleaving <\/td>\n<\/tr>\n
138<\/td>\n142.3.2 256B\/257B to 64B\/66B transcoder
142.3.3 Descrambler <\/td>\n<\/tr>\n
139<\/td>\n142.3.4 64B\/66B decoder <\/td>\n<\/tr>\n
140<\/td>\n142.3.5 Receive data path state diagrams
142.3.5.1 Constants <\/td>\n<\/tr>\n
141<\/td>\n142.3.5.2 Variables <\/td>\n<\/tr>\n
143<\/td>\n142.3.5.3 Functions <\/td>\n<\/tr>\n
144<\/td>\n142.3.5.4 OLT Synchronizer process state diagram
142.3.5.5 ONU Synchronizer process state diagram <\/td>\n<\/tr>\n
145<\/td>\n142.3.5.6 PCS ONU BER Monitor process <\/td>\n<\/tr>\n
146<\/td>\n142.3.5.7 PCS Output process
142.4 Nx25G-EPON PMA
142.4.1 Service Interface <\/td>\n<\/tr>\n
147<\/td>\n142.4.1.1 PMA_UNITDATA[i].request
142.4.1.1.1 Semantics of the service primitive
142.4.1.1.2 When generated
142.4.1.1.3 Effect of receipt
142.4.1.2 PMA_UNITDATA[i].indication
142.4.1.2.1 Semantics of the service primitive
142.4.1.2.2 When generated
142.4.1.2.3 Effect of receipt <\/td>\n<\/tr>\n
148<\/td>\n142.4.1.3 PMA_SIGNAL[i].request
142.4.1.4 PMA_SIGNAL[i].indication
142.4.1.4.1 Semantics of the service primitive
142.4.1.4.2 When generated
142.4.1.4.3 Effect of receipt
142.4.2 Differential encoder <\/td>\n<\/tr>\n
149<\/td>\n142.4.3 Differential decoder
142.4.4 PMA transmit clock
142.4.4.1 Loop-timing specifications for ONUs
142.4.5 TCDR measurement
142.4.5.1 Definitions
142.4.5.2 Test specification <\/td>\n<\/tr>\n
151<\/td>\n142.5 Protocol implementation conformance statement (PICS) proforma for Clause 142, Physical Coding Sublayer and Physical Media Attachment for Nx25G-EPON
142.5.1 Introduction
142.5.2 Identification
142.5.2.1 Implementation identification
142.5.2.2 Protocol summary <\/td>\n<\/tr>\n
152<\/td>\n142.5.3 PCS capabilities\/options
142.5.4 PCS processes <\/td>\n<\/tr>\n
153<\/td>\n142.5.5 PMA processes <\/td>\n<\/tr>\n
154<\/td>\n143. Multi-Channel Reconciliation Sublayer
143.1 Overview
143.2 Summary of major concepts <\/td>\n<\/tr>\n
155<\/td>\n143.2.1 Concept of a logical link and LLID
143.2.2 Concept of an MCRS channel
143.2.3 Binding of multiple MACs to multiple xMII instances <\/td>\n<\/tr>\n
156<\/td>\n143.2.4 Transmission and reception over multiple MCRS channels
143.2.4.1 Transmission unit
143.2.4.2 Transmission envelopes
143.2.4.3 Envelope headers <\/td>\n<\/tr>\n
157<\/td>\n143.2.4.4 Interpacket gap adjustment <\/td>\n<\/tr>\n
158<\/td>\n143.2.5 Dynamic channel bonding <\/td>\n<\/tr>\n
159<\/td>\n143.2.5.1 LLID transmission over multiple MCRS channels <\/td>\n<\/tr>\n
160<\/td>\n143.2.5.2 MCRS channel skew remediation mechanism
143.2.5.3 EnvTx and EnvRx buffers <\/td>\n<\/tr>\n
162<\/td>\n143.2.5.4 Envelope position alignment marker
143.2.6 MDIO addressing model for multi-channel architecture <\/td>\n<\/tr>\n
164<\/td>\n143.3 MCRS functional specifications
143.3.1 MCRS interfaces
143.3.1.1 PLS service primitives <\/td>\n<\/tr>\n
165<\/td>\n143.3.1.1.1 Mapping of PLS_DATA[ch].request primitive
143.3.1.1.2 Mapping of PLS_SIGNAL[ch].indication primitive
143.3.1.1.3 Mapping of PLS_DATA[ch].indication primitive <\/td>\n<\/tr>\n
166<\/td>\n143.3.1.1.4 Mapping of PLS_DATA_VALID[ch].indication primitive
143.3.1.1.5 Mapping of PLS_CARRIER[ch].indication primitive
143.3.1.2 MCRS control primitives
143.3.1.2.1 MCRS_CTRL[ch].request(link_id, epam, env_length) primitive
143.3.1.2.2 MCRS_CTRL[ch].indication() primitive
143.3.1.2.3 MCRS_ECH[ch].indication(Llid) primitive
143.3.1.3 XGMII interfaces
143.3.1.4 25GMII interfaces <\/td>\n<\/tr>\n
167<\/td>\n143.3.2 Envelope header format <\/td>\n<\/tr>\n
168<\/td>\n143.3.2.1 CRC8 calculation test sequences <\/td>\n<\/tr>\n
169<\/td>\n143.3.3 Transmit functional specifications <\/td>\n<\/tr>\n
170<\/td>\n143.3.3.1 Conventions
143.3.3.2 Application-specific parameter definitions
143.3.3.3 Constants <\/td>\n<\/tr>\n
171<\/td>\n143.3.3.4 Variables <\/td>\n<\/tr>\n
173<\/td>\n143.3.3.5 Functions <\/td>\n<\/tr>\n
175<\/td>\n143.3.3.6 State diagrams
143.3.3.6.1 Input process
143.3.3.6.2 Transmit process <\/td>\n<\/tr>\n
177<\/td>\n143.3.4 Receive functional specifications <\/td>\n<\/tr>\n
178<\/td>\n143.3.4.1 Conventions
143.3.4.2 Constants <\/td>\n<\/tr>\n
179<\/td>\n143.3.4.3 Variables <\/td>\n<\/tr>\n
180<\/td>\n143.3.4.4 Functions <\/td>\n<\/tr>\n
181<\/td>\n143.3.4.5 State diagrams
143.3.4.5.1 Receive process <\/td>\n<\/tr>\n
182<\/td>\n143.3.4.5.2 Output process
143.4 Nx25G-EPON MCRS requirements
143.4.1 Nx25G-EPON architecture <\/td>\n<\/tr>\n
184<\/td>\n143.4.1.1 MCRS channels
143.4.1.2 Symmetric and asymmetric data rates <\/td>\n<\/tr>\n
185<\/td>\n143.4.1.3 Nx25G-EPON application-specific parameters
143.4.1.3.1 Constants
143.4.1.3.2 Transmit variables
143.4.2 MCRS time synchronization <\/td>\n<\/tr>\n
186<\/td>\n143.4.3 Delay variability constraints
143.4.4 Asymmetric rate operation <\/td>\n<\/tr>\n
189<\/td>\n143.5 Protocol implementation conformance statement (PICS) proforma for Clause 143, Multi-Channel Reconciliation Sublayer
143.5.1 Introduction
143.5.2 Identification
143.5.2.1 Implementation identification
143.5.2.2 Protocol summary <\/td>\n<\/tr>\n
190<\/td>\n143.5.3 Generic MCRS
143.5.4 MCRS in Nx25G-EPON
143.5.4.1 Major capabilities\/option <\/td>\n<\/tr>\n
191<\/td>\n143.5.4.2 MCRS implementation in Nx25G-EPON <\/td>\n<\/tr>\n
192<\/td>\n144. Multipoint MAC Control for Nx25G-EPON
144.1 Overview
144.1.1 Principles of point-to-multipoint operation
144.1.1.1 Transmission arbitration <\/td>\n<\/tr>\n
193<\/td>\n144.1.1.2 Concept of logical links <\/td>\n<\/tr>\n
195<\/td>\n144.1.1.3 ONU discovery and registration
144.1.2 Position of Multipoint MAC Control (MPMC) within the IEEE 802.3 hierarchy
144.1.3 Functional block diagram
144.1.4 Service interfaces
144.1.4.1 MAC Control service (MCS) interface <\/td>\n<\/tr>\n
198<\/td>\n144.1.4.2 MAC Control interconnect (MCI)
144.1.4.3 MAC service Interface
144.1.4.4 MCRS Control interface
144.1.5 Conventions
144.2 Protocol-independent operation <\/td>\n<\/tr>\n
199<\/td>\n144.2.1 Control Parser and Control Multiplexer
144.2.1.1 Constants
144.2.1.2 Counters
144.2.1.3 Variables <\/td>\n<\/tr>\n
200<\/td>\n144.2.1.4 Functions <\/td>\n<\/tr>\n
201<\/td>\n144.2.1.5 Control Parser state diagram <\/td>\n<\/tr>\n
202<\/td>\n144.2.1.6 Control Multiplexer state diagram
144.3 Multipoint Control Protocol (MPCP)
144.3.1 Principles of Multipoint Control Protocol (MPCP)
144.3.1.1 Ranging measurement and time synchronization <\/td>\n<\/tr>\n
205<\/td>\n144.3.1.2 Granting access to the PON media by the OLT <\/td>\n<\/tr>\n
206<\/td>\n144.3.2 MPCP block diagram <\/td>\n<\/tr>\n
208<\/td>\n144.3.3 Delay variability requirements
144.3.4 Logical link identifier (LLID) types
144.3.4.1 Physical Layer ID (PLID) <\/td>\n<\/tr>\n
209<\/td>\n144.3.4.2 Management link ID (MLID)
144.3.4.3 User link ID (ULID)
144.3.4.4 Group link ID (GLID)
144.3.5 Allocation of LLID values <\/td>\n<\/tr>\n
210<\/td>\n144.3.6 MPCPDU structure and encoding <\/td>\n<\/tr>\n
211<\/td>\n144.3.6.1 GATE description <\/td>\n<\/tr>\n
213<\/td>\n144.3.6.2 REPORT description <\/td>\n<\/tr>\n
215<\/td>\n144.3.6.3 REGISTER_REQ description <\/td>\n<\/tr>\n
216<\/td>\n144.3.6.4 REGISTER description <\/td>\n<\/tr>\n
218<\/td>\n144.3.6.5 REGISTER_ACK description <\/td>\n<\/tr>\n
220<\/td>\n144.3.6.6 DISCOVERY description <\/td>\n<\/tr>\n
222<\/td>\n144.3.6.7 SYNC_PATTERN description <\/td>\n<\/tr>\n
224<\/td>\n144.3.7 Discovery process <\/td>\n<\/tr>\n
226<\/td>\n144.3.7.1 Constants <\/td>\n<\/tr>\n
227<\/td>\n144.3.7.2 Counters
144.3.7.3 Variables <\/td>\n<\/tr>\n
229<\/td>\n144.3.7.4 Functions <\/td>\n<\/tr>\n
230<\/td>\n144.3.7.5 Messages
144.3.7.6 Discovery Initiation state diagram <\/td>\n<\/tr>\n
231<\/td>\n144.3.7.7 Registration Completion state diagram <\/td>\n<\/tr>\n
232<\/td>\n144.3.7.8 ONU Registration state diagram <\/td>\n<\/tr>\n
234<\/td>\n144.3.8 Granting process
144.3.8.1 Constants <\/td>\n<\/tr>\n
235<\/td>\n144.3.8.2 Counters
144.3.8.3 Variables <\/td>\n<\/tr>\n
236<\/td>\n144.3.8.4 Functions
144.3.8.5 Timers
144.3.8.6 Messages
144.3.8.7 GATE Generation state diagram <\/td>\n<\/tr>\n
237<\/td>\n144.3.8.8 GATE Reception state diagram
144.3.8.9 OLT Envelope Commitment state diagram <\/td>\n<\/tr>\n
238<\/td>\n144.3.8.10 ONU Envelope Commitment state diagram <\/td>\n<\/tr>\n
239<\/td>\n144.3.8.11 Envelope Activation state diagram
144.3.9 Discovery process in dual-rate systems
144.3.9.1 OLT rate-specific discovery <\/td>\n<\/tr>\n
240<\/td>\n144.3.9.2 ONU rate-specific registration <\/td>\n<\/tr>\n
241<\/td>\n144.4 Channel Control Protocol (CCP)
144.4.1 CCP block diagram <\/td>\n<\/tr>\n
242<\/td>\n144.4.2 Principles of Channel Control Protocol <\/td>\n<\/tr>\n
243<\/td>\n144.4.2.1 Disabling a downstream channel at an ONU
144.4.2.2 Enabling a downstream channel at an ONU
144.4.2.3 Disabling an upstream channel at an ONU <\/td>\n<\/tr>\n
244<\/td>\n144.4.2.4 Enabling an upstream channel at an ONU
144.4.2.5 Local channel state changes at an ONU
144.4.3 CCPDU structure and encoding <\/td>\n<\/tr>\n
245<\/td>\n144.4.3.1 CC_REQUEST description <\/td>\n<\/tr>\n
247<\/td>\n144.4.3.2 CC_RESPONSE description <\/td>\n<\/tr>\n
248<\/td>\n144.4.4 Channel Control operation
144.4.4.1 Constants <\/td>\n<\/tr>\n
249<\/td>\n144.4.4.2 Variables <\/td>\n<\/tr>\n
250<\/td>\n144.4.4.3 Functions <\/td>\n<\/tr>\n
251<\/td>\n144.4.4.4 Messages
144.4.4.5 OLT CCPDU processing state diagram <\/td>\n<\/tr>\n
252<\/td>\n144.4.4.6 ONU CCPDU processing state diagram <\/td>\n<\/tr>\n
253<\/td>\n144.5 Protocol implementation conformance statement (PICS) proforma for Clause 144, Multipoint MAC Control for Nx25G-EPON
144.5.1 Introduction
144.5.2 Identification
144.5.2.1 Implementation identification
144.5.2.2 Protocol summary <\/td>\n<\/tr>\n
254<\/td>\n144.5.3 Major capabilities\/options
144.5.4 PICS proforma tables for Multipoint MAC Control
144.5.4.1 Clock tracking
144.5.4.2 LLID <\/td>\n<\/tr>\n
255<\/td>\n144.5.4.3 Protocol-independent state diagrams
144.5.4.4 MPCP <\/td>\n<\/tr>\n
258<\/td>\n144.5.4.5 CCP <\/td>\n<\/tr>\n
259<\/td>\nAnnex A (informative) Bibliography <\/td>\n<\/tr>\n
260<\/td>\nAnnex 31A (normative) MAC Control opcode assignments <\/td>\n<\/tr>\n
262<\/td>\nAnnex 142A (informative) Encoding example for QC-LDPC(16952,14392) FEC and interleaving
142A.1 Example of initial control seed sequence
142A.2 QC-LDPC FEC encoder test vectors <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE\/ISO\/IEC International Standard-Telecommunications and exchange between information technology systems — Requirements for local and metropolitan area networks — Part 3: Standard for Ethernet AMENDMENT 9: Physical layer specifications and management parameters for 25 Gb\/s and 50 Gb\/s passive optical networks<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2021<\/td>\n<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":400741,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-400734","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/400734","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/400741"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=400734"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=400734"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=400734"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}