| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 2<\/td>\n | undefined <\/td>\n<\/tr>\n | ||||||
| 6<\/td>\n | National foreword <\/td>\n<\/tr>\n | ||||||
| 9<\/td>\n | Annex ZA(normative)Normative references to international publicationswith their corresponding European publications <\/td>\n<\/tr>\n | ||||||
| 12<\/td>\n | English CONTENTS <\/td>\n<\/tr>\n | ||||||
| 19<\/td>\n | FOREWORD <\/td>\n<\/tr>\n | ||||||
| 21<\/td>\n | 1 Scope 2 Normative references 3 Terms and definitions <\/td>\n<\/tr>\n | ||||||
| 23<\/td>\n | 4 Synthetic testing techniques and methods for short-circuit breaking tests 4.1 Basic principles and general requirements for synthetic breaking test methods 4.1.1 General <\/td>\n<\/tr>\n | ||||||
| 24<\/td>\n | 4.1.2 High-current interval Figures Figure 1 \u2013 Interrupting process \u2013 Basic time intervals <\/td>\n<\/tr>\n | ||||||
| 25<\/td>\n | 4.1.3 Interaction interval 4.1.4 High-voltage interval Tables Table 1 \u2013 Tolerances and limits required during the high-current interval <\/td>\n<\/tr>\n | ||||||
| 27<\/td>\n | Figure 2 \u2013 Examples of evaluation of initial recovery voltage <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | 4.2 Synthetic test circuits and related specific requirements for breaking tests 4.2.1 Current injection methods <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | 4.2.2 Voltage injection method Figure 3 \u2013 Equivalent surge impedance of the voltage circuit for the current injection method <\/td>\n<\/tr>\n | ||||||
| 30<\/td>\n | 4.2.3 Duplicate circuit method (transformer or Skeats circuit) 4.2.4 Other synthetic test methods 4.3 Three-phase synthetic test methods <\/td>\n<\/tr>\n | ||||||
| 31<\/td>\n | Table 2 \u2013 Test circuits for test duties T100s and T100a Table 3 \u2013 Test parameters during three-phase interruption for test-duties T10, T30, T60 and T100s, kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 32<\/td>\n | Figure 4 \u2013 Reference lines of TRV with four-parameter for kpp = 1,5 Table 4 \u2013 Test parameters during three-phase interruption for test-duties T10, T30, T60 and T100s, kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 33<\/td>\n | Figure 5 \u2013 Reference lines of TRV with four-parameter for kpp = 1,3 Table 5 \u2013 Test parameters during three phase interruption for test-duties T10, T30, T60 and T100s, kpp = 1,2 <\/td>\n<\/tr>\n | ||||||
| 34<\/td>\n | 5 Synthetic testing techniques and methods for short-circuit making tests 5.1 Basic principles and general requirements for synthetic making test methods 5.1.1 General Figure 6 \u2013 Reference lines of TRV with four-parameter for kpp = 1,2 <\/td>\n<\/tr>\n | ||||||
| 36<\/td>\n | Figure 7 \u2013 Making process \u2013 Basic time intervals <\/td>\n<\/tr>\n | ||||||
| 37<\/td>\n | 5.1.2 High-voltage interval 5.1.3 Pre-arcing interval 5.1.4 Latching interval and fully closed position 5.2 Synthetic test circuit and related specific requirements for making tests 5.2.1 General 5.2.2 Test circuit and test requirements <\/td>\n<\/tr>\n | ||||||
| 39<\/td>\n | Figure 8 \u2013 Example of synthetic making circuit for single-phase tests <\/td>\n<\/tr>\n | ||||||
| 40<\/td>\n | Figure 9 \u2013 Example of synthetic making circuit for out-of-phase tests <\/td>\n<\/tr>\n | ||||||
| 41<\/td>\n | Figure 10 \u2013 Example of synthetic making circuit for three-phase tests (kpp = 1,5) <\/td>\n<\/tr>\n | ||||||
| 42<\/td>\n | 5.2.3 Alternative test method with reduced voltage <\/td>\n<\/tr>\n | ||||||
| 43<\/td>\n | 7 Type tests 7.102 General Table 6 \u2013 Symbols and abbreviated terms used for operation during synthetic tests <\/td>\n<\/tr>\n | ||||||
| 44<\/td>\n | 7.104 Demonstration of arcing times <\/td>\n<\/tr>\n | ||||||
| 47<\/td>\n | Figure 11 \u2013 Comparison of arcing time settings during three-phase direct tests (left) and three-phase synthetic (right) for T100s with kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 48<\/td>\n | Figure 12 \u2013 Comparison of arcing time settings during three-phase direct tests (left) and three-phase synthetic (right) for T100s with kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 51<\/td>\n | Figure 13 \u2013 Comparison of arcing time settings during three-phase direct tests (left) and three-phase synthetic tests (right) for T100a with kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 52<\/td>\n | Figure 14 \u2013 Comparison of arcing time settings during three-phase direct tests (left) and three-phase synthetic tests (right) for T100a with kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 55<\/td>\n | 7.107 Terminal fault tests <\/td>\n<\/tr>\n | ||||||
| 56<\/td>\n | Table 7 \u2013 Synthetic test methods for test duties T10, T30, T60,T100s, T100a, SP, DEF, OP and SLF <\/td>\n<\/tr>\n | ||||||
| 59<\/td>\n | 7.109 Short-line fault tests <\/td>\n<\/tr>\n | ||||||
| 60<\/td>\n | 7.110 Out-of-phase making and breaking tests 7.111 Capacitive current tests <\/td>\n<\/tr>\n | ||||||
| 62<\/td>\n | Figure 15 \u2013 Evaluation of recovery voltage during synthetic capacitive current switching testing <\/td>\n<\/tr>\n | ||||||
| 63<\/td>\n | Annexes Annex A (normative) Correction of di\/dt and TRV for test duty T100a A.1 General A.2 Reduction in di\/dt A.3 Corrected TRV for the first-pole-to-clear with required asymmetry <\/td>\n<\/tr>\n | ||||||
| 64<\/td>\n | Table A.1 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,3 and fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 65<\/td>\n | Table A.2 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,3 and fr = 60 Hz <\/td>\n<\/tr>\n | ||||||
| 67<\/td>\n | Table A.3 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,5 and fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 68<\/td>\n | Table A.4 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,5 and fr = 60 Hz Table A.5 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,2 and fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 69<\/td>\n | Table A.6 \u2013 Corrected TRV values for the first-pole-to-clear for kpp = 1,2 and fr = 60 Hz Table A.7 \u2013 Percentage of DC component and di\/dt at current zero for first-pole-to-clear for fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 70<\/td>\n | A.4 Correction of the di\/dt and TRV of the first-pole-to-clear for tests with intermediate asymmetry Table A.8 \u2013 Percentage of DC component and di\/dt at current zero for first-pole-to-clear for fr = 60 Hz <\/td>\n<\/tr>\n | ||||||
| 71<\/td>\n | A.5 Correction of the di\/dt and TRV of the second- or last-pole-to-clear with major extended loop with required asymmetry during three-phase tests A.6 Correction of the di\/dt and TRV during tests with a subsequent minor loop A.7 Calculation of the di\/dt and TRV of the first-pole-to-clear A.7.1 General A.7.2 Calculation of di\/dt <\/td>\n<\/tr>\n | ||||||
| 72<\/td>\n | A.7.3 Calculation of TRV <\/td>\n<\/tr>\n | ||||||
| 74<\/td>\n | A.7.4 Examples of calculation of di\/dt and TRV <\/td>\n<\/tr>\n | ||||||
| 76<\/td>\n | Annex B (normative) Tolerances on test quantities for type tests <\/td>\n<\/tr>\n | ||||||
| 77<\/td>\n | Table B.1 \u2013 Tolerances on test quantities for type tests <\/td>\n<\/tr>\n | ||||||
| 79<\/td>\n | Annex C (normative) Information to be given and results to be recorded for synthetic tests C.1 General C.2 Auxiliary circuit-breaker C.3 Test conditions C.4 Quantities to be recorded C.4.1 General C.4.2 Voltages C.4.3 Currents <\/td>\n<\/tr>\n | ||||||
| 80<\/td>\n | Annex D (normative) Test procedure using a three-phase current circuit and one voltage circuit D.1 Test circuit <\/td>\n<\/tr>\n | ||||||
| 81<\/td>\n | D.2 Test method D.2.1 General D.2.2 Test duty T100s(b) Figure D.1 \u2013 Example of a three-phase current circuit with single-phase synthetic injection <\/td>\n<\/tr>\n | ||||||
| 82<\/td>\n | Table D.1 \u2013 Demonstration of arcing times for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 83<\/td>\n | Figure D.2 \u2013 Representation of the testing conditions of Table D.1 <\/td>\n<\/tr>\n | ||||||
| 84<\/td>\n | Table D.2 \u2013 Alternative demonstration of arcing times for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 85<\/td>\n | Figure D.3 \u2013 Representation of the testing conditions of Table D.2 <\/td>\n<\/tr>\n | ||||||
| 86<\/td>\n | Table D.3 \u2013 Demonstration of arcing times for kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 87<\/td>\n | Figure D.4 \u2013 Representation of the testing conditions of Table D.3 <\/td>\n<\/tr>\n | ||||||
| 88<\/td>\n | Table D.4 \u2013 Alternative demonstration of arcing times for kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 89<\/td>\n | Figure D.5 \u2013 Representation of the testing conditions of Table D.4 <\/td>\n<\/tr>\n | ||||||
| 90<\/td>\n | D.2.3 Test duty T100a <\/td>\n<\/tr>\n | ||||||
| 91<\/td>\n | Table D.5 \u2013 Demonstration of arcing times for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 92<\/td>\n | Figure D.6 \u2013 Representation of the testing conditions of Table D.5 <\/td>\n<\/tr>\n | ||||||
| 93<\/td>\n | Table D.6 \u2013 Alternative demonstration of arcing times for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 94<\/td>\n | Figure D.7 \u2013 Representation of the testing conditions of Table D.6 <\/td>\n<\/tr>\n | ||||||
| 95<\/td>\n | Table D.7 \u2013 Demonstration of arcing times for kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 96<\/td>\n | Figure D.8 \u2013 Representation of the testing conditions of Table D.7 <\/td>\n<\/tr>\n | ||||||
| 97<\/td>\n | Table D.8 \u2013 Alternative demonstration of arcing times for kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 98<\/td>\n | Figure D.9 \u2013 Representation of the testing conditions of Table D.8 <\/td>\n<\/tr>\n | ||||||
| 99<\/td>\n | D.2.4 Combination of first-pole-to-clear factors 1,3 and 1,5 Table D.9 \u2013 Procedure for combining kpp = 1,5 and 1,3 during test-duties T10, T30, T60 and T100s(b) <\/td>\n<\/tr>\n | ||||||
| 100<\/td>\n | Table D.10 \u2013 Procedure for combining kpp = 1,5 and 1,3 during test-duty T100a <\/td>\n<\/tr>\n | ||||||
| 102<\/td>\n | Annex E (normative) Splitting of test duties in test series taking into account the associated TRV for each pole-to-clear E.1 General E.2 Test-duties T10, T30, T60, T100s(b), OP1 and OP2(b) E.2.1 Test procedure for first-pole-to-clear factors 1,5 and 2,5 Table E.1 \u2013 Test procedure for kpp = 1,5 and 2,5 <\/td>\n<\/tr>\n | ||||||
| 103<\/td>\n | E.2.2 Test procedure for first-pole-to-clear factors 1,3 and 2,0 Table E.2 \u2013 Test procedure for kpp = 1,3 and 2,0 <\/td>\n<\/tr>\n | ||||||
| 104<\/td>\n | E.2.3 Test procedure for first-pole-to-clear factor 1,2 Table E.3 \u2013 Simplified test procedure for kpp = 1,3 and 2,0 <\/td>\n<\/tr>\n | ||||||
| 105<\/td>\n | E.3 Test duty T100a E.3.1 General Table E.4 \u2013 Test procedure for kpp = 1,2 Table E.5 \u2013 Simplified test procedure for kpp = 1,2 <\/td>\n<\/tr>\n | ||||||
| 106<\/td>\n | E.3.2 Test procedure for first-pole-to-clear factor 1,5 Table E.6 \u2013 Test procedure for asymmetrical currents for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 107<\/td>\n | E.3.3 Test procedure for first-pole-to-clear factor 1,3 Figure E.1 \u2013 Example of graphical representation of the tests shown in Table E.6 <\/td>\n<\/tr>\n | ||||||
| 108<\/td>\n | Table E.7 \u2013 Test procedure for asymmetrical currents for kpp = 1,3 <\/td>\n<\/tr>\n | ||||||
| 109<\/td>\n | E.3.4 Test procedure for first-pole-to-clear factor 1,2 Figure E.2 \u2013 Example of graphical representation of the tests shown in Table E.7 and Table E.8 <\/td>\n<\/tr>\n | ||||||
| 110<\/td>\n | E.4 Combination of first-pole-to-clear factors E.4.1 General E.4.2 Combination of first-pole-to-clear factors 1,3 and 1,5 for test duties T10, T30, T60 and T100s(b) Table E.8 \u2013 Test procedure for asymmetrical currents for kpp = 1,2 <\/td>\n<\/tr>\n | ||||||
| 111<\/td>\n | E.4.3 Combination of first-pole-to-clear factors 2,0 and 2,5 for test duties OP1 and OP2(b) Table E.9 \u2013 Procedure for combining kpp = 1,3 and 1,5 for test-duties T10, T30, T60 and T100s(b) <\/td>\n<\/tr>\n | ||||||
| 112<\/td>\n | E.4.4 Combination of first-pole-to-clear factors 1,3 and 1,5 for test duty T100a Table E.10 \u2013 Procedure for combining kpp = 2,0 and 2,5 for test-duties OP1 and OP2(b) <\/td>\n<\/tr>\n | ||||||
| 113<\/td>\n | Table E.11 \u2013 Procedure for combining kpp = 1,5 and 1,3 for test-duty T100a <\/td>\n<\/tr>\n | ||||||
| 114<\/td>\n | Table E.12 \u2013 Required test parameters for different asymmetrical conditions in the case of kpp = 1,5, fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 116<\/td>\n | Table E.13 \u2013 Required test parameters for different asymmetrical conditions in the case of a kpp = 1,3, fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 118<\/td>\n | Table E.14 \u2013 Required test parameters for different asymmetrical conditions in the case of kpp = 1,2, fr = 50 Hz <\/td>\n<\/tr>\n | ||||||
| 119<\/td>\n | Table E.15 \u2013 Required test parameters for different asymmetrical conditions in the case of kpp = 1,5, fr = 60 Hz <\/td>\n<\/tr>\n | ||||||
| 121<\/td>\n | Table E.16 \u2013 Required test parameters for different asymmetrical conditions in the case of kpp = 1,3, fr = 60 Hz <\/td>\n<\/tr>\n | ||||||
| 123<\/td>\n | Table E.17 \u2013 Required test parameters for different asymmetrical conditions in the case of kpp = 1,2, fr = 60 Hz <\/td>\n<\/tr>\n | ||||||
| 124<\/td>\n | Annex F (informative) Three-phase synthetic test circuits F.1 General F.2 Three-phase synthetic combined circuit <\/td>\n<\/tr>\n | ||||||
| 125<\/td>\n | Figure F.1 \u2013 Three-phase synthetic combined circuit <\/td>\n<\/tr>\n | ||||||
| 126<\/td>\n | Figure F.2 \u2013 Waveshapes of currents, phase-to-ground and phase-to phase voltages during a three-phase synthetic test (T100s; kpp = 1,5) performed according to the three-phase synthetic combined circuit <\/td>\n<\/tr>\n | ||||||
| 127<\/td>\n | F.3 Three-phase synthetic circuit with injection in all phases Figure F.3 \u2013 Three-phase synthetic circuit with injection in all phases for kpp = 1,5 <\/td>\n<\/tr>\n | ||||||
| 128<\/td>\n | F.4 Three-phase synthetic circuit with injection in two phases Figure F.4 \u2013 Waveshapes of currents and phase-to-ground voltages during a three-phase synthetic test (T100s; kpp = 1,5) performed according to the three-phase synthetic circuit with injection in all phases <\/td>\n<\/tr>\n | ||||||
| 129<\/td>\n | Figure F.5 \u2013 Three-phase synthetic circuit for terminal fault tests with kpp = 1,3 (current injection method) <\/td>\n<\/tr>\n | ||||||
| 130<\/td>\n | Figure F.6 \u2013 Waveshapes of currents and phase-to-ground voltages during a three phase synthetic test (T100s; kpp = 1,3 ) performed according to the three-phase synthetic circuit shown in Figure F.5 <\/td>\n<\/tr>\n | ||||||
| 131<\/td>\n | Figure F.7 \u2013 TRV voltages waveshapes of the test circuit described in Figure F.5 <\/td>\n<\/tr>\n | ||||||
| 132<\/td>\n | Annex G (informative) Examples of test circuits for metal-enclosed and dead tank circuit-breakers <\/td>\n<\/tr>\n | ||||||
| 133<\/td>\n | Figure G.1 \u2013 Example of a test circuit for unit testing (circuit-breaker with interaction due to gas circulation) <\/td>\n<\/tr>\n | ||||||
| 134<\/td>\n | Figure G.2 \u2013 Oscillogram corresponding to Figure G.1 \u2013Example of the required TRVs to be applied between the terminals of the unit(s) under test and between the live parts and the insulated enclosure <\/td>\n<\/tr>\n | ||||||
| 135<\/td>\n | Figure G.3 \u2013 Example of test circuit using two voltage circuits for breaking tests <\/td>\n<\/tr>\n | ||||||
| 136<\/td>\n | Figure G.4 \u2013 Example of test circuit using two voltage circuits for breaking tests <\/td>\n<\/tr>\n | ||||||
| 137<\/td>\n | Figure G.5 \u2013 Example of a synthetic test circuit for unit testing (if unit testing is allowed as per 7.102.4.2 of IEC 62271-100:2021) <\/td>\n<\/tr>\n | ||||||
| 138<\/td>\n | Figure G.6 \u2013 Oscillogram corresponding to Figure G.3 \u2013Example of the required TRVs to be applied between the terminals of the unit(s) under test and between the live parts and the insulated enclosure <\/td>\n<\/tr>\n | ||||||
| 139<\/td>\n | Figure G.7 \u2013 Example of a capacitive current injection circuit with enclosure of the circuit-breaker energized <\/td>\n<\/tr>\n | ||||||
| 140<\/td>\n | Figure G.8 \u2013 Example of a capacitive synthetic circuit using two power-frequency circuits and with the enclosure of the circuit-breaker energized <\/td>\n<\/tr>\n | ||||||
| 141<\/td>\n | Figure G.9 \u2013 Example of a capacitive synthetic current injection circuit \u2013 Unit testing on half a pole of a circuit-breaker with two units per pole \u2013 Enclosure energized with DC voltage <\/td>\n<\/tr>\n | ||||||
| 142<\/td>\n | Figure G.10 \u2013 Example of a synthetic making circuit for out-of-phase tests <\/td>\n<\/tr>\n | ||||||
| 143<\/td>\n | Annex H (informative) Step-by-step method to prolong arcing Figure H.1 \u2013 Example of a re-ignition circuit diagram for prolonging arc-duration <\/td>\n<\/tr>\n | ||||||
| 144<\/td>\n | Figure H.2 \u2013 Example of waveforms obtained during a symmetrical test using the circuit in Figure H.1 <\/td>\n<\/tr>\n | ||||||
| 145<\/td>\n | Annex I (informative) Synthetic methods for capacitive current tests I.1 General I.2 Recovery voltage I.3 Combined current and voltage circuits <\/td>\n<\/tr>\n | ||||||
| 146<\/td>\n | I.4 Making tests I.5 Current chopping I.6 Examples test circuits <\/td>\n<\/tr>\n | ||||||
| 148<\/td>\n | Figure I.1 \u2013 Power-frequency circuits in parallel <\/td>\n<\/tr>\n | ||||||
| 149<\/td>\n | Figure I.2 \u2013 Current injection circuit <\/td>\n<\/tr>\n | ||||||
| 150<\/td>\n | Figure I.3 \u2013 Power-frequency current injection circuit <\/td>\n<\/tr>\n | ||||||
| 151<\/td>\n | Figure I.4 \u2013 Current injection circuit, recovery voltage applied to both terminals of the circuit-breaker <\/td>\n<\/tr>\n | ||||||
| 152<\/td>\n | Figure I.5 \u2013 Current injection circuit with decay compensation <\/td>\n<\/tr>\n | ||||||
| 153<\/td>\n | Figure I.6 \u2013 LC oscillating circuit <\/td>\n<\/tr>\n | ||||||
| 154<\/td>\n | Figure I.7 \u2013 Inrush making current test circuit <\/td>\n<\/tr>\n | ||||||
| 155<\/td>\n | Annex J (normative) Synthetic test methods for circuit-breakers with opening resistors J.1 General J.2 Conditions J.2.1 General J.2.2 Transient recovery voltage interval J.2.3 Power-frequency recovery voltage interval J.3 Multiple step test procedure J.3.1 General <\/td>\n<\/tr>\n | ||||||
| 156<\/td>\n | J.3.2 Test to verify the re-ignition behaviour of the making and breaking unit <\/td>\n<\/tr>\n | ||||||
| 157<\/td>\n | J.3.3 Test to verify the re-ignition behaviour of the making and breaking unit during short circuit test duties with any test method Figure J.1 \u2013 Test circuit to verify re-ignition behaviour of the making and breaking unit using current injection method <\/td>\n<\/tr>\n | ||||||
| 158<\/td>\n | J.3.4 Tests on resistor switch(s) Figure J.2 \u2013 Test circuit to verify re-ignition behaviour of the making and breaking unit <\/td>\n<\/tr>\n | ||||||
| 159<\/td>\n | J.4 Test requirements J.4.1 General Figure J.3 \u2013 Test circuit on the resistor switch <\/td>\n<\/tr>\n | ||||||
| 160<\/td>\n | J.4.2 Testing of the making and breaking unit Figure J.4 \u2013 Example of test circuit for capacitive current switching tests on the making and breaking unit <\/td>\n<\/tr>\n | ||||||
| 161<\/td>\n | J.4.3 Testing of the resistor switch J.4.4 Test of the resistor stack Figure J.5 \u2013 Example of test circuit for capacitive current switching tests on the resistor switch <\/td>\n<\/tr>\n | ||||||
| 162<\/td>\n | Annex K (informative) Combination of current injection and voltage injection methods K.1 Current injection methods K.2 Voltage injection methods K.3 Combined current and voltage injection circuits K.3.1 General K.3.2 Combined current and voltage injection circuit with application of full test voltage to earth K.3.3 Combined current and voltage injection circuit with separated application of test voltage <\/td>\n<\/tr>\n | ||||||
| 163<\/td>\n | Figure K.1 \u2013 Example of combined current and voltage injection circuit with application of full test voltage to earth <\/td>\n<\/tr>\n | ||||||
| 164<\/td>\n | Figure K.2 \u2013 Example of combined current and voltage injection circuit with separated application of test voltage <\/td>\n<\/tr>\n | ||||||
| 165<\/td>\n | Bibliography <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" High-voltage switchgear and controlgear – Synthetic testing<\/b><\/p>\n |