Revision Standard – Active. Ethernet local area network operation is specified for selected speeds of operation from 1 Mb\/s to 400 Gb\/s using a common media access control (MAC) specification and management information base (MIB). The Carrier Sense Multiple Access with Collision Detection (CSMA\/CD) MAC protocol specifies shared medium (half duplex) operation, as well as full duplex operation. Speed specific Media Independent Interfaces (MIIs) allow use of selected Physical Layer devices (PHYs) for operation over coaxial, twisted pair or fiber optic cables, or electrical backplanes. System considerations for multisegment shared access networks describe the use of Repeaters that are defined for operational speeds up to 1000 Mb\/s. Local Area Network (LAN) operation is supported at all speeds. Other specified capabilities include: various PHY types for access networks, PHYs suitable for metropolitan area network applications, and the provision of power over selected twisted pair PHY types.<\/p>\n
| PDF Pages<\/th>\n | PDF Title<\/th>\n<\/tr>\n | ||||||
|---|---|---|---|---|---|---|---|
| 1<\/td>\n | IEEE Std 802.3-2022 Front Cover <\/td>\n<\/tr>\n | ||||||
| 2<\/td>\n | Title page <\/td>\n<\/tr>\n | ||||||
| 4<\/td>\n | Important Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n | ||||||
| 8<\/td>\n | Participants <\/td>\n<\/tr>\n | ||||||
| 26<\/td>\n | Introduction <\/td>\n<\/tr>\n | ||||||
| 28<\/td>\n | Acknowledgments <\/td>\n<\/tr>\n | ||||||
| 29<\/td>\n | Contents <\/td>\n<\/tr>\n | ||||||
| 168<\/td>\n | 1. Introduction 1.1 Overview 1.1.1 Scope 1.1.2 Basic concepts 1.1.2.1 Half duplex operation <\/td>\n<\/tr>\n | ||||||
| 169<\/td>\n | 1.1.2.2 Full duplex operation 1.1.3 Architectural perspectives 1.1.3.1 Architectural rationale <\/td>\n<\/tr>\n | ||||||
| 170<\/td>\n | 1.1.3.2 Compatibility interfaces <\/td>\n<\/tr>\n | ||||||
| 173<\/td>\n | 1.1.4 Layer interfaces 1.1.5 Application areas 1.1.6 Word usage <\/td>\n<\/tr>\n | ||||||
| 174<\/td>\n | 1.2 Notation 1.2.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 175<\/td>\n | 1.2.2 Service specification method and notation 1.2.2.1 Classification of service primitives <\/td>\n<\/tr>\n | ||||||
| 176<\/td>\n | 1.2.3 Physical Layer and media notation 1.2.4 Physical Layer message notation 1.2.5 Hexadecimal notation <\/td>\n<\/tr>\n | ||||||
| 177<\/td>\n | 1.2.6 Accuracy and resolution of numerical quantities 1.2.7 Qm.n number format 1.2.8 Em dash (\u2014) in a table cell 1.3 Normative references <\/td>\n<\/tr>\n | ||||||
| 188<\/td>\n | 1.4 Definitions <\/td>\n<\/tr>\n | ||||||
| 228<\/td>\n | 1.5 Abbreviations <\/td>\n<\/tr>\n | ||||||
| 236<\/td>\n | 2. Media Access Control (MAC) service specification 2.1 Scope and field of application 2.2 Overview of the service 2.2.1 General description of services provided by the layer 2.2.2 Model used for the service specification 2.2.3 Overview of interactions <\/td>\n<\/tr>\n | ||||||
| 237<\/td>\n | 2.2.4 Basic services 2.3 Detailed service specification 2.3.1 MA_DATA.request 2.3.1.1 Function 2.3.1.2 Semantics of the service primitive 2.3.1.3 When generated 2.3.1.4 Effect of receipt 2.3.1.5 Additional comments <\/td>\n<\/tr>\n | ||||||
| 238<\/td>\n | 2.3.2 MA_DATA.indication 2.3.2.1 Function 2.3.2.2 Semantics of the service primitive 2.3.2.3 When generated <\/td>\n<\/tr>\n | ||||||
| 239<\/td>\n | 2.3.2.4 Effect of receipt 2.3.2.5 Additional comments <\/td>\n<\/tr>\n | ||||||
| 240<\/td>\n | 3. Media Access Control (MAC) frame and packet specifications 3.1 Overview 3.1.1 Packet format <\/td>\n<\/tr>\n | ||||||
| 241<\/td>\n | 3.1.2 Service interface mappings 3.2 Elements of the MAC frame and packet 3.2.1 Preamble field 3.2.2 Start Frame Delimiter (SFD) field 3.2.3 Address fields <\/td>\n<\/tr>\n | ||||||
| 242<\/td>\n | 3.2.3.1 Address designation 3.2.4 Destination Address field <\/td>\n<\/tr>\n | ||||||
| 243<\/td>\n | 3.2.5 Source Address field 3.2.6 Length\/Type field 3.2.7 MAC Client Data field <\/td>\n<\/tr>\n | ||||||
| 244<\/td>\n | 3.2.8 Pad field 3.2.9 Frame Check Sequence (FCS) field 3.2.10 Extension field <\/td>\n<\/tr>\n | ||||||
| 245<\/td>\n | 3.3 Order of bit transmission 3.4 Invalid MAC frame <\/td>\n<\/tr>\n | ||||||
| 246<\/td>\n | 4. Media Access Control 4.1 Functional model of the MAC method 4.1.1 Overview <\/td>\n<\/tr>\n | ||||||
| 247<\/td>\n | 4.1.2 CSMA\/CD operation 4.1.2.1 Normal operation 4.1.2.1.1 Transmission without contention <\/td>\n<\/tr>\n | ||||||
| 248<\/td>\n | 4.1.2.1.2 Reception without contention 4.1.2.2 Access interference and recovery <\/td>\n<\/tr>\n | ||||||
| 249<\/td>\n | 4.1.3 Relationships to the MAC client and Physical Layers 4.2 CSMA\/CD Media Access Control (MAC) method: Precise specification 4.2.1 Introduction 4.2.2 Overview of the procedural model <\/td>\n<\/tr>\n | ||||||
| 250<\/td>\n | 4.2.2.1 Ground rules for the procedural model 4.2.2.2 Use of Pascal in the procedural model <\/td>\n<\/tr>\n | ||||||
| 251<\/td>\n | 4.2.2.3 Organization of the procedural model 4.2.2.4 Layer management extensions to procedural model <\/td>\n<\/tr>\n | ||||||
| 252<\/td>\n | 4.2.3 Packet transmission model <\/td>\n<\/tr>\n | ||||||
| 257<\/td>\n | 4.2.3.1 Transmit data encapsulation 4.2.3.2 Transmit media access management 4.2.3.2.1 Deference <\/td>\n<\/tr>\n | ||||||
| 258<\/td>\n | 4.2.3.2.2 Interpacket gap 4.2.3.2.3 Collision handling (half duplex mode only) 4.2.3.2.4 Collision detection and enforcement (half duplex mode only) 4.2.3.2.5 Collision backoff and retransmission (half duplex mode only) <\/td>\n<\/tr>\n | ||||||
| 259<\/td>\n | 4.2.3.2.6 Full duplex transmission 4.2.3.2.7 Packet bursting (half duplex mode only) <\/td>\n<\/tr>\n | ||||||
| 260<\/td>\n | 4.2.3.3 Minimum frame size 4.2.3.4 Carrier extension (half duplex mode only) 4.2.4 Frame reception model 4.2.4.1 Receive data decapsulation 4.2.4.1.1 Address recognition <\/td>\n<\/tr>\n | ||||||
| 261<\/td>\n | 4.2.4.1.2 Frame check sequence validation 4.2.4.1.3 Frame disassembly 4.2.4.2 Receive media access management 4.2.4.2.1 Framing <\/td>\n<\/tr>\n | ||||||
| 262<\/td>\n | 4.2.4.2.2 Collision filtering 4.2.5 Preamble generation 4.2.6 Start frame sequence 4.2.7 Global declarations 4.2.7.1 Common constants, types, and variables <\/td>\n<\/tr>\n | ||||||
| 264<\/td>\n | 4.2.7.2 Transmit state variables <\/td>\n<\/tr>\n | ||||||
| 265<\/td>\n | 4.2.7.3 Receive state variables 4.2.7.4 State variable initialization <\/td>\n<\/tr>\n | ||||||
| 266<\/td>\n | 4.2.8 Frame transmission <\/td>\n<\/tr>\n | ||||||
| 273<\/td>\n | 4.2.9 Frame reception <\/td>\n<\/tr>\n | ||||||
| 277<\/td>\n | 4.2.10 Common procedures 4.3 Interfaces to\/from adjacent layers 4.3.1 Overview 4.3.2 MAC service <\/td>\n<\/tr>\n | ||||||
| 278<\/td>\n | 4.3.2.1 MAC client transmit interface state diagram 4.3.2.1.1 Variables 4.3.2.1.2 Functions 4.3.2.1.3 Messages 4.3.2.1.4 MAC client transmit interface state diagram 4.3.2.2 MAC client receive interface state diagram 4.3.2.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 279<\/td>\n | 4.3.2.2.2 Functions 4.3.2.2.3 Messages <\/td>\n<\/tr>\n | ||||||
| 280<\/td>\n | 4.3.2.2.4 MAC client receive interface state diagram 4.3.3 Services required from the Physical Layer <\/td>\n<\/tr>\n | ||||||
| 282<\/td>\n | 4.4 Specific implementations 4.4.1 Compatibility overview <\/td>\n<\/tr>\n | ||||||
| 283<\/td>\n | 4.4.2 MAC parameters <\/td>\n<\/tr>\n | ||||||
| 284<\/td>\n | 4.4.3 Configuration guidelines <\/td>\n<\/tr>\n | ||||||
| 285<\/td>\n | 5. Layer Management 5.1 Introduction 5.1.1 Systems Management overview 5.1.2 Layer Management model <\/td>\n<\/tr>\n | ||||||
| 286<\/td>\n | 5.1.3 Packages 5.1.4 Conformance requirements 5.2 Management facilities 5.2.1 Introduction 5.2.2 DTE MAC Sublayer Management facilities <\/td>\n<\/tr>\n | ||||||
| 288<\/td>\n | 5.2.2.1 DTE MAC sublayer attributes 5.2.2.1.1 aMACID 5.2.2.1.2 aFramesTransmittedOK 5.2.2.1.3 aSingleCollisionFrames 5.2.2.1.4 aMultipleCollisionFrames <\/td>\n<\/tr>\n | ||||||
| 289<\/td>\n | 5.2.2.1.5 aFramesReceivedOK 5.2.2.1.6 aFrameCheckSequenceErrors 5.2.2.1.7 aAlignmentErrors 5.2.2.1.8 aOctetsTransmittedOK <\/td>\n<\/tr>\n | ||||||
| 290<\/td>\n | 5.2.2.1.9 aFramesWithDeferredXmissions 5.2.2.1.10 aLateCollisions 5.2.2.1.11 aFramesAbortedDueToXSColls 5.2.2.1.12 aFramesLostDueToIntMACXmitError <\/td>\n<\/tr>\n | ||||||
| 291<\/td>\n | 5.2.2.1.13 aCarrierSenseErrors 5.2.2.1.14 aOctetsReceivedOK 5.2.2.1.15 aFramesLostDueToIntMACRcvError 5.2.2.1.16 aPromiscuousStatus <\/td>\n<\/tr>\n | ||||||
| 292<\/td>\n | 5.2.2.1.17 aReadMulticastAddressList 5.2.2.1.18 aMulticastFramesXmittedOK 5.2.2.1.19 aBroadcastFramesXmittedOK 5.2.2.1.20 aFramesWithExcessiveDeferral <\/td>\n<\/tr>\n | ||||||
| 293<\/td>\n | 5.2.2.1.21 aMulticastFramesReceivedOK 5.2.2.1.22 aBroadcastFramesReceivedOK 5.2.2.1.23 aInRangeLengthErrors 5.2.2.1.24 aOutOfRangeLengthField <\/td>\n<\/tr>\n | ||||||
| 294<\/td>\n | 5.2.2.1.25 aFrameTooLongErrors 5.2.2.1.26 aMACEnableStatus 5.2.2.1.27 aTransmitEnableStatus 5.2.2.1.28 aMulticastReceiveStatus <\/td>\n<\/tr>\n | ||||||
| 295<\/td>\n | 5.2.2.1.29 aReadWriteMACAddress 5.2.2.1.30 aCollisionFrames 5.2.2.2 DTE MAC Sublayer actions 5.2.2.2.1 acInitializeMAC 5.2.2.2.2 acAddGroupAddress <\/td>\n<\/tr>\n | ||||||
| 296<\/td>\n | 5.2.2.2.3 acDeleteGroupAddress 5.2.2.2.4 acExecuteSelfTest 5.2.2.3 ResourceTypeID Managed Object Class 5.2.2.3.1 ResourceTypeID 5.2.3 DTE Physical Sublayer Management facilities 5.2.3.1 DTE Physical Sublayer attributes 5.2.3.1.1 aPHYID 5.2.3.1.2 aSQETestErrors <\/td>\n<\/tr>\n | ||||||
| 297<\/td>\n | 5.2.4 DTE Management procedural model 5.2.4.1 Common constants and types 5.2.4.2 Transmit variables and procedures <\/td>\n<\/tr>\n | ||||||
| 299<\/td>\n | 5.2.4.3 Receive variables and procedures <\/td>\n<\/tr>\n | ||||||
| 301<\/td>\n | 5.2.4.4 Common procedures <\/td>\n<\/tr>\n | ||||||
| 302<\/td>\n | 6. Physical Signaling (PLS) service specifications 6.1 Scope and field of application 6.2 Overview of the service 6.2.1 General description of services provided by the layer 6.2.2 Model used for the service specification 6.2.3 Overview of interactions <\/td>\n<\/tr>\n | ||||||
| 303<\/td>\n | 6.2.4 Basic services and options 6.3 Detailed service specification 6.3.1 Peer-to-peer service primitives 6.3.1.1 PLS_DATA.request 6.3.1.1.1 Function 6.3.1.1.2 Semantics of the service primitive 6.3.1.1.3 When generated 6.3.1.1.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 304<\/td>\n | 6.3.1.2 PLS_DATA.indication 6.3.1.2.1 Function 6.3.1.2.2 Semantics of the service primitive 6.3.1.2.3 When generated 6.3.1.2.4 Effect of receipt 6.3.2 Sublayer-to-sublayer service primitives 6.3.2.1 PLS_CARRIER.indication 6.3.2.1.1 Function 6.3.2.1.2 Semantics of the service primitive 6.3.2.1.3 When generated 6.3.2.1.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 305<\/td>\n | 6.3.2.2 PLS_SIGNAL.indication 6.3.2.2.1 Function 6.3.2.2.2 Semantics of the service primitive 6.3.2.2.3 When generated 6.3.2.2.4 Effect of receipt 6.3.2.3 PLS_DATA_VALID.indication 6.3.2.3.1 Function 6.3.2.3.2 Semantics of the service primitive 6.3.2.3.3 When generated 6.3.2.3.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 306<\/td>\n | 7. Physical Signaling (PLS) and Attachment Unit Interface (AUI) specifications 7.1 Scope 7.1.1 Definitions 7.1.2 Summary of major concepts <\/td>\n<\/tr>\n | ||||||
| 307<\/td>\n | 7.1.3 Application 7.1.4 Modes of operation 7.1.5 Allocation of function 7.2 Functional specification 7.2.1 PLS\u2013PMA (DTE\u2013MAU) Interface protocol <\/td>\n<\/tr>\n | ||||||
| 308<\/td>\n | 7.2.1.1 PLS to PMA messages 7.2.1.1.1 output message <\/td>\n<\/tr>\n | ||||||
| 309<\/td>\n | 7.2.1.1.2 output_idle message 7.2.1.1.3 normal message 7.2.1.1.4 isolate message (optional) 7.2.1.1.5 mau_request message (optional) <\/td>\n<\/tr>\n | ||||||
| 311<\/td>\n | 7.2.1.2 PMA to PLS interface 7.2.1.2.1 input message <\/td>\n<\/tr>\n | ||||||
| 313<\/td>\n | 7.2.1.2.2 input_idle message 7.2.1.2.3 signal_quality_error message 7.2.1.2.4 mau_available message 7.2.1.2.5 mau_not_available message (optional) <\/td>\n<\/tr>\n | ||||||
| 314<\/td>\n | 7.2.2 PLS interface to MAC and management entities 7.2.2.1 PLS\u2013MAC interface 7.2.2.1.1 OUTPUT_UNIT 7.2.2.1.2 OUTPUT_STATUS 7.2.2.1.3 INPUT_UNIT 7.2.2.1.4 CARRIER_STATUS <\/td>\n<\/tr>\n | ||||||
| 315<\/td>\n | 7.2.2.1.5 SIGNAL_STATUS 7.2.2.1.6 DATA_VALID_STATUS 7.2.2.2 PLS\u2013management entity interface 7.2.2.2.1 RESET_REQUEST <\/td>\n<\/tr>\n | ||||||
| 316<\/td>\n | 7.2.2.2.2 RESET_RESPONSE 7.2.2.2.3 MODE_CONTROL 7.2.2.2.4 SQE_TEST 7.2.3 Frame structure <\/td>\n<\/tr>\n | ||||||
| 317<\/td>\n | 7.2.3.1 Silence 7.2.3.2 Preamble 7.2.3.3 Start of Frame Delimiter (SFD) 7.2.3.4 Data 7.2.3.5 End of transmission delimiter 7.2.4 PLS functions <\/td>\n<\/tr>\n | ||||||
| 318<\/td>\n | 7.2.4.1 Reset and Identify function 7.2.4.2 Mode function <\/td>\n<\/tr>\n | ||||||
| 319<\/td>\n | 7.2.4.3 Output function 7.2.4.4 Input function 7.2.4.5 Error Sense function <\/td>\n<\/tr>\n | ||||||
| 320<\/td>\n | 7.2.4.6 Carrier Sense function 7.3 Signal characteristics 7.3.1 Signal encoding 7.3.1.1 Data encoding <\/td>\n<\/tr>\n | ||||||
| 324<\/td>\n | 7.3.1.2 Control encoding <\/td>\n<\/tr>\n | ||||||
| 325<\/td>\n | 7.3.2 Signaling rate 7.3.3 Signaling levels 7.4 Electrical characteristics 7.4.1 Driver characteristics 7.4.1.1 Differential output voltage, loaded <\/td>\n<\/tr>\n | ||||||
| 327<\/td>\n | 7.4.1.2 Requirements after idle 7.4.1.3 AC common-mode output voltage 7.4.1.4 Differential output voltage, open circuit 7.4.1.5 DC common-mode output voltage <\/td>\n<\/tr>\n | ||||||
| 328<\/td>\n | 7.4.1.6 Fault tolerance 7.4.2 Receiver characteristics 7.4.2.1 Receiver threshold levels <\/td>\n<\/tr>\n | ||||||
| 329<\/td>\n | 7.4.2.2 AC differential input impedance 7.4.2.3 AC common-mode range 7.4.2.4 Total common-mode range <\/td>\n<\/tr>\n | ||||||
| 330<\/td>\n | 7.4.2.5 Idle input behavior 7.4.2.6 Fault tolerance 7.4.3 AUI cable characteristics <\/td>\n<\/tr>\n | ||||||
| 331<\/td>\n | 7.4.3.1 Conductor size 7.4.3.2 Pair-to-pair balanced crosstalk 7.4.3.3 Differential characteristic impedance 7.4.3.4 Transfer impedance 7.4.3.5 Attenuation 7.4.3.6 Timing jitter 7.4.3.7 Delay <\/td>\n<\/tr>\n | ||||||
| 332<\/td>\n | 7.5 Functional description of interchange circuits 7.5.1 General 7.5.2 Definition of interchange circuits <\/td>\n<\/tr>\n | ||||||
| 333<\/td>\n | 7.5.2.1 Circuit DO\u2013Data Out 7.5.2.2 Circuit DI\u2013Data In 7.5.2.3 Circuit CO\u2013Control Out (optional) 7.5.2.4 Circuit CI\u2013Control In <\/td>\n<\/tr>\n | ||||||
| 334<\/td>\n | 7.5.2.5 Circuit VP\u2013Voltage Plus 7.5.2.6 Circuit VC\u2013Voltage Common 7.5.2.7 Circuit PG\u2013Protective Ground 7.5.2.8 Circuit shield terminations 7.6 Mechanical characteristics 7.6.1 Definition of mechanical interface 7.6.2 Line interface connector <\/td>\n<\/tr>\n | ||||||
| 335<\/td>\n | 7.6.3 Contact assignments <\/td>\n<\/tr>\n | ||||||
| 338<\/td>\n | 8. Medium Attachment Unit and baseband medium specifications, type 10BASE5 8.1 Scope 8.1.1 Overview 8.1.1.1 Medium Attachment Unit <\/td>\n<\/tr>\n | ||||||
| 339<\/td>\n | 8.1.1.2 Repeater unit 8.1.2 Definitions 8.1.3 Application perspective: MAU and MEDIUM objectives 8.1.3.1 Object 8.1.3.2 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 340<\/td>\n | 8.1.3.3 Relationship to PLS and AU interface 8.1.3.4 Modes of operation 8.2 MAU functional specifications 8.2.1 MAU Physical Layer functions 8.2.1.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 341<\/td>\n | 8.2.1.2 Receive function requirements <\/td>\n<\/tr>\n | ||||||
| 342<\/td>\n | 8.2.1.3 Collision Presence function requirements 8.2.1.4 Monitor function requirements (optional) <\/td>\n<\/tr>\n | ||||||
| 343<\/td>\n | 8.2.1.5 Jabber function requirements 8.2.2 MAU interface messages 8.2.2.1 DTE Physical Layer to MAU Physical Layer messages <\/td>\n<\/tr>\n | ||||||
| 344<\/td>\n | 8.2.2.2 MAU Physical Layer to DTE Physical Layer 8.2.2.2.1 input message 8.2.2.2.2 input_idle message 8.2.2.2.3 mau_available message 8.2.2.2.4 signal_quality_error message <\/td>\n<\/tr>\n | ||||||
| 345<\/td>\n | 8.2.3 MAU state diagrams 8.3 MAU\u2013medium electrical characteristics 8.3.1 MAU-to-coaxial cable interface 8.3.1.1 Input impedance <\/td>\n<\/tr>\n | ||||||
| 346<\/td>\n | 8.3.1.2 Bias current 8.3.1.3 Coaxial cable signaling levels <\/td>\n<\/tr>\n | ||||||
| 352<\/td>\n | 8.3.1.4 Transmit output levels symmetry 8.3.1.5 Collision detect thresholds 8.3.2 MAU electrical characteristics 8.3.2.1 Electrical isolation 8.3.2.2 Power consumption <\/td>\n<\/tr>\n | ||||||
| 353<\/td>\n | 8.3.2.3 Reliability 8.3.3 MAU\u2013DTE electrical characteristics 8.3.4 MAU\u2013DTE mechanical connection 8.4 Characteristics of the coaxial cable 8.4.1 Coaxial cable electrical parameters 8.4.1.1 Characteristic impedance 8.4.1.2 Attenuation 8.4.1.3 Velocity of propagation 8.4.1.4 Edge jitter, untapped cable <\/td>\n<\/tr>\n | ||||||
| 354<\/td>\n | 8.4.1.5 Transfer impedance 8.4.1.6 Cable dc loop resistance 8.4.2 Coaxial cable properties 8.4.2.1 Mechanical requirements <\/td>\n<\/tr>\n | ||||||
| 355<\/td>\n | 8.4.2.1.1 General construction 8.4.2.1.2 Center conductor 8.4.2.1.3 Dielectric material 8.4.2.1.4 Shielding system 8.4.2.1.5 Overall jacket <\/td>\n<\/tr>\n | ||||||
| 356<\/td>\n | 8.4.2.2 Jacket marking 8.4.3 Total segment dc loop resistance 8.5 Coaxial trunk cable connectors 8.5.1 Inline coaxial extension connector <\/td>\n<\/tr>\n | ||||||
| 357<\/td>\n | 8.5.2 Coaxial cable terminator 8.5.2.1 Termination 8.5.2.2 Earthing 8.5.3 MAU-to-coaxial cable connection 8.5.3.1 Electrical requirements <\/td>\n<\/tr>\n | ||||||
| 358<\/td>\n | 8.5.3.2 Mechanical requirements 8.5.3.2.1 Connector housing 8.5.3.2.2 Contact reliability 8.5.3.2.3 Shield probe characteristics <\/td>\n<\/tr>\n | ||||||
| 359<\/td>\n | 8.6 System considerations 8.6.1 Transmission system model <\/td>\n<\/tr>\n | ||||||
| 360<\/td>\n | 8.6.2 Transmission system requirements 8.6.2.1 Cable sectioning 8.6.2.2 MAU placement 8.6.2.3 Trunk cable system grounding <\/td>\n<\/tr>\n | ||||||
| 361<\/td>\n | 8.6.3 Labeling 8.7 Environmental specifications 8.7.1 General safety requirements 8.7.2 Network safety requirements 8.7.2.1 Installations <\/td>\n<\/tr>\n | ||||||
| 362<\/td>\n | 8.7.2.2 Grounding 8.7.2.3 Safety 8.7.2.4 Breakdown path 8.7.2.5 Isolation boundary 8.7.2.6 Installation and maintenance guidelines <\/td>\n<\/tr>\n | ||||||
| 363<\/td>\n | 8.7.3 Electromagnetic environment 8.7.3.1 Susceptibility levels 8.7.3.2 Emission levels 8.7.4 Temperature and humidity 8.7.5 Regulatory requirements <\/td>\n<\/tr>\n | ||||||
| 364<\/td>\n | 8.8 Protocol implementation conformance statement (PICS) proforma for Clause 8, Medium Attachment Unit and baseband medium specifications, type 10BASE5 8.8.1 Overview 8.8.2 Abbreviations and special symbols 8.8.2.1 Status symbols 8.8.2.2 Abbreviations 8.8.3 Instructions for completing the PICS proforma 8.8.3.1 General structure of the PICS proforma <\/td>\n<\/tr>\n | ||||||
| 365<\/td>\n | 8.8.3.2 Additional information 8.8.3.3 Exception information 8.8.3.4 Conditional items <\/td>\n<\/tr>\n | ||||||
| 366<\/td>\n | 8.8.4 Identification 8.8.4.1 Implementation identification 8.8.4.2 Protocol summary 8.8.5 Global statement of conformance <\/td>\n<\/tr>\n | ||||||
| 367<\/td>\n | 8.8.6 PICS proforma tables for MAU 8.8.6.1 MAU compatibility 8.8.6.2 Transmit function <\/td>\n<\/tr>\n | ||||||
| 368<\/td>\n | 8.8.6.3 Receive function <\/td>\n<\/tr>\n | ||||||
| 369<\/td>\n | 8.8.6.4 Collision function 8.8.6.5 Monitor function <\/td>\n<\/tr>\n | ||||||
| 370<\/td>\n | 8.8.6.6 Jabber function <\/td>\n<\/tr>\n | ||||||
| 371<\/td>\n | 8.8.6.7 MAU to coaxial cable interface <\/td>\n<\/tr>\n | ||||||
| 372<\/td>\n | 8.8.6.8 MAU electrical characteristics 8.8.6.9 MAU-DTE requirements <\/td>\n<\/tr>\n | ||||||
| 373<\/td>\n | 8.8.6.10 MAU to coaxial cable connection 8.8.6.11 Safety requirements <\/td>\n<\/tr>\n | ||||||
| 374<\/td>\n | 8.8.7 PICS proforma tables for MAU AUI characteristics 8.8.7.1 Signal characteristics 8.8.7.2 DI and CI driver characteristics <\/td>\n<\/tr>\n | ||||||
| 375<\/td>\n | 8.8.7.3 DO receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 376<\/td>\n | 8.8.7.4 CO receiver characteristics 8.8.7.5 Circuit termination <\/td>\n<\/tr>\n | ||||||
| 377<\/td>\n | 8.8.7.6 Mechanical characteristics <\/td>\n<\/tr>\n | ||||||
| 378<\/td>\n | 8.8.8 PICS proforma tables for 10BASE5 coaxial cable 8.8.8.1 10BASE5 coaxial cable characteristics <\/td>\n<\/tr>\n | ||||||
| 380<\/td>\n | 9. Repeater unit for 10 Mb\/s baseband networks 9.1 Overview 9.2 References 9.3 Definitions 9.4 Compatibility interface 9.4.1 AUI compatibility <\/td>\n<\/tr>\n | ||||||
| 381<\/td>\n | 9.4.2 Mixing segment compatibility 9.4.2.1 Direct coaxial cable attachment compatibility 9.4.2.2 \u201cN\u201d connector compatibility 9.4.2.3 BNC compatibility <\/td>\n<\/tr>\n | ||||||
| 382<\/td>\n | 9.4.2.4 BFOC\/2.5 (10BASE-FP) compatibility 9.4.3 Link segment compatibility 9.4.3.1 Vendor-dependent IRL 9.4.3.2 Fiber optic FOIRL compatibility 9.4.3.3 Twisted-pair jack compatibility 9.4.3.4 Fiber optic 10BASE-FB and 10BASE-FL compatibility 9.5 Basic functions 9.5.1 Repeater set network properties 9.5.2 Signal amplification <\/td>\n<\/tr>\n | ||||||
| 383<\/td>\n | 9.5.3 Signal symmetry 9.5.4 Signal retiming 9.5.5 Data handling 9.5.5.1 Start-of-packet propagation delays <\/td>\n<\/tr>\n | ||||||
| 384<\/td>\n | 9.5.5.2 Start-of-packet variability 9.5.6 Collision handling 9.5.6.1 Collision presence 9.5.6.2 Jam generation 9.5.6.3 Collision-jam propagation delays <\/td>\n<\/tr>\n | ||||||
| 385<\/td>\n | 9.5.6.4 Transmit recovery time 9.5.6.5 Carrier recovery time <\/td>\n<\/tr>\n | ||||||
| 386<\/td>\n | 9.5.7 Electrical isolation 9.6 Detailed repeater functions and state diagrams 9.6.1 State diagram notation <\/td>\n<\/tr>\n | ||||||
| 388<\/td>\n | 9.6.2 Data and collision handling 9.6.3 Preamble regeneration 9.6.4 Fragment extension 9.6.5 MAU Jabber Lockup Protection <\/td>\n<\/tr>\n | ||||||
| 390<\/td>\n | 9.6.6 Auto-Partitioning\/Reconnection (optional) 9.6.6.1 Overview <\/td>\n<\/tr>\n | ||||||
| 391<\/td>\n | 9.6.6.2 Detailed auto-partition\/reconnection algorithm state diagram <\/td>\n<\/tr>\n | ||||||
| 392<\/td>\n | 9.7 Electrical isolation 9.7.1 Environment A requirements 9.7.2 Environment B requirements <\/td>\n<\/tr>\n | ||||||
| 394<\/td>\n | 9.8 Reliability 9.9 Medium attachment unit and baseband medium specification for a vendor- indepedent FOIRL 9.9.1 Scope 9.9.1.1 Overview <\/td>\n<\/tr>\n | ||||||
| 396<\/td>\n | 9.9.1.2 Application perspective: FOMAU and medium objectives 9.9.1.3 Compatibility considerations 9.9.1.4 Relationship to AUI 9.9.1.5 Mode of operation 9.9.2 FOMAU functional specifications <\/td>\n<\/tr>\n | ||||||
| 397<\/td>\n | 9.9.2.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 398<\/td>\n | 9.9.2.2 Receive function requirements 9.9.2.3 Collision Presence function requirements <\/td>\n<\/tr>\n | ||||||
| 399<\/td>\n | 9.9.2.4 Jabber function requirements 9.9.2.5 Low Light Level Detection function requirements <\/td>\n<\/tr>\n | ||||||
| 400<\/td>\n | 9.9.2.6 Repeater Unit to FOMAU Physical Layer messages 9.9.2.7 FOMAU Physical Layer to repeater unit messages 9.9.2.7.1 input message 9.9.2.7.2 input_idle message 9.9.2.7.3 fomau_available message 9.9.2.7.4 signal_quality_error message <\/td>\n<\/tr>\n | ||||||
| 401<\/td>\n | 9.9.2.8 FOMAU state diagrams <\/td>\n<\/tr>\n | ||||||
| 402<\/td>\n | 9.9.3 FOMAU electrical characteristics 9.9.3.1 Electrical isolation 9.9.3.2 Power consumption <\/td>\n<\/tr>\n | ||||||
| 403<\/td>\n | 9.9.3.3 Reliability 9.9.3.4 FOMAU\/Repeater unit electrical characteristics 9.9.3.5 FOMAU\/Repeater unit mechanical connection 9.9.4 FOMAU\/Optical medium interface 9.9.4.1 Transmit optical parameters 9.9.4.1.1 Wavelength 9.9.4.1.2 Spectral width 9.9.4.1.3 Optical modulation 9.9.4.1.4 Optical idle signal <\/td>\n<\/tr>\n | ||||||
| 405<\/td>\n | 9.9.4.1.5 Transmit optical logic polarity 9.9.4.1.6 Optical rise and fall times 9.9.4.1.7 Transmit optical pulse edge jitter <\/td>\n<\/tr>\n | ||||||
| 406<\/td>\n | 9.9.4.1.8 Peak coupled optical power 9.9.4.2 Receive optical parameters 9.9.4.2.1 Receive peak optical power range 9.9.4.2.2 Receive optical pulse edge jitter 9.9.4.2.3 Receive optical logic polarity 9.9.5 Characteristics of the optical fiber cable link segment <\/td>\n<\/tr>\n | ||||||
| 407<\/td>\n | 9.9.5.1 Optical fiber medium 9.9.5.2 Optical medium connector plug and socket 9.9.6 System requirements 9.9.6.1 Optical transmission system considerations <\/td>\n<\/tr>\n | ||||||
| 408<\/td>\n | 9.9.6.2 Timing considerations <\/td>\n<\/tr>\n | ||||||
| 409<\/td>\n | 9.9.7 Environmental specifications 9.9.7.1 Safety requirements 9.9.7.1.1 Electrical safety 9.9.7.1.2 Optical source safety 9.9.7.2 Electromagnetic environment 9.9.7.2.1 Susceptibility levels 9.9.7.2.2 Emission levels <\/td>\n<\/tr>\n | ||||||
| 410<\/td>\n | 9.9.7.3 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 411<\/td>\n | 10. Medium attachment unit and baseband medium specifications, type 10BASE2 10.1 Scope 10.1.1 Overview <\/td>\n<\/tr>\n | ||||||
| 412<\/td>\n | 10.1.1.1 Medium attachment unit (normally contained within the data terminal equipment [DTE]) 10.1.1.2 Repeater unit 10.1.2 Definitions 10.1.3 Application perspective: MAU and medium objectives 10.1.3.1 Object <\/td>\n<\/tr>\n | ||||||
| 413<\/td>\n | 10.1.3.2 Compatibility considerations 10.1.3.3 Relationship to PLS and AUI 10.1.3.4 Mode of operation 10.2 References 10.3 MAU functional specifications <\/td>\n<\/tr>\n | ||||||
| 414<\/td>\n | 10.3.1 MAU Physical Layer functional requirements 10.3.1.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 415<\/td>\n | 10.3.1.2 Receive function requirements 10.3.1.3 Collision Presence function requirements <\/td>\n<\/tr>\n | ||||||
| 416<\/td>\n | 10.3.1.4 Jabber functional requirements 10.3.2 MAU interface messages 10.3.2.1 DTE to MAU messages 10.3.2.2 MAU to DTE messages <\/td>\n<\/tr>\n | ||||||
| 418<\/td>\n | 10.3.2.2.1 input message 10.3.2.2.2 input_idle message 10.3.2.2.3 mau_available message 10.3.2.2.4 signal_quality_error (SQE) message 10.3.3 MAU state diagrams <\/td>\n<\/tr>\n | ||||||
| 419<\/td>\n | 10.4 MAU\u2013medium electrical characteristics 10.4.1 MAU-to-coaxial cable interface 10.4.1.1 Input impedance 10.4.1.2 Bias current 10.4.1.3 Coaxial cable signaling levels <\/td>\n<\/tr>\n | ||||||
| 421<\/td>\n | 10.4.1.4 Transmit output levels symmetry 10.4.1.5 Collision detect thresholds 10.4.2 MAU electrical characteristics 10.4.2.1 Electrical isolation 10.4.2.2 Power consumption <\/td>\n<\/tr>\n | ||||||
| 422<\/td>\n | 10.4.2.3 Reliability 10.4.3 MAU\u2013DTE electrical characteristics 10.5 Characteristics of coaxial cable system 10.5.1 Coaxial cable electrical parameters 10.5.1.1 Characteristic impedance 10.5.1.2 Attenuation 10.5.1.3 Velocity of propagation 10.5.1.4 Edge jitter; entire segment without DTEs attached <\/td>\n<\/tr>\n | ||||||
| 423<\/td>\n | 10.5.1.5 Transfer impedance 10.5.1.6 Cable dc loop resistance 10.5.2 Coaxial cable physical parameters 10.5.2.1 Mechanical requirements <\/td>\n<\/tr>\n | ||||||
| 424<\/td>\n | 10.5.2.1.1 General construction 10.5.2.1.2 Center conductor 10.5.2.1.3 Dielectric material 10.5.2.1.4 Shielding system 10.5.2.1.5 Overall jacket 10.5.2.2 Jacket marking 10.5.3 Total segment dc loop resistance <\/td>\n<\/tr>\n | ||||||
| 425<\/td>\n | 10.6 Coaxial trunk cable connectors 10.6.1 In-line coaxial extension connector <\/td>\n<\/tr>\n | ||||||
| 426<\/td>\n | 10.6.2 Coaxial cable terminator 10.6.3 MAU-to-coaxial cable connection 10.7 System considerations 10.7.1 Transmission system model <\/td>\n<\/tr>\n | ||||||
| 428<\/td>\n | 10.7.2 Transmission system requirements 10.7.2.1 Cable sectioning 10.7.2.2 MAU placement 10.7.2.3 Trunk cable system earthing 10.7.2.4 Static discharge path 10.7.2.4.1 Installation environment <\/td>\n<\/tr>\n | ||||||
| 429<\/td>\n | 10.8 Environmental specifications 10.8.1 Safety requirements 10.8.1.1 Installations 10.8.1.2 Earthing 10.8.2 Electromagnetic environment 10.8.2.1 Susceptibility levels 10.8.2.2 Emission levels 10.8.3 Regulatory requirements <\/td>\n<\/tr>\n | ||||||
| 430<\/td>\n | 11. Broadband medium attachment unit and broadband medium specifications, type 10BROAD36 11.1 Scope 11.1.1 Overview <\/td>\n<\/tr>\n | ||||||
| 432<\/td>\n | 11.1.2 Definitions 11.1.3 MAU and medium objectives <\/td>\n<\/tr>\n | ||||||
| 433<\/td>\n | 11.1.4 Compatibility considerations 11.1.5 Relationship to PLS and AUI 11.1.6 Mode of operation 11.2 MAU functional specifications 11.2.1 MAU functional requirements 11.2.1.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 434<\/td>\n | 11.2.1.2 Receive function requirements 11.2.1.3 Collision Detection function requirements <\/td>\n<\/tr>\n | ||||||
| 435<\/td>\n | 11.2.1.3.1 Collision enforcement transmitter requirements 11.2.1.3.2 Collision enforcement detection requirements 11.2.1.4 Jabber function requirements <\/td>\n<\/tr>\n | ||||||
| 436<\/td>\n | 11.2.2 DTE PLS to MAU and MAU to DTE PLS messages 11.2.2.1 DTE Physical Layer to MAU Physical Layer messages 11.2.2.2 MAU Physical Layer to DTE Physical Layer messages 11.2.2.2.1 input message 11.2.2.2.2 input_idle message 11.2.2.2.3 mau_available message 11.2.2.3 signal_quality_error message <\/td>\n<\/tr>\n | ||||||
| 437<\/td>\n | 11.2.3 MAU state diagrams 11.2.3.1 MAU state diagram messages 11.2.3.2 MAU state diagram signal names <\/td>\n<\/tr>\n | ||||||
| 440<\/td>\n | 11.3 MAU characteristics 11.3.1 MAU-to-coaxial cable interface 11.3.1.1 Receive interface 11.3.1.1.1 Receive input impedance 11.3.1.1.2 Receiver squelch requirements <\/td>\n<\/tr>\n | ||||||
| 441<\/td>\n | 11.3.1.1.3 Receive level requirements 11.3.1.1.4 Receiver selectivity and linearity requirements 11.3.1.1.5 Receive input mechanical requirements 11.3.1.2 Transmit interface 11.3.1.2.1 Transmit output impedance 11.3.1.2.2 Transmitted RF packet format <\/td>\n<\/tr>\n | ||||||
| 442<\/td>\n | 11.3.1.2.3 Transmit spectrum and group delay characteristics <\/td>\n<\/tr>\n | ||||||
| 444<\/td>\n | 11.3.1.2.4 Transmit out-of-band spectrum 11.3.1.2.5 Transmit level requirements 11.3.1.2.6 Nontransmitting signal leakage requirement 11.3.1.2.7 Transmit spurious output requirement <\/td>\n<\/tr>\n | ||||||
| 445<\/td>\n | 11.3.1.2.8 Collision enforcement signal leakage requirement 11.3.1.2.9 Transmit output mechanical requirements 11.3.2 MAU frequency allocations 11.3.2.1 Single-cable systems frequency allocations <\/td>\n<\/tr>\n | ||||||
| 446<\/td>\n | 11.3.2.2 Dual-cable systems frequency allocations 11.3.3 AUI electrical characteristics 11.3.3.1 Electrical isolation requirements 11.3.3.2 Current consumption <\/td>\n<\/tr>\n | ||||||
| 447<\/td>\n | 11.3.3.3 Driver and receiver requirements 11.3.3.4 AUI mechanical connection 11.3.4 MAU transfer characteristics 11.3.4.1 AUI to coaxial cable framing characteristics. <\/td>\n<\/tr>\n | ||||||
| 448<\/td>\n | 11.3.4.1.1 Scrambler and differential encoding requirements <\/td>\n<\/tr>\n | ||||||
| 449<\/td>\n | 11.3.4.2 Coaxial cable to AUI framing characteristics <\/td>\n<\/tr>\n | ||||||
| 450<\/td>\n | 11.3.4.3 Circuit DO to circuit DI framing characteristics 11.3.4.4 AUI to coaxial cable delay characteristics 11.3.4.4.1 Circuit DO to RF data signal delay 11.3.4.4.2 Circuit DO to CE RF output delay 11.3.4.4.3 Transmit postamble to SQE test signal delay 11.3.4.4.4 SQE test signal length 11.3.4.5 Coaxial cable to AUI delay characteristics <\/td>\n<\/tr>\n | ||||||
| 451<\/td>\n | 11.3.4.5.1 Received RF to circuit DI delay 11.3.4.5.2 Received RF to CE RF output and circuit CI delay 11.3.4.5.3 Collision enforcement to circuit CI delay 11.3.4.5.4 Receive data to SQE test delay <\/td>\n<\/tr>\n | ||||||
| 452<\/td>\n | 11.3.4.6 Delay from circuit DO to circuit DI <\/td>\n<\/tr>\n | ||||||
| 453<\/td>\n | 11.3.4.7 Interpacket gap requirement 11.3.4.8 Bit error ratio 11.3.5 Reliability <\/td>\n<\/tr>\n | ||||||
| 454<\/td>\n | 11.4 System considerations 11.4.1 Delay budget and network diameter 11.4.2 MAU operation with packets shorter than 512 bits <\/td>\n<\/tr>\n | ||||||
| 455<\/td>\n | 11.5 Characteristics of the coaxial cable system 11.5.1 Electrical requirements 11.5.2 Mechanical requirements 11.5.3 Delay requirements <\/td>\n<\/tr>\n | ||||||
| 456<\/td>\n | 11.6 Frequency translator requirements for the single-cable version 11.6.1 Electrical requirements 11.6.2 Mechanical requirements 11.7 Environmental specifications 11.7.1 Safety requirements <\/td>\n<\/tr>\n | ||||||
| 457<\/td>\n | 11.7.2 Electromagnetic environment 11.7.2.1 Susceptibility levels 11.7.2.2 Emission levels 11.7.3 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 458<\/td>\n | 12. Physical signaling, medium attachment, and baseband medium specifications, type 1BASE5 12.1 Introduction 12.1.1 Overview 12.1.2 Scope 12.1.3 Definitions 12.1.4 General characteristics <\/td>\n<\/tr>\n | ||||||
| 459<\/td>\n | 12.1.5 Compatibility 12.1.6 Objectives of type 1BASE5 specification 12.2 Architecture 12.2.1 Major concepts <\/td>\n<\/tr>\n | ||||||
| 460<\/td>\n | 12.2.2 Application perspective 12.2.3 Packet structure <\/td>\n<\/tr>\n | ||||||
| 461<\/td>\n | 12.2.3.1 Silence 12.2.3.2 Preamble <\/td>\n<\/tr>\n | ||||||
| 462<\/td>\n | 12.2.3.3 Start-of-frame delimiter 12.2.3.4 Data 12.2.3.5 End-of-transmission delimiter <\/td>\n<\/tr>\n | ||||||
| 463<\/td>\n | 12.3 DTE physical signaling (PLS) specification 12.3.1 Overview 12.3.1.1 Summary of major concepts 12.3.1.2 Application perspective <\/td>\n<\/tr>\n | ||||||
| 464<\/td>\n | 12.3.2 Functional specification 12.3.2.1 PLS-PMA interface 12.3.2.1.1 output message 12.3.2.1.2 output_idle message 12.3.2.1.3 input message 12.3.2.1.4 input_idle message <\/td>\n<\/tr>\n | ||||||
| 465<\/td>\n | 12.3.2.2 PLS-MAC interface 12.3.2.2.1 OUTPUT_UNIT 12.3.2.2.2 OUTPUT_STATUS 12.3.2.2.3 INPUT_UNIT 12.3.2.2.4 CARRIER_STATUS 12.3.2.2.5 SIGNAL_STATUS <\/td>\n<\/tr>\n | ||||||
| 466<\/td>\n | 12.3.2.3 PLS functions 12.3.2.3.1 State diagram variables 12.3.2.3.2 Output function <\/td>\n<\/tr>\n | ||||||
| 467<\/td>\n | 12.3.2.3.3 Input function 12.3.2.3.4 Error Sense function <\/td>\n<\/tr>\n | ||||||
| 468<\/td>\n | 12.3.2.3.5 Carrier Sense function 12.3.2.4 Signal encoding 12.3.2.4.1 Data transmission rate 12.3.2.4.2 Data symbol encoding 12.3.2.4.3 Collision presence encoding <\/td>\n<\/tr>\n | ||||||
| 469<\/td>\n | 12.3.2.4.4 Idle line encoding <\/td>\n<\/tr>\n | ||||||
| 470<\/td>\n | 12.4 Hub specification 12.4.1 Overview <\/td>\n<\/tr>\n | ||||||
| 471<\/td>\n | 12.4.1.1 Summary of major concepts 12.4.1.2 Application perspective 12.4.2 Hub structure 12.4.2.1 Upward side 12.4.2.2 Downward side <\/td>\n<\/tr>\n | ||||||
| 472<\/td>\n | 12.4.3 Hub PLS functional specification 12.4.3.1 Hub PLS to PMA interface 12.4.3.2 Hub PLS functions 12.4.3.2.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 473<\/td>\n | 12.4.3.2.2 Upward Signal Transfer function 12.4.3.2.3 Jabber function <\/td>\n<\/tr>\n | ||||||
| 474<\/td>\n | 12.4.3.2.4 Downward Signal Transfer function <\/td>\n<\/tr>\n | ||||||
| 476<\/td>\n | 12.4.3.2.5 Retiming (jitter removal) 12.4.3.2.6 Header hub wrap-around 12.4.3.2.7 Collision presence startup <\/td>\n<\/tr>\n | ||||||
| 477<\/td>\n | 12.4.3.3 Reliability 12.5 Physical medium attachment (PMA) specification 12.5.1 Overview 12.5.2 PLS\u2013PMA interface <\/td>\n<\/tr>\n | ||||||
| 478<\/td>\n | 12.5.3 Signal characteristics 12.5.3.1 Transmitter characteristics 12.5.3.1.1 Differential output voltage <\/td>\n<\/tr>\n | ||||||
| 481<\/td>\n | 12.5.3.1.2 Output timing jitter 12.5.3.1.3 Transmitter impedance balance <\/td>\n<\/tr>\n | ||||||
| 482<\/td>\n | 12.5.3.1.4 Common-mode output voltage 12.5.3.1.5 Common-mode tolerance <\/td>\n<\/tr>\n | ||||||
| 483<\/td>\n | 12.5.3.1.6 Transmitter fault tolerance 12.5.3.2 Receiver characteristics 12.5.3.2.1 Differential input voltage 12.5.3.2.2 Input timing jitter 12.5.3.2.3 Idle input behavior <\/td>\n<\/tr>\n | ||||||
| 484<\/td>\n | 12.5.3.2.4 Differential input impedance 12.5.3.2.5 Common-mode rejection <\/td>\n<\/tr>\n | ||||||
| 485<\/td>\n | 12.5.3.2.6 Noise immunity 12.5.3.2.7 Receiver fault tolerance 12.6 Medium Dependent Interface (MDI) specification 12.6.1 Line interface connector <\/td>\n<\/tr>\n | ||||||
| 486<\/td>\n | 12.6.2 Connector contact assignments 12.6.3 Labeling <\/td>\n<\/tr>\n | ||||||
| 487<\/td>\n | 12.7 Cable medium characteristics 12.7.1 Overview 12.7.2 Transmission parameters 12.7.2.1 Attenuation 12.7.2.2 Differential characteristic impedance 12.7.2.3 Medium timing jitter <\/td>\n<\/tr>\n | ||||||
| 488<\/td>\n | 12.7.2.4 Dispersion 12.7.3 Coupling parameters 12.7.3.1 Pair-to-pair crosstalk 12.7.3.2 Multiple-disturber crosstalk <\/td>\n<\/tr>\n | ||||||
| 489<\/td>\n | 12.7.3.3 Balance 12.7.4 Noise environment 12.7.4.1 Impulse noise <\/td>\n<\/tr>\n | ||||||
| 490<\/td>\n | 12.7.4.2 Crosstalk 12.8 Special link specification 12.8.1 Overview 12.8.2 Transmission characteristics 12.8.3 Permitted configurations 12.9 Timing 12.9.1 Overview <\/td>\n<\/tr>\n | ||||||
| 491<\/td>\n | 12.9.2 DTE timing 12.9.3 Medium timing 12.9.4 Special link timing 12.9.5 Hub timing <\/td>\n<\/tr>\n | ||||||
| 492<\/td>\n | 12.10 Safety 12.10.1 Isolation <\/td>\n<\/tr>\n | ||||||
| 493<\/td>\n | 12.10.2 Telephony voltages <\/td>\n<\/tr>\n | ||||||
| 494<\/td>\n | 13. System considerations for multisegment 10 Mb\/s baseband networks 13.1 Overview <\/td>\n<\/tr>\n | ||||||
| 495<\/td>\n | 13.1.1 Repeater usage 13.2 Definitions 13.3 Transmission System Model 1 <\/td>\n<\/tr>\n | ||||||
| 502<\/td>\n | 13.4 Transmission System Model 2 13.4.1 Round-trip collision delay 13.4.1.1 Worst-case path delay value (PDV) selection 13.4.1.2 Worst-case PDV calculation <\/td>\n<\/tr>\n | ||||||
| 503<\/td>\n | 13.4.2 Interpacket gap (IPG) shrinkage <\/td>\n<\/tr>\n | ||||||
| 504<\/td>\n | 13.4.2.1 Worst-case path variability value (PVV) selection 13.4.2.2 Worst-case path variability value (PVV) calculation 13.5 Full duplex topology limitations <\/td>\n<\/tr>\n | ||||||
| 505<\/td>\n | 14. Twisted-pair medium attachment unit (MAU) and baseband medium, type 10BASE-T including type 10BASE-Te 14.1 Scope 14.1.1 Overview 14.1.1.1 Medium Attachment Unit (MAU) <\/td>\n<\/tr>\n | ||||||
| 506<\/td>\n | 14.1.1.2 Repeater unit 14.1.1.3 Twisted-pair media 14.1.2 Definitions <\/td>\n<\/tr>\n | ||||||
| 507<\/td>\n | 14.1.3 Application perspective 14.1.3.1 Objectives <\/td>\n<\/tr>\n | ||||||
| 508<\/td>\n | 14.1.3.2 Compatibility considerations 14.1.3.3 Modes of operation 14.1.4 Relationship to PLS and AUI 14.2 MAU functional specifications <\/td>\n<\/tr>\n | ||||||
| 509<\/td>\n | 14.2.1 MAU functions <\/td>\n<\/tr>\n | ||||||
| 510<\/td>\n | 14.2.1.1 Transmit function requirements 14.2.1.2 Receive function requirements <\/td>\n<\/tr>\n | ||||||
| 511<\/td>\n | 14.2.1.3 Loopback function requirements (half duplex mode only) 14.2.1.4 Collision Presence function requirements (half duplex mode only) 14.2.1.5 signal_quality_error Message (SQE) Test function requirements 14.2.1.6 Jabber function requirements <\/td>\n<\/tr>\n | ||||||
| 512<\/td>\n | 14.2.1.7 Link Integrity Test function requirements <\/td>\n<\/tr>\n | ||||||
| 513<\/td>\n | 14.2.1.8 Auto-Negotiation 14.2.2 PMA interface messages 14.2.2.1 PLS to PMA messages 14.2.2.1.1 PMA to PLS messages <\/td>\n<\/tr>\n | ||||||
| 514<\/td>\n | 14.2.2.2 PMA to twisted-pair link segment messages 14.2.2.3 Twisted-pair link segment to PMA messages 14.2.2.4 Interface message time references 14.2.3 MAU state diagrams 14.2.3.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 520<\/td>\n | 14.2.3.2 State diagram timers 14.3 MAU electrical specifications 14.3.1 MAU-to-MDI interface characteristics 14.3.1.1 Electrical isolation <\/td>\n<\/tr>\n | ||||||
| 521<\/td>\n | 14.3.1.2 Transmitter specifications <\/td>\n<\/tr>\n | ||||||
| 522<\/td>\n | 14.3.1.2.1 Differential output voltage <\/td>\n<\/tr>\n | ||||||
| 525<\/td>\n | 14.3.1.2.2 Transmitter differential output impedance <\/td>\n<\/tr>\n | ||||||
| 526<\/td>\n | 14.3.1.2.3 Output timing jitter 14.3.1.2.4 Transmitter impedance balance 14.3.1.2.5 Common-mode output voltage <\/td>\n<\/tr>\n | ||||||
| 527<\/td>\n | 14.3.1.2.6 Transmitter common-mode rejection 14.3.1.2.7 Transmitter fault tolerance <\/td>\n<\/tr>\n | ||||||
| 528<\/td>\n | 14.3.1.3 Receiver specifications 14.3.1.3.1 Receiver differential input signals 14.3.1.3.2 Receiver differential noise immunity <\/td>\n<\/tr>\n | ||||||
| 529<\/td>\n | 14.3.1.3.3 Idle input behavior 14.3.1.3.4 Receiver differential input impedance 14.3.1.3.5 Common-mode rejection 14.3.1.3.6 Receiver fault tolerance 14.3.2 MAU-to-AUI specification 14.3.2.1 MAU-AUI electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 530<\/td>\n | 14.3.2.2 MAU\u2013AUI mechanical connection 14.3.2.3 Power consumption <\/td>\n<\/tr>\n | ||||||
| 531<\/td>\n | 14.4 Characteristics of the simplex link segment 14.4.1 Overview 14.4.2 Transmission parameters 14.4.2.1 Insertion loss 14.4.2.2 Differential characteristic impedance 14.4.2.3 Medium timing jitter <\/td>\n<\/tr>\n | ||||||
| 532<\/td>\n | 14.4.2.4 Delay 14.4.3 Coupling parameters 14.4.3.1 Differential near-end crosstalk (NEXT) loss 14.4.3.1.1 Twenty-five-pair cable and twenty-five-pair binder groups 14.4.3.1.2 Four-pair cable 14.4.3.1.3 Other cables 14.4.3.2 Multiple-disturber NEXT (MDNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 533<\/td>\n | 14.4.4 Noise environment 14.4.4.1 Impulse noise 14.4.4.2 Crosstalk noise 14.5 MDI specification 14.5.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 534<\/td>\n | 14.5.2 Crossover function <\/td>\n<\/tr>\n | ||||||
| 535<\/td>\n | 14.6 System considerations <\/td>\n<\/tr>\n | ||||||
| 536<\/td>\n | 14.7 Environmental specifications 14.7.1 General safety 14.7.2 Network safety 14.7.2.1 Installation 14.7.2.2 Grounding 14.7.2.3 Installation and maintenance guidelines 14.7.2.4 Telephony voltages <\/td>\n<\/tr>\n | ||||||
| 537<\/td>\n | 14.7.3 Environment 14.7.3.1 Electromagnetic emission 14.7.3.2 Temperature and humidity 14.8 MAU labeling <\/td>\n<\/tr>\n | ||||||
| 538<\/td>\n | 14.9 Timing summary <\/td>\n<\/tr>\n | ||||||
| 539<\/td>\n | 14.10 Protocol implementation conformance statement (PICS) proforma for Clause 14, Twisted-pair medium attachment unit (MAU) and baseband medium, type 10BASE-T and type 10BASE-Te 14.10.1 Introduction 14.10.1.1 Scope 14.10.1.2 Reference 14.10.1.3 Definitions 14.10.1.4 Conformance <\/td>\n<\/tr>\n | ||||||
| 540<\/td>\n | 14.10.2 Identification of implementation 14.10.2.1 Supplier information 14.10.2.2 Implementation information 14.10.3 Identification of the protocol <\/td>\n<\/tr>\n | ||||||
| 541<\/td>\n | 14.10.4 PICS proforma for 10BASE-T 14.10.4.1 Abbreviations 14.10.4.2 PICS Completion instructions and implementation statement 14.10.4.3 Additional information 14.10.4.4 References <\/td>\n<\/tr>\n | ||||||
| 542<\/td>\n | 14.10.4.5 PICS proforma tables for MAU 14.10.4.5.1 MAU functions <\/td>\n<\/tr>\n | ||||||
| 543<\/td>\n | 14.10.4.5.2 Transmit function 14.10.4.5.3 Receive function <\/td>\n<\/tr>\n | ||||||
| 544<\/td>\n | 14.10.4.5.4 Loopback function 14.10.4.5.5 Collision Detect function <\/td>\n<\/tr>\n | ||||||
| 545<\/td>\n | 14.10.4.5.6 signal_quality_error Message Test function 14.10.4.5.7 Jabber function <\/td>\n<\/tr>\n | ||||||
| 546<\/td>\n | 14.10.4.5.8 Link Integrity Test function <\/td>\n<\/tr>\n | ||||||
| 547<\/td>\n | 14.10.4.5.9 MAU state diagram requirements 14.10.4.5.10 AUI requirements 14.10.4.5.11 Electrical isolation <\/td>\n<\/tr>\n | ||||||
| 548<\/td>\n | 14.10.4.5.12 Transmitter specification <\/td>\n<\/tr>\n | ||||||
| 549<\/td>\n | 14.10.4.5.13 Receiver specification <\/td>\n<\/tr>\n | ||||||
| 550<\/td>\n | 14.10.4.5.14 MDI requirements 14.10.4.5.15 Safety requirements <\/td>\n<\/tr>\n | ||||||
| 551<\/td>\n | 14.10.4.6 PICS proforma tables for MAU AUI characteristics 14.10.4.6.1 Signal characteristics 14.10.4.6.2 DI and CI driver characteristics <\/td>\n<\/tr>\n | ||||||
| 552<\/td>\n | 14.10.4.6.3 DO receiver characteristics 14.10.4.6.4 Power consumption <\/td>\n<\/tr>\n | ||||||
| 553<\/td>\n | 14.10.4.6.5 Circuit termination 14.10.4.6.6 Mechanical characteristics <\/td>\n<\/tr>\n | ||||||
| 554<\/td>\n | 14.10.4.7 PICS proforma tables for 10BASE-T link segment 14.10.4.7.1 10BASE-T link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 555<\/td>\n | 14.10.4.8 PICS proforma tables for Auto-Negotiation able MAUs <\/td>\n<\/tr>\n | ||||||
| 556<\/td>\n | 15. Fiber optic medium and common elements of medium attachment units and star, type 10BASE-F 15.1 Scope 15.1.1 Overview 15.1.1.1 Fiber optic medium attachment units (MAUs) 15.1.1.2 Fiber optic passive star <\/td>\n<\/tr>\n | ||||||
| 557<\/td>\n | 15.1.1.3 Repeater unit <\/td>\n<\/tr>\n | ||||||
| 558<\/td>\n | 15.1.2 Definitions 15.1.3 Applications perspective: MAUs, stars, and fiber optic medium 15.1.3.1 Objectives 15.1.3.2 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 559<\/td>\n | 15.1.3.3 Relationship to PLS and AUI <\/td>\n<\/tr>\n | ||||||
| 560<\/td>\n | 15.1.3.4 Guidelines for implementation of systems 15.1.3.5 Modes of operation <\/td>\n<\/tr>\n | ||||||
| 561<\/td>\n | 15.2 MDI optical characteristics 15.2.1 Transmit optical parameters 15.2.1.1 Center wavelength 15.2.1.2 Spectral width 15.2.1.3 Optical modulation extinction ratio 15.2.1.4 Optical Idle Signal amplitude 15.2.1.5 Optical transmit pulse logic polarity 15.2.1.6 Optical transmit pulse rise and fall times 15.2.1.7 Optical transmit pulse overshoot and undershoot 15.2.1.8 Optical transmit pulse edge jitter <\/td>\n<\/tr>\n | ||||||
| 563<\/td>\n | 15.2.1.9 Optical transmit pulse duty cycle distortion 15.2.1.10 Optical transmit average power range 15.2.1.11 Optical transmit signal templates <\/td>\n<\/tr>\n | ||||||
| 564<\/td>\n | 15.2.1.11.1 10BASE-FP optical transmit signal template <\/td>\n<\/tr>\n | ||||||
| 565<\/td>\n | 15.2.1.11.2 10BASE-FB optical transmit signal template <\/td>\n<\/tr>\n | ||||||
| 567<\/td>\n | 15.2.1.11.3 10BASE-FL Optical transmit signal template <\/td>\n<\/tr>\n | ||||||
| 568<\/td>\n | 15.2.2 Receive optical parameters 15.2.2.1 Optical receive average power range 15.2.2.2 Optical receive pulse edge jitter 15.2.2.3 Optical receive pulse logic polarity <\/td>\n<\/tr>\n | ||||||
| 569<\/td>\n | 15.2.2.4 Optical receive pulse rise and fall times 15.3 Characteristics of the fiber optic medium 15.3.1 Optical fiber and cable 15.3.1.1 Attenuation 15.3.1.2 Modal bandwidth 15.3.1.3 Propagation delay 15.3.2 Optical medium connector plug and socket <\/td>\n<\/tr>\n | ||||||
| 570<\/td>\n | 15.3.2.1 Optical connector insertion loss 15.3.2.2 Optical connector return loss 15.3.3 Fiber optic medium insertion loss 15.3.3.1 10BASE-FP segment insertion loss <\/td>\n<\/tr>\n | ||||||
| 571<\/td>\n | 15.3.3.2 10BASE-FB and 10BASE-FL segment insertion loss 15.3.4 Electrical isolation 15.4 MAU reliability 15.5 MAU\u2013AUI specification 15.5.1 MAU\u2013AUI electrical characteristics 15.5.2 MAU\u2013AUI mechanical connections 15.5.3 Power consumption <\/td>\n<\/tr>\n | ||||||
| 572<\/td>\n | 15.5.4 MAU\u2013AUI messages 15.5.4.1 PLS to PMA messages 15.5.4.2 PMA to PLS messages 15.5.4.2.1 signal_quality_error message <\/td>\n<\/tr>\n | ||||||
| 573<\/td>\n | 15.6 Environmental specifications 15.6.1 Safety requirements 15.6.2 Electromagnetic environment 15.6.3 Other environmental requirements 15.7 MAU labeling <\/td>\n<\/tr>\n | ||||||
| 574<\/td>\n | 15.7.1 10BASE-FP star labeling <\/td>\n<\/tr>\n | ||||||
| 575<\/td>\n | 15.8 Protocol implementation conformance statement (PICS) proforma for Clause 15, Fiber optic medium and common elements of medium attachment units and star, type 10BASE-F 15.8.1 Introduction 15.8.2 Abbreviations and special symbols 15.8.2.1 Status symbols 15.8.2.2 Abbreviations 15.8.3 Instructions for completing the PICS proforma 15.8.3.1 General structure of the PICS proforma <\/td>\n<\/tr>\n | ||||||
| 576<\/td>\n | 15.8.3.2 Additional information 15.8.3.3 Exception information <\/td>\n<\/tr>\n | ||||||
| 577<\/td>\n | 15.8.3.4 Conditional items 15.8.4 Identification 15.8.4.1 Implementation identification 15.8.4.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 578<\/td>\n | 15.8.5 Major capabilities\/options 15.8.6 PICS Proforma for the fiber optic medium 15.8.6.1 Characteristics of the fiber optic medium <\/td>\n<\/tr>\n | ||||||
| 579<\/td>\n | 15.8.6.2 Optical medium connector plug and socket 15.8.6.3 Fiber optic medium insertion loss 15.8.6.4 Electrical isolation requirements <\/td>\n<\/tr>\n | ||||||
| 580<\/td>\n | 16. Fiber optic passive star and medium attachment unit, type 10BASE-FP 16.1 Scope 16.1.1 Overview 16.1.1.1 10BASE-FP medium attachment unit 16.1.1.2 10BASE-FP Star 16.1.1.3 Repeater unit <\/td>\n<\/tr>\n | ||||||
| 581<\/td>\n | 16.2 PMA interface messages 16.2.1 PMA-to-MDI interface signal encodings 16.2.2 PMA-to-MDI OTD messages 16.2.2.1 OTD_output 16.2.2.2 OTD_idle <\/td>\n<\/tr>\n | ||||||
| 582<\/td>\n | 16.2.2.3 OTD_manch_violation 16.2.3 MDI ORD-to-PMA messages 16.2.3.1 ORD_input <\/td>\n<\/tr>\n | ||||||
| 583<\/td>\n | 16.2.3.2 ORD_idle 16.2.3.3 ORD_crv 16.3 10BASE-FP MAU functional specifications 16.3.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 584<\/td>\n | 16.3.1.1 Preamble encoding 16.3.1.1.1 Synchronization pattern 16.3.1.1.2 Packet header code rule violation 16.3.1.1.3 Unique word 16.3.1.2 Data transmit <\/td>\n<\/tr>\n | ||||||
| 585<\/td>\n | 16.3.1.3 Collision encoding (unique word jam) 16.3.2 Receive function requirements 16.3.2.1 Preamble reconstruction and alignment 16.3.2.2 Data receive 16.3.2.3 Signal presence during collision 16.3.3 Loopback function requirements <\/td>\n<\/tr>\n | ||||||
| 586<\/td>\n | 16.3.4 Collision presence function requirements 16.3.4.1 CI Circuit signaling 16.3.4.2 Collision detection <\/td>\n<\/tr>\n | ||||||
| 587<\/td>\n | 16.3.4.3 End of collision 16.3.5 signal_quality_error Message (SQE) Test function requirements 16.3.6 Jabber function requirements <\/td>\n<\/tr>\n | ||||||
| 588<\/td>\n | 16.3.7 Link fault detection and low light function requirements <\/td>\n<\/tr>\n | ||||||
| 589<\/td>\n | 16.3.8 Interface message time references 16.3.9 MAU state diagram 16.3.9.1 MAU state diagram variables <\/td>\n<\/tr>\n | ||||||
| 591<\/td>\n | 16.3.9.2 MAU state diagram timers <\/td>\n<\/tr>\n | ||||||
| 592<\/td>\n | 16.3.9.3 MAU state diagram counters <\/td>\n<\/tr>\n | ||||||
| 597<\/td>\n | 16.4 Timing summary 16.5 10BASE-FP Star functional specifications 16.5.1 Star functions 16.5.1.1 Number of ports 16.5.1.2 Optical power division <\/td>\n<\/tr>\n | ||||||
| 598<\/td>\n | 16.5.1.3 Configuration 16.5.1.4 Reliability 16.5.2 Star optical characteristics 16.5.2.1 Star insertion loss 16.5.2.2 Star single output port uniformity 16.5.2.3 Star directivity <\/td>\n<\/tr>\n | ||||||
| 599<\/td>\n | 16.6 Protocol implementation conformance statement (PICS) proforma for Clause 16, Fiber optic passive star and medium attachment unit, type 10BASE-FP 16.6.1 Introduction 16.6.2 Abbreviations and special symbols 16.6.2.1 Status symbols 16.6.2.2 Abbreviations 16.6.3 Instructions for completing the PICS proforma 16.6.3.1 General structure of the PICS proforma <\/td>\n<\/tr>\n | ||||||
| 600<\/td>\n | 16.6.3.2 Additional information 16.6.3.3 Exception information <\/td>\n<\/tr>\n | ||||||
| 601<\/td>\n | 16.6.3.4 Conditional items 16.6.4 Identification 16.6.4.1 Implementation identification 16.6.4.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 602<\/td>\n | 16.6.5 Major capabilities\/options 16.6.6 PICS proforma for the type 10BASE-FP MAU 16.6.6.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 603<\/td>\n | 16.6.6.2 Optical transmit parameters <\/td>\n<\/tr>\n | ||||||
| 604<\/td>\n | 16.6.6.3 Optical receive parameters 16.6.6.4 Optical medium connector plug and socket 16.6.6.5 MAU functions 16.6.6.6 PMA interface messages <\/td>\n<\/tr>\n | ||||||
| 605<\/td>\n | 16.6.6.7 PMA to MDI OTD messages 16.6.6.8 MDI ORD to PMA messages 16.6.6.9 Transmit functions <\/td>\n<\/tr>\n | ||||||
| 606<\/td>\n | 16.6.6.10 Collision Encoding (Unique Word Jam) function 16.6.6.11 Receive functions <\/td>\n<\/tr>\n | ||||||
| 607<\/td>\n | 16.6.6.12 Preamble reconstruction and alignment function 16.6.6.13 Data receive function 16.6.6.14 Signal presence during collision <\/td>\n<\/tr>\n | ||||||
| 608<\/td>\n | 16.6.6.15 Loopback function 16.6.6.16 Collision presence function <\/td>\n<\/tr>\n | ||||||
| 609<\/td>\n | 16.6.6.17 signal_quality_error Message (SQE) test function 16.6.6.18 Jabber function 16.6.6.19 Link Fault Detect function <\/td>\n<\/tr>\n | ||||||
| 610<\/td>\n | 16.6.6.20 MAU state diagram requirements 16.6.6.21 MAU-to-AUI signal characteristics 16.6.6.22 MAU-to-AUI DI and CI driver characteristics <\/td>\n<\/tr>\n | ||||||
| 611<\/td>\n | 16.6.6.23 AUI-to-MAU DO receiver characteristics 16.6.6.24 MAU-to-AUI circuit termination <\/td>\n<\/tr>\n | ||||||
| 612<\/td>\n | 16.6.6.25 MAU-to-AUI mechanical connections 16.6.6.26 MAU reliability <\/td>\n<\/tr>\n | ||||||
| 613<\/td>\n | 16.6.6.27 Power consumption 16.6.6.28 PLS\u2013PMA requirements 16.6.6.29 signal_quality_error message (SQE) <\/td>\n<\/tr>\n | ||||||
| 614<\/td>\n | 16.6.6.30 Environmental requirements 16.6.6.31 MAU labeling 16.6.7 PICS proforma tables for 10BASE-FP stars 16.6.7.1 Star basic functions <\/td>\n<\/tr>\n | ||||||
| 615<\/td>\n | 16.6.7.2 Star optical characteristics 16.6.7.3 Star environmental requirements 16.6.7.4 10BASE-FP star labeling <\/td>\n<\/tr>\n | ||||||
| 616<\/td>\n | 17. Fiber optic medium attachment unit, type 10BASE-FB 17.1 Scope 17.1.1 Overview 17.1.1.1 Medium attachment unit 17.1.1.2 Relationship to repeater 17.1.1.3 Remote diagnostic messages 17.1.2 Relationship to AUI <\/td>\n<\/tr>\n | ||||||
| 617<\/td>\n | 17.2 PMA interface messages 17.2.1 PMA-to-MDI interface signal encodings 17.2.2 PMA-to-MDI OTD messages <\/td>\n<\/tr>\n | ||||||
| 618<\/td>\n | 17.2.2.1 OTD_output 17.2.2.2 OTD_sync_idle 17.2.2.3 OTD_remote_fault 17.2.3 MDI ORD-to-PMA messages 17.2.3.1 Status decoding 17.2.3.2 ORD_input 17.2.3.3 ORD_sync_idle <\/td>\n<\/tr>\n | ||||||
| 619<\/td>\n | 17.2.3.4 ORD_remote_fault 17.2.3.5 ORD_invalid_data 17.2.4 Transitions between signals 17.2.5 Signaling rate 17.3 MAU functional specifications 17.3.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 620<\/td>\n | 17.3.1.1 Data transmit 17.3.1.2 Synchronous idle 17.3.1.3 Fault signaling 17.3.2 Receive function requirements 17.3.2.1 Data receive 17.3.2.2 Remote status message handling 17.3.3 Collision function requirements 17.3.3.1 Collision detection <\/td>\n<\/tr>\n | ||||||
| 621<\/td>\n | 17.3.3.2 End of collision 17.3.4 Loopback function requirements 17.3.5 Fault-handling function requirements 17.3.6 Jabber function requirements <\/td>\n<\/tr>\n | ||||||
| 622<\/td>\n | 17.3.7 Low light level detection function requirements 17.3.8 Synchronous qualification function requirements <\/td>\n<\/tr>\n | ||||||
| 623<\/td>\n | 17.3.9 Interface message time references 17.3.10 MAU state diagrams 17.3.10.1 MAU state diagram variables <\/td>\n<\/tr>\n | ||||||
| 624<\/td>\n | 17.3.10.2 MAU state diagram timers <\/td>\n<\/tr>\n | ||||||
| 627<\/td>\n | 17.4 Timing summary <\/td>\n<\/tr>\n | ||||||
| 628<\/td>\n | 17.5 Protocol implementation conformance statement (PICS) proforma for Clause 17, Fiber optic medium attachment unit, type 10BASE-FB 17.5.1 Introduction 17.5.2 Abbreviations and special symbols 17.5.2.1 Status symbols 17.5.2.1.1 Abbreviations 17.5.3 Instructions for completing the PICS proforma 17.5.3.1 General structure of the PICS proforma <\/td>\n<\/tr>\n | ||||||
| 629<\/td>\n | 17.5.3.2 Additional information 17.5.3.3 Exception information <\/td>\n<\/tr>\n | ||||||
| 630<\/td>\n | 17.5.3.4 Conditional items 17.5.4 Identification 17.5.4.1 Implementation identification 17.5.4.2 Protocol summary 17.5.5 PICS proforma for the type 10BASE-FB MAU <\/td>\n<\/tr>\n | ||||||
| 631<\/td>\n | 17.5.6 PICS proforma for the type 10BASE-FB MAU 17.5.6.1 Compatibility considerations 17.5.6.2 Optical transmit parameters <\/td>\n<\/tr>\n | ||||||
| 632<\/td>\n | 17.5.6.3 Optical receive parameters 17.5.6.4 Optical medium connector plug and socket <\/td>\n<\/tr>\n | ||||||
| 633<\/td>\n | 17.5.6.5 MAU functions 17.5.6.6 PMA-to-MDI OTD messages and signaling <\/td>\n<\/tr>\n | ||||||
| 634<\/td>\n | 17.5.6.7 MDI ORD-to-PMA messages and signaling 17.5.6.8 Transitions between signals 17.5.6.9 Signaling rate <\/td>\n<\/tr>\n | ||||||
| 635<\/td>\n | 17.5.6.10 Transmit functions 17.5.6.11 Receive functions <\/td>\n<\/tr>\n | ||||||
| 636<\/td>\n | 17.5.6.12 Data receive function 17.5.6.13 Remote status message handling 17.5.6.14 Collision function requirements <\/td>\n<\/tr>\n | ||||||
| 637<\/td>\n | 17.5.6.15 End of collision 17.5.6.16 Loopback function 17.5.6.17 Fault-handling function <\/td>\n<\/tr>\n | ||||||
| 638<\/td>\n | 17.5.6.18 Jabber-handling function 17.5.6.19 Low light detection <\/td>\n<\/tr>\n | ||||||
| 639<\/td>\n | 17.5.6.20 Synchronous qualification 17.5.6.21 MAU state diagram requirements 17.5.6.22 MAU reliability <\/td>\n<\/tr>\n | ||||||
| 640<\/td>\n | 17.5.6.23 PLS\u2013PMA requirements 17.5.6.24 signal_quality_error message (SQE) 17.5.6.25 Environmental requirements 17.5.6.26 MAU labeling <\/td>\n<\/tr>\n | ||||||
| 641<\/td>\n | 18. Fiber optic medium attachment unit, type 10BASE-FL 18.1 Scope 18.1.1 Overview 18.1.1.1 10BASE-FL medium attachment unit (MAU) 18.1.1.2 Repeater unit 18.2 PMA interface messages <\/td>\n<\/tr>\n | ||||||
| 642<\/td>\n | 18.2.1 PMA to fiber optic link segment messages 18.2.1.1 OTD_output. 18.2.1.2 OTD_idle 18.2.2 Fiber optic link segment to PMA messages 18.2.2.1 ORD_input 18.2.2.2 ORD_idle <\/td>\n<\/tr>\n | ||||||
| 643<\/td>\n | 18.2.3 Interface message time references 18.3 MAU functional specifications 18.3.1 MAU functions <\/td>\n<\/tr>\n | ||||||
| 644<\/td>\n | 18.3.1.1 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 645<\/td>\n | 18.3.1.2 Receive function requirements 18.3.1.3 Loopback function requirements (half duplex mode only) 18.3.1.4 Collision Presence function requirements (half duplex mode only) <\/td>\n<\/tr>\n | ||||||
| 646<\/td>\n | 18.3.1.5 signal_quality_error Message (SQE) Test function requirements 18.3.1.6 Jabber function requirements 18.3.1.7 Link Integrity Test function requirements <\/td>\n<\/tr>\n | ||||||
| 647<\/td>\n | 18.3.1.8 Auto-Negotiation 18.3.2 MAU state diagrams 18.3.2.1 MAU state diagram variables <\/td>\n<\/tr>\n | ||||||
| 649<\/td>\n | 18.3.2.2 MAU state diagram timers <\/td>\n<\/tr>\n | ||||||
| 654<\/td>\n | 18.4 Timing summary <\/td>\n<\/tr>\n | ||||||
| 655<\/td>\n | 18.5 Protocol implementation conformance statement (PICS) proforma for Clause 18, Fiber optic medium attachment unit, type 10BASE-FL 18.5.1 Introduction 18.5.2 Abbreviations and special symbols 18.5.2.1 Status symbols 18.5.2.2 Abbreviations <\/td>\n<\/tr>\n | ||||||
| 656<\/td>\n | 18.5.3 Instructions for completing the PICS proforma 18.5.3.1 General structure of the PICS proforma 18.5.3.2 Additional information 18.5.3.3 Exception information <\/td>\n<\/tr>\n | ||||||
| 657<\/td>\n | 18.5.3.4 Conditional items 18.5.4 Identification 18.5.4.1 Implementation identification 18.5.4.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 658<\/td>\n | 18.5.5 Major capabilities\/options 18.5.6 PICS proforma tables for the type 10BASE-FL MAU 18.5.6.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 659<\/td>\n | 18.5.6.2 Optical transmit parameter <\/td>\n<\/tr>\n | ||||||
| 660<\/td>\n | 18.5.6.3 Optical receive parameters 18.5.6.4 Optical medium connector plug and socket <\/td>\n<\/tr>\n | ||||||
| 661<\/td>\n | 18.5.6.5 MAU functions 18.5.6.6 PMA interface messages 18.5.6.7 PMA-to-MDI OTD messages 18.5.6.8 MDI ORD-to-PMA messages <\/td>\n<\/tr>\n | ||||||
| 662<\/td>\n | 18.5.6.9 Transmit function 18.5.6.10 Receive function <\/td>\n<\/tr>\n | ||||||
| 663<\/td>\n | 18.5.6.11 Loopback function 18.5.6.12 Collision Presence function 18.5.6.13 signal_quality_error Message (SQE) Test function <\/td>\n<\/tr>\n | ||||||
| 664<\/td>\n | 18.5.6.14 Jabber function 18.5.6.15 Link Integrity Test function <\/td>\n<\/tr>\n | ||||||
| 666<\/td>\n | 18.5.6.16 MAU state diagram requirements 18.5.6.17 MAU-to-AUI signal characteristics <\/td>\n<\/tr>\n | ||||||
| 667<\/td>\n | 18.5.6.18 MAU-to-AUI DI and CI driver characteristics 18.5.6.19 AUI-to-MAU DO receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 668<\/td>\n | 18.5.6.20 AUI circuit termination 18.5.6.21 MAU-to-AUI mechanical connections <\/td>\n<\/tr>\n | ||||||
| 669<\/td>\n | 18.5.6.22 MAU reliability 18.5.6.23 Power consumption 18.5.6.24 PLS\u2013PMA requirements 18.5.6.25 signal_quality_error message (SQE) <\/td>\n<\/tr>\n | ||||||
| 670<\/td>\n | 18.5.6.26 Environmental requirements 18.5.6.27 MAU labeling <\/td>\n<\/tr>\n | ||||||
| 671<\/td>\n | 19. Layer Management for 10 Mb\/s baseband repeaters 19.1 Introduction 19.1.1 Scope 19.1.2 Relationship to objects in IEEE Std 802.1F-1993 19.1.3 Definitions 19.1.4 Symbols and abbreviations <\/td>\n<\/tr>\n | ||||||
| 672<\/td>\n | 19.1.5 Management model <\/td>\n<\/tr>\n | ||||||
| 673<\/td>\n | 19.2 Managed objects 19.2.1 Introduction 19.2.2 Overview of managed objects 19.2.2.1 Text description of managed objects 19.2.2.2 Port functions to support management <\/td>\n<\/tr>\n | ||||||
| 675<\/td>\n | 19.2.2.3 Containment <\/td>\n<\/tr>\n | ||||||
| 676<\/td>\n | 19.2.2.4 Naming 19.2.2.5 Packages and capabilities <\/td>\n<\/tr>\n | ||||||
| 678<\/td>\n | 19.2.3 Repeater managed object class 19.2.3.1 Repeater attributes 19.2.3.1.1 aRepeaterID 19.2.3.1.2 aRepeaterGroupCapacity 19.2.3.1.3 aGroupMap 19.2.3.1.4 aRepeaterHealthState <\/td>\n<\/tr>\n | ||||||
| 679<\/td>\n | 19.2.3.1.5 aRepeaterHealthText 19.2.3.1.6 aRepeaterHealthData 19.2.3.1.7 aTransmitCollisions 19.2.3.2 Repeater actions 19.2.3.2.1 acResetRepeater <\/td>\n<\/tr>\n | ||||||
| 680<\/td>\n | 19.2.3.2.2 acExecuteNonDisruptiveSelfTest 19.2.3.3 Repeater notifications 19.2.3.3.1 nRepeaterHealth <\/td>\n<\/tr>\n | ||||||
| 681<\/td>\n | 19.2.3.3.2 nRepeaterReset 19.2.3.3.3 nGroupMapChange 19.2.4 ResourceTypeID Managed Object Class 19.2.5 Group managed object class 19.2.5.1 Group attributes 19.2.5.1.1 aGroupID <\/td>\n<\/tr>\n | ||||||
| 682<\/td>\n | 19.2.5.1.2 aGroupPortCapacity 19.2.5.1.3 aPortMap 19.2.5.2 Group Notifications 19.2.5.2.1 nPortMapChange 19.2.6 Port managed object class 19.2.6.1 Port Attributes 19.2.6.1.1 aPortID <\/td>\n<\/tr>\n | ||||||
| 683<\/td>\n | 19.2.6.1.2 aPortAdminState 19.2.6.1.3 aAutoPartitionState 19.2.6.1.4 aReadableFrames 19.2.6.1.5 aReadableOctets <\/td>\n<\/tr>\n | ||||||
| 684<\/td>\n | 19.2.6.1.6 aFrameCheckSequenceErrors 19.2.6.1.7 aAlignmentErrors 19.2.6.1.8 aFramesTooLong 19.2.6.1.9 aShortEvents <\/td>\n<\/tr>\n | ||||||
| 685<\/td>\n | 19.2.6.1.10 aRunts 19.2.6.1.11 aCollisions 19.2.6.1.12 aLateEvents <\/td>\n<\/tr>\n | ||||||
| 686<\/td>\n | 19.2.6.1.13 aVeryLongEvents 19.2.6.1.14 aDataRateMismatches 19.2.6.1.15 aAutoPartitions 19.2.6.1.16 aLastSourceAddress <\/td>\n<\/tr>\n | ||||||
| 687<\/td>\n | 19.2.6.1.17 aSourceAddressChanges 19.2.6.2 Port Actions 19.2.6.2.1 acPortAdminControl <\/td>\n<\/tr>\n | ||||||
| 688<\/td>\n | 20. Layer Management for 10 Mb\/s baseband medium attachment units 20.1 Introduction 20.1.1 Scope 20.1.2 Management model 20.2 Managed objects 20.2.1 Text description of managed objects 20.2.1.1 Naming <\/td>\n<\/tr>\n | ||||||
| 689<\/td>\n | 20.2.1.2 Containment 20.2.1.3 Packages <\/td>\n<\/tr>\n | ||||||
| 690<\/td>\n | 20.2.2 MAU Managed object class 20.2.2.1 MAU attributes 20.2.2.1.1 aMAUID 20.2.2.1.2 aMAUType <\/td>\n<\/tr>\n | ||||||
| 691<\/td>\n | 20.2.2.1.3 aMediaAvailable 20.2.2.1.4 aLoseMediaCounter 20.2.2.1.5 aJabber <\/td>\n<\/tr>\n | ||||||
| 692<\/td>\n | 20.2.2.1.6 aMAUAdminState 20.2.2.1.7 aBbMAUXmitRcvSplitType 20.2.2.1.8 aBroadbandFrequencies <\/td>\n<\/tr>\n | ||||||
| 693<\/td>\n | 20.2.2.2 MAU actions 20.2.2.2.1 acResetMAU 20.2.2.2.2 acMAUAdminControl 20.2.2.3 MAU notifications 20.2.2.3.1 nJabber <\/td>\n<\/tr>\n | ||||||
| 694<\/td>\n | 21. Introduction to 100 Mb\/s baseband networks, type 100BASE-T 21.1 Overview <\/td>\n<\/tr>\n | ||||||
| 695<\/td>\n | 21.1.1 Reconciliation Sublayer (RS) and Media Independent Interface (MII) 21.1.2 Physical Layer signaling systems 21.1.3 Repeater 21.1.4 Auto-Negotiation 21.1.5 Management 21.2 References 21.3 Definitions 21.4 Abbreviations 21.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 696<\/td>\n | 21.5.1 Actions inside state blocks 21.5.2 State diagram variables 21.5.3 State transitions 21.5.4 Operators <\/td>\n<\/tr>\n | ||||||
| 698<\/td>\n | 21.6 Protocol implementation conformance statement (PICS) proforma 21.6.1 Introduction 21.6.2 Abbreviations and special symbols 21.6.3 Instructions for completing the PICS proforma <\/td>\n<\/tr>\n | ||||||
| 699<\/td>\n | 21.6.4 Additional information 21.6.5 Exceptional information 21.6.6 Conditional items <\/td>\n<\/tr>\n | ||||||
| 700<\/td>\n | 21.7 MAC delay constraints (exposed MII) <\/td>\n<\/tr>\n | ||||||
| 701<\/td>\n | 22. Reconciliation Sublayer (RS) and Media Independent Interface (MII) 22.1 Overview <\/td>\n<\/tr>\n | ||||||
| 702<\/td>\n | 22.1.1 Summary of major concepts 22.1.2 Application <\/td>\n<\/tr>\n | ||||||
| 703<\/td>\n | 22.1.3 Rates of operation 22.1.4 Allocation of functions 22.1.5 Relationship of MII and GMII 22.2 Functional specifications 22.2.1 Mapping of MII signals to PLS service primitives and Station Management <\/td>\n<\/tr>\n | ||||||
| 704<\/td>\n | 22.2.1.1 Mapping of PLS_DATA.request 22.2.1.1.1 Function 22.2.1.1.2 Semantics of the service primitive 22.2.1.1.3 When generated <\/td>\n<\/tr>\n | ||||||
| 705<\/td>\n | 22.2.1.2 Mapping of PLS_DATA.indication 22.2.1.2.1 Function 22.2.1.2.2 Semantics of the service primitive 22.2.1.2.3 When generated 22.2.1.3 Mapping of PLS_CARRIER.indication 22.2.1.3.1 Function 22.2.1.3.2 Semantics of the service primitive 22.2.1.3.3 When generated <\/td>\n<\/tr>\n | ||||||
| 706<\/td>\n | 22.2.1.4 Mapping of PLS_SIGNAL.indication 22.2.1.4.1 Function 22.2.1.4.2 Semantics of the service primitive 22.2.1.4.3 When generated 22.2.1.5 Response to RX_ER indication from MII 22.2.1.6 Conditions for generation of TX_ER <\/td>\n<\/tr>\n | ||||||
| 707<\/td>\n | 22.2.1.7 Mapping of PLS_DATA_VALID.indication 22.2.1.7.1 Function 22.2.1.7.2 Semantics of the service primitive 22.2.1.7.3 When generated 22.2.2 MII signal functional specifications 22.2.2.1 TX_CLK (transmit clock) 22.2.2.2 RX_CLK (receive clock) <\/td>\n<\/tr>\n | ||||||
| 708<\/td>\n | 22.2.2.3 TX_EN (transmit enable) 22.2.2.4 TXD (transmit data) <\/td>\n<\/tr>\n | ||||||
| 709<\/td>\n | 22.2.2.5 TX_ER (transmit coding error) <\/td>\n<\/tr>\n | ||||||
| 710<\/td>\n | 22.2.2.6 Transmit direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 711<\/td>\n | 22.2.2.7 RX_DV (Receive Data Valid) <\/td>\n<\/tr>\n | ||||||
| 712<\/td>\n | 22.2.2.8 RXD (receive data) <\/td>\n<\/tr>\n | ||||||
| 713<\/td>\n | 22.2.2.9 Receive direction LPI transition 22.2.2.10 RX_ER (receive error) <\/td>\n<\/tr>\n | ||||||
| 714<\/td>\n | 22.2.2.11 CRS (carrier sense) 22.2.2.12 COL (collision detected) <\/td>\n<\/tr>\n | ||||||
| 715<\/td>\n | 22.2.2.13 MDC (management data clock) 22.2.2.14 MDIO (management data input\/output) <\/td>\n<\/tr>\n | ||||||
| 716<\/td>\n | 22.2.3 MII data stream 22.2.3.1 Inter-frame 22.2.3.2 Preamble and start of frame delimiter 22.2.3.2.1 Transmit case <\/td>\n<\/tr>\n | ||||||
| 717<\/td>\n | 22.2.3.2.2 Receive case <\/td>\n<\/tr>\n | ||||||
| 718<\/td>\n | 22.2.3.3 Data 22.2.3.4 End-of-Frame delimiter (EFD) 22.2.3.5 Handling of excess nibbles 22.2.4 Management functions <\/td>\n<\/tr>\n | ||||||
| 719<\/td>\n | 22.2.4.1 Control register (Register 0) 22.2.4.1.1 Reset <\/td>\n<\/tr>\n | ||||||
| 720<\/td>\n | 22.2.4.1.2 Loopback <\/td>\n<\/tr>\n | ||||||
| 721<\/td>\n | 22.2.4.1.3 Speed selection 22.2.4.1.4 Auto-Negotiation enable 22.2.4.1.5 Power down <\/td>\n<\/tr>\n | ||||||
| 722<\/td>\n | 22.2.4.1.6 Isolate 22.2.4.1.7 Restart Auto-Negotiation 22.2.4.1.8 Duplex mode <\/td>\n<\/tr>\n | ||||||
| 723<\/td>\n | 22.2.4.1.9 Collision test 22.2.4.1.10 Speed selection 22.2.4.1.11 Reserved bits 22.2.4.1.12 Unidirectional enable 22.2.4.2 Status register (Register 1) <\/td>\n<\/tr>\n | ||||||
| 724<\/td>\n | 22.2.4.2.1 100BASE-T4 ability <\/td>\n<\/tr>\n | ||||||
| 725<\/td>\n | 22.2.4.2.2 100BASE-X full duplex ability 22.2.4.2.3 100BASE-X half duplex ability 22.2.4.2.4 10 Mb\/s full duplex ability 22.2.4.2.5 10 Mb\/s half duplex ability 22.2.4.2.6 100BASE-T2 full duplex ability 22.2.4.2.7 100BASE-T2 half duplex ability 22.2.4.2.8 Unidirectional ability 22.2.4.2.9 MF preamble suppression ability <\/td>\n<\/tr>\n | ||||||
| 726<\/td>\n | 22.2.4.2.10 Auto-Negotiation complete 22.2.4.2.11 Remote fault 22.2.4.2.12 Auto-Negotiation ability 22.2.4.2.13 Link Status 22.2.4.2.14 Jabber detect <\/td>\n<\/tr>\n | ||||||
| 727<\/td>\n | 22.2.4.2.15 Extended capability 22.2.4.2.16 Extended status 22.2.4.3 Extended capability registers 22.2.4.3.1 PHY Identifier (Registers 2 and 3) <\/td>\n<\/tr>\n | ||||||
| 728<\/td>\n | 22.2.4.3.2 Auto-Negotiation advertisement (Register 4) 22.2.4.3.3 Auto-Negotiation link partner ability (Register 5) 22.2.4.3.4 Auto-Negotiation expansion (Register 6) 22.2.4.3.5 Auto-Negotiation Next Page (Register 7) 22.2.4.3.6 Auto-Negotiation link partner Received Next Page (Register 8) 22.2.4.3.7 MASTER-SLAVE control register (Register 9) 22.2.4.3.8 MASTER-SLAVE status register (Register 10) 22.2.4.3.9 PSE Control register (Register 11) <\/td>\n<\/tr>\n | ||||||
| 729<\/td>\n | 22.2.4.3.10 PSE Status register (Register 12) 22.2.4.3.11 MMD access control register (Register 13) 22.2.4.3.12 MMD access address data register (Register 14) <\/td>\n<\/tr>\n | ||||||
| 730<\/td>\n | 22.2.4.3.13 PHY specific registers 22.2.4.4 Extended Status register (Register 15) 22.2.4.4.1 1000BASE-X full duplex ability <\/td>\n<\/tr>\n | ||||||
| 731<\/td>\n | 22.2.4.4.2 1000BASE-X half duplex ability 22.2.4.4.3 1000BASE-T full duplex ability 22.2.4.4.4 1000BASE-T half duplex ability 22.2.4.4.5 Reserved bits 22.2.4.5 Management frame structure 22.2.4.5.1 IDLE (IDLE condition) 22.2.4.5.2 PRE (preamble) <\/td>\n<\/tr>\n | ||||||
| 732<\/td>\n | 22.2.4.5.3 ST (start of frame) 22.2.4.5.4 OP (operation code) 22.2.4.5.5 PHYAD (PHY Address) 22.2.4.5.6 REGAD (Register Address) 22.2.4.5.7 TA (turnaround) <\/td>\n<\/tr>\n | ||||||
| 733<\/td>\n | 22.2.4.5.8 DATA (data) 22.3 Signal timing characteristics 22.3.1 Signals that are synchronous to TX_CLK 22.3.1.1 TX_EN 22.3.1.2 TXD 22.3.1.3 TX_ER <\/td>\n<\/tr>\n | ||||||
| 734<\/td>\n | 22.3.2 Signals that are synchronous to RX_CLK 22.3.2.1 RX_DV 22.3.2.2 RXD 22.3.2.3 RX_ER 22.3.3 Signals that have no required clock relationship 22.3.3.1 CRS 22.3.3.2 COL 22.3.4 MDIO timing relationship to MDC <\/td>\n<\/tr>\n | ||||||
| 735<\/td>\n | 22.4 Electrical characteristics 22.4.1 Signal levels <\/td>\n<\/tr>\n | ||||||
| 736<\/td>\n | 22.4.2 Signal paths 22.4.3 Driver characteristics 22.4.3.1 DC characteristics 22.4.3.2 AC characteristics <\/td>\n<\/tr>\n | ||||||
| 737<\/td>\n | 22.4.4 Receiver characteristics 22.4.4.1 Voltage thresholds 22.4.4.2 Input current 22.4.4.3 Input capacitance 22.4.5 Cable characteristics <\/td>\n<\/tr>\n | ||||||
| 738<\/td>\n | 22.4.5.1 Conductor size 22.4.5.2 Characteristic impedance 22.4.5.3 Delay <\/td>\n<\/tr>\n | ||||||
| 739<\/td>\n | 22.4.5.4 Delay variation 22.4.5.5 Shielding 22.4.5.6 DC resistance 22.4.6 Hot insertion and removal 22.5 Power supply 22.5.1 Supply voltage <\/td>\n<\/tr>\n | ||||||
| 740<\/td>\n | 22.5.2 Load current 22.5.3 Short-circuit protection 22.6 Mechanical characteristics 22.6.1 Definition of mechanical interface 22.6.2 Shielding effectiveness and transfer impedance <\/td>\n<\/tr>\n | ||||||
| 741<\/td>\n | 22.6.3 Connector pin numbering 22.6.4 Clearance dimensions 22.6.5 Contact assignments <\/td>\n<\/tr>\n | ||||||
| 743<\/td>\n | 22.7 LPI assertion and detection <\/td>\n<\/tr>\n | ||||||
| 744<\/td>\n | 22.7.1 LPI messages 22.7.2 Transmit LPI state diagram 22.7.2.1 Conventions 22.7.2.2 Variables and counters <\/td>\n<\/tr>\n | ||||||
| 745<\/td>\n | 22.7.2.3 State diagram 22.7.3 Considerations for transmit system behavior 22.7.3.1 Considerations for receive system behavior <\/td>\n<\/tr>\n | ||||||
| 746<\/td>\n | 22.8 Protocol implementation conformance statement (PICS) proforma for Clause 22, Reconciliation Sublayer (RS) and Media Independent Interface (MII) 22.8.1 Introduction 22.8.2 Identification 22.8.2.1 Implementation identification 22.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 747<\/td>\n | 22.8.2.3 Major capabilities\/options 22.8.3 PICS proforma tables for reconciliation sublayer and media independent interface 22.8.3.1 Mapping of PLS service primitives 22.8.3.2 MII signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 749<\/td>\n | 22.8.3.3 LPI functions <\/td>\n<\/tr>\n | ||||||
| 750<\/td>\n | 22.8.3.4 Frame structure 22.8.3.5 Management functions <\/td>\n<\/tr>\n | ||||||
| 754<\/td>\n | 22.8.3.6 Signal timing characteristics <\/td>\n<\/tr>\n | ||||||
| 755<\/td>\n | 22.8.3.7 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 756<\/td>\n | 22.8.3.8 Power supply <\/td>\n<\/tr>\n | ||||||
| 757<\/td>\n | 22.8.3.9 Mechanical characteristics <\/td>\n<\/tr>\n | ||||||
| 758<\/td>\n | 23. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T4 23.1 Overview 23.1.1 Scope 23.1.2 Objectives 23.1.3 Relation of 100BASE-T4 to other standards 23.1.4 Summary <\/td>\n<\/tr>\n | ||||||
| 759<\/td>\n | 23.1.4.1 Summary of Physical Coding Sublayer (PCS) specification <\/td>\n<\/tr>\n | ||||||
| 761<\/td>\n | 23.1.4.2 Summary of physical medium attachment (PMA) specification 23.1.5 Application of 100BASE-T4 23.1.5.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 762<\/td>\n | 23.1.5.2 Incorporating the 100BASE-T4 PHY into a DTE 23.1.5.3 Use of 100BASE-T4 PHY for point-to-point communication 23.1.5.4 Support for Auto-Negotiation 23.2 PCS functional specifications 23.2.1 PCS functions 23.2.1.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 763<\/td>\n | 23.2.1.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 764<\/td>\n | 23.2.1.2.1 DC balance encoding rules 23.2.1.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 765<\/td>\n | 23.2.1.3.1 Error-detecting rules <\/td>\n<\/tr>\n | ||||||
| 766<\/td>\n | 23.2.1.4 PCS Error Sense function 23.2.1.5 PCS Carrier Sense function 23.2.1.6 PCS Collision Presence function <\/td>\n<\/tr>\n | ||||||
| 767<\/td>\n | 23.2.2 PCS interfaces 23.2.2.1 PCS\u2013MII interface signals 23.2.2.2 PCS\u2013Management entity signals 23.2.3 Frame structure <\/td>\n<\/tr>\n | ||||||
| 768<\/td>\n | 23.2.4 PCS state diagrams 23.2.4.1 PCS state diagram constants <\/td>\n<\/tr>\n | ||||||
| 769<\/td>\n | 23.2.4.2 PCS state diagram variables <\/td>\n<\/tr>\n | ||||||
| 772<\/td>\n | 23.2.4.3 PCS state diagram timer 23.2.4.4 PCS state diagram functions <\/td>\n<\/tr>\n | ||||||
| 774<\/td>\n | 23.2.4.5 PCS state diagrams <\/td>\n<\/tr>\n | ||||||
| 776<\/td>\n | 23.2.5 PCS electrical specifications 23.3 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 777<\/td>\n | 23.3.1 PMA_TYPE.indication 23.3.1.1 Semantics of the service primitive 23.3.1.2 When generated 23.3.1.3 Effect of receipt 23.3.2 PMA_UNITDATA.request 23.3.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 778<\/td>\n | 23.3.2.2 When generated 23.3.2.3 Effect of receipt 23.3.3 PMA_UNITDATA.indication 23.3.3.1 Semantics of the service primitive 23.3.3.2 When generated <\/td>\n<\/tr>\n | ||||||
| 779<\/td>\n | 23.3.3.3 Effect of receipt 23.3.4 PMA_CARRIER.indication 23.3.4.1 Semantics of the service primitive 23.3.4.2 When generated 23.3.4.3 Effect of receipt 23.3.5 PMA_LINK.indication 23.3.5.1 Semantics of the service primitive 23.3.5.2 When generated 23.3.5.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 780<\/td>\n | 23.3.6 PMA_LINK.request 23.3.6.1 Semantics of the service primitive 23.3.6.2 Default value of parameter link_control 23.3.6.3 When generated 23.3.6.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 781<\/td>\n | 23.3.7 PMA_RXERROR.indication 23.3.7.1 Semantics of the service primitive 23.3.7.2 When generated 23.3.7.3 Effect of receipt 23.4 PMA functional specifications 23.4.1 PMA functions 23.4.1.1 PMA Reset function <\/td>\n<\/tr>\n | ||||||
| 782<\/td>\n | 23.4.1.2 PMA Transmit function <\/td>\n<\/tr>\n | ||||||
| 783<\/td>\n | 23.4.1.3 PMA Receive function 23.4.1.4 PMA Carrier Sense function <\/td>\n<\/tr>\n | ||||||
| 784<\/td>\n | 23.4.1.5 Link Integrity function 23.4.1.6 PMA Align function <\/td>\n<\/tr>\n | ||||||
| 785<\/td>\n | 23.4.1.7 Clock Recovery function 23.4.2 PMA interface messages <\/td>\n<\/tr>\n | ||||||
| 786<\/td>\n | 23.4.3 PMA state diagrams 23.4.3.1 PMA constants <\/td>\n<\/tr>\n | ||||||
| 787<\/td>\n | 23.4.3.2 State diagram variables 23.4.3.3 State diagram timers <\/td>\n<\/tr>\n | ||||||
| 788<\/td>\n | 23.4.3.4 State diagram counters 23.4.3.5 Link Integrity state diagram 23.5 PMA electrical specifications 23.5.1 PMA-to-MDI interface characteristics 23.5.1.1 Isolation requirement <\/td>\n<\/tr>\n | ||||||
| 789<\/td>\n | 23.5.1.2 Transmitter specifications 23.5.1.2.1 Peak differential output voltage <\/td>\n<\/tr>\n | ||||||
| 790<\/td>\n | 23.5.1.2.2 Differential output templates <\/td>\n<\/tr>\n | ||||||
| 794<\/td>\n | 23.5.1.2.3 Differential output ISI (intersymbol interference) <\/td>\n<\/tr>\n | ||||||
| 796<\/td>\n | 23.5.1.2.4 Transmitter differential output impedance <\/td>\n<\/tr>\n | ||||||
| 797<\/td>\n | 23.5.1.2.5 Output timing jitter 23.5.1.2.6 Transmitter impedance balance <\/td>\n<\/tr>\n | ||||||
| 798<\/td>\n | 23.5.1.2.7 Common-mode output voltage 23.5.1.2.8 Transmitter common-mode rejection <\/td>\n<\/tr>\n | ||||||
| 799<\/td>\n | 23.5.1.2.9 Transmitter fault tolerance 23.5.1.2.10 Transmit clock frequency 23.5.1.3 Receiver specifications <\/td>\n<\/tr>\n | ||||||
| 800<\/td>\n | 23.5.1.3.1 Receiver differential input signals <\/td>\n<\/tr>\n | ||||||
| 801<\/td>\n | 23.5.1.3.2 Receiver differential noise immunity 23.5.1.3.3 Receiver differential input impedance 23.5.1.3.4 Common-mode rejection <\/td>\n<\/tr>\n | ||||||
| 802<\/td>\n | 23.5.1.3.5 Receiver fault tolerance 23.5.1.3.6 Receiver frequency tolerance 23.5.2 Power consumption 23.6 Link segment characteristics 23.6.1 Cabling <\/td>\n<\/tr>\n | ||||||
| 803<\/td>\n | 23.6.2 Link transmission parameters 23.6.2.1 Insertion loss 23.6.2.2 Differential characteristic impedance 23.6.2.3 Coupling parameters 23.6.2.3.1 Differential Near-End Crosstalk (NEXT) loss 23.6.2.3.2 Multiple-disturber NEXT (MDNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 804<\/td>\n | 23.6.2.3.3 Equal Level Far-End Crosstalk (ELFEXT) loss 23.6.2.3.4 Multiple-disturber ELFEXT (MDELFEXT) loss 23.6.2.4 Delay 23.6.2.4.1 Maximum link delay 23.6.2.4.2 Maximum link delay per meter <\/td>\n<\/tr>\n | ||||||
| 805<\/td>\n | 23.6.2.4.3 Difference in link delays 23.6.3 Noise 23.6.3.1 Near-End Crosstalk 23.6.3.2 Far-End Crosstalk <\/td>\n<\/tr>\n | ||||||
| 806<\/td>\n | 23.6.4 Installation practice 23.6.4.1 Connector installation practices 23.6.4.2 Disallow use of Category 3 cable with more than four pairs 23.6.4.3 Allow use of Category 5 jumpers with up to 25 pairs 23.7 MDI specification 23.7.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 807<\/td>\n | 23.7.2 Crossover function 23.8 System considerations <\/td>\n<\/tr>\n | ||||||
| 808<\/td>\n | 23.9 Environmental specifications 23.9.1 General safety 23.9.2 Network safety <\/td>\n<\/tr>\n | ||||||
| 809<\/td>\n | 23.9.2.1 Installation 23.9.2.2 Grounding 23.9.2.3 Installation and maintenance guidelines 23.9.2.4 Telephony voltages <\/td>\n<\/tr>\n | ||||||
| 810<\/td>\n | 23.9.3 Environment 23.9.3.1 Electromagnetic emission 23.9.3.2 Temperature and humidity 23.10 PHY labeling 23.11 Timing summary 23.11.1 Timing references <\/td>\n<\/tr>\n | ||||||
| 811<\/td>\n | 23.11.2 Definitions of controlled parameters <\/td>\n<\/tr>\n | ||||||
| 813<\/td>\n | 23.11.3 Table of required timing values <\/td>\n<\/tr>\n | ||||||
| 821<\/td>\n | 23.12 Protocol implementation conformance statement (PICS) proforma for Clause 23, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 100BASE-T4 23.12.1 Introduction 23.12.2 Identification 23.12.2.1 Implementation identification 23.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 822<\/td>\n | 23.12.3 Major capabilities\/options 23.12.4 PICS proforma tables for the Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T4 23.12.4.1 Compatibility considerations 23.12.4.2 PCS Transmit functions <\/td>\n<\/tr>\n | ||||||
| 823<\/td>\n | 23.12.4.3 PCS Receive functions 23.12.4.4 Other PCS functions <\/td>\n<\/tr>\n | ||||||
| 824<\/td>\n | 23.12.4.5 PCS state diagram variables <\/td>\n<\/tr>\n | ||||||
| 825<\/td>\n | 23.12.4.6 PMA service interface 23.12.4.7 PMA Transmit functions <\/td>\n<\/tr>\n | ||||||
| 826<\/td>\n | 23.12.4.8 PMA Receive functions 23.12.4.9 Link Integrity functions <\/td>\n<\/tr>\n | ||||||
| 827<\/td>\n | 23.12.4.10 PMA Align functions 23.12.4.11 Other PMA functions <\/td>\n<\/tr>\n | ||||||
| 828<\/td>\n | 23.12.4.12 Isolation requirements 23.12.4.13 PMA electrical requirements <\/td>\n<\/tr>\n | ||||||
| 831<\/td>\n | 23.12.4.14 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 832<\/td>\n | 23.12.4.15 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 833<\/td>\n | 23.12.4.16 General safety and environmental requirements <\/td>\n<\/tr>\n | ||||||
| 834<\/td>\n | 23.12.4.17 Timing requirements <\/td>\n<\/tr>\n | ||||||
| 835<\/td>\n | 24. Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 100BASE-X 24.1 Overview 24.1.1 Scope 24.1.2 Objectives <\/td>\n<\/tr>\n | ||||||
| 836<\/td>\n | 24.1.3 Relationship of 100BASE-X to other standards 24.1.4 Summary of 100BASE-X sublayers 24.1.4.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 837<\/td>\n | 24.1.4.2 Physical Medium Attachment (PMA) sublayer 24.1.4.3 Physical Medium Dependent (PMD) sublayer 24.1.4.4 Auto-Negotiation 24.1.5 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 839<\/td>\n | 24.1.6 Functional block diagram 24.1.7 State diagram conventions 24.2 Physical Coding Sublayer (PCS) 24.2.1 Service Interface (MII) 24.2.2 Functional requirements <\/td>\n<\/tr>\n | ||||||
| 841<\/td>\n | 24.2.2.1 Code-groups 24.2.2.1.1 Data code-groups <\/td>\n<\/tr>\n | ||||||
| 843<\/td>\n | 24.2.2.1.2 Idle code-groups 24.2.2.1.3 Control code-groups 24.2.2.1.4 Start-of-Stream delimiter (\/J\/K\/) 24.2.2.1.5 End-of-Stream delimiter (\/T\/R\/) 24.2.2.1.6 SLEEP code-groups (\/P\/) 24.2.2.1.7 Invalid code-groups 24.2.2.2 Encapsulation <\/td>\n<\/tr>\n | ||||||
| 844<\/td>\n | 24.2.2.3 Data delay <\/td>\n<\/tr>\n | ||||||
| 845<\/td>\n | 24.2.2.4 Mapping between MII and PMA 24.2.3 State variables 24.2.3.1 Constants <\/td>\n<\/tr>\n | ||||||
| 846<\/td>\n | 24.2.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 848<\/td>\n | 24.2.3.3 Functions 24.2.3.4 Timers <\/td>\n<\/tr>\n | ||||||
| 849<\/td>\n | 24.2.3.5 Messages <\/td>\n<\/tr>\n | ||||||
| 850<\/td>\n | 24.2.4 State diagrams 24.2.4.1 Transmit Bits 24.2.4.2 Transmit <\/td>\n<\/tr>\n | ||||||
| 851<\/td>\n | 24.2.4.3 Receive Bits 24.2.4.4 Receive <\/td>\n<\/tr>\n | ||||||
| 853<\/td>\n | 24.2.4.4.1 Detecting channel activity 24.2.4.4.2 Code-group alignment 24.2.4.4.3 Stream decoding <\/td>\n<\/tr>\n | ||||||
| 855<\/td>\n | 24.2.4.4.4 Stream termination <\/td>\n<\/tr>\n | ||||||
| 857<\/td>\n | 24.2.4.5 Carrier Sense 24.3 Physical Medium Attachment (PMA) sublayer 24.3.1 Service interface <\/td>\n<\/tr>\n | ||||||
| 858<\/td>\n | 24.3.1.1 PMA_TYPE.indicate 24.3.1.1.1 Semantics of the service primitive 24.3.1.1.2 When generated 24.3.1.1.3 Effect of receipt 24.3.1.2 PMA_UNITDATA.request 24.3.1.2.1 Semantics of the service primitive 24.3.1.2.2 When generated 24.3.1.2.3 Effect of receipt 24.3.1.3 PMA_UNITDATA.indicate 24.3.1.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 859<\/td>\n | 24.3.1.3.2 When generated 24.3.1.3.3 Effect of receipt 24.3.1.4 PMA_CARRIER.indicate 24.3.1.4.1 Semantics of the service primitive 24.3.1.4.2 When generated 24.3.1.4.3 Effect of receipt 24.3.1.5 PMA_LINK.indicate 24.3.1.5.1 Semantics of the service primitive 24.3.1.5.2 When generated 24.3.1.5.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 860<\/td>\n | 24.3.1.6 PMA_LINK.request 24.3.1.6.1 Semantics of the service primitive 24.3.1.6.2 When generated 24.3.1.6.3 Effect of receipt 24.3.1.7 PMA_RXERROR.indicate 24.3.1.7.1 Semantics of the service primitive 24.3.1.7.2 When generated 24.3.1.7.3 Effect of receipt 24.3.1.8 PMA_LPILINKFAIL.request 24.3.1.8.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 861<\/td>\n | 24.3.1.8.2 When generated 24.3.1.8.3 Effect of receipt 24.3.1.9 PMA_RXLPI.request 24.3.1.9.1 Semantics of the service primitive 24.3.1.9.2 When generated 24.3.1.9.3 Effect of receipt 24.3.2 Functional requirements <\/td>\n<\/tr>\n | ||||||
| 862<\/td>\n | 24.3.2.1 Far-End fault 24.3.2.2 Comparison to previous IEEE 802.3 PMAs <\/td>\n<\/tr>\n | ||||||
| 863<\/td>\n | 24.3.2.3 EEE capability 24.3.3 State variables 24.3.3.1 Constants 24.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 865<\/td>\n | 24.3.3.3 Functions 24.3.3.4 Timers 24.3.3.5 Counters 24.3.3.6 Messages 24.3.4 Process specifications and state diagrams 24.3.4.1 TX <\/td>\n<\/tr>\n | ||||||
| 866<\/td>\n | 24.3.4.2 RX 24.3.4.3 Carrier detect 24.3.4.4 Link Monitor <\/td>\n<\/tr>\n | ||||||
| 868<\/td>\n | 24.3.4.5 Far-End Fault Generate <\/td>\n<\/tr>\n | ||||||
| 869<\/td>\n | 24.3.4.6 Far-End Fault Detect <\/td>\n<\/tr>\n | ||||||
| 871<\/td>\n | 24.4 Physical Medium Dependent (PMD) sublayer service interface 24.4.1 PMD service interface 24.4.1.1 PMD_UNITDATA.request 24.4.1.1.1 Semantics of the service primitive 24.4.1.1.2 When generated 24.4.1.1.3 Effect of receipt 24.4.1.2 PMD_UNITDATA.indicate <\/td>\n<\/tr>\n | ||||||
| 872<\/td>\n | 24.4.1.2.1 Semantics of the service primitive 24.4.1.2.2 When generated 24.4.1.2.3 Effect of receipt 24.4.1.3 PMD_SIGNAL.indicate 24.4.1.3.1 Semantics of the service primitive 24.4.1.3.2 When generated 24.4.1.3.3 Effect of receipt 24.4.1.4 PMD_RXQUIET.request 24.4.1.4.1 Semantics of the service primitive 24.4.1.4.2 When generated <\/td>\n<\/tr>\n | ||||||
| 873<\/td>\n | 24.4.1.4.3 Effect of receipt 24.4.1.5 PMD_TXQUIET.request 24.4.1.5.1 Semantics of the service primitive 24.4.1.5.2 When generated 24.4.1.5.3 Effect of receipt 24.4.2 Medium Dependent Interface (MDI) 24.5 Compatibility considerations 24.6 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 874<\/td>\n | 24.6.1 PHY delay constraints (exposed MII) 24.6.2 DTE delay constraints (unexposed MII) <\/td>\n<\/tr>\n | ||||||
| 875<\/td>\n | 24.6.3 Carrier deassertion\/assertion constraint (half duplex mode only) 24.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 876<\/td>\n | 24.8 Protocol implementation conformance statement (PICS) proforma for Clause 24, Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 100BASE-X 24.8.1 Introduction 24.8.2 Identification 24.8.2.1 Implementation identification 24.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 877<\/td>\n | 24.8.2.3 Major capabilities\/options 24.8.3 PICS proforma tables for the Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 100BASE-X 24.8.3.1 General compatibility considerations 24.8.3.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 878<\/td>\n | 24.8.3.3 PMA functions 24.8.3.4 Timing 24.8.3.5 LPI functions <\/td>\n<\/tr>\n | ||||||
| 880<\/td>\n | 25. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX 25.1 Overview 25.1.1 State diagram conventions 25.2 Functional specifications 25.3 General exceptions <\/td>\n<\/tr>\n | ||||||
| 882<\/td>\n | 25.4 Specific requirements and exceptions 25.4.1 Change to 7.2.3.1.1, \u201cLine state patterns\u201d 25.4.2 Change to 7.2.3.3, \u201cLoss of synchronization\u201d 25.4.3 Change to Table 8-1, \u201cContact assignments for twisted pair\u201d 25.4.4 Deletion of 8.3, \u201cStation labelling\u201d 25.4.5 Change to 9.1.7, \u201cWorst case droop of transformer\u201d <\/td>\n<\/tr>\n | ||||||
| 883<\/td>\n | 25.4.5.1 Equivalent system time constant <\/td>\n<\/tr>\n | ||||||
| 884<\/td>\n | 25.4.6 Replacement of 8.4.1, \u201cUTP isolation requirements\u201d 25.4.7 Addition to 10.1, \u201cReceiver\u201d 25.4.8 Change to 9.1.9, \u201cJitter\u201d 25.4.9 Cable plant <\/td>\n<\/tr>\n | ||||||
| 885<\/td>\n | 25.4.9.1 Cabling system characteristics 25.4.9.2 Link transmission parameters 25.4.9.2.1 Insertion loss 25.4.9.2.2 Differential characteristic impedance 25.4.9.2.3 Return loss 25.4.9.2.4 Differential near-end crosstalk (NEXT) <\/td>\n<\/tr>\n | ||||||
| 886<\/td>\n | 25.4.9.3 Noise environment 25.4.9.3.1 External coupled noise 25.4.10 Replacement of 11.2, \u201cCrossover function\u201d 25.4.11 Change to A.2, \u201cDDJ test pattern for baseline wander measurements\u201d 25.4.12 Change to Annex G, \u201cStream cipher scrambling function\u201d 25.4.13 Change to Annex I, \u201cCommon mode cable termination\u201d 25.5 EEE capability <\/td>\n<\/tr>\n | ||||||
| 887<\/td>\n | 25.5.1 Change to TP-PMD 7.1.2 \u201cEncoder\u201d 25.5.1.1 State variables 25.5.1.1.1 Variables 25.5.1.1.2 Messages <\/td>\n<\/tr>\n | ||||||
| 888<\/td>\n | 25.5.1.2 State diagram 25.5.2 Change to TP-PMD 7.2.2 \u201cDecoder\u201d 25.5.2.1 State variables 25.5.2.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 889<\/td>\n | 25.5.2.1.2 Messages 25.5.2.2 State diagram 25.5.3 Changes to 10.1.1.1 \u201cSignal_Detect assertion threshold\u201d 25.5.4 Changes to 10.1.1.2 \u201cSignal_Detect deassertion threshold\u201d <\/td>\n<\/tr>\n | ||||||
| 890<\/td>\n | 25.5.5 Change to 10.1.2 \u201cSignal_Detect timing requirements on assertion\u201d 25.5.6 Change to 10.1.3 \u201cSignal_Detect timing requirements on deassertion\u201d 25.5.7 Changes to TP-PMD 10.2 \u201cTransmitter\u201d <\/td>\n<\/tr>\n | ||||||
| 891<\/td>\n | 25.5.8 Replace TP-PMD Table 4 \u201cSignal_Detect summary\u201d with Table 25\u20133 <\/td>\n<\/tr>\n | ||||||
| 892<\/td>\n | 25.6 Protocol implementation conformance statement (PICS) proforma for Clause 25, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX 25.6.1 Introduction 25.6.2 Identification 25.6.2.1 Implementation identification 25.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 893<\/td>\n | 25.6.3 Major capabilities\/options 25.6.3.1 Power over Ethernet major capabilities\/options 25.6.4 PICS proforma tables for the Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-TX 25.6.4.1 General compatibility considerations 25.6.4.2 PMD compliance <\/td>\n<\/tr>\n | ||||||
| 894<\/td>\n | 25.6.4.3 Characteristics of link segment 25.6.4.4 Power over Ethernet compliance <\/td>\n<\/tr>\n | ||||||
| 895<\/td>\n | 25.6.4.5 LPI functions <\/td>\n<\/tr>\n | ||||||
| 897<\/td>\n | 26. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-FX 26.1 Overview 26.2 Functional specifications 26.3 General exceptions <\/td>\n<\/tr>\n | ||||||
| 898<\/td>\n | 26.4 Specific requirements and exceptions 26.4.1 Medium Dependent Interface (MDI) 26.4.2 Crossover function <\/td>\n<\/tr>\n | ||||||
| 899<\/td>\n | 26.5 Protocol implementation conformance statement (PICS) proforma for Clause 26, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-FX 26.5.1 Introduction 26.5.2 Identification 26.5.2.1 Implementation identification 26.5.3 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 900<\/td>\n | 26.5.4 Major capabilities\/options 26.5.5 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100BASE-FX 26.5.5.1 General compatibility considerations 26.5.5.2 PMD compliance <\/td>\n<\/tr>\n | ||||||
| 901<\/td>\n | 27. Repeater for 100 Mb\/s baseband networks 27.1 Overview 27.1.1 Scope 27.1.1.1 Repeater set <\/td>\n<\/tr>\n | ||||||
| 902<\/td>\n | 27.1.1.2 Repeater unit 27.1.1.3 Repeater classes 27.1.2 Application perspective 27.1.2.1 Objectives 27.1.2.2 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 903<\/td>\n | 27.1.2.2.1 Internal segment compatibility 27.1.3 Relationship to PHY 27.2 PMA interface messages 27.3 Repeater functional specifications <\/td>\n<\/tr>\n | ||||||
| 904<\/td>\n | 27.3.1 Repeater functions 27.3.1.1 Signal restoration functional requirements 27.3.1.1.1 Signal amplification 27.3.1.1.2 Signal wave-shape restoration 27.3.1.1.3 Signal retiming 27.3.1.2 Data handling functional requirements 27.3.1.2.1 Data frame forwarding 27.3.1.2.2 Received code violations <\/td>\n<\/tr>\n | ||||||
| 905<\/td>\n | 27.3.1.3 Received event handling functional requirements 27.3.1.3.1 Received event handling 27.3.1.3.2 Preamble regeneration 27.3.1.3.3 Start-of-packet propagation delay 27.3.1.3.4 Start-of-packet variability 27.3.1.4 Collision handling functional requirements 27.3.1.4.1 Collision detection 27.3.1.4.2 Jam generation <\/td>\n<\/tr>\n | ||||||
| 906<\/td>\n | 27.3.1.4.3 Collision-jam propagation delay 27.3.1.4.4 Cessation-of-collision Jam propagation delay 27.3.1.5 Error handling functional requirements 27.3.1.5.1 100BASE-X and 100BASE-T2 carrier integrity functional requirements <\/td>\n<\/tr>\n | ||||||
| 907<\/td>\n | 27.3.1.5.2 Speed handling 27.3.1.6 Partition functional requirements <\/td>\n<\/tr>\n | ||||||
| 908<\/td>\n | 27.3.1.7 Receive jabber functional requirements 27.3.2 Detailed repeater functions and state diagrams 27.3.2.1 State diagram variables 27.3.2.1.1 Constants <\/td>\n<\/tr>\n | ||||||
| 909<\/td>\n | 27.3.2.1.2 Variables <\/td>\n<\/tr>\n | ||||||
| 912<\/td>\n | 27.3.2.1.3 Functions 27.3.2.1.4 Timers <\/td>\n<\/tr>\n | ||||||
| 913<\/td>\n | 27.3.2.1.5 Counters 27.3.2.1.6 Port designation <\/td>\n<\/tr>\n | ||||||
| 914<\/td>\n | 27.3.2.2 State diagrams <\/td>\n<\/tr>\n | ||||||
| 922<\/td>\n | 27.4 Repeater electrical specifications 27.4.1 Electrical isolation 27.5 Environmental specifications 27.5.1 General safety 27.5.2 Network safety 27.5.2.1 Installation 27.5.2.2 Grounding <\/td>\n<\/tr>\n | ||||||
| 923<\/td>\n | 27.5.2.3 Installation and maintenance guidelines 27.5.3 Electrical isolation 27.5.3.1 Environment A requirements 27.5.3.2 Environment B requirements 27.5.4 Reliability <\/td>\n<\/tr>\n | ||||||
| 924<\/td>\n | 27.5.5 Environment 27.5.5.1 Electromagnetic emission 27.5.5.2 Temperature and humidity 27.6 Repeater labeling <\/td>\n<\/tr>\n | ||||||
| 925<\/td>\n | 27.7 Protocol implementation conformance statement (PICS) proforma for Clause 27, Repeater for 100 Mb\/s baseband networks 27.7.1 Introduction 27.7.2 Identification 27.7.2.1 Implementation identification 27.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 926<\/td>\n | 27.7.3 Major capabilities\/options 27.7.4 PICS proforma tables for the repeater for 100 Mb\/s baseband networks 27.7.4.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 927<\/td>\n | 27.7.4.2 Repeater functions 27.7.4.3 Signal Restoration function <\/td>\n<\/tr>\n | ||||||
| 928<\/td>\n | 27.7.4.4 Data Handling function 27.7.4.5 Receive Event Handling function <\/td>\n<\/tr>\n | ||||||
| 929<\/td>\n | 27.7.4.6 Collision Handling function <\/td>\n<\/tr>\n | ||||||
| 930<\/td>\n | 27.7.4.7 Error Handling function 27.7.4.8 Partition functions <\/td>\n<\/tr>\n | ||||||
| 931<\/td>\n | 27.7.4.9 Receive Jabber function <\/td>\n<\/tr>\n | ||||||
| 932<\/td>\n | 27.7.4.10 Repeater state diagrams 27.7.4.11 Repeater electrical <\/td>\n<\/tr>\n | ||||||
| 933<\/td>\n | 27.7.4.12 Repeater labeling <\/td>\n<\/tr>\n | ||||||
| 934<\/td>\n | 28. Physical Layer link signaling for Auto-Negotiation on twisted pair 28.1 Overview 28.1.1 Scope <\/td>\n<\/tr>\n | ||||||
| 935<\/td>\n | 28.1.2 Application perspective\/objectives 28.1.3 Relationship to architectural layering <\/td>\n<\/tr>\n | ||||||
| 936<\/td>\n | 28.1.4 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 937<\/td>\n | 28.1.4.1 Interoperability with existing 10BASE-T devices 28.1.4.2 Interoperability with Auto-Negotiation compatible devices 28.1.4.3 Cabling compatibility with Auto-Negotiation 28.2 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 938<\/td>\n | 28.2.1 Transmit function requirements 28.2.1.1 Link pulse transmission 28.2.1.1.1 FLP burst encoding <\/td>\n<\/tr>\n | ||||||
| 939<\/td>\n | 28.2.1.1.2 Transmit timing <\/td>\n<\/tr>\n | ||||||
| 940<\/td>\n | 28.2.1.2 Link codeword encoding 28.2.1.2.1 Selector Field 28.2.1.2.2 Technology Ability Field <\/td>\n<\/tr>\n | ||||||
| 941<\/td>\n | 28.2.1.2.3 Extended Next Page 28.2.1.2.4 Remote Fault 28.2.1.2.5 Acknowledge 28.2.1.2.6 Next Page <\/td>\n<\/tr>\n | ||||||
| 942<\/td>\n | 28.2.1.3 Transmit Switch function 28.2.2 Receive function requirements 28.2.2.1 FLP Burst ability detection and decoding <\/td>\n<\/tr>\n | ||||||
| 943<\/td>\n | 28.2.2.2 NLP detection 28.2.2.3 Receive Switch function <\/td>\n<\/tr>\n | ||||||
| 944<\/td>\n | 28.2.2.4 Link codeword matching 28.2.3 Arbitration function requirements 28.2.3.1 Parallel detection function 28.2.3.2 Renegotiation function <\/td>\n<\/tr>\n | ||||||
| 945<\/td>\n | 28.2.3.3 Priority Resolution function 28.2.3.4 Next Page function <\/td>\n<\/tr>\n | ||||||
| 946<\/td>\n | 28.2.3.4.1 Next Page encodings <\/td>\n<\/tr>\n | ||||||
| 947<\/td>\n | 28.2.3.4.2 Extended Next Page encodings 28.2.3.4.3 Next Page <\/td>\n<\/tr>\n | ||||||
| 948<\/td>\n | 28.2.3.4.4 Acknowledge 28.2.3.4.5 Message Page 28.2.3.4.6 Acknowledge 2 28.2.3.4.7 Toggle 28.2.3.4.8 Message Page encoding 28.2.3.4.9 Message Code Field 28.2.3.4.10 Unformatted Page encoding <\/td>\n<\/tr>\n | ||||||
| 949<\/td>\n | 28.2.3.4.11 Unformatted Code Field 28.2.3.4.12 Extended Unformatted Code Field 28.2.3.4.13 Use of Next Pages 28.2.3.4.14 MII register requirements 28.2.3.5 Remote fault sensing function <\/td>\n<\/tr>\n | ||||||
| 950<\/td>\n | 28.2.4 Management function requirements 28.2.4.1 Media Independent Interface 28.2.4.1.1 MII control register 28.2.4.1.2 MII status register <\/td>\n<\/tr>\n | ||||||
| 951<\/td>\n | 28.2.4.1.3 Auto-Negotiation advertisement register (Register 4) (R\/W) 28.2.4.1.4 Auto-Negotiation Link Partner ability register (Register 5) (RO) <\/td>\n<\/tr>\n | ||||||
| 952<\/td>\n | 28.2.4.1.5 Auto-Negotiation expansion register (Register 6) (RO) <\/td>\n<\/tr>\n | ||||||
| 954<\/td>\n | 28.2.4.1.6 Auto-Negotiation Next Page transmit register (Register 7) (R\/W) 28.2.4.1.7 Auto-Negotiation Link Partner Received Next Page register (Register 8) (RO) <\/td>\n<\/tr>\n | ||||||
| 955<\/td>\n | 28.2.4.1.8 State diagram variable to MII register mapping <\/td>\n<\/tr>\n | ||||||
| 956<\/td>\n | 28.2.4.2 Auto-Negotiation managed object class 28.2.5 Absence of management function 28.2.6 Technology-Dependent Interface 28.2.6.1 PMA_LINK.indication 28.2.6.1.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 957<\/td>\n | 28.2.6.1.2 When generated 28.2.6.1.3 Effect of receipt 28.2.6.2 PMA_LINK.request 28.2.6.2.1 Semantics of the service primitive 28.2.6.2.2 When generated 28.2.6.2.3 Effect of receipt 28.2.6.3 PMA_LINKPULSE.request <\/td>\n<\/tr>\n | ||||||
| 958<\/td>\n | 28.2.6.3.1 Semantics of the service primitive 28.2.6.3.2 When generated 28.2.6.3.3 Effect of receipt 28.3 State diagrams and variable definitions <\/td>\n<\/tr>\n | ||||||
| 959<\/td>\n | 28.3.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 965<\/td>\n | 28.3.2 State diagram timers <\/td>\n<\/tr>\n | ||||||
| 968<\/td>\n | 28.3.3 State diagram counters <\/td>\n<\/tr>\n | ||||||
| 969<\/td>\n | 28.3.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 972<\/td>\n | 28.4 Electrical specifications <\/td>\n<\/tr>\n | ||||||
| 973<\/td>\n | 28.5 Protocol implementation conformance statement (PICS) proforma for Clause 28, Physical Layer link signaling for Auto-Negotiation on twisted pair 28.5.1 Introduction 28.5.2 Identification 28.5.2.1 Implementation identification 28.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 974<\/td>\n | 28.5.3 Major capabilities\/options 28.5.4 PICS proforma tables for Physical Layer link signaling for Auto-Negotiation on twisted pair 28.5.4.1 Scope <\/td>\n<\/tr>\n | ||||||
| 975<\/td>\n | 28.5.4.2 Auto-Negotiation functions 28.5.4.3 Transmit function requirements <\/td>\n<\/tr>\n | ||||||
| 977<\/td>\n | 28.5.4.4 Receive function requirements <\/td>\n<\/tr>\n | ||||||
| 978<\/td>\n | 28.5.4.5 Arbitration functions <\/td>\n<\/tr>\n | ||||||
| 981<\/td>\n | 28.5.4.6 Management function requirements <\/td>\n<\/tr>\n | ||||||
| 983<\/td>\n | 28.5.4.7 Technology-dependent interface <\/td>\n<\/tr>\n | ||||||
| 984<\/td>\n | 28.5.4.8 State diagrams <\/td>\n<\/tr>\n | ||||||
| 985<\/td>\n | 28.5.4.9 Electrical characteristics 28.5.4.10 Auto-Negotiation annexes <\/td>\n<\/tr>\n | ||||||
| 988<\/td>\n | 28.6 Auto-Negotiation expansion <\/td>\n<\/tr>\n | ||||||
| 989<\/td>\n | 29. System considerations for multisegment 100BASE-T networks 29.1 Overview <\/td>\n<\/tr>\n | ||||||
| 990<\/td>\n | 29.1.1 Single collision domain multisegment networks <\/td>\n<\/tr>\n | ||||||
| 991<\/td>\n | 29.1.2 Repeater usage 29.2 Transmission System Model 1 29.3 Transmission System Model 2 <\/td>\n<\/tr>\n | ||||||
| 993<\/td>\n | 29.3.1 Round-trip collision delay 29.3.1.1 Worst-case path delay value (PDV) selection <\/td>\n<\/tr>\n | ||||||
| 994<\/td>\n | 29.3.1.2 Worst-case PDV calculation <\/td>\n<\/tr>\n | ||||||
| 995<\/td>\n | 29.4 Full duplex 100 Mb\/s topology limitations <\/td>\n<\/tr>\n | ||||||
| 997<\/td>\n | 30. Management 30.1 Overview <\/td>\n<\/tr>\n | ||||||
| 998<\/td>\n | 30.1.1 Scope 30.1.2 Relationship to objects in IEEE 802.1F 30.1.3 Systems management overview <\/td>\n<\/tr>\n | ||||||
| 999<\/td>\n | 30.1.4 Management model <\/td>\n<\/tr>\n | ||||||
| 1000<\/td>\n | 30.2 Managed objects 30.2.1 Introduction 30.2.2 Overview of managed objects 30.2.2.1 Text description of managed objects <\/td>\n<\/tr>\n | ||||||
| 1004<\/td>\n | 30.2.2.2 Functions to support management 30.2.2.2.1 DTE MAC sublayer functions 30.2.2.2.2 Repeater functions <\/td>\n<\/tr>\n | ||||||
| 1007<\/td>\n | 30.2.3 Containment <\/td>\n<\/tr>\n | ||||||
| 1010<\/td>\n | 30.2.4 Naming 30.2.5 Capabilities <\/td>\n<\/tr>\n | ||||||
| 1041<\/td>\n | 30.3 Layer management for DTEs 30.3.1 MAC entity managed object class 30.3.1.1 MAC entity attributes 30.3.1.1.1 aMACID 30.3.1.1.2 aFramesTransmittedOK 30.3.1.1.3 aSingleCollisionFrames 30.3.1.1.4 aMultipleCollisionFrames <\/td>\n<\/tr>\n | ||||||
| 1042<\/td>\n | 30.3.1.1.5 aFramesReceivedOK 30.3.1.1.6 aFrameCheckSequenceErrors 30.3.1.1.7 aAlignmentErrors 30.3.1.1.8 aOctetsTransmittedOK <\/td>\n<\/tr>\n | ||||||
| 1043<\/td>\n | 30.3.1.1.9 aFramesWithDeferredXmissions 30.3.1.1.10 aLateCollisions 30.3.1.1.11 aFramesAbortedDueToXSColls 30.3.1.1.12 aFramesLostDueToIntMACXmitError <\/td>\n<\/tr>\n | ||||||
| 1044<\/td>\n | 30.3.1.1.13 aCarrierSenseErrors 30.3.1.1.14 aOctetsReceivedOK 30.3.1.1.15 aFramesLostDueToIntMACRcvError 30.3.1.1.16 aPromiscuousStatus <\/td>\n<\/tr>\n | ||||||
| 1045<\/td>\n | 30.3.1.1.17 aReadMulticastAddressList 30.3.1.1.18 aMulticastFramesXmittedOK 30.3.1.1.19 aBroadcastFramesXmittedOK 30.3.1.1.20 aFramesWithExcessiveDeferral <\/td>\n<\/tr>\n | ||||||
| 1046<\/td>\n | 30.3.1.1.21 aMulticastFramesReceivedOK 30.3.1.1.22 aBroadcastFramesReceivedOK 30.3.1.1.23 aInRangeLengthErrors 30.3.1.1.24 aOutOfRangeLengthField <\/td>\n<\/tr>\n | ||||||
| 1047<\/td>\n | 30.3.1.1.25 aFrameTooLongErrors 30.3.1.1.26 aMACEnableStatus 30.3.1.1.27 aTransmitEnableStatus <\/td>\n<\/tr>\n | ||||||
| 1048<\/td>\n | 30.3.1.1.28 aMulticastReceiveStatus 30.3.1.1.29 aReadWriteMACAddress 30.3.1.1.30 aCollisionFrames 30.3.1.1.31 aMACCapabilities 30.3.1.1.32 aDuplexStatus <\/td>\n<\/tr>\n | ||||||
| 1049<\/td>\n | 30.3.1.1.33 aRateControlAbility 30.3.1.1.34 aRateControlStatus 30.3.1.1.35 aDeferControlAbility 30.3.1.1.36 aDeferControlStatus <\/td>\n<\/tr>\n | ||||||
| 1050<\/td>\n | 30.3.1.1.37 aMaxFrameLength 30.3.1.1.38 aSlowProtocolFrameLimit 30.3.1.2 MAC entity actions 30.3.1.2.1 acInitializeMAC 30.3.1.2.2 acAddGroupAddress <\/td>\n<\/tr>\n | ||||||
| 1051<\/td>\n | 30.3.1.2.3 acDeleteGroupAddress 30.3.1.2.4 acExecuteSelfTest 30.3.2 PHY device managed object class 30.3.2.1 PHY device attributes 30.3.2.1.1 aPHYID 30.3.2.1.2 aPhyType <\/td>\n<\/tr>\n | ||||||
| 1052<\/td>\n | 30.3.2.1.3 aPhyTypeList <\/td>\n<\/tr>\n | ||||||
| 1054<\/td>\n | 30.3.2.1.4 aSQETestErrors 30.3.2.1.5 aSymbolErrorDuringCarrier 30.3.2.1.6 aMIIDetect <\/td>\n<\/tr>\n | ||||||
| 1055<\/td>\n | 30.3.2.1.7 aPhyAdminState 30.3.2.1.8 aTransmitLPIMicroseconds 30.3.2.1.9 aReceiveLPIMicroseconds 30.3.2.1.10 aTransmitLPITransitions <\/td>\n<\/tr>\n | ||||||
| 1056<\/td>\n | 30.3.2.1.11 aReceiveLPITransitions 30.3.2.2 PHY device actions 30.3.2.2.1 acPhyAdminControl 30.3.3 MAC control entity object class 30.3.3.1 aMACControlID 30.3.3.2 aMACControlFunctionsSupported <\/td>\n<\/tr>\n | ||||||
| 1057<\/td>\n | 30.3.3.3 aMACControlFramesTransmitted 30.3.3.4 aMACControlFramesReceived 30.3.3.5 aUnsupportedOpcodesReceived 30.3.3.6 aPFCEnableStatus <\/td>\n<\/tr>\n | ||||||
| 1058<\/td>\n | 30.3.4 PAUSE entity managed object class 30.3.4.1 aPAUSELinkDelayAllowance 30.3.4.2 aPAUSEMACCtrlFramesTransmitted 30.3.4.3 aPAUSEMACCtrlFramesReceived <\/td>\n<\/tr>\n | ||||||
| 1059<\/td>\n | 30.3.5 MPCP managed object class 30.3.5.1 MPCP Attributes 30.3.5.1.1 aMPCPID 30.3.5.1.2 aMPCPAdminState 30.3.5.1.3 aMPCPMode <\/td>\n<\/tr>\n | ||||||
| 1060<\/td>\n | 30.3.5.1.4 aMPCPLinkID 30.3.5.1.5 aMPCPRemoteMACAddress 30.3.5.1.6 aMPCPRegistrationState 30.3.5.1.7 aMPCPMACCtrlFramesTransmitted <\/td>\n<\/tr>\n | ||||||
| 1061<\/td>\n | 30.3.5.1.8 aMPCPMACCtrlFramesReceived 30.3.5.1.9 aMPCPTxGate 30.3.5.1.10 aMPCPTxRegAck 30.3.5.1.11 aMPCPTxRegister <\/td>\n<\/tr>\n | ||||||
| 1062<\/td>\n | 30.3.5.1.12 aMPCPTxRegRequest 30.3.5.1.13 aMPCPTxReport 30.3.5.1.14 aMPCPRxGate 30.3.5.1.15 aMPCPRxRegAck <\/td>\n<\/tr>\n | ||||||
| 1063<\/td>\n | 30.3.5.1.16 aMPCPRxRegister 30.3.5.1.17 aMPCPRxRegRequest 30.3.5.1.18 aMPCPRxReport <\/td>\n<\/tr>\n | ||||||
| 1064<\/td>\n | 30.3.5.1.19 aMPCPTransmitElapsed 30.3.5.1.20 aMPCPReceiveElapsed 30.3.5.1.21 aMPCPRoundTripTime 30.3.5.1.22 aMPCPDiscoveryWindowsSent 30.3.5.1.23 aMPCPDiscoveryTimeout <\/td>\n<\/tr>\n | ||||||
| 1065<\/td>\n | 30.3.5.1.24 aMPCPMaximumPendingGrants 30.3.5.1.25 aMPCPRecognizedMulticastIDs 30.3.5.2 MPCP Actions 30.3.5.2.1 acMPCPAdminControl 30.3.6 OAM object class 30.3.6.1 OAM Attributes 30.3.6.1.1 aOAMID <\/td>\n<\/tr>\n | ||||||
| 1066<\/td>\n | 30.3.6.1.2 aOAMAdminState 30.3.6.1.3 aOAMMode 30.3.6.1.4 aOAMDiscoveryState 30.3.6.1.5 aOAMRemoteMACAddress <\/td>\n<\/tr>\n | ||||||
| 1067<\/td>\n | 30.3.6.1.6 aOAMLocalConfiguration 30.3.6.1.7 aOAMRemoteConfiguration 30.3.6.1.8 aOAMLocalPDUConfiguration <\/td>\n<\/tr>\n | ||||||
| 1068<\/td>\n | 30.3.6.1.9 aOAMRemotePDUConfiguration 30.3.6.1.10 aOAMLocalFlagsField 30.3.6.1.11 aOAMRemoteFlagsField <\/td>\n<\/tr>\n | ||||||
| 1069<\/td>\n | 30.3.6.1.12 aOAMLocalRevision 30.3.6.1.13 aOAMRemoteRevision 30.3.6.1.14 aOAMLocalState 30.3.6.1.15 aOAMRemoteState <\/td>\n<\/tr>\n | ||||||
| 1070<\/td>\n | 30.3.6.1.16 aOAMRemoteVendorOUI 30.3.6.1.17 aOAMRemoteVendorSpecificInfo 30.3.6.1.18 aOAMUnsupportedCodesTx <\/td>\n<\/tr>\n | ||||||
| 1071<\/td>\n | 30.3.6.1.19 aOAMUnsupportedCodesRx 30.3.6.1.20 aOAMInformationTx 30.3.6.1.21 aOAMInformationRx 30.3.6.1.22 aOAMUniqueEventNotificationTx <\/td>\n<\/tr>\n | ||||||
| 1072<\/td>\n | 30.3.6.1.23 aOAMDuplicateEventNotificationTx 30.3.6.1.24 aOAMUniqueEventNotificationRx 30.3.6.1.25 aOAMDuplicateEventNotificationRx <\/td>\n<\/tr>\n | ||||||
| 1073<\/td>\n | 30.3.6.1.26 aOAMLoopbackControlTx 30.3.6.1.27 aOAMLoopbackControlRx 30.3.6.1.28 aOAMVariableRequestTx 30.3.6.1.29 aOAMVariableRequestRx <\/td>\n<\/tr>\n | ||||||
| 1074<\/td>\n | 30.3.6.1.30 aOAMVariableResponseTx 30.3.6.1.31 aOAMVariableResponseRx 30.3.6.1.32 aOAMOrganizationSpecificTx <\/td>\n<\/tr>\n | ||||||
| 1075<\/td>\n | 30.3.6.1.33 aOAMOrganizationSpecificRx 30.3.6.1.34 aOAMLocalErrSymPeriodConfig 30.3.6.1.35 aOAMLocalErrSymPeriodEvent 30.3.6.1.36 aOAMLocalErrFrameConfig <\/td>\n<\/tr>\n | ||||||
| 1076<\/td>\n | 30.3.6.1.37 aOAMLocalErrFrameEvent 30.3.6.1.38 aOAMLocalErrFramePeriodConfig 30.3.6.1.39 aOAMLocalErrFramePeriodEvent <\/td>\n<\/tr>\n | ||||||
| 1077<\/td>\n | 30.3.6.1.40 aOAMLocalErrFrameSecsSummaryConfig 30.3.6.1.41 aOAMLocalErrFrameSecsSummaryEvent 30.3.6.1.42 aOAMRemoteErrSymPeriodEvent <\/td>\n<\/tr>\n | ||||||
| 1078<\/td>\n | 30.3.6.1.43 aOAMRemoteErrFrameEvent 30.3.6.1.44 aOAMRemoteErrFramePeriodEvent <\/td>\n<\/tr>\n | ||||||
| 1079<\/td>\n | 30.3.6.1.45 aOAMRemoteErrFrameSecsSummaryEvent 30.3.6.1.46 aFramesLostDueToOAMError <\/td>\n<\/tr>\n | ||||||
| 1080<\/td>\n | 30.3.6.2 OAM Actions 30.3.6.2.1 acOAMAdminControl 30.3.7 OMPEmulation managed object class 30.3.7.1 OMPEmulation Attributes 30.3.7.1.1 aOMPEmulationID 30.3.7.1.2 aOMPEmulationType 30.3.7.1.3 aSLDErrors 30.3.7.1.4 aCRC8Errors <\/td>\n<\/tr>\n | ||||||
| 1081<\/td>\n | 30.3.7.1.5 aGoodLLID 30.3.7.1.6 aONUPONcastLLID 30.3.7.1.7 aOLTPONcastLLID 30.3.7.1.8 aBadLLID <\/td>\n<\/tr>\n | ||||||
| 1082<\/td>\n | 30.3.8 EXTENSION entity managed object class 30.3.8.1 aEXTENSIONMACCtrlFramesTransmitted 30.3.8.2 aEXTENSIONMACCtrlFramesReceived 30.3.8.3 aEXTENSIONMACCtrlStatus 30.4 Layer management for 10, 100, and 1000 Mb\/s baseband repeaters 30.4.1 Repeater managed object class <\/td>\n<\/tr>\n | ||||||
| 1083<\/td>\n | 30.4.1.1 Repeater attributes 30.4.1.1.1 aRepeaterID 30.4.1.1.2 aRepeaterType 30.4.1.1.3 aRepeaterGroupCapacity 30.4.1.1.4 aGroupMap <\/td>\n<\/tr>\n | ||||||
| 1084<\/td>\n | 30.4.1.1.5 aRepeaterHealthState 30.4.1.1.6 aRepeaterHealthText 30.4.1.1.7 aRepeaterHealthData 30.4.1.1.8 aTransmitCollisions <\/td>\n<\/tr>\n | ||||||
| 1085<\/td>\n | 30.4.1.2 Repeater actions 30.4.1.2.1 acResetRepeater 30.4.1.2.2 acExecuteNonDisruptiveSelfTest 30.4.1.3 Repeater notifications 30.4.1.3.1 nRepeaterHealth <\/td>\n<\/tr>\n | ||||||
| 1086<\/td>\n | 30.4.1.3.2 nRepeaterReset 30.4.1.3.3 nGroupMapChange 30.4.2 Group managed object class 30.4.2.1 Group attributes 30.4.2.1.1 aGroupID <\/td>\n<\/tr>\n | ||||||
| 1087<\/td>\n | 30.4.2.1.2 aGroupPortCapacity 30.4.2.1.3 aPortMap 30.4.2.2 Group notifications 30.4.2.2.1 nPortMapChange 30.4.3 Repeater port managed object class 30.4.3.1 Port attributes 30.4.3.1.1 aPortID <\/td>\n<\/tr>\n | ||||||
| 1088<\/td>\n | 30.4.3.1.2 aPortAdminState 30.4.3.1.3 aAutoPartitionState 30.4.3.1.4 aReadableFrames <\/td>\n<\/tr>\n | ||||||
| 1089<\/td>\n | 30.4.3.1.5 aReadableOctets 30.4.3.1.6 aFrameCheckSequenceErrors 30.4.3.1.7 aAlignmentErrors 30.4.3.1.8 aFramesTooLong <\/td>\n<\/tr>\n | ||||||
| 1090<\/td>\n | 30.4.3.1.9 aShortEvents 30.4.3.1.10 aRunts 30.4.3.1.11 aCollisions <\/td>\n<\/tr>\n | ||||||
| 1091<\/td>\n | 30.4.3.1.12 aLateEvents 30.4.3.1.13 aVeryLongEvents 30.4.3.1.14 aDataRateMismatches <\/td>\n<\/tr>\n | ||||||
| 1092<\/td>\n | 30.4.3.1.15 aAutoPartitions 30.4.3.1.16 aIsolates 30.4.3.1.17 aSymbolErrorDuringPacket <\/td>\n<\/tr>\n | ||||||
| 1093<\/td>\n | 30.4.3.1.18 aLastSourceAddress 30.4.3.1.19 aSourceAddressChanges 30.4.3.1.20 aBursts 30.4.3.2 Port actions 30.4.3.2.1 acPortAdminControl <\/td>\n<\/tr>\n | ||||||
| 1094<\/td>\n | 30.5 Layer management for medium attachment units (MAUs) 30.5.1 MAU managed object class 30.5.1.1 MAU attributes 30.5.1.1.1 aMAUID 30.5.1.1.2 aMAUType <\/td>\n<\/tr>\n | ||||||
| 1103<\/td>\n | 30.5.1.1.3 aMAUTypeList 30.5.1.1.4 aMediaAvailable <\/td>\n<\/tr>\n | ||||||
| 1104<\/td>\n | 30.5.1.1.5 aLoseMediaCounter <\/td>\n<\/tr>\n | ||||||
| 1105<\/td>\n | 30.5.1.1.6 aJabber 30.5.1.1.7 aMAUAdminState 30.5.1.1.8 aBbMAUXmitRcvSplitType <\/td>\n<\/tr>\n | ||||||
| 1106<\/td>\n | 30.5.1.1.9 aBroadbandFrequencies 30.5.1.1.10 aFalseCarriers 30.5.1.1.11 aBIPErrorCount <\/td>\n<\/tr>\n | ||||||
| 1107<\/td>\n | 30.5.1.1.12 aLaneMapping 30.5.1.1.13 aIdleErrorCount 30.5.1.1.14 aPCSCodingViolation 30.5.1.1.15 aFECAbility <\/td>\n<\/tr>\n | ||||||
| 1108<\/td>\n | 30.5.1.1.16 aFECmode 30.5.1.1.17 aFECCorrectedBlocks <\/td>\n<\/tr>\n | ||||||
| 1109<\/td>\n | 30.5.1.1.18 aFECUncorrectableBlocks 30.5.1.1.19 aSNROpMarginChnlA <\/td>\n<\/tr>\n | ||||||
| 1110<\/td>\n | 30.5.1.1.20 aSNROpMarginChnlB 30.5.1.1.21 aSNROpMarginChnlC 30.5.1.1.22 aSNROpMarginChnlD 30.5.1.1.23 aEEESupportList 30.5.1.1.24 aLDFastRetrainCount <\/td>\n<\/tr>\n | ||||||
| 1111<\/td>\n | 30.5.1.1.25 aLPFastRetrainCount 30.5.1.1.26 aRSFECBIPErrorCount 30.5.1.1.27 aRSFECLaneMapping <\/td>\n<\/tr>\n | ||||||
| 1112<\/td>\n | 30.5.1.1.28 aSCFECLaneMapping 30.5.1.1.29 aRSFECBypassAbility 30.5.1.1.30 aRSFECBypassIndicationAbility 30.5.1.1.31 aRSFECBypassEnable <\/td>\n<\/tr>\n | ||||||
| 1113<\/td>\n | 30.5.1.1.32 aRSFECBypassIndicationEnable 30.5.1.1.33 aPCSFECBypassIndicationAbility 30.5.1.1.34 aPCSFECBypassIndicationEnable <\/td>\n<\/tr>\n | ||||||
| 1114<\/td>\n | 30.5.1.2 MAU actions 30.5.1.2.1 acResetMAU 30.5.1.2.2 acMAUAdminControl 30.5.1.3 MAU notifications 30.5.1.3.1 nJabber 30.6 Management for link Auto-Negotiation 30.6.1 Auto-Negotiation managed object class <\/td>\n<\/tr>\n | ||||||
| 1115<\/td>\n | 30.6.1.1 Auto-Negotiation attributes 30.6.1.1.1 aAutoNegID 30.6.1.1.2 aAutoNegAdminState 30.6.1.1.3 aAutoNegRemoteSignaling 30.6.1.1.4 aAutoNegAutoConfig <\/td>\n<\/tr>\n | ||||||
| 1116<\/td>\n | 30.6.1.1.5 aAutoNegLocalTechnologyAbility <\/td>\n<\/tr>\n | ||||||
| 1117<\/td>\n | 30.6.1.1.6 aAutoNegAdvertisedTechnologyAbility 30.6.1.1.7 aAutoNegReceivedTechnologyAbility 30.6.1.1.8 aAutoNegLocalSelectorAbility <\/td>\n<\/tr>\n | ||||||
| 1118<\/td>\n | 30.6.1.1.9 aAutoNegAdvertisedSelectorAbility 30.6.1.1.10 aAutoNegReceivedSelectorAbility 30.6.1.2 Auto-Negotiation actions 30.6.1.2.1 acAutoNegRestartAutoConfig <\/td>\n<\/tr>\n | ||||||
| 1119<\/td>\n | 30.6.1.2.2 acAutoNegAdminControl 30.7 Management for Link Aggregation 30.7.1 Aggregator managed object class <\/td>\n<\/tr>\n | ||||||
| 1120<\/td>\n | 30.7.1.1 Aggregator attributes 30.7.1.1.1 aAggID 30.7.1.1.2 aAggDescription 30.7.1.1.3 aAggName 30.7.1.1.4 aAggActorSystemID <\/td>\n<\/tr>\n | ||||||
| 1121<\/td>\n | 30.7.1.1.5 aAggActorSystemPriority 30.7.1.1.6 aAggAggregateOrIndividual 30.7.1.1.7 aAggActorAdminKey 30.7.1.1.8 aAggActorOperKey 30.7.1.1.9 aAggMACAddress 30.7.1.1.10 aAggPartnerSystemID <\/td>\n<\/tr>\n | ||||||
| 1122<\/td>\n | 30.7.1.1.11 aAggPartnerSystemPriority 30.7.1.1.12 aAggPartnerOperKey 30.7.1.1.13 aAggAdminState 30.7.1.1.14 aAggOperState <\/td>\n<\/tr>\n | ||||||
| 1123<\/td>\n | 30.7.1.1.15 aAggTimeOfLastOperChange 30.7.1.1.16 aAggDataRate 30.7.1.1.17 aAggOctetsTxOK 30.7.1.1.18 aAggOctetsRxOK <\/td>\n<\/tr>\n | ||||||
| 1124<\/td>\n | 30.7.1.1.19 aAggFramesTxOK 30.7.1.1.20 aAggFramesRxOK 30.7.1.1.21 aAggMulticastFramesTxOK 30.7.1.1.22 aAggMulticastFramesRxOK <\/td>\n<\/tr>\n | ||||||
| 1125<\/td>\n | 30.7.1.1.23 aAggBroadcastFramesTxOK 30.7.1.1.24 aAggBroadcastFramesRxOK 30.7.1.1.25 aAggFramesDiscardedOnTx 30.7.1.1.26 aAggFramesDiscardedOnRx <\/td>\n<\/tr>\n | ||||||
| 1126<\/td>\n | 30.7.1.1.27 aAggFramesWithTxErrors 30.7.1.1.28 aAggFramesWithRxErrors 30.7.1.1.29 aAggUnknownProtocolFrames 30.7.1.1.30 aAggPortList <\/td>\n<\/tr>\n | ||||||
| 1127<\/td>\n | 30.7.1.1.31 aAggLinkUpDownNotificationEnable 30.7.1.1.32 aAggCollectorMaxDelay 30.7.1.2 Aggregator Notifications 30.7.1.2.1 nAggLinkUpNotification 30.7.1.2.2 nAggLinkDownNotification 30.7.2 Aggregation Port managed object class <\/td>\n<\/tr>\n | ||||||
| 1128<\/td>\n | 30.7.2.1 Aggregation Port Attributes 30.7.2.1.1 aAggPortID 30.7.2.1.2 aAggPortActorSystemPriority 30.7.2.1.3 aAggPortActorSystemID 30.7.2.1.4 aAggPortActorAdminKey 30.7.2.1.5 aAggPortActorOperKey <\/td>\n<\/tr>\n | ||||||
| 1129<\/td>\n | 30.7.2.1.6 aAggPortPartnerAdminSystemPriority 30.7.2.1.7 aAggPortPartnerOperSystemPriority 30.7.2.1.8 aAggPortPartnerAdminSystemID 30.7.2.1.9 aAggPortPartnerOperSystemID 30.7.2.1.10 aAggPortPartnerAdminKey <\/td>\n<\/tr>\n | ||||||
| 1130<\/td>\n | 30.7.2.1.11 aAggPortPartnerOperKey 30.7.2.1.12 aAggPortSelectedAggID 30.7.2.1.13 aAggPortAttachedAggID 30.7.2.1.14 aAggPortActorPort 30.7.2.1.15 aAggPortActorPortPriority <\/td>\n<\/tr>\n | ||||||
| 1131<\/td>\n | 30.7.2.1.16 aAggPortPartnerAdminPort 30.7.2.1.17 aAggPortPartnerOperPort 30.7.2.1.18 aAggPortPartnerAdminPortPriority 30.7.2.1.19 aAggPortPartnerOperPortPriority <\/td>\n<\/tr>\n | ||||||
| 1132<\/td>\n | 30.7.2.1.20 aAggPortActorAdminState 30.7.2.1.21 aAggPortActorOperState 30.7.2.1.22 aAggPortPartnerAdminState 30.7.2.1.23 aAggPortPartnerOperState 30.7.2.1.24 aAggPortAggregateOrIndividual <\/td>\n<\/tr>\n | ||||||
| 1133<\/td>\n | 30.7.3 Aggregation Port Statistics managed object class 30.7.3.1 Aggregation Port Statistics attributes 30.7.3.1.1 aAggPortStatsID 30.7.3.1.2 aAggPortStatsLACPDUsRx 30.7.3.1.3 aAggPortStatsMarkerPDUsRx 30.7.3.1.4 aAggPortStatsMarkerResponsePDUsRx <\/td>\n<\/tr>\n | ||||||
| 1134<\/td>\n | 30.7.3.1.5 aAggPortStatsUnknownRx 30.7.3.1.6 aAggPortStatsIllegalRx 30.7.3.1.7 aAggPortStatsLACPDUsTx 30.7.3.1.8 aAggPortStatsMarkerPDUsTx 30.7.3.1.9 aAggPortStatsMarkerResponsePDUsTx <\/td>\n<\/tr>\n | ||||||
| 1135<\/td>\n | 30.7.4 Aggregation Port Debug Information managed object class 30.7.4.1 Aggregation Port Debug Information attributes 30.7.4.1.1 aAggPortDebugInformationID 30.7.4.1.2 aAggPortDebugRxState 30.7.4.1.3 aAggPortDebugLastRxTime <\/td>\n<\/tr>\n | ||||||
| 1136<\/td>\n | 30.7.4.1.4 aAggPortDebugMuxState 30.7.4.1.5 aAggPortDebugMuxReason 30.7.4.1.6 aAggPortDebugActorChurnState 30.7.4.1.7 aAggPortDebugPartnerChurnState <\/td>\n<\/tr>\n | ||||||
| 1137<\/td>\n | 30.7.4.1.8 aAggPortDebugActorChurnCount 30.7.4.1.9 aAggPortDebugPartnerChurnCount 30.7.4.1.10 aAggPortDebugActorSyncTransitionCount 30.7.4.1.11 aAggPortDebugPartnerSyncTransitionCount 30.7.4.1.12 aAggPortDebugActorChangeCount <\/td>\n<\/tr>\n | ||||||
| 1138<\/td>\n | 30.7.4.1.13 aAggPortDebugPartnerChangeCount 30.8 Management for WAN Interface Sublayer (WIS) 30.8.1 WIS managed object class 30.8.1.1 WIS attributes 30.8.1.1.1 aWISID 30.8.1.1.2 aSectionStatus <\/td>\n<\/tr>\n | ||||||
| 1139<\/td>\n | 30.8.1.1.3 aSectionSESThreshold 30.8.1.1.4 aSectionSESs 30.8.1.1.5 aSectionESs 30.8.1.1.6 aSectionSEFSs 30.8.1.1.7 aSectionCVs <\/td>\n<\/tr>\n | ||||||
| 1140<\/td>\n | 30.8.1.1.8 aJ0ValueTX 30.8.1.1.9 aJ0ValueRX 30.8.1.1.10 aLineStatus 30.8.1.1.11 aLineSESThreshold <\/td>\n<\/tr>\n | ||||||
| 1141<\/td>\n | 30.8.1.1.12 aLineSESs 30.8.1.1.13 aLineESs 30.8.1.1.14 aLineCVs 30.8.1.1.15 aFarEndLineSESs 30.8.1.1.16 aFarEndLineESs <\/td>\n<\/tr>\n | ||||||
| 1142<\/td>\n | 30.8.1.1.17 aFarEndLineCVs 30.8.1.1.18 aPathStatus 30.8.1.1.19 aPathSESThreshold 30.8.1.1.20 aPathSESs <\/td>\n<\/tr>\n | ||||||
| 1143<\/td>\n | 30.8.1.1.21 aPathESs 30.8.1.1.22 aPathCVs 30.8.1.1.23 aJ1ValueTX 30.8.1.1.24 aJ1ValueRX <\/td>\n<\/tr>\n | ||||||
| 1144<\/td>\n | 30.8.1.1.25 aFarEndPathStatus 30.8.1.1.26 aFarEndPathSESs 30.8.1.1.27 aFarEndPathESs 30.8.1.1.28 aFarEndPathCVs <\/td>\n<\/tr>\n | ||||||
| 1145<\/td>\n | 30.9 Management for Power over Ethernet 30.9.1 PSE managed object class 30.9.1.1 PSE attributes 30.9.1.1.1 aPSEID 30.9.1.1.2 aPSEAdminState 30.9.1.1.3 aPSEPowerPairsControlAbility 30.9.1.1.4 aPSEPowerPairs <\/td>\n<\/tr>\n | ||||||
| 1146<\/td>\n | 30.9.1.1.5 aPSEPowerDetectionStatus 30.9.1.1.6 aPSEPowerDetectionStatusA <\/td>\n<\/tr>\n | ||||||
| 1147<\/td>\n | 30.9.1.1.7 aPSEPowerDetectionStatusB 30.9.1.1.8 aPSEPowerClassification <\/td>\n<\/tr>\n | ||||||
| 1148<\/td>\n | 30.9.1.1.9 aPSEPowerClassificationA 30.9.1.1.10 aPSEPowerClassificationB 30.9.1.1.11 aPSEInvalidSignatureCounter <\/td>\n<\/tr>\n | ||||||
| 1149<\/td>\n | 30.9.1.1.12 aPSEInvalidSignatureCounterA 30.9.1.1.13 aPSEInvalidSignatureCounterB 30.9.1.1.14 aPSEPowerDeniedCounter 30.9.1.1.15 aPSEPowerDeniedCounterA <\/td>\n<\/tr>\n | ||||||
| 1150<\/td>\n | 30.9.1.1.16 aPSEPowerDeniedCounterB 30.9.1.1.17 aPSEOverLoadCounter 30.9.1.1.18 aPSEOverLoadCounterA 30.9.1.1.19 aPSEOverLoadCounterB <\/td>\n<\/tr>\n | ||||||
| 1151<\/td>\n | 30.9.1.1.20 aPSEMPSAbsentCounter 30.9.1.1.21 aPSEMPSAbsentCounterA 30.9.1.1.22 aPSEMPSAbsentCounterB 30.9.1.1.23 aPSEActualPower <\/td>\n<\/tr>\n | ||||||
| 1152<\/td>\n | 30.9.1.1.24 aPSEPowerAccuracy 30.9.1.1.25 aPSECumulativeEnergy 30.9.1.2 PSE actions 30.9.1.2.1 acPSEAdminControl 30.10 Layer management for Midspan 30.10.1 Midspan managed object class 30.10.1.1 Midspan attributes 30.10.1.1.1 aMidSpanID 30.10.1.1.2 aMidSpanPSEGroupCapacity <\/td>\n<\/tr>\n | ||||||
| 1153<\/td>\n | 30.10.1.1.3 aMidSpanPSEGroupMap 30.10.1.2 Midspan notifications 30.10.1.2.1 nMidSpanPSEGroupMapChange 30.10.2 PSE Group managed object class 30.10.2.1 PSE Group attributes 30.10.2.1.1 aPSEGroupID <\/td>\n<\/tr>\n | ||||||
| 1154<\/td>\n | 30.10.2.1.2 aPSECapacity 30.10.2.1.3 aPSEMap 30.10.2.2 PSE Group notifications 30.10.2.2.1 nPSEMapChange 30.11 Layer Management for Physical Medium Entity (PME) 30.11.1 PAF managed object class 30.11.1.1 PAFAttributes 30.11.1.1.1 aPAFID <\/td>\n<\/tr>\n | ||||||
| 1155<\/td>\n | 30.11.1.1.2 aPhyEnd 30.11.1.1.3 aPHYCurrentStatus 30.11.1.1.4 aPAFSupported <\/td>\n<\/tr>\n | ||||||
| 1156<\/td>\n | 30.11.1.1.5 aPAFAdminState 30.11.1.1.6 aLocalPAFCapacity 30.11.1.1.7 aLocalPMEAvailable <\/td>\n<\/tr>\n | ||||||
| 1157<\/td>\n | 30.11.1.1.8 aLocalPMEAggregate 30.11.1.1.9 aRemotePAFSupported 30.11.1.1.10 aRemotePAFCapacity 30.11.1.1.11 aRemotePMEAggregate <\/td>\n<\/tr>\n | ||||||
| 1158<\/td>\n | 30.11.2 PME managed object class 30.11.2.1 PME Attributes 30.11.2.1.1 aPMEID 30.11.2.1.2 aPMEAdminState 30.11.2.1.3 aPMEStatus <\/td>\n<\/tr>\n | ||||||
| 1159<\/td>\n | 30.11.2.1.4 aPMESNRMgn 30.11.2.1.5 aTCCodingViolations 30.11.2.1.6 aProfileSelect <\/td>\n<\/tr>\n | ||||||
| 1160<\/td>\n | 30.11.2.1.7 aOperatingProfile 30.11.2.1.8 aPMEFECCorrectedBlocks <\/td>\n<\/tr>\n | ||||||
| 1161<\/td>\n | 30.11.2.1.9 aPMEFECUncorrectableBlocks 30.11.2.1.10 aTCCRCErrors 30.12 Layer Management for Link Layer Discovery Protocol (LLDP) 30.12.1 LLDP Configuration managed object class 30.12.1.1 LLDP Configuration attributes 30.12.1.1.1 aLldpXdot3PortConfigTLVsTxEnable <\/td>\n<\/tr>\n | ||||||
| 1162<\/td>\n | 30.12.2 LLDP Local System Group managed object class 30.12.2.1 LLDP Local System Group attributes 30.12.2.1.1 aLldpXdot3LocPortAutoNegSupported 30.12.2.1.2 aLldpXdot3LocPortAutoNegEnabled 30.12.2.1.3 aLldpXdot3LocPortAutoNegAdvertisedCap 30.12.2.1.4 aLldpXdot3LocPortOperMauType <\/td>\n<\/tr>\n | ||||||
| 1163<\/td>\n | 30.12.2.1.5 aLldpXdot3LocPowerPortClass 30.12.2.1.6 aLldpXdot3LocPowerMDISupported 30.12.2.1.7 aLldpXdot3LocPowerMDIEnabled 30.12.2.1.8 aLldpXdot3LocPowerPairControllable <\/td>\n<\/tr>\n | ||||||
| 1164<\/td>\n | 30.12.2.1.9 aLldpXdot3LocPowerPairs 30.12.2.1.10 aLldpXdot3LocPowerClass 30.12.2.1.11 aLldpXdot3LocLinkAggStatus 30.12.2.1.12 aLldpXdot3LocLinkAggPortId <\/td>\n<\/tr>\n | ||||||
| 1165<\/td>\n | 30.12.2.1.13 aLldpXdot3LocMaxFrameSize 30.12.2.1.14 aLldpXdot3LocPowerType 30.12.2.1.15 aLldpXdot3LocPowerSource 30.12.2.1.16 aLldpXdot3LocPowerPriority <\/td>\n<\/tr>\n | ||||||
| 1166<\/td>\n | 30.12.2.1.17 aLldpXdot3LocPDRequestedPowerValue 30.12.2.1.18 aLldpXdot3LocPDRequestedPowerValueA 30.12.2.1.19 aLldpXdot3LocPDRequestedPowerValueB 30.12.2.1.20 aLldpXdot3LocPSEAllocatedPowerValue 30.12.2.1.21 aLldpXdot3LocPSEAllocatedPowerValueA <\/td>\n<\/tr>\n | ||||||
| 1167<\/td>\n | 30.12.2.1.22 aLldpXdot3LocPSEAllocatedPowerValueB 30.12.2.1.23 aLldpXdot3LocPSEPoweringStatus 30.12.2.1.24 aLldpXdot3LocPDPoweredStatus 30.12.2.1.25 aLldpXdot3LocPowerPairsExt <\/td>\n<\/tr>\n | ||||||
| 1168<\/td>\n | 30.12.2.1.26 aLldpXdot3LocPowerClassExtA 30.12.2.1.27 aLldpXdot3LocPowerClassExtB 30.12.2.1.28 aLldpXdot3LocPowerClassExt <\/td>\n<\/tr>\n | ||||||
| 1169<\/td>\n | 30.12.2.1.29 aLldpXdot3LocPowerTypeExt 30.12.2.1.30 aLldpXdot3LocPDLoad 30.12.2.1.31 aLldpXdot3LocPD4PID <\/td>\n<\/tr>\n | ||||||
| 1170<\/td>\n | 30.12.2.1.32 aLldpXdot3LocPSEMaxAvailPower 30.12.2.1.33 aLldpXdot3LocPSEAutoclassSupport 30.12.2.1.34 aLldpXdot3LocAutoclassCompleted 30.12.2.1.35 aLldpXdot3LocAutoclassRequest 30.12.2.1.36 aLldpXdot3LocPowerDownRequest 30.12.2.1.37 aLldpXdot3LocPowerDownTime <\/td>\n<\/tr>\n | ||||||
| 1171<\/td>\n | 30.12.2.1.38 aLldpXdot3LocMeasVoltageSupport 30.12.2.1.39 aLldpXdot3LocMeasCurrentSupport 30.12.2.1.40 aLldpXdot3LocMeasPowerSupport 30.12.2.1.41 aLldpXdot3LocMeasEnergySupport 30.12.2.1.42 aLldpXdot3LocMeasurementSource <\/td>\n<\/tr>\n | ||||||
| 1172<\/td>\n | 30.12.2.1.43 aLldpXdot3LocMeasVoltageRequest 30.12.2.1.44 aLldpXdot3LocMeasCurrentRequest 30.12.2.1.45 aLldpXdot3LocMeasPowerRequest 30.12.2.1.46 aLldpXdot3LocMeasEnergyRequest 30.12.2.1.47 aLldpXdot3LocMeasVoltageValid 30.12.2.1.48 aLldpXdot3LocMeasCurrentValid <\/td>\n<\/tr>\n | ||||||
| 1173<\/td>\n | 30.12.2.1.49 aLldpXdot3LocMeasPowerValid 30.12.2.1.50 aLldpXdot3LocMeasEnergyValid 30.12.2.1.51 aLldpXdot3LocMeasVoltageUncertainty 30.12.2.1.52 aLldpXdot3LocMeasCurrentUncertainty 30.12.2.1.53 aLldpXdot3LocMeasPowerUncertainty <\/td>\n<\/tr>\n | ||||||
| 1174<\/td>\n | 30.12.2.1.54 aLldpXdot3LocMeasEnergyUncertainty 30.12.2.1.55 aLldpXdot3LocVoltageMeasurement 30.12.2.1.56 aLldpXdot3LocCurrentMeasurement 30.12.2.1.57 aLldpXdot3LocPowerMeasurement 30.12.2.1.58 aLldpXdot3LocEnergyMeasurement 30.12.2.1.59 aLldpXdot3LocPSEPowerPriceIndex <\/td>\n<\/tr>\n | ||||||
| 1175<\/td>\n | 30.12.2.1.60 aLldpXdot3LocResponseTime 30.12.2.1.61 aLldpXdot3LocReady 30.12.2.1.62 aLldpXdot3LocTxTwSys 30.12.2.1.63 aLldpXdot3LocTxTwSysEcho <\/td>\n<\/tr>\n | ||||||
| 1176<\/td>\n | 30.12.2.1.64 aLldpXdot3LocRxTwSys 30.12.2.1.65 aLldpXdot3LocRxTwSysEcho 30.12.2.1.66 aLldpXdot3LocFbTwSys 30.12.2.1.67 aLldpXdot3TxDllReady <\/td>\n<\/tr>\n | ||||||
| 1177<\/td>\n | 30.12.2.1.68 aLldpXdot3RxDllReady 30.12.2.1.69 aLldpXdot3LocDllEnabled 30.12.2.1.70 aLldpXdot3LocTxFw 30.12.2.1.71 aLldpXdot3LocTxFwEcho 30.12.2.1.72 aLldpXdot3LocRxFw <\/td>\n<\/tr>\n | ||||||
| 1178<\/td>\n | 30.12.2.1.73 aLldpXdot3LocRxFwEcho 30.12.2.1.74 aLldpXdot3LocPreemptSupported 30.12.2.1.75 aLldpXdot3LocPreemptEnabled 30.12.2.1.76 aLldpXdot3LocPreemptActive 30.12.2.1.77 aLldpXdot3LocAddFragSize <\/td>\n<\/tr>\n | ||||||
| 1179<\/td>\n | 30.12.3 LLDP Remote System Group managed object class 30.12.3.1 LLDP Remote System Group attributes 30.12.3.1.1 aLldpXdot3RemPortAutoNegSupported 30.12.3.1.2 aLldpXdot3RemPortAutoNegEnabled 30.12.3.1.3 aLldpXdot3RemPortAutoNegAdvertisedCap 30.12.3.1.4 aLldpXdot3RemPortOperMauType <\/td>\n<\/tr>\n | ||||||
| 1180<\/td>\n | 30.12.3.1.5 aLldpXdot3RemPowerPortClass 30.12.3.1.6 aLldpXdot3RemPowerMDISupported 30.12.3.1.7 aLldpXdot3RemPowerMDIEnabled 30.12.3.1.8 aLldpXdot3RemPowerPairControllable <\/td>\n<\/tr>\n | ||||||
| 1181<\/td>\n | 30.12.3.1.9 aLldpXdot3RemPowerPairs 30.12.3.1.10 aLldpXdot3RemPowerClass 30.12.3.1.11 aLldpXdot3RemLinkAggStatus 30.12.3.1.12 aLldpXdot3RemLinkAggPortId <\/td>\n<\/tr>\n | ||||||
| 1182<\/td>\n | 30.12.3.1.13 aLldpXdot3RemMaxFrameSize 30.12.3.1.14 aLldpXdot3RemPowerType 30.12.3.1.15 aLldpXdot3RemPowerSource 30.12.3.1.16 aLldpXdot3RemPowerPriority 30.12.3.1.17 aLldpXdot3RemPDRequestedPowerValue <\/td>\n<\/tr>\n | ||||||
| 1183<\/td>\n | 30.12.3.1.18 aLldpXdot3RemPDRequestedPowerValueA 30.12.3.1.19 aLldpXdot3RemPDRequestedPowerValueB 30.12.3.1.20 aLldpXdot3RemPSEAllocatedPowerValue <\/td>\n<\/tr>\n | ||||||
| 1184<\/td>\n | 30.12.3.1.21 aLldpXdot3RemPSEAllocatedPowerValueA 30.12.3.1.22 aLldpXdot3RemPSEAllocatedPowerValueB 30.12.3.1.23 aLldpXdot3RemPSEPoweringStatus 30.12.3.1.24 aLldpXdot3RemPDPoweredStatus <\/td>\n<\/tr>\n | ||||||
| 1185<\/td>\n | 30.12.3.1.25 aLldpXdot3RemPowerPairsExt 30.12.3.1.26 aLldpXdot3RemPowerClassExtA 30.12.3.1.27 aLldpXdot3RemPowerClassExtB <\/td>\n<\/tr>\n | ||||||
| 1186<\/td>\n | 30.12.3.1.28 aLldpXdot3RemPowerClassExt 30.12.3.1.29 aLldpXdot3RemPowerTypeExt 30.12.3.1.30 aLldpXdot3RemPDLoad 30.12.3.1.31 aLldpXdot3RemPD4PID <\/td>\n<\/tr>\n | ||||||
| 1187<\/td>\n | 30.12.3.1.32 aLldpXdot3RemPSEMaxAvailPower 30.12.3.1.33 aLldpXdot3RemPSEAutoclassSupport 30.12.3.1.34 aLldpXdot3RemAutoclassCompleted 30.12.3.1.35 aLldpXdot3RemAutoclassRequest 30.12.3.1.36 aLldpXdot3RemPowerDownRequest <\/td>\n<\/tr>\n | ||||||
| 1188<\/td>\n | 30.12.3.1.37 aLldpXdot3RemPowerDownTime 30.12.3.1.38 aLldpXdot3RemMeasVoltageSupport 30.12.3.1.39 aLldpXdot3RemMeasCurrentSupport 30.12.3.1.40 aLldpXdot3RemMeasPowerSupport 30.12.3.1.41 aLldpXdot3RemMeasEnergySupport 30.12.3.1.42 aLldpXdot3RemMeasurementSource <\/td>\n<\/tr>\n | ||||||
| 1189<\/td>\n | 30.12.3.1.43 aLldpXdot3RemMeasVoltageRequest 30.12.3.1.44 aLldpXdot3RemMeasCurrentRequest 30.12.3.1.45 aLldpXdot3RemMeasPowerRequest 30.12.3.1.46 aLldpXdot3RemMeasEnergyRequest 30.12.3.1.47 aLldpXdot3RemMeasVoltageValid <\/td>\n<\/tr>\n | ||||||
| 1190<\/td>\n | 30.12.3.1.48 aLldpXdot3RemMeasCurrentValid 30.12.3.1.49 aLldpXdot3RemMeasPowerValid 30.12.3.1.50 aLldpXdot3RemMeasEnergyValid 30.12.3.1.51 aLldpXdot3RemMeasVoltageUncertainty 30.12.3.1.52 aLldpXdot3RemMeasCurrentUncertainty 30.12.3.1.53 aLldpXdot3RemMeasPowerUncertainty <\/td>\n<\/tr>\n | ||||||
| 1191<\/td>\n | 30.12.3.1.54 aLldpXdot3RemMeasEnergyUncertainty 30.12.3.1.55 aLldpXdot3RemVoltageMeasurement 30.12.3.1.56 aLldpXdot3RemCurrentMeasurement 30.12.3.1.57 aLldpXdot3RemPowerMeasurement 30.12.3.1.58 aLldpXdot3RemEnergyMeasurement 30.12.3.1.59 aLldpXdot3RemPSEPowerPriceIndex <\/td>\n<\/tr>\n | ||||||
| 1192<\/td>\n | 30.12.3.1.60 aLldpXdot3RemTxTwSys 30.12.3.1.61 aLldpXdot3RemTxTwSysEcho 30.12.3.1.62 aLldpXdot3RemRxTwSys 30.12.3.1.63 aLldpXdot3RemRxTwSysEcho 30.12.3.1.64 aLldpXdot3RemFbTwSys <\/td>\n<\/tr>\n | ||||||
| 1193<\/td>\n | 30.12.3.1.24 aLldpXdot3RemTxFw 30.12.3.1.25 aLldpXdot3RemTxFwEcho 30.12.3.1.26 aLldpXdot3RemRxFw 30.12.3.1.27 aLldpXdot3RemRxFwEcho 30.12.3.1.28 aLldpXdot3RemPreemptSupported <\/td>\n<\/tr>\n | ||||||
| 1194<\/td>\n | 30.12.3.1.29 aLldpXdot3RemPreemptEnabled 30.12.3.1.30 aLldpXdot3RemPreemptActive 30.12.3.1.31 aLldpXdot3RemAddFragSize 30.13 Management for oTimeSync entity 30.13.1 TimeSync entity managed object class 30.13.1.1 aTimeSyncCapabilityTX <\/td>\n<\/tr>\n | ||||||
| 1195<\/td>\n | 30.13.1.2 aTimeSyncCapabilityRX 30.13.1.3 aTimeSyncDelayTXmax 30.13.1.4 aTimeSyncDelayTXmin <\/td>\n<\/tr>\n | ||||||
| 1196<\/td>\n | 30.13.1.5 aTimeSyncDelayRXmax 30.13.1.6 aTimeSyncDelayRXmin <\/td>\n<\/tr>\n | ||||||
| 1197<\/td>\n | 30.14 Management for MAC Merge Sublayer 30.14.1 oMACMergeEntity managed object class 30.14.1.1 aMACMergeSupport 30.14.1.2 aMACMergeStatusVerify 30.14.1.3 aMACMergeEnableTx 30.14.1.4 aMACMergeVerifyDisableTx <\/td>\n<\/tr>\n | ||||||
| 1198<\/td>\n | 30.14.1.5 aMACMergeStatusTx 30.14.1.6 aMACMergeVerifyTime 30.14.1.7 aMACMergeAddFragSize 30.14.1.8 aMACMergeFrameAssErrorCount <\/td>\n<\/tr>\n | ||||||
| 1199<\/td>\n | 30.14.1.9 aMACMergeFrameSmdErrorCount 30.14.1.10 aMACMergeFrameAssOkCount 30.14.1.11 aMACMergeFragCountRx <\/td>\n<\/tr>\n | ||||||
| 1200<\/td>\n | 30.14.1.12 aMACMergeFragCountTx 30.14.1.13 aMACMergeHoldCount 30.15 Layer management for Power over Data Lines (PoDL) of Single Pair Ethernet 30.15.1 PoDL PSE managed object class 30.15.1.1 PoDL PSE attributes 30.15.1.1.1 aPoDLPSEID 30.15.1.1.2 aPoDLPSEAdminState <\/td>\n<\/tr>\n | ||||||
| 1201<\/td>\n | 30.15.1.1.3 aPoDLPSEPowerDetectionStatus 30.15.1.1.4 aPoDLPSEType <\/td>\n<\/tr>\n | ||||||
| 1202<\/td>\n | 30.15.1.1.5 aPoDLPSEDetectedPDType 30.15.1.1.6 aPoDLPSEDetectedPDPowerClass <\/td>\n<\/tr>\n | ||||||
| 1203<\/td>\n | 30.15.1.1.7 aPoDLPSEInvalidSignatureCounter 30.15.1.1.8 aPoDLPSEInvalidClassCounter 30.15.1.1.9 aPoDLPSEPowerDeniedCounter 30.15.1.1.10 aPoDLPSEOverLoadCounter <\/td>\n<\/tr>\n | ||||||
| 1204<\/td>\n | 30.15.1.1.11 aPoDLPSEMaintainFullVoltageSignatureAbsentCounter 30.15.1.1.12 aPoDLPSEActualPower 30.15.1.1.13 aPoDLPSEPowerAccuracy 30.15.1.1.14 aPoDLPSECumulativeEnergy <\/td>\n<\/tr>\n | ||||||
| 1205<\/td>\n | 30.15.1.2 PoDL PSE actions 30.15.1.2.1 acPoDLPSEAdminControl 30.16 Management for PLCA Reconciliation Sublayer 30.16.1 PLCA managed object class 30.16.1.1 PLCA attributes 30.16.1.1.1 aPLCAAdminState 30.16.1.1.2 aPLCAStatus 30.16.1.1.3 aPLCANodeCount <\/td>\n<\/tr>\n | ||||||
| 1206<\/td>\n | 30.16.1.1.4 aPLCALocalNodeID 30.16.1.1.5 aPLCATransmitOpportunityTimer 30.16.1.1.6 aPLCAMaxBurstCount 30.16.1.1.7 aPLCABurstTimer 30.16.1.2 PLCA device actions 30.16.1.2.1 acPLCAAdminControl <\/td>\n<\/tr>\n | ||||||
| 1207<\/td>\n | 30.16.1.2.2 acPLCAReset <\/td>\n<\/tr>\n | ||||||
| 1208<\/td>\n | 31. MAC Control 31.1 Overview 31.2 Layer architecture 31.3 Support by interlayer interfaces <\/td>\n<\/tr>\n | ||||||
| 1210<\/td>\n | 31.3.1 MA_CONTROL.request 31.3.1.1 Function 31.3.1.2 Semantics of the service primitive 31.3.1.3 When generated 31.3.1.4 Effect of receipt 31.3.2 MA_CONTROL.indication 31.3.2.1 Function 31.3.2.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1211<\/td>\n | 31.3.2.3 When generated 31.3.2.4 Effect of receipt 31.4 MAC Control frames 31.4.1 MAC Control frame format 31.4.1.1 Destination Address field <\/td>\n<\/tr>\n | ||||||
| 1212<\/td>\n | 31.4.1.2 Source Address field 31.4.1.3 Length\/Type field 31.4.1.4 MAC Control Opcode field 31.4.1.5 MAC Control Parameters field 31.4.1.6 Reserved field 31.5 Opcode-independent MAC Control sublayer operation 31.5.1 Frame parsing and data frame reception <\/td>\n<\/tr>\n | ||||||
| 1213<\/td>\n | 31.5.2 Control frame reception 31.5.3 Opcode-independent MAC Control receive state diagram 31.5.3.1 Constants 31.5.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 1214<\/td>\n | 31.5.3.3 Messages <\/td>\n<\/tr>\n | ||||||
| 1215<\/td>\n | 31.5.3.4 Opcode-independent MAC Control Receive state diagram 31.6 Compatibility requirements 31.7 MAC Control client behavior <\/td>\n<\/tr>\n | ||||||
| 1216<\/td>\n | 31.8 Protocol implementation conformance statement (PICS) proforma for Clause 31, MAC Control 31.8.1 Introduction 31.8.2 Identification 31.8.2.1 Implementation identification 31.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1217<\/td>\n | 31.8.3 PICS proforma for MAC Control frames 31.8.3.1 Support by interlayer interfaces 31.8.3.2 MAC Control frame format 31.8.3.3 Opcode-independent MAC Control sublayer operation 31.8.3.4 Control opcode assignments <\/td>\n<\/tr>\n | ||||||
| 1218<\/td>\n | 32. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T2 32.1 Overview 32.1.1 Relation of 100BASE-T2 to other standards 32.1.2 Operation of 100BASE-T2 <\/td>\n<\/tr>\n | ||||||
| 1222<\/td>\n | 32.1.2.1 Physical coding sublayer (PCS) 32.1.2.2 PMA sublayer 32.1.2.3 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 1223<\/td>\n | 32.1.3 Application of 100BASE-T2 32.1.3.1 Compatibility considerations 32.1.3.2 Incorporating the 100BASE-T2 PHY into a DTE 32.1.3.3 Use of 100BASE-T2 PHY for point-to-point communication 32.1.3.4 Auto-Negotiation requirement 32.1.4 State diagram conventions 32.2 PHY Control functional specifications and service interface 32.2.1 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 1224<\/td>\n | 32.2.2 PHY Control Service interface 32.2.2.1 PHYC_CONFIG.indication 32.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1225<\/td>\n | 32.2.2.1.2 When generated 32.2.2.1.3 Effect of receipt 32.2.2.2 PHYC_TXMODE.indication 32.2.2.2.1 Semantics of the primitive 32.2.2.2.2 When generated 32.2.2.2.3 Effect of receipt 32.2.2.3 PHYC_RXSTATUS.request 32.2.2.3.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1226<\/td>\n | 32.2.2.3.2 When generated 32.2.2.3.3 Effect of receipt 32.2.2.4 PHYC_REMRXSTATUS.request 32.2.2.4.1 Semantics of the primitive 32.2.2.4.2 When generated 32.2.2.4.3 Effect of receipt 32.2.3 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 1227<\/td>\n | 32.2.4 State diagram timers <\/td>\n<\/tr>\n | ||||||
| 1228<\/td>\n | 32.2.5 PHY Control state diagram 32.3 PCS functional specifications <\/td>\n<\/tr>\n | ||||||
| 1230<\/td>\n | 32.3.1 PCS functions 32.3.1.1 PCS Reset function 32.3.1.2 PCS Transmit function 32.3.1.2.1 Side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 1231<\/td>\n | 32.3.1.2.2 Generation of bits San[2:0] and Sbn[2:0] <\/td>\n<\/tr>\n | ||||||
| 1232<\/td>\n | 32.3.1.2.3 Generation of sequences An and Bn <\/td>\n<\/tr>\n | ||||||
| 1235<\/td>\n | 32.3.1.3 PCS Receive function 32.3.1.3.1 Receiver descrambler polynomials 32.3.1.3.2 Decoding of quinary symbols <\/td>\n<\/tr>\n | ||||||
| 1236<\/td>\n | 32.3.1.4 PCS Carrier Sense function 32.3.1.5 PCS Collision Presence function 32.3.2 PCS interfaces 32.3.2.1 PCS\u2013MII interface signals 32.3.2.2 PCS\u2013management entity signals <\/td>\n<\/tr>\n | ||||||
| 1237<\/td>\n | 32.3.3 Frame structure 32.3.4 State variables 32.3.4.1 Variables <\/td>\n<\/tr>\n | ||||||
| 1239<\/td>\n | 32.3.4.2 Timer 32.3.4.3 Messages 32.3.5 State diagrams 32.3.5.1 PCS Transmit 32.3.5.2 PCS Receive <\/td>\n<\/tr>\n | ||||||
| 1240<\/td>\n | 32.3.5.3 PCS Carrier Sense 32.3.6 PCS electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1243<\/td>\n | 32.4 PMA functional specifications and service interface 32.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 1244<\/td>\n | 32.4.1.1 PMA functions 32.4.1.1.1 PMA Reset function 32.4.1.1.2 PMA Transmit function 32.4.1.1.3 PMA Receive function 32.4.1.1.4 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 1245<\/td>\n | 32.4.1.1.5 Clock Recovery function 32.4.1.2 PMA interface messages 32.4.1.2.1 MDI signals transmitted by the PHY 32.4.1.2.2 Signals received at the MDI <\/td>\n<\/tr>\n | ||||||
| 1246<\/td>\n | 32.4.1.3 PMA state diagram 32.4.1.3.1 State diagram variables 32.4.1.3.2 Timers 32.4.1.3.3 Link Monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 1247<\/td>\n | 32.4.2 PMA service interface 32.4.2.1 PMA_TYPE.indication 32.4.2.1.1 Semantics of the service primitive 32.4.2.1.2 When generated 32.4.2.1.3 Effect of receipt 32.4.2.2 PMA_UNITDATA.request 32.4.2.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1248<\/td>\n | 32.4.2.2.2 When generated 32.4.2.2.3 Effect of receipt 32.4.2.3 PMA_UNITDATA.indication 32.4.2.3.1 Semantics of the service primitive 32.4.2.3.2 When generated 32.4.2.3.3 Effect of receipt 32.4.2.4 PMA_LINK.request 32.4.2.4.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1249<\/td>\n | 32.4.2.4.2 When generated 32.4.2.4.3 Effect of receipt 32.4.2.5 PMA_LINK.indication 32.4.2.5.1 Semantics of the service primitive 32.4.2.5.2 When generated 32.4.2.5.3 Effect of receipt 32.4.2.6 PMA_CARRIER.indication <\/td>\n<\/tr>\n | ||||||
| 1250<\/td>\n | 32.4.2.7 PMA_RXERROR.indication 32.4.2.8 PMA_RXSTATUS.request 32.5 Management functions 32.5.1 100BASE-T2 Use of Auto-Negotiation and MII Registers 8, 9, and 10 <\/td>\n<\/tr>\n | ||||||
| 1251<\/td>\n | 32.5.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 1252<\/td>\n | 32.5.3 PHY specific registers for 100BASE-T2 32.5.3.1 100BASE-T2 Control register (Register 9) 32.5.3.1.1 Transmitter test mode 32.5.3.1.2 Receive test mode <\/td>\n<\/tr>\n | ||||||
| 1253<\/td>\n | 32.5.3.1.3 MASTER-SLAVE Manual Configuration Enable 32.5.3.1.4 MASTER-SLAVE Manual Configuration Value 32.5.3.1.5 T2_Repeater\/DTE Bit 32.5.3.1.6 Reserved bits 32.5.3.2 100BASE-T2 Status register (Register 10) <\/td>\n<\/tr>\n | ||||||
| 1254<\/td>\n | 32.5.3.2.1 MASTER-SLAVE Manual Configuration Fault 32.5.3.2.2 MASTER-SLAVE Configuration Resolution Complete 32.5.3.2.3 Local Receiver Status 32.5.3.2.4 Remote Receiver Status 32.5.3.2.5 Reserved bits 32.5.3.2.6 Idle Error count 32.5.4 Changes and additions to Auto-Negotiation (Clause 28) 32.5.4.1 Change to 28.2.4.1.3 (Auto-Negotiation Advertisement register) <\/td>\n<\/tr>\n | ||||||
| 1255<\/td>\n | 32.5.4.2 Use of Auto-Negotiation Next Page codes for 100BASE-T2 PHYs <\/td>\n<\/tr>\n | ||||||
| 1256<\/td>\n | 32.5.4.3 MASTER-SLAVE Configuration Resolution <\/td>\n<\/tr>\n | ||||||
| 1257<\/td>\n | 32.6 PMA electrical specifications 32.6.1 PMA-to-MDI interface characteristics 32.6.1.1 Isolation requirement 32.6.1.2 Transmitter electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1258<\/td>\n | 32.6.1.2.1 Transmitter test modes 32.6.1.2.2 Peak differential output voltage and level distortion <\/td>\n<\/tr>\n | ||||||
| 1261<\/td>\n | 32.6.1.2.3 Maximum output droop 32.6.1.2.4 Differential output templates <\/td>\n<\/tr>\n | ||||||
| 1265<\/td>\n | 32.6.1.2.5 Transmitter timing jitter 32.6.1.2.6 Transmit clock frequency 32.6.1.3 Receiver electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1266<\/td>\n | 32.6.1.3.1 Test channel <\/td>\n<\/tr>\n | ||||||
| 1277<\/td>\n | 32.6.1.3.2 Receiver test mode <\/td>\n<\/tr>\n | ||||||
| 1278<\/td>\n | 32.6.1.3.3 Receiver differential input signals 32.6.1.3.4 Receiver Alien NEXT tolerance 32.6.1.3.5 Receiver timing jitter <\/td>\n<\/tr>\n | ||||||
| 1279<\/td>\n | 32.6.1.3.6 Common-mode noise rejection 32.6.1.3.7 Receiver frequency tolerance 32.6.1.4 MDI Specifications 32.6.1.4.1 MDI differential impedance 32.6.1.4.2 MDI impedance balance <\/td>\n<\/tr>\n | ||||||
| 1280<\/td>\n | 32.6.1.4.3 MDI common-mode output voltage <\/td>\n<\/tr>\n | ||||||
| 1281<\/td>\n | 32.6.1.4.4 MDI fault tolerance 32.6.2 Power consumption 32.7 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 1282<\/td>\n | 32.7.1 Cabling 32.7.2 Link transmission parameters 32.7.2.1 Insertion loss 32.7.2.2 Differential characteristic impedance 32.7.2.3 Coupling parameters <\/td>\n<\/tr>\n | ||||||
| 1283<\/td>\n | 32.7.2.3.1 Differential near-end crosstalk (NEXT) loss 32.7.2.3.2 Multiple-disturber NEXT (MDNEXT) loss 32.7.2.3.3 Equal level far-end crosstalk loss (ELFEXT) 32.7.2.3.4 Multiple-disturber ELFEXT (MDELFEXT) loss 32.7.2.3.5 10BASE-T NEXT loss to insertion loss ratio requirement <\/td>\n<\/tr>\n | ||||||
| 1284<\/td>\n | 32.7.2.4 Delay 32.7.2.4.1 Maximum link delay 32.7.2.4.2 Difference in link delays 32.7.3 Noise <\/td>\n<\/tr>\n | ||||||
| 1285<\/td>\n | 32.7.3.1 Near-end crosstalk noise <\/td>\n<\/tr>\n | ||||||
| 1286<\/td>\n | 32.7.3.2 Far-end crosstalk noise 32.7.3.3 External coupled noise 32.7.4 Installation practice 32.7.4.1 Connector installation practices 32.7.4.2 Restrictions on use of Category 3 cabling with more than four pairs <\/td>\n<\/tr>\n | ||||||
| 1287<\/td>\n | 32.7.4.3 Restrictions on use of Category 5 cabling with up to 25 pairs 32.8 MDI specification 32.8.1 MDI connectors 32.8.2 Crossover function <\/td>\n<\/tr>\n | ||||||
| 1288<\/td>\n | 32.9 System considerations 32.10 Environmental specifications 32.10.1 General safety 32.10.2 Network safety <\/td>\n<\/tr>\n | ||||||
| 1289<\/td>\n | 32.10.2.1 Installation 32.10.2.2 Grounding 32.10.2.3 Installation and maintenance guidelines 32.10.2.4 Telephony voltages <\/td>\n<\/tr>\n | ||||||
| 1290<\/td>\n | 32.10.3 Environment 32.10.3.1 Electromagnetic emission 32.10.3.2 Temperature and humidity 32.10.4 Cabling specifications 32.11 PHY labeling 32.12 Delay constraints 32.12.1 PHY delay constraints (exposed MII) <\/td>\n<\/tr>\n | ||||||
| 1291<\/td>\n | 32.12.2 DTE delay constraints (unexposed MII) <\/td>\n<\/tr>\n | ||||||
| 1292<\/td>\n | 32.13 Protocol implementation conformance statement (PICS) proforma for Clause 32, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T2 32.13.1 Identification 32.13.1.1 Implementation identification 32.13.1.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1293<\/td>\n | 32.13.2 Major capabilities\/options 32.13.3 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 1294<\/td>\n | 32.13.4 PHY control function <\/td>\n<\/tr>\n | ||||||
| 1295<\/td>\n | 32.13.5 Physical Coding Sublayer (PCS) or Physical Medium Attachment (PMA) sublayer 32.13.5.1 PCS transmit functions 32.13.5.2 PCS receive functions <\/td>\n<\/tr>\n | ||||||
| 1296<\/td>\n | 32.13.5.3 Other PCS functions <\/td>\n<\/tr>\n | ||||||
| 1297<\/td>\n | 32.13.5.4 PMA functions <\/td>\n<\/tr>\n | ||||||
| 1298<\/td>\n | 32.13.5.5 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 1299<\/td>\n | 32.13.5.6 Management functions <\/td>\n<\/tr>\n | ||||||
| 1300<\/td>\n | 32.13.5.7 100BASE-T2 specific Auto-Negotiation requirements <\/td>\n<\/tr>\n | ||||||
| 1301<\/td>\n | 32.13.5.8 PMA electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1308<\/td>\n | 32.13.5.9 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 1310<\/td>\n | 32.13.5.10 MDI requirements 32.13.5.11 General safety and environmental requirements <\/td>\n<\/tr>\n | ||||||
| 1311<\/td>\n | 32.13.5.12 Timing requirements exposed MII 32.13.5.13 Timing requirements unexposed MII 32.13.5.14 Timing requirements: carrier assertion\/deassertion constraint <\/td>\n<\/tr>\n | ||||||
| 1312<\/td>\n | 33. Power over Ethernet over 2 Pairs 33.1 Overview 33.1.1 Objectives <\/td>\n<\/tr>\n | ||||||
| 1313<\/td>\n | 33.1.2 Compatibility considerations 33.1.3 Relationship of Power over Ethernet to the IEEE 802.3 Architecture <\/td>\n<\/tr>\n | ||||||
| 1314<\/td>\n | 33.1.4 Type 1 and Type 2 system parameters <\/td>\n<\/tr>\n | ||||||
| 1315<\/td>\n | 33.1.4.1 Type 2 cabling requirement 33.1.4.2 Type 1 and Type 2 channel requirement 33.2 Power sourcing equipment (PSE) <\/td>\n<\/tr>\n | ||||||
| 1316<\/td>\n | 33.2.1 PSE location 33.2.2 Midspan PSE types <\/td>\n<\/tr>\n | ||||||
| 1321<\/td>\n | 33.2.3 PI pin assignments <\/td>\n<\/tr>\n | ||||||
| 1322<\/td>\n | 33.2.4 PSE state diagrams 33.2.4.1 Overview 33.2.4.2 Conventions 33.2.4.3 Constants 33.2.4.4 Variables <\/td>\n<\/tr>\n | ||||||
| 1326<\/td>\n | 33.2.4.5 Timers 33.2.4.6 Functions <\/td>\n<\/tr>\n | ||||||
| 1328<\/td>\n | 33.2.4.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1330<\/td>\n | 33.2.5 PSE detection of PDs 33.2.5.1 PSE detection validation circuit <\/td>\n<\/tr>\n | ||||||
| 1332<\/td>\n | 33.2.5.2 Detection probe requirements 33.2.5.3 Detection criteria <\/td>\n<\/tr>\n | ||||||
| 1333<\/td>\n | 33.2.5.4 Rejection criteria 33.2.5.5 Open circuit criteria 33.2.6 PSE classification of PDs and mutual identification <\/td>\n<\/tr>\n | ||||||
| 1335<\/td>\n | 33.2.6.1 PSE 1-Event Physical Layer classification <\/td>\n<\/tr>\n | ||||||
| 1336<\/td>\n | 33.2.6.2 PSE 2-Event Physical Layer classification <\/td>\n<\/tr>\n | ||||||
| 1338<\/td>\n | 33.2.7 Power supply output <\/td>\n<\/tr>\n | ||||||
| 1339<\/td>\n | 33.2.7.1 Output voltage in the POWER_ON state 33.2.7.2 Voltage transients <\/td>\n<\/tr>\n | ||||||
| 1340<\/td>\n | 33.2.7.3 Power feeding ripple and noise 33.2.7.4 Continuous output current capability in the POWER_ON state 33.2.7.5 Output current in POWER_UP mode <\/td>\n<\/tr>\n | ||||||
| 1341<\/td>\n | 33.2.7.6 Overload current 33.2.7.7 Output current\u2014at short circuit condition <\/td>\n<\/tr>\n | ||||||
| 1343<\/td>\n | 33.2.7.8 Turn off time 33.2.7.9 Turn off voltage 33.2.7.10 Continuous output power capability in POWER_ON state 33.2.7.11 Current unbalance <\/td>\n<\/tr>\n | ||||||
| 1344<\/td>\n | 33.2.7.12 Power turn on time 33.2.7.13 PSE stability 33.2.8 Power supply allocation 33.2.9 PSE power removal 33.2.9.1 PSE Maintain Power Signature (MPS) requirements 33.2.9.1.1 PSE AC MPS component requirements <\/td>\n<\/tr>\n | ||||||
| 1345<\/td>\n | 33.2.9.1.2 PSE DC MPS component requirements <\/td>\n<\/tr>\n | ||||||
| 1346<\/td>\n | 33.3 Powered devices (PDs) <\/td>\n<\/tr>\n | ||||||
| 1347<\/td>\n | 33.3.1 PD PI 33.3.2 PD type descriptions <\/td>\n<\/tr>\n | ||||||
| 1348<\/td>\n | 33.3.3 PD state diagram 33.3.3.1 Conventions 33.3.3.2 Constants 33.3.3.3 Variables <\/td>\n<\/tr>\n | ||||||
| 1349<\/td>\n | 33.3.3.4 Timers <\/td>\n<\/tr>\n | ||||||
| 1350<\/td>\n | 33.3.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1351<\/td>\n | 33.3.4 PD valid and non-valid detection signatures <\/td>\n<\/tr>\n | ||||||
| 1352<\/td>\n | 33.3.5 PD classifications <\/td>\n<\/tr>\n | ||||||
| 1353<\/td>\n | 33.3.5.1 PD 1-Event class signature 33.3.5.2 PD 2-Event class signature <\/td>\n<\/tr>\n | ||||||
| 1354<\/td>\n | 33.3.5.2.1 Mark Event behavior 33.3.6 PSE Type identification <\/td>\n<\/tr>\n | ||||||
| 1355<\/td>\n | 33.3.7 PD power <\/td>\n<\/tr>\n | ||||||
| 1356<\/td>\n | 33.3.7.1 Input voltage 33.3.7.2 Input average power 33.3.7.2.1 System stability test conditions during startup and steady state operation <\/td>\n<\/tr>\n | ||||||
| 1357<\/td>\n | 33.3.7.3 Input inrush current 33.3.7.4 Peak operating power <\/td>\n<\/tr>\n | ||||||
| 1358<\/td>\n | 33.3.7.5 Peak transient current <\/td>\n<\/tr>\n | ||||||
| 1359<\/td>\n | 33.3.7.6 PD behavior during transients at the PSE PI <\/td>\n<\/tr>\n | ||||||
| 1360<\/td>\n | 33.3.7.7 Ripple and noise 33.3.7.8 PD classification stability time 33.3.7.9 Backfeed voltage 33.3.8 PD Maintain Power Signature <\/td>\n<\/tr>\n | ||||||
| 1361<\/td>\n | 33.4 Additional electrical specifications 33.4.1 Electrical isolation 33.4.1.1 Electrical isolation environments 33.4.1.1.1 Environment A requirements <\/td>\n<\/tr>\n | ||||||
| 1362<\/td>\n | 33.4.1.1.2 Environment B requirements 33.4.2 Fault tolerance <\/td>\n<\/tr>\n | ||||||
| 1363<\/td>\n | 33.4.3 Impedance balance <\/td>\n<\/tr>\n | ||||||
| 1364<\/td>\n | 33.4.4 Common-mode output voltage <\/td>\n<\/tr>\n | ||||||
| 1366<\/td>\n | 33.4.5 Pair-to-pair output noise voltage <\/td>\n<\/tr>\n | ||||||
| 1367<\/td>\n | 33.4.6 Differential noise voltage 33.4.7 Return loss <\/td>\n<\/tr>\n | ||||||
| 1368<\/td>\n | 33.4.8 100BASE-TX transformer droop 33.4.9 Midspan PSE device additional requirements <\/td>\n<\/tr>\n | ||||||
| 1370<\/td>\n | 33.4.9.1 Connector Midspan PSE device transmission requirements 33.4.9.1.1 Near End Crosstalk (NEXT) <\/td>\n<\/tr>\n | ||||||
| 1371<\/td>\n | 33.4.9.1.2 Insertion loss 33.4.9.1.3 Return loss <\/td>\n<\/tr>\n | ||||||
| 1372<\/td>\n | 33.4.9.2 Cord Midspan PSE 33.4.9.2.1 Maximum link delay 33.4.9.2.2 Maximum link delay skew <\/td>\n<\/tr>\n | ||||||
| 1373<\/td>\n | 33.4.9.3 Coupling parameters between link segments 33.4.9.3.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss 33.4.9.3.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss 33.4.9.4 Midspan signal path requirements <\/td>\n<\/tr>\n | ||||||
| 1374<\/td>\n | 33.4.9.4.1 Alternative A Midspan PSE signal path transfer function 33.5 Management function requirements 33.5.1 PSE registers <\/td>\n<\/tr>\n | ||||||
| 1375<\/td>\n | 33.5.1.1 PSE Control register (Register 11) (R\/W) 33.5.1.1.1 Reserved bits (11.15:6) 33.5.1.1.2 Data Link Layer Classification capability (11.5) <\/td>\n<\/tr>\n | ||||||
| 1376<\/td>\n | 33.5.1.1.3 Enable Physical Layer classification (11.4) 33.5.1.1.4 Pair Control (11.3:2) 33.5.1.1.5 PSE enable (11.1:0) 33.5.1.2 PSE Status register (Register 12) (R\/W) <\/td>\n<\/tr>\n | ||||||
| 1377<\/td>\n | 33.5.1.2.1 PSE Type electrical parameters (12.15) <\/td>\n<\/tr>\n | ||||||
| 1378<\/td>\n | 33.5.1.2.2 Data Link Layer Classification Enabled (12.14) 33.5.1.2.3 Physical Layer Classification Supported (12.13) 33.5.1.2.4 Power Denied or Removed (12.12) 33.5.1.2.5 Valid Signature (12.11) 33.5.1.2.6 Invalid Signature (12.10) 33.5.1.2.7 Short Circuit (12.9) 33.5.1.2.8 Overload (12.8) <\/td>\n<\/tr>\n | ||||||
| 1379<\/td>\n | 33.5.1.2.9 MPS Absent (12.7) 33.5.1.2.10 PD Class (12.6:4) 33.5.1.2.11 PSE Status (12.3:1) 33.5.1.2.12 Pair Control Ability (12.0) 33.6 Data Link Layer classification 33.6.1 TLV frame definition 33.6.2 Data Link Layer classification timing requirements <\/td>\n<\/tr>\n | ||||||
| 1380<\/td>\n | 33.6.3 Power control state diagrams 33.6.3.1 Conventions 33.6.3.2 Constants <\/td>\n<\/tr>\n | ||||||
| 1381<\/td>\n | 33.6.3.3 Variables <\/td>\n<\/tr>\n | ||||||
| 1383<\/td>\n | 33.6.3.4 Functions <\/td>\n<\/tr>\n | ||||||
| 1384<\/td>\n | 33.6.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1385<\/td>\n | 33.6.4 State change procedure across a link <\/td>\n<\/tr>\n | ||||||
| 1386<\/td>\n | 33.6.4.1 PSE state change procedure across a link 33.6.4.2 PD state change procedure across a link <\/td>\n<\/tr>\n | ||||||
| 1387<\/td>\n | 33.7 Environmental 33.7.1 General safety 33.7.2 Network safety 33.7.3 Installation and maintenance guidelines 33.7.4 Patch panel considerations 33.7.5 Telephony voltages <\/td>\n<\/tr>\n | ||||||
| 1388<\/td>\n | 33.7.6 Electromagnetic emissions 33.7.7 Temperature and humidity 33.7.8 Labeling <\/td>\n<\/tr>\n | ||||||
| 1389<\/td>\n | 33.8 Protocol implementation conformance statement (PICS) proforma for Clause 33, Power over Ethernet over 2 Pairs 33.8.1 Introduction 33.8.2 Identification 33.8.2.1 Implementation identification 33.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1390<\/td>\n | 33.8.2.3 PD Major capabilities\/options 33.8.2.4 PSE Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 1391<\/td>\n | 33.8.3 PICS proforma tables for Power over Ethernet over 2 Pairs 33.8.3.1 Common device features 33.8.3.2 Power sourcing equipment <\/td>\n<\/tr>\n | ||||||
| 1395<\/td>\n | 33.8.3.3 Powered devices <\/td>\n<\/tr>\n | ||||||
| 1398<\/td>\n | 33.8.3.4 Electrical specifications applicable to the PSE and PD <\/td>\n<\/tr>\n | ||||||
| 1399<\/td>\n | 33.8.3.5 Electrical specifications applicable to the PSE <\/td>\n<\/tr>\n | ||||||
| 1400<\/td>\n | 33.8.3.6 Electrical specifications applicable to the PD <\/td>\n<\/tr>\n | ||||||
| 1401<\/td>\n | 33.8.3.7 Management function requirements <\/td>\n<\/tr>\n | ||||||
| 1403<\/td>\n | 33.8.3.8 Data Link Layer classification requirements <\/td>\n<\/tr>\n | ||||||
| 1404<\/td>\n | 33.8.3.9 Environmental specifications applicable to PSEs and PDs 33.8.3.10 Environmental specifications applicable to the PSE <\/td>\n<\/tr>\n | ||||||
| 1405<\/td>\n | 34. Introduction to 1000 Mb\/s baseband networks 34.1 Overview 34.1.1 Reconciliation Sublayer (RS) and Gigabit Media Independent Interface (GMII) <\/td>\n<\/tr>\n | ||||||
| 1406<\/td>\n | 34.1.2 Physical Layer signaling systems 34.1.3 Repeater 34.1.4 Auto-Negotiation, type 1000BASE-X 34.1.5 Auto-Negotiation, type 1000BASE-T 34.1.6 Auto-Negotiation, type 1000BASE-T1 34.1.7 Management <\/td>\n<\/tr>\n | ||||||
| 1407<\/td>\n | 34.2 State diagrams 34.3 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 1408<\/td>\n | 35. Reconciliation Sublayer (RS) and Gigabit Media Independent Interface (GMII) 35.1 Overview <\/td>\n<\/tr>\n | ||||||
| 1409<\/td>\n | 35.1.1 Summary of major concepts 35.1.2 Application 35.1.3 Rate of operation 35.1.4 Allocation of functions <\/td>\n<\/tr>\n | ||||||
| 1410<\/td>\n | 35.2 Functional specifications 35.2.1 Mapping of GMII signals to PLS service primitives and Station Management 35.2.1.1 Mapping of PLS_DATA.request 35.2.1.1.1 Function 35.2.1.1.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1411<\/td>\n | 35.2.1.1.3 When generated 35.2.1.2 Mapping of PLS_DATA.indication 35.2.1.2.1 Function 35.2.1.2.2 Semantics of the service primitive 35.2.1.2.3 When generated 35.2.1.3 Mapping of PLS_CARRIER.indication 35.2.1.3.1 Function 35.2.1.3.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1412<\/td>\n | 35.2.1.3.3 When generated 35.2.1.4 Mapping of PLS_SIGNAL.indication 35.2.1.4.1 Function 35.2.1.4.2 Semantics of the service primitive 35.2.1.4.3 When generated 35.2.1.5 Response to error indications from GMII 35.2.1.6 Conditions for generation of TX_ER <\/td>\n<\/tr>\n | ||||||
| 1413<\/td>\n | 35.2.1.7 Mapping of PLS_DATA_VALID.indication 35.2.1.7.1 Function 35.2.1.7.2 Semantics of the service primitive 35.2.1.7.3 When generated 35.2.2 GMII signal functional specifications 35.2.2.1 GTX_CLK (1000 Mb\/s transmit clock) 35.2.2.2 RX_CLK (receive clock) <\/td>\n<\/tr>\n | ||||||
| 1414<\/td>\n | 35.2.2.3 TX_EN (transmit enable) 35.2.2.4 TXD (transmit data) <\/td>\n<\/tr>\n | ||||||
| 1415<\/td>\n | 35.2.2.5 TX_ER (transmit coding error) <\/td>\n<\/tr>\n | ||||||
| 1417<\/td>\n | 35.2.2.6 Transmit direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 1418<\/td>\n | 35.2.2.7 RX_DV (receive data valid) 35.2.2.8 RXD (receive data) <\/td>\n<\/tr>\n | ||||||
| 1420<\/td>\n | 35.2.2.9 RX_ER (receive error) <\/td>\n<\/tr>\n | ||||||
| 1421<\/td>\n | 35.2.2.10 Receive direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 1422<\/td>\n | 35.2.2.11 CRS (carrier sense) 35.2.2.12 COL (collision detected) <\/td>\n<\/tr>\n | ||||||
| 1423<\/td>\n | 35.2.2.13 MDC (management data clock) 35.2.2.14 MDIO (management data input\/output) 35.2.3 GMII data stream 35.2.3.1 Inter-frame <\/td>\n<\/tr>\n | ||||||
| 1424<\/td>\n | 35.2.3.2 Preamble and start of frame delimiter 35.2.3.2.1 Transmit case 35.2.3.2.2 Receive case <\/td>\n<\/tr>\n | ||||||
| 1425<\/td>\n | 35.2.3.3 Data 35.2.3.4 End-of-Frame delimiter 35.2.3.5 Carrier extension 35.2.3.6 Definition of Start of Packet and End of Packet Delimiters <\/td>\n<\/tr>\n | ||||||
| 1426<\/td>\n | 35.2.4 MAC delay constraints (with GMII) 35.2.5 Management functions 35.3 Signal mapping <\/td>\n<\/tr>\n | ||||||
| 1427<\/td>\n | 35.4 LPI Assertion and Detection <\/td>\n<\/tr>\n | ||||||
| 1428<\/td>\n | 35.4.1 LPI messages 35.4.2 Transmit LPI state diagram 35.4.2.1 Conventions 35.4.2.2 Variables and counters <\/td>\n<\/tr>\n | ||||||
| 1429<\/td>\n | 35.4.2.3 State diagram 35.4.3 Considerations for transmit system behavior 35.4.3.1 Considerations for receive system behavior 35.5 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 1430<\/td>\n | 35.5.1 DC characteristics 35.5.2 AC characteristics 35.5.2.1 Signal Timing measurements <\/td>\n<\/tr>\n | ||||||
| 1431<\/td>\n | 35.5.2.2 GMII test circuit topology <\/td>\n<\/tr>\n | ||||||
| 1433<\/td>\n | 35.5.2.3 GMII ac specifications <\/td>\n<\/tr>\n | ||||||
| 1435<\/td>\n | 35.6 Protocol implementation conformance statement (PICS) proforma for Clause 35, Reconciliation Sublayer (RS) and Gigabit Media Independent Interface (GMII) 35.6.1 Introduction 35.6.2 Identification 35.6.2.1 Implementation identification 35.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1436<\/td>\n | 35.6.2.3 Major capabilities\/options 35.6.3 PICS proforma tables for reconciliation sublayer and Gigabit Media Independent Interface 35.6.3.1 Mapping of PLS service primitives 35.6.3.2 GMII signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 1438<\/td>\n | 35.6.3.3 Data stream structure <\/td>\n<\/tr>\n | ||||||
| 1439<\/td>\n | 35.6.3.4 LPI functions 35.6.3.5 Delay constraints 35.6.3.6 Management functions 35.6.3.7 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 1440<\/td>\n | 36. Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 1000BASE-X 36.1 Overview 36.1.1 Scope 36.1.2 Objectives 36.1.3 Relationship of 1000BASE-X to other standards <\/td>\n<\/tr>\n | ||||||
| 1441<\/td>\n | 36.1.4 Summary of 1000BASE-X sublayers 36.1.4.1 Physical Coding Sublayer (PCS) 36.1.4.2 Physical Medium Attachment (PMA) sublayer 36.1.4.3 Physical Medium Dependent (PMD) sublayer 36.1.5 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 1442<\/td>\n | 36.1.6 Functional block diagram 36.1.7 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 1443<\/td>\n | 36.2 Physical Coding Sublayer (PCS) 36.2.1 PCS Interface (GMII) <\/td>\n<\/tr>\n | ||||||
| 1444<\/td>\n | 36.2.2 Functions within the PCS 36.2.3 Use of code-groups 36.2.4 8B\/10B transmission code <\/td>\n<\/tr>\n | ||||||
| 1445<\/td>\n | 36.2.4.1 Notation conventions 36.2.4.2 Transmission order <\/td>\n<\/tr>\n | ||||||
| 1446<\/td>\n | 36.2.4.3 Valid and invalid code-groups 36.2.4.4 Running disparity rules <\/td>\n<\/tr>\n | ||||||
| 1447<\/td>\n | 36.2.4.5 Generating code-groups 36.2.4.6 Checking the validity of received code-groups 36.2.4.7 Ordered sets <\/td>\n<\/tr>\n | ||||||
| 1452<\/td>\n | 36.2.4.7.1 Ordered set rules <\/td>\n<\/tr>\n | ||||||
| 1453<\/td>\n | 36.2.4.8 \/K28.5\/ code-group considerations 36.2.4.9 Comma considerations <\/td>\n<\/tr>\n | ||||||
| 1454<\/td>\n | 36.2.4.10 Configuration (\/C\/) 36.2.4.11 Data (\/D\/) 36.2.4.12 IDLE (\/I\/) 36.2.4.13 Low Power Idle (LPI) <\/td>\n<\/tr>\n | ||||||
| 1455<\/td>\n | 36.2.4.14 Start_of_Packet (SPD) delimiter 36.2.4.15 End_of_Packet delimiter (EPD) 36.2.4.15.1 EPD rules 36.2.4.16 Carrier_Extend (\/R\/) <\/td>\n<\/tr>\n | ||||||
| 1456<\/td>\n | 36.2.4.16.1 Carrier_Extend rules 36.2.4.17 Error_Propagation (\/V\/) 36.2.4.18 Encapsulation 36.2.4.19 Mapping between GMII, PCS and PMA <\/td>\n<\/tr>\n | ||||||
| 1457<\/td>\n | 36.2.5 Detailed functions and state diagrams 36.2.5.1 State variables 36.2.5.1.1 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 1458<\/td>\n | 36.2.5.1.2 Constants 36.2.5.1.3 Variables <\/td>\n<\/tr>\n | ||||||
| 1462<\/td>\n | 36.2.5.1.4 Functions <\/td>\n<\/tr>\n | ||||||
| 1463<\/td>\n | 36.2.5.1.5 Counters 36.2.5.1.6 Messages <\/td>\n<\/tr>\n | ||||||
| 1465<\/td>\n | 36.2.5.1.7 Timers <\/td>\n<\/tr>\n | ||||||
| 1466<\/td>\n | 36.2.5.2 State diagrams 36.2.5.2.1 Transmit 36.2.5.2.2 Receive 36.2.5.2.3 State variable function carrier_detect(x) <\/td>\n<\/tr>\n | ||||||
| 1472<\/td>\n | 36.2.5.2.4 Code-group stream decoding 36.2.5.2.5 Carrier sense 36.2.5.2.6 Synchronization <\/td>\n<\/tr>\n | ||||||
| 1474<\/td>\n | 36.2.5.2.7 Auto-Negotiation process <\/td>\n<\/tr>\n | ||||||
| 1475<\/td>\n | 36.2.5.2.8 LPI state diagram <\/td>\n<\/tr>\n | ||||||
| 1476<\/td>\n | 36.2.5.2.9 LPI status and management 36.3 Physical Medium Attachment (PMA) sublayer 36.3.1 Service Interface 36.3.1.1 PMA_UNITDATA.request 36.3.1.1.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 1477<\/td>\n | 36.3.1.1.2 When generated 36.3.1.1.3 Effect of receipt 36.3.1.2 PMA_UNITDATA.indication 36.3.1.2.1 Semantics of the service primitive 36.3.1.2.2 When generated 36.3.1.2.3 Effect of receipt 36.3.2 Functions within the PMA <\/td>\n<\/tr>\n | ||||||
| 1478<\/td>\n | 36.3.2.1 Data delay 36.3.2.2 PMA transmit function 36.3.2.3 PMA receive function 36.3.2.4 Code-group alignment 36.3.3 A physical instantiation of the PMA Service Interface <\/td>\n<\/tr>\n | ||||||
| 1480<\/td>\n | 36.3.3.1 Required signals <\/td>\n<\/tr>\n | ||||||
| 1481<\/td>\n | 36.3.3.2 Summary of control signal usage 36.3.4 General electrical characteristics of the TBI 36.3.4.1 DC characteristics <\/td>\n<\/tr>\n | ||||||
| 1482<\/td>\n | 36.3.4.2 Valid signal levels 36.3.4.3 Rise and fall time definition 36.3.4.4 Output load <\/td>\n<\/tr>\n | ||||||
| 1483<\/td>\n | 36.3.5 TBI transmit interface electrical characteristics 36.3.5.1 Transmit data (tx_code-group) 36.3.5.2 TBI transmit interface timing <\/td>\n<\/tr>\n | ||||||
| 1484<\/td>\n | 36.3.6 TBI receive interface electrical characteristics 36.3.6.1 Receive data (rx_code-group) 36.3.6.2 Receive clock (PMA_RX_CLK, PMA_RX_CLK) 36.3.7 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 1485<\/td>\n | 36.3.7.1 Receiver considerations 36.3.7.2 Transmitter considerations 36.3.8 Test functions 36.4 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 1486<\/td>\n | 36.5 Delay constraints 36.5.1 MDI to GMII delay constraints <\/td>\n<\/tr>\n | ||||||
| 1487<\/td>\n | 36.5.2 DTE delay constraints (half duplex mode) 36.5.3 Carrier deassertion\/assertion constraint (half duplex mode) 36.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 1488<\/td>\n | 36.7 Protocol implementation conformance statement (PICS) proforma for Clause 36, Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 1000BASE-X 36.7.1 Introduction 36.7.2 Identification 36.7.2.1 Implementation identification 36.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1489<\/td>\n | 36.7.3 Major capabilities\/options 36.7.4 PICS proforma tables for the PCS and PMA sublayer, type 1000BASE-X 36.7.4.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 1490<\/td>\n | 36.7.4.2 Code-group functions 36.7.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1491<\/td>\n | 36.7.4.4 PMA functions 36.7.4.5 PMA transmit function 36.7.4.6 PMA code-group alignment function 36.7.4.7 TBI <\/td>\n<\/tr>\n | ||||||
| 1492<\/td>\n | 36.7.4.8 Delay constraints 36.7.4.9 LPI functions <\/td>\n<\/tr>\n | ||||||
| 1493<\/td>\n | 37. Auto-Negotiation function, type 1000BASE-X 37.1 Overview 37.1.1 Scope 37.1.2 Application perspective\/objectives <\/td>\n<\/tr>\n | ||||||
| 1494<\/td>\n | 37.1.3 Relationship to architectural layering 37.1.4 Compatibility considerations 37.1.4.1 Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 1495<\/td>\n | 37.1.4.2 Management interface 37.1.4.2.1 GMII management interface 37.1.4.3 Interoperability between Auto-Negotiation compatible devices 37.1.4.4 User Configuration with Auto-Negotiation 37.2 Functional specifications 37.2.1 Config_Reg encoding 37.2.1.1 Base Page to management register mapping <\/td>\n<\/tr>\n | ||||||
| 1496<\/td>\n | 37.2.1.2 Full duplex 37.2.1.3 Half duplex 37.2.1.4 Pause <\/td>\n<\/tr>\n | ||||||
| 1497<\/td>\n | 37.2.1.5 Remote fault 37.2.1.5.1 No error, link OK 37.2.1.5.2 Offline <\/td>\n<\/tr>\n | ||||||
| 1498<\/td>\n | 37.2.1.5.3 Link_Failure 37.2.1.5.4 Auto-Negotiation_Error 37.2.1.6 Acknowledge 37.2.1.7 Next Page 37.2.2 Transmit function requirements 37.2.2.1 Transmit function to Auto-Negotiation process interface requirements <\/td>\n<\/tr>\n | ||||||
| 1499<\/td>\n | 37.2.3 Receive function requirements 37.2.3.1 Receive function to Auto-Negotiation process interface requirements 37.2.4 Arbitration process requirements 37.2.4.1 Renegotiation function 37.2.4.2 Priority resolution function <\/td>\n<\/tr>\n | ||||||
| 1500<\/td>\n | 37.2.4.3 Next Page function <\/td>\n<\/tr>\n | ||||||
| 1501<\/td>\n | 37.2.4.3.1 Next Page encodings 37.2.4.3.2 Next Page <\/td>\n<\/tr>\n | ||||||
| 1502<\/td>\n | 37.2.4.3.3 Acknowledge 37.2.4.3.4 Message page 37.2.4.3.5 Acknowledge 2 37.2.4.3.6 Toggle 37.2.4.3.7 Message page encoding 37.2.4.3.8 Message Code Field 37.2.4.3.9 Unformatted page encoding 37.2.4.3.10 Unformatted Code Field <\/td>\n<\/tr>\n | ||||||
| 1503<\/td>\n | 37.2.4.3.11 Use of Next Pages 37.2.4.3.12 Management register requirements 37.2.5 Management function requirements 37.2.5.1 Management registers 37.2.5.1.1 Control register (Register 0) <\/td>\n<\/tr>\n | ||||||
| 1504<\/td>\n | 37.2.5.1.2 Status register (Register 1) 37.2.5.1.3 AN advertisement register (Register 4) (R\/W) 37.2.5.1.4 AN link partner ability Base Page register (Register 5) (RO) 37.2.5.1.5 AN expansion register (Register 6) (RO) <\/td>\n<\/tr>\n | ||||||
| 1505<\/td>\n | 37.2.5.1.6 AN Next Page transmit register (Register 7) 37.2.5.1.7 AN link partner ability Next Page register (Register 8) 37.2.5.1.8 Extended status register (Register 15) <\/td>\n<\/tr>\n | ||||||
| 1506<\/td>\n | 37.2.5.1.9 State diagram variable to management register mapping 37.2.5.2 Auto-Negotiation managed object class 37.2.6 Absence of management function 37.3 Detailed functions and state diagrams <\/td>\n<\/tr>\n | ||||||
| 1507<\/td>\n | 37.3.1 State diagram variables 37.3.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 1510<\/td>\n | 37.3.1.2 Functions <\/td>\n<\/tr>\n | ||||||
| 1511<\/td>\n | 37.3.1.3 Messages 37.3.1.4 Timers 37.3.1.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1513<\/td>\n | 37.4 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 1514<\/td>\n | 37.5 Protocol implementation conformance statement (PICS) proforma for Clause 37, Auto-Negotiation function, type 1000BASE-X 37.5.1 Introduction 37.5.2 Identification 37.5.2.1 Implementation identification 37.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1515<\/td>\n | 37.5.3 Major capabilities\/options 37.5.4 PICS proforma tables for the Auto-Negotiation function, type 1000BASE-X 37.5.4.1 Compatibility considerations 37.5.4.2 Auto-Negotiation functions 37.5.4.2.1 Config_Reg <\/td>\n<\/tr>\n | ||||||
| 1516<\/td>\n | 37.5.4.2.2 Remote Fault functions 37.5.4.2.3 AN transmit functions 37.5.4.2.4 AN receive functions 37.5.4.2.5 Priority resolution functions <\/td>\n<\/tr>\n | ||||||
| 1517<\/td>\n | 37.5.4.2.6 Next Page functions 37.5.4.2.7 Management registers <\/td>\n<\/tr>\n | ||||||
| 1518<\/td>\n | 38. Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-LX (long wavelength laser) and 1000BASE-SX (short wavelength laser) 38.1 Overview 38.1.1 Physical Medium Dependent (PMD) sublayer service interface 38.1.1.1 PMD_UNITDATA.request 38.1.1.1.1 Semantics of the service primitive 38.1.1.1.2 When generated 38.1.1.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 1519<\/td>\n | 38.1.1.2 PMD_UNITDATA.indication 38.1.1.2.1 Semantics of the service primitive 38.1.1.2.2 When generated 38.1.1.2.3 Effect of receipt 38.1.1.3 PMD_SIGNAL.indication 38.1.1.3.1 Semantics of the service primitive 38.1.1.3.2 When generated 38.1.1.3.3 Effect of receipt 38.1.2 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 1520<\/td>\n | 38.2 PMD functional specifications 38.2.1 PMD block diagram 38.2.2 PMD transmit function 38.2.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 1521<\/td>\n | 38.2.4 PMD signal detect function 38.3 PMD to MDI optical specifications for 1000BASE-SX <\/td>\n<\/tr>\n | ||||||
| 1522<\/td>\n | 38.3.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 1523<\/td>\n | 38.3.2 Receive optical specifications 38.3.3 Illustrative 1000BASE-SX link power budget and penalties <\/td>\n<\/tr>\n | ||||||
| 1524<\/td>\n | 38.4 PMD to MDI optical specifications for 1000BASE-LX 38.4.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 1525<\/td>\n | 38.4.2 Receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 1526<\/td>\n | 38.4.3 Illustrative 1000BASE-LX link power budget and penalties 38.5 Jitter specifications for 1000BASE-SX and 1000BASE-LX <\/td>\n<\/tr>\n | ||||||
| 1527<\/td>\n | 38.6 Optical measurement requirements 38.6.1 Center wavelength and spectral width measurements 38.6.2 Optical power measurements 38.6.3 Extinction ratio measurements 38.6.4 Relative Intensity Noise (RIN) <\/td>\n<\/tr>\n | ||||||
| 1528<\/td>\n | 38.6.5 Transmitter optical waveform (transmit eye) 38.6.6 Transmit rise\/fall characteristics <\/td>\n<\/tr>\n | ||||||
| 1529<\/td>\n | 38.6.7 Receive sensitivity measurements 38.6.8 Total jitter measurements <\/td>\n<\/tr>\n | ||||||
| 1530<\/td>\n | 38.6.9 Deterministic jitter measurement (optional) 38.6.10 Coupled Power Ratio (CPR) measurements 38.6.11 Conformance test signal at TP3 for receiver testing <\/td>\n<\/tr>\n | ||||||
| 1532<\/td>\n | 38.6.12 Measurement of the receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n | ||||||
| 1533<\/td>\n | 38.7 Environmental specifications 38.7.1 General safety 38.7.2 Laser safety 38.7.3 Installation 38.8 Environment 38.8.1 Electromagnetic emission <\/td>\n<\/tr>\n | ||||||
| 1534<\/td>\n | 38.8.2 Temperature, humidity, and handling 38.9 PMD labeling requirements 38.10 Fiber optic cabling model 38.11 Characteristics of the fiber optic cabling <\/td>\n<\/tr>\n | ||||||
| 1535<\/td>\n | 38.11.1 Optical fiber and cable 38.11.2 Optical fiber connection 38.11.2.1 Connection insertion loss <\/td>\n<\/tr>\n | ||||||
| 1536<\/td>\n | 38.11.2.2 Connection return loss 38.11.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 1537<\/td>\n | 38.11.4 Single-mode fiber offset-launch mode-conditioning patch cord for MMF operation of 1000BASE-LX <\/td>\n<\/tr>\n | ||||||
| 1539<\/td>\n | 38.12 Protocol implementation conformance statement (PICS) proforma for Clause 38, Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-LX (Long Wavelength Laser) and 1000BASE-SX (Short Wavelength Laser) 38.12.1 Introduction 38.12.2 Identification 38.12.2.1 Implementation identification 38.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1540<\/td>\n | 38.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 1541<\/td>\n | 38.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-LX (Long Wavelength Laser) and 1000BASE-SX (Short Wavelength Laser) 38.12.4.1 PMD functional specifications 38.12.4.2 PMD to MDI optical specifications for 1000BASE-SX <\/td>\n<\/tr>\n | ||||||
| 1542<\/td>\n | 38.12.4.3 PMD to MDI optical specifications for 1000BASE-LX 38.12.4.4 Jitter specifications 38.12.4.5 Optical measurement requirements <\/td>\n<\/tr>\n | ||||||
| 1545<\/td>\n | 38.12.4.6 Characteristics of the fiber optic cabling <\/td>\n<\/tr>\n | ||||||
| 1546<\/td>\n | 39. Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-CX (short-haul copper) 39.1 Overview 39.2 Functional specifications 39.2.1 PMD transmit function 39.2.2 PMD receive function 39.2.3 PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 1547<\/td>\n | 39.3 PMD to MDI electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1548<\/td>\n | 39.3.1 Transmitter electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1550<\/td>\n | 39.3.2 Receiver electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1551<\/td>\n | 39.3.3 Jitter specifications for 1000BASE-CX <\/td>\n<\/tr>\n | ||||||
| 1552<\/td>\n | 39.4 Jumper cable assembly characteristics 39.4.1 Compensation networks 39.4.2 Shielding 39.5 MDI specification <\/td>\n<\/tr>\n | ||||||
| 1553<\/td>\n | 39.5.1 MDI connectors 39.5.1.1 Style-1 connector specification <\/td>\n<\/tr>\n | ||||||
| 1554<\/td>\n | 39.5.1.2 Style-2 connector specification <\/td>\n<\/tr>\n | ||||||
| 1555<\/td>\n | 39.5.1.3 Style-2 connector example drawing 39.5.2 Crossover function <\/td>\n<\/tr>\n | ||||||
| 1556<\/td>\n | 39.6 Electrical measurement requirements 39.6.1 Transmit rise\/fall time 39.6.2 Transmit skew measurement 39.6.3 Transmit eye (normalized and absolute) 39.6.4 Through_connection impedance 39.6.5 Jumper cable intra-pair differential skew <\/td>\n<\/tr>\n | ||||||
| 1557<\/td>\n | 39.6.6 Receiver link signal 39.6.7 Near-End Cross Talk (NEXT) 39.6.8 Differential time-domain reflectometry (TDR) measurement procedure 39.6.8.1 Driving waveform <\/td>\n<\/tr>\n | ||||||
| 1558<\/td>\n | 39.6.8.2 Calibration of the test setup 39.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 1559<\/td>\n | 39.8 Protocol implementation conformance statement (PICS) proforma for Clause 39, Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-CX 39.8.1 Introduction 39.8.2 Identification 39.8.2.1 Implementation identification 39.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 1560<\/td>\n | 39.8.3 Major capabilities\/options 39.8.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-CX (short-haul copper) 39.8.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 1561<\/td>\n | 39.8.4.2 PMD to MDI electrical specifications <\/td>\n<\/tr>\n | ||||||
| 1562<\/td>\n | 39.8.4.3 Jumper cable assembly characteristics <\/td>\n<\/tr>\n | ||||||
| 1563<\/td>\n | 39.8.4.4 Other requirements <\/td>\n<\/tr>\n | ||||||
| 1564<\/td>\n | 40. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 1000BASE-T 40.1 Overview 40.1.1 Objectives 40.1.2 Relationship of 1000BASE-T to other standards <\/td>\n<\/tr>\n | ||||||
| 1565<\/td>\n | 40.1.3 Operation of 1000BASE-T <\/td>\n<\/tr>\n | ||||||
| 1568<\/td>\n | 40.1.3.1 Physical Coding Sublayer (PCS) 40.1.3.2 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 1569<\/td>\n | 40.1.4 Signaling <\/td>\n<\/tr>\n | ||||||
| 1570<\/td>\n | 40.1.5 Inter-sublayer interfaces 40.1.6 Conventions in this clause 40.2 1000BASE-T Service Primitives and Interfaces 40.2.1 Technology-Dependent Interface 40.2.1.1 PMA_LINK.request 40.2.1.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1571<\/td>\n | 40.2.1.1.2 When generated 40.2.1.1.3 Effect of receipt 40.2.1.2 PMA_LINK.indication 40.2.1.2.1 Semantics of the primitive 40.2.1.2.2 When generated 40.2.1.2.3 Effect of receipt 40.2.2 PMA Service Interface <\/td>\n<\/tr>\n | ||||||
| 1573<\/td>\n | 40.2.3 PMA_TXMODE.indication 40.2.3.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1574<\/td>\n | 40.2.3.2 When generated 40.2.3.3 Effect of receipt 40.2.4 PMA_CONFIG.indication 40.2.4.1 Semantics of the primitive 40.2.4.2 When generated 40.2.4.3 Effect of receipt 40.2.5 PMA_UNITDATA.request 40.2.5.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1575<\/td>\n | 40.2.5.2 When generated 40.2.5.3 Effect of receipt 40.2.6 PMA_UNITDATA.indication 40.2.6.1 Semantics of the primitive 40.2.6.2 When generated 40.2.6.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 1576<\/td>\n | 40.2.7 PMA_SCRSTATUS.request 40.2.7.1 Semantics of the primitive 40.2.7.2 When generated 40.2.7.3 Effect of receipt 40.2.8 PMA_RXSTATUS.indication 40.2.8.1 Semantics of the primitive 40.2.8.2 When generated 40.2.8.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 1577<\/td>\n | 40.2.9 PMA_REMRXSTATUS.request 40.2.9.1 Semantics of the primitive 40.2.9.2 When generated 40.2.9.3 Effect of receipt 40.2.10 PMA_RESET.indication 40.2.10.1 When generated 40.2.10.2 Effect of receipt 40.2.11 PMA_LPIMODE.indication 40.2.11.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1578<\/td>\n | 40.2.11.2 When generated 40.2.11.3 Effect of receipt 40.2.12 PMA_LPIREQ.request 40.2.12.1 Semantics of the primitive 40.2.12.2 When generated 40.2.12.3 Effect of receipt 40.2.13 PMA_REMLPIREQ.request 40.2.13.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1579<\/td>\n | 40.2.13.2 When generated 40.2.13.3 Effect of receipt 40.2.14 PMA_UPDATE.indication 40.2.14.1 Semantics of the primitive 40.2.14.2 When generated 40.2.14.3 Effect of receipt 40.2.15 PMA_REMUPDATE.request 40.2.15.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 1580<\/td>\n | 40.2.15.2 When generated 40.2.15.3 Effect of receipt 40.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 1581<\/td>\n | 40.3.1 PCS functions 40.3.1.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 1582<\/td>\n | 40.3.1.2 PCS Data Transmission Enable 40.3.1.3 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 1583<\/td>\n | 40.3.1.3.1 Side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 1584<\/td>\n | 40.3.1.3.2 Generation of bits Sxn[3:0], Syn[3:0], and Sgn[3:0] <\/td>\n<\/tr>\n | ||||||
| 1585<\/td>\n | 40.3.1.3.3 Generation of bits Scn[7:0] <\/td>\n<\/tr>\n | ||||||
| 1586<\/td>\n | 40.3.1.3.4 Generation of bits Sdn[8:0] <\/td>\n<\/tr>\n | ||||||
| 1587<\/td>\n | 40.3.1.3.5 Generation of quinary symbols TAn, TBn, TCn, TDn <\/td>\n<\/tr>\n | ||||||
| 1594<\/td>\n | 40.3.1.3.6 Generation of An, Bn, Cn, Dn <\/td>\n<\/tr>\n | ||||||
| 1595<\/td>\n | 40.3.1.4 PCS Receive function 40.3.1.4.1 Decoding of code-groups <\/td>\n<\/tr>\n | ||||||
| 1596<\/td>\n | 40.3.1.4.2 Receiver descrambler polynomials 40.3.1.5 PCS Carrier Sense function 40.3.1.6 PCS Local LPI Request function <\/td>\n<\/tr>\n | ||||||
| 1597<\/td>\n | 40.3.2 Stream structure 40.3.3 State variables 40.3.3.1 Variables <\/td>\n<\/tr>\n | ||||||
| 1600<\/td>\n | 40.3.3.2 Functions <\/td>\n<\/tr>\n | ||||||
| 1601<\/td>\n | 40.3.3.3 Timer 40.3.3.4 Messages <\/td>\n<\/tr>\n | ||||||
| 1602<\/td>\n | 40.3.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1607<\/td>\n | 40.3.4.1 Supplement to state diagram <\/td>\n<\/tr>\n | ||||||
| 1608<\/td>\n | 40.4 Physical Medium Attachment (PMA) sublayer 40.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 1609<\/td>\n | 40.4.2 PMA functions 40.4.2.1 PMA Reset function 40.4.2.2 PMA Transmit function 40.4.2.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 1610<\/td>\n | 40.4.2.4 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 1611<\/td>\n | 40.4.2.5 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 1612<\/td>\n | 40.4.2.6 Clock Recovery function 40.4.3 MDI 40.4.3.1 MDI signals transmitted by the PHY 40.4.3.2 Signals received at the MDI 40.4.4 Automatic MDI\/MDI-X Configuration 40.4.4.1 Description of Automatic MDI\/MDI-X state diagram <\/td>\n<\/tr>\n | ||||||
| 1613<\/td>\n | 40.4.4.2 Pseudo-random sequence generator 40.4.5 State variables 40.4.5.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 1616<\/td>\n | 40.4.5.2 Timers <\/td>\n<\/tr>\n | ||||||
| 1618<\/td>\n | 40.4.6 State Diagrams 40.4.6.1 PHY Control state diagram <\/td>\n<\/tr>\n | ||||||
| 1620<\/td>\n | 40.4.6.2 Link Monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 1621<\/td>\n | 40.4.6.2.1 Auto Crossover state diagram 40.5 Management interface 40.5.1 Support for Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 1622<\/td>\n | 40.5.1.1 1000BASE-T use of registers during Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 1624<\/td>\n | 40.5.1.2 1000BASE-T Auto-Negotiation page use 40.5.1.3 Sending Next Pages <\/td>\n<\/tr>\n | ||||||
| 1626<\/td>\n | 40.5.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n | ||||||
| 1628<\/td>\n | 40.6 PMA electrical specifications 40.6.1 PMA-to-MDI interface tests 40.6.1.1 Electrical isolation 40.6.1.1.1 Test channel <\/td>\n<\/tr>\n | ||||||
| 1629<\/td>\n | 40.6.1.1.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 1633<\/td>\n | 40.6.1.1.3 Test Fixtures <\/td>\n<\/tr>\n | ||||||
| 1636<\/td>\n | 40.6.1.2 Transmitter electrical specifications 40.6.1.2.1 Peak differential output voltage and level accuracy 40.6.1.2.2 Maximum output droop 40.6.1.2.3 Differential output templates <\/td>\n<\/tr>\n | ||||||
| 1644<\/td>\n | 40.6.1.2.4 Transmitter distortion <\/td>\n<\/tr>\n | ||||||
| 1646<\/td>\n | 40.6.1.2.5 Transmitter timing jitter <\/td>\n<\/tr>\n | ||||||
| 1647<\/td>\n | 40.6.1.2.6 Transmit clock frequency 40.6.1.2.7 Transmitter operation following a transition from the QUIET to the WAKE state 40.6.1.3 Receiver electrical specifications 40.6.1.3.1 Receiver differential input signals <\/td>\n<\/tr>\n | ||||||
| 1648<\/td>\n | 40.6.1.3.2 Receiver frequency tolerance 40.6.1.3.3 Common-mode noise rejection 40.6.1.3.4 Alien Crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 1649<\/td>\n | 40.6.1.3.5 Signal_detect 40.7 Link segment characteristics 40.7.1 Cabling system characteristics <\/td>\n<\/tr>\n | ||||||
| 1650<\/td>\n | 40.7.2 Link transmission parameters 40.7.2.1 Insertion loss 40.7.2.2 Differential characteristic impedance 40.7.2.3 Return loss 40.7.3 Coupling parameters <\/td>\n<\/tr>\n | ||||||
| 1651<\/td>\n | 40.7.3.1 Near-End Crosstalk (NEXT) 40.7.3.1.1 Differential Near-End Crosstalk 40.7.3.2 Far-End Crosstalk (FEXT) 40.7.3.2.1 Equal Level Far-End Crosstalk (ELFEXT) loss 40.7.3.2.2 Multiple Disturber Equal Level Far-End Crosstalk (MDELFEXT) loss <\/td>\n<\/tr>\n | ||||||
| 1652<\/td>\n | 40.7.3.2.3 Multiple-Disturber Power Sum Equal Level Far-End Crosstalk (PSELFEXT) loss 40.7.4 Delay 40.7.4.1 Maximum link delay 40.7.4.2 Link delay skew 40.7.5 Noise environment <\/td>\n<\/tr>\n | ||||||
| 1653<\/td>\n | 40.7.6 External coupled noise 40.8 MDI specification 40.8.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 1654<\/td>\n | 40.8.2 Crossover function <\/td>\n<\/tr>\n | ||||||
| 1655<\/td>\n | 40.8.3 MDI electrical specifications 40.8.3.1 MDI return loss 40.8.3.2 MDI impedance balance <\/td>\n<\/tr>\n | ||||||
| 1656<\/td>\n | 40.8.3.3 MDI common-mode output voltage 40.8.3.4 MDI fault tolerance <\/td>\n<\/tr>\n | ||||||
| 1657<\/td>\n | 40.9 Environmental specifications 40.9.1 General safety 40.9.2 Network safety 40.9.2.1 Installation <\/td>\n<\/tr>\n | ||||||
| 1658<\/td>\n | 40.9.2.2 Installation and maintenance guidelines 40.9.2.3 Telephony voltages 40.9.3 Environment 40.9.3.1 Electromagnetic emission 40.9.3.2 Temperature and humidity 40.10 PHY labeling <\/td>\n<\/tr>\n | ||||||
| 1659<\/td>\n | 40.11 Delay constraints 40.11.1 MDI to GMII delay constraints <\/td>\n<\/tr>\n | ||||||
| 1660<\/td>\n | 40.11.2 DTE delay constraints (half duplex only) 40.11.3 Carrier de-assertion\/assertion constraint (half duplex mode) <\/td>\n<\/tr>\n | ||||||
| 1661<\/td>\n | 40.12 Protocol implementation conformance statement (PICS) proforma for Clause 40\u2014Physical coding sublayer (PCS), physical medium attachment (PMA) sublayer and baseband medium, type 1000BASE-T 40.12.1 Identification 40.12.1.1 Implementation identification 40.12.1.2 Protocol summary 40.12.2 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 1662<\/td>\n | 40.12.3 Clause conventions 40.12.4 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 1665<\/td>\n | 40.12.4.1 PCS receive functions 40.12.4.2 Other PCS functions <\/td>\n<\/tr>\n | ||||||
| 1666<\/td>\n | 40.12.5 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 1668<\/td>\n | 40.12.6 Management interface <\/td>\n<\/tr>\n | ||||||
| 1669<\/td>\n | 40.12.6.1 1000BASE-T Specific Auto-Negotiation Requirements <\/td>\n<\/tr>\n | ||||||
| 1670<\/td>\n | 40.12.7 PMA Electrical Specifications <\/td>\n<\/tr>\n | ||||||
| 1676<\/td>\n | 40.12.8 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 1677<\/td>\n | 40.12.9 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 1679<\/td>\n | 40.12.10 General safety and environmental requirements <\/td>\n<\/tr>\n | ||||||
| 1680<\/td>\n | 40.12.11 Timing requirements <\/td>\n<\/tr>\n | ||||||
| 1681<\/td>\n | 41. Repeater for 1000 Mb\/s baseband networks 41.1 Overview 41.1.1 Scope 41.1.1.1 Repeater set <\/td>\n<\/tr>\n | ||||||
| 1682<\/td>\n | 41.1.1.2 Repeater unit 41.1.2 Application perspective 41.1.2.1 Objectives 41.1.2.2 Compatibility considerations 41.1.2.2.1 Internal segment compatibility 41.1.3 Relationship to PHY 41.2 Repeater functional specifications <\/td>\n<\/tr>\n | ||||||
| 1683<\/td>\n | 41.2.1 Repeater functions 41.2.1.1 Signal restoration functional requirements 41.2.1.1.1 Signal amplification 41.2.1.1.2 Signal wave-shape restoration <\/td>\n<\/tr>\n | ||||||
| 1684<\/td>\n | 41.2.1.1.3 Signal retiming 41.2.1.2 Data-handling functional requirements 41.2.1.2.1 Data frame forwarding 41.2.1.2.2 Received code violations 41.2.1.3 Received event-handling functional requirements 41.2.1.3.1 Received event handling 41.2.1.3.2 Preamble regeneration 41.2.1.3.3 Start-of-packet propagation delay <\/td>\n<\/tr>\n | ||||||
| 1685<\/td>\n | 41.2.1.3.4 Start-of-packet variability 41.2.1.4 Collision-handling functional requirements 41.2.1.4.1 Collision detection 41.2.1.4.2 Jam generation 41.2.1.4.3 Start-of-collision-jam propagation delay 41.2.1.4.4 Cessation-of-collision Jam propagation delay 41.2.1.5 Error-handling functional requirements 41.2.1.5.1 Carrier integrity functional requirements <\/td>\n<\/tr>\n | ||||||
| 1686<\/td>\n | 41.2.1.5.2 Speed handling 41.2.1.6 Partition functional requirements <\/td>\n<\/tr>\n | ||||||
| 1687<\/td>\n | 41.2.1.7 Receive jabber functional requirements 41.2.2 Detailed repeater functions and state diagrams <\/td>\n<\/tr>\n | ||||||
| 1688<\/td>\n | 41.2.2.1 State diagram variables 41.2.2.1.1 Constants 41.2.2.1.2 Variables <\/td>\n<\/tr>\n | ||||||
| 1689<\/td>\n | 41.2.2.1.3 Functions 41.2.2.1.4 Timers <\/td>\n<\/tr>\n | ||||||
| 1690<\/td>\n | 41.2.2.1.5 Counters 41.2.2.1.6 Port designation <\/td>\n<\/tr>\n | ||||||
| 1691<\/td>\n | 41.2.2.2 State diagrams <\/td>\n<\/tr>\n | ||||||
| 1695<\/td>\n | 41.3 Repeater electrical specifications 41.3.1 Electrical isolation 41.4 Environmental specifications 41.4.1 General safety 41.4.2 Network safety 41.4.2.1 Installation 41.4.2.2 Grounding <\/td>\n<\/tr>\n | ||||||
| 1696<\/td>\n | 41.4.2.3 Installation and maintenance guidelines 41.4.3 Electrical isolation 41.4.3.1 Environment A requirements 41.4.3.2 Environment B requirements 41.4.4 Reliability <\/td>\n<\/tr>\n | ||||||
| 1697<\/td>\n | 41.4.5 Environment 41.4.5.1 Electromagnetic emission 41.4.5.2 Temperature and humidity 41.5 Repeater labeling 41.6 Protocol implementation conformance statement (PICS) proforma for Clause 41, Repeater for 1000 Mb\/s baseband networks 41.6.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 1698<\/td>\n | 41.6.2 Identification 41.6.2.1 Implementation identification 41.6.2.2 Protocol summary 41.6.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 1699<\/td>\n | 41.6.4 PICS proforma tables for the Repeater for 1000 Mb\/s baseband networks 41.6.4.1 Compatibility considerations 41.6.4.2 Repeater functions <\/td>\n<\/tr>\n | ||||||
| 1700<\/td>\n | 41.6.4.3 Signal restoration function 41.6.4.4 Data-Handling function <\/td>\n<\/tr>\n | ||||||
| 1701<\/td>\n | 41.6.4.5 Receive Event-Handling function 41.6.4.6 Collision-Handling function <\/td>\n<\/tr>\n | ||||||
| 1702<\/td>\n | 41.6.4.7 Error-Handling function <\/td>\n<\/tr>\n | ||||||
| 1703<\/td>\n | 41.6.4.8 Partition function 41.6.4.9 Receive Jabber function <\/td>\n<\/tr>\n | ||||||
| 1704<\/td>\n | 41.6.4.10 Repeater state diagrams 41.6.4.11 Repeater electrical <\/td>\n<\/tr>\n | ||||||
| 1705<\/td>\n | 41.6.4.12 Repeater labeling <\/td>\n<\/tr>\n | ||||||
| 1706<\/td>\n | 42. System considerations for multisegment 1000 Mb\/s networks 42.1 Overview <\/td>\n<\/tr>\n | ||||||
| 1707<\/td>\n | 42.1.1 Single collision domain multisegment networks <\/td>\n<\/tr>\n | ||||||
| 1708<\/td>\n | 42.1.2 Repeater usage 42.2 Transmission System Model 1 42.3 Transmission System Model 2 <\/td>\n<\/tr>\n | ||||||
| 1709<\/td>\n | 42.3.1 Round-trip collision delay <\/td>\n<\/tr>\n | ||||||
| 1710<\/td>\n | 42.3.1.1 Worst-case path delay value (PDV) selection 42.3.1.2 Worst-case PDV calculation <\/td>\n<\/tr>\n | ||||||
| 1712<\/td>\n | 42.4 Full duplex 1000 Mb\/s topology limitations <\/td>\n<\/tr>\n | ||||||
| 1713<\/td>\n | 43. Content moved to IEEE Std 802.1AX-2008 <\/td>\n<\/tr>\n | ||||||
| 1714<\/td>\n | 44. Introduction to 10 Gb\/s baseband networks 44.1 Overview 44.1.1 Scope 44.1.2 Objectives 44.1.3 Relationship of 10 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 1716<\/td>\n | 44.1.4 Summary of 10 Gigabit Ethernet sublayers 44.1.4.1 Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII) 44.1.4.2 XGMII Extender Sublayer (XGXS) and 10 Gigabit Attachment Unit Interface (XAUI) 44.1.4.3 Management interface (MDIO\/MDC) 44.1.4.4 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 1718<\/td>\n | 44.1.4.5 WAN Interface Sublayer (WIS), type 10GBASE-W 44.1.5 Management 44.2 State diagrams 44.3 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 1720<\/td>\n | 44.4 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 1721<\/td>\n | 45. Management Data Input\/Output (MDIO) Interface 45.1 Overview 45.1.1 Summary of major concepts 45.1.2 Application <\/td>\n<\/tr>\n | ||||||
| 1722<\/td>\n | 45.2 MDIO Interface registers <\/td>\n<\/tr>\n | ||||||
| 1725<\/td>\n | 45.2.1 PMA\/PMD registers <\/td>\n<\/tr>\n | ||||||
| 1734<\/td>\n | 45.2.1.1 PMA\/PMD control 1 register (Register 1.0) <\/td>\n<\/tr>\n | ||||||
| 1735<\/td>\n | 45.2.1.1.1 Reset (1.0.15) 45.2.1.1.2 Low power (1.0.11) <\/td>\n<\/tr>\n | ||||||
| 1736<\/td>\n | 45.2.1.1.3 Speed selection (1.0.13, 1.0.6, 1.0.5:2) 45.2.1.1.4 PMA remote loopback (1.0.1) 45.2.1.1.5 PMA local loopback (1.0.0) <\/td>\n<\/tr>\n | ||||||
| 1737<\/td>\n | 45.2.1.2 PMA\/PMD status 1 register (Register 1.1) 45.2.1.2.1 PMA ingress AUI stop ability (1.1.9) 45.2.1.2.2 PMA egress AUI stop ability (1.1.8) <\/td>\n<\/tr>\n | ||||||
| 1738<\/td>\n | 45.2.1.2.3 Fault (1.1.7) 45.2.1.2.4 Receive link status (1.1.2) 45.2.1.2.5 Low-power ability (1.1.1) 45.2.1.3 PMA\/PMD device identifier (Registers 1.2 and 1.3) 45.2.1.4 PMA\/PMD speed ability (Register 1.4) 45.2.1.4.1 400G capable (1.4.15) <\/td>\n<\/tr>\n | ||||||
| 1739<\/td>\n | 45.2.1.4.2 5G capable (1.4.14) <\/td>\n<\/tr>\n | ||||||
| 1740<\/td>\n | 45.2.1.4.3 2.5G capable (1.4.13) 45.2.1.4.4 200G capable (1.4.12) 45.2.1.4.5 25G capable (1.4.11) 45.2.1.4.6 10GPASS-XR capable (1.4.10) 45.2.1.4.7 100G capable (1.4.9) 45.2.1.4.8 40G capable (1.4.8) 45.2.1.4.9 10\/1G capable (1.4.7) 45.2.1.4.10 10M capable (1.4.6) 45.2.1.4.11 100M capable (1.4.5) 45.2.1.4.12 1000M capable (1.4.4) <\/td>\n<\/tr>\n | ||||||
| 1741<\/td>\n | 45.2.1.4.13 50G capable (1.4.3) 45.2.1.4.14 10PASS-TS capable (1.4.2) 45.2.1.4.15 2BASE-TL capable (1.4.1) 45.2.1.4.16 10G capable (1.4.0) 45.2.1.5 PMA\/PMD devices in package (Registers 1.5 and 1.6) 45.2.1.6 PMA\/PMD control 2 register (Register 1.7) 45.2.1.6.1 PMA ingress AUI stop enable (1.7.9) 45.2.1.6.2 PMA egress AUI stop enable (1.7.8) 45.2.1.6.3 PMA\/PMD type selection (1.7.6:0) <\/td>\n<\/tr>\n | ||||||
| 1744<\/td>\n | 45.2.1.7 PMA\/PMD status 2 register (Register 1.8) <\/td>\n<\/tr>\n | ||||||
| 1745<\/td>\n | 45.2.1.7.1 Device present (1.8.15:14) 45.2.1.7.2 Transmit fault ability (1.8.13) 45.2.1.7.3 Receive fault ability (1.8.12) 45.2.1.7.4 Transmit fault (1.8.11) <\/td>\n<\/tr>\n | ||||||
| 1747<\/td>\n | 45.2.1.7.5 Receive fault (1.8.10) <\/td>\n<\/tr>\n | ||||||
| 1749<\/td>\n | 45.2.1.7.6 PMA\/PMD extended abilities (1.8.9) 45.2.1.7.7 PMD transmit disable ability (1.8.8) 45.2.1.7.8 10GBASE-SR ability (1.8.7) 45.2.1.7.9 10GBASE-LR ability (1.8.6) 45.2.1.7.10 10GBASE-ER ability (1.8.5) 45.2.1.7.11 10GBASE-LX4 ability (1.8.4) 45.2.1.7.12 10GBASE-SW ability (1.8.3) 45.2.1.7.13 10GBASE-LW ability (1.8.2) 45.2.1.7.14 10GBASE-EW ability (1.8.1) <\/td>\n<\/tr>\n | ||||||
| 1750<\/td>\n | 45.2.1.7.15 PMA local loopback ability (1.8.0) 45.2.1.8 PMD transmit disable register (Register 1.9) <\/td>\n<\/tr>\n | ||||||
| 1751<\/td>\n | 45.2.1.8.1 PMD transmit disable 14 (1.9.15) <\/td>\n<\/tr>\n | ||||||
| 1752<\/td>\n | 45.2.1.8.2 PMD transmit disable 4 through 14 (1.9.5 through 1.9.14) 45.2.1.8.3 PMD transmit disable 3 (1.9.4) <\/td>\n<\/tr>\n | ||||||
| 1753<\/td>\n | 45.2.1.8.4 PMD transmit disable 2 (1.9.3) 45.2.1.8.5 PMD transmit disable 1 (1.9.2) 45.2.1.8.6 PMD transmit disable 0 (1.9.1) 45.2.1.8.7 Global PMD transmit disable (1.9.0) 45.2.1.9 PMD receive signal detect register (Register 1.10) <\/td>\n<\/tr>\n | ||||||
| 1755<\/td>\n | 45.2.1.9.1 PMD receive signal detect 14 (1.10.15) 45.2.1.9.2 PMD receive signal detect 4 through 13 (1.10.5 through 1.10.14) 45.2.1.9.3 PMD receive signal detect 3 (1.10.4) 45.2.1.9.4 PMD receive signal detect 2 (1.10.3) 45.2.1.9.5 PMD receive signal detect 1 (1.10.2) 45.2.1.9.6 PMD receive signal detect 0 (1.10.1) 45.2.1.9.7 Global PMD receive signal detect (1.10.0) <\/td>\n<\/tr>\n | ||||||
| 1756<\/td>\n | 45.2.1.10 PMA\/PMD extended ability register (Register 1.11) <\/td>\n<\/tr>\n | ||||||
| 1757<\/td>\n | 45.2.1.10.1 BASE-H extended abilities (1.11.15) 45.2.1.10.2 2.5G\/5G extended abilities (1.11.14) 45.2.1.10.3 200G\/400G extended abilities (1.11.13) 45.2.1.10.4 25G extended abilities (1.11.12) 45.2.1.10.5 BASE-T1 extended abilities (1.11.11) 45.2.1.10.6 40G\/100G extended abilities (1.11.10) <\/td>\n<\/tr>\n | ||||||
| 1758<\/td>\n | 45.2.1.10.7 P2MP ability (1.11.9) 45.2.1.10.8 10BASE-T ability (1.11.8) 45.2.1.10.9 100BASE-TX ability (1.11.7) 45.2.1.10.10 1000BASE-KX ability (1.11.6) 45.2.1.10.11 1000BASE-T ability (1.11.5) 45.2.1.10.12 10GBASE-KR ability (1.11.4) 45.2.1.10.13 10GBASE-KX4 ability (1.11.3) 45.2.1.10.14 10GBASE-T ability (1.11.2) 45.2.1.10.15 10GBASE-LRM ability (1.11.1) 45.2.1.10.16 10GBASE-CX4 ability (1.11.0) <\/td>\n<\/tr>\n | ||||||
| 1759<\/td>\n | 45.2.1.11 10G-EPON PMA\/PMD ability register (Register 1.12) 45.2.1.11.1 10GBASE-PR-D4 ability (1.12.14) <\/td>\n<\/tr>\n | ||||||
| 1760<\/td>\n | 45.2.1.11.2 10GBASE-PR-U4 ability (1.12.13) 45.2.1.11.3 10\/1GBASE-PRX-D4 ability (1.12.12) 45.2.1.11.4 10\/1GBASE-PRX-U4 ability (1.12.11) 45.2.1.11.5 10\/1GBASE-PRX-D1 ability (1.12.10) 45.2.1.11.6 10\/1GBASE-PRX-D2 ability (1.12.9) 45.2.1.11.7 10\/1GBASE-PRX-D3 ability (1.12.8) 45.2.1.11.8 10GBASE-PR-D1 ability (1.12.7) 45.2.1.11.9 10GBASE-PR-D2 ability (1.12.6) 45.2.1.11.10 10GBASE-PR-D3 ability (1.12.5) <\/td>\n<\/tr>\n | ||||||
| 1761<\/td>\n | 45.2.1.11.11 10\/1GBASE-PRX-U1 ability (1.12.4) 45.2.1.11.12 10\/1GBASE-PRX-U2 ability (1.12.3) 45.2.1.11.13 10\/1GBASE-PRX-U3 ability (1.12.2) 45.2.1.11.14 10GBASE-PR-U1 ability (1.12.1) 45.2.1.11.15 10GBASE-PR-U3 ability (1.12.0) 45.2.1.12 40G\/100G PMA\/PMD extended ability register (Register 1.13) <\/td>\n<\/tr>\n | ||||||
| 1762<\/td>\n | 45.2.1.12.1 PMA remote loopback ability (1.13.15) 45.2.1.12.2 100GBASE-CR4 ability (1.13.14) 45.2.1.12.3 100GBASE-KR4 ability (1.13.13) <\/td>\n<\/tr>\n | ||||||
| 1763<\/td>\n | 45.2.1.12.4 100GBASE-KP4 ability (1.13.12) 45.2.1.12.5 100GBASE-ER4 ability (1.13.11) 45.2.1.12.6 100GBASE-LR4 ability (1.13.10) 45.2.1.12.7 100GBASE-SR10 ability (1.13.9) 45.2.1.12.8 100GBASE-CR10 ability (1.13.8) 45.2.1.12.9 100GBASE-SR4 ability (1.13.7) 45.2.1.12.10 40GBASE-T ability (1.13.6) 45.2.1.12.11 40GBASE-ER4 ability (1.13.5) 45.2.1.12.12 40GBASE-FR ability (1.13.4) <\/td>\n<\/tr>\n | ||||||
| 1764<\/td>\n | 45.2.1.12.13 40GBASE-LR4 ability (1.13.3) 45.2.1.12.14 40GBASE-SR4 ability (1.13.2) 45.2.1.12.15 40GBASE-CR4 ability (1.13.1) 45.2.1.12.16 40GBASE-KR4 ability (1.13.0) 45.2.1.13 PMA\/PMD package identifier (Registers 1.14 and 1.15) 45.2.1.14 EEE capability (Register 1.16) <\/td>\n<\/tr>\n | ||||||
| 1765<\/td>\n | 45.2.1.14.1 100GBASE-CR4 EEE deep sleep supported (1.16.11) 45.2.1.14.2 100GBASE-KR4 EEE deep sleep supported (1.16.10) 45.2.1.14.3 100GBASE-KP4 EEE deep sleep supported (1.16.9) 45.2.1.14.4 100GBASE-CR10 EEE deep sleep supported (1.16.8) 45.2.1.14.5 25GBASE-R deep sleep (1.16.2) 45.2.1.14.6 40GBASE-CR4 EEE deep sleep supported (1.16.1) <\/td>\n<\/tr>\n | ||||||
| 1766<\/td>\n | 45.2.1.14.7 40GBASE-KR4 EEE deep sleep supported (1.16.0) 45.2.1.15 EPoC PMA\/PMD ability register (Register 1.17) 45.2.1.15.1 10GPASS-XR-D ability (1.17.1) 45.2.1.15.2 10GPASS-XR-U ability (1.17.0) 45.2.1.16 BASE-T1 PMA\/PMD extended ability register (1.18) 45.2.1.16.1 10GBASE-T1 ability (1.18.6) 45.2.1.16.2 5GBASE-T1 ability (1.18.5) <\/td>\n<\/tr>\n | ||||||
| 1767<\/td>\n | 45.2.1.16.3 2.5GBASE-T1 ability (1.18.4) 45.2.1.16.4 10BASE-T1S ability (1.18.3) 45.2.1.16.5 10BASE-T1L ability (1.18.2) 45.2.1.16.6 1000BASE-T1 ability (1.18.1) <\/td>\n<\/tr>\n | ||||||
| 1768<\/td>\n | 45.2.1.16.7 100BASE-T1 ability (1.18.0) 45.2.1.17 25G PMA\/PMD extended ability register (Register 1.19) 45.2.1.17.1 25GBASE-ER ability (1.19.7) 45.2.1.17.2 25GBASE-LR ability (1.19.6) <\/td>\n<\/tr>\n | ||||||
| 1769<\/td>\n | 45.2.1.17.3 25GBASE-T ability (1.19.5) 45.2.1.17.4 25GBASE-SR ability (1.19.4) 45.2.1.17.5 25GBASE-CR ability (1.19.3) 45.2.1.17.6 25GBASE-CR-S ability (1.19.2) 45.2.1.17.7 25GBASE-KR ability (1.19.1) 45.2.1.17.8 25GBASE-KR-S ability (1.19.0) 45.2.1.18 50G PMA\/PMD extended ability (Register 1.20) <\/td>\n<\/tr>\n | ||||||
| 1770<\/td>\n | 45.2.1.18.1 50G PMA remote loopback ability (1.20.15) 45.2.1.18.2 50GBASE-ER ability (1.20.5) 45.2.1.18.3 50GBASE-LR ability (1.20.4) 45.2.1.18.4 50GBASE-FR ability (1.20.3) 45.2.1.18.5 50GBASE-SR ability (1.20.2) <\/td>\n<\/tr>\n | ||||||
| 1771<\/td>\n | 45.2.1.18.6 50GBASE-CR ability (1.20.1) 45.2.1.18.7 50GBASE-KR ability (1.20.0) 45.2.1.19 2.5G\/5G PMA\/PMD extended ability register (Register 1.21) 45.2.1.19.1 5GBASE-KR ability (1.21.3) 45.2.1.19.2 2.5GBASE-KX ability (1.21.2) <\/td>\n<\/tr>\n | ||||||
| 1772<\/td>\n | 45.2.1.19.3 5GBASE-T ability (1.21.1) 45.2.1.19.4 2.5GBASE-T ability (1.21.0) 45.2.1.20 BASE-H PMA\/PMD extended ability register (Register 1.22) 45.2.1.21 200G PMA\/PMD extended ability register (Register 1.23) <\/td>\n<\/tr>\n | ||||||
| 1773<\/td>\n | 45.2.1.21.1 200G PMA remote loopback ability (1.23.15) 45.2.1.21.2 200GBASE-ER4 ability (1.23.6) 45.2.1.21.3 200GBASE-LR4 ability (1.23.5) 45.2.1.21.4 200GBASE-FR4 ability (1.23.4) 45.2.1.21.5 200GBASE-DR4 ability (1.23.3) 45.2.1.21.6 200GBASE-SR4 ability (1.23.2) <\/td>\n<\/tr>\n | ||||||
| 1774<\/td>\n | 45.2.1.21.7 200GBASE-CR4 ability (1.23.1) 45.2.1.21.8 200GBASE-KR4 ability (1.23.0) 45.2.1.22 400G PMA\/PMD extended ability register (Register 1.24) 45.2.1.22.1 400G PMA remote loopback ability (1.24.15) <\/td>\n<\/tr>\n | ||||||
| 1775<\/td>\n | 45.2.1.22.2 400GBASE-ER8 ability (1.24.10) 45.2.1.22.3 400GBASE-LR4-6 ability (1.24.9) 45.2.1.22.4 400GBASE-FR4 ability (1.24.8) 45.2.1.22.5 400GBASE-SR4.2 ability (1.24.7) 45.2.1.22.6 400GBASE-SR8 ability (1.24.6) 45.2.1.22.7 400GBASE-LR8 ability (1.24.5) 45.2.1.22.8 400GBASE-FR8 ability (1.24.4) 45.2.1.22.9 400GBASE-DR4 ability (1.24.3) <\/td>\n<\/tr>\n | ||||||
| 1776<\/td>\n | 45.2.1.22.10 400GBASE-SR16 ability (1.24.2) 45.2.1.23 PMA\/PMD extended ability 2 (Register 1.25) 45.2.1.23.1 50G extended abilities (1.25.0) 45.2.1.24 40G\/100G PMA\/PMD extended ability 2 (Register 1.26) <\/td>\n<\/tr>\n | ||||||
| 1777<\/td>\n | 45.2.1.24.1 100GBASE-SR2 ability (1.26.9) 45.2.1.24.2 100GBASE-CR2 ability (1.26.8) 45.2.1.24.3 100GBASE-KR2 ability (1.26.7) 45.2.1.24.4 100GBASE-ZR ability (1.26.6) 45.2.1.24.5 100GBASE-LR1 ability (1.26.5) 45.2.1.24.6 100GBASE-FR1 ability (1.26.4) 45.2.1.24.7 100GBASE-DR ability (1.26.3) <\/td>\n<\/tr>\n | ||||||
| 1778<\/td>\n | 45.2.1.25 PMD transmit disable extension register (Register 1.27) 45.2.1.25.1 PMD transmit disable 15 (1.27.0) 45.2.1.26 PMD receive signal detect extension register (Register 1.28) <\/td>\n<\/tr>\n | ||||||
| 1779<\/td>\n | 45.2.1.26.1 PMD receive signal detect 15 (1.28.0) 45.2.1.27 PMA\/PMD control 3 register (Register 1.29) 45.2.1.27.1 Downstream differential encoding (1.29.15) 45.2.1.27.2 PMA\/PMD type selection (1.29.5:0) 45.2.1.28 10P\/2B PMA\/PMD control register (Register 1.30) 45.2.1.28.1 PMA\/PMD link control (1.30.15) 45.2.1.28.2 STFU (1.30.14) 45.2.1.28.3 Silence time (1.30.13:8) <\/td>\n<\/tr>\n | ||||||
| 1780<\/td>\n | 45.2.1.28.4 Port subtype select (1.30.7) <\/td>\n<\/tr>\n | ||||||
| 1781<\/td>\n | 45.2.1.28.5 Handshake cleardown (1.30.6) 45.2.1.28.6 Ignore incoming handshake (1.30.5) 45.2.1.28.7 PMA\/PMD type selection (1.30.4:0) <\/td>\n<\/tr>\n | ||||||
| 1782<\/td>\n | 45.2.1.29 10P\/2B PMA\/PMD status register (Register 1.31) 45.2.1.29.1 Data rate (1.31.15:5) 45.2.1.29.2 CO supported (1.31.4) 45.2.1.29.3 CPE supported (1.31.3) <\/td>\n<\/tr>\n | ||||||
| 1783<\/td>\n | 45.2.1.29.4 PMA\/PMD link status (1.31.2:0) 45.2.1.30 Link partner PMA\/PMD control register (Register 1.32) <\/td>\n<\/tr>\n | ||||||
| 1784<\/td>\n | 45.2.1.30.1 Get link partner parameters (1.32.15) 45.2.1.30.2 Send link partner parameters (1.32.13) 45.2.1.31 Link partner PMA\/PMD status register (Register 1.33) <\/td>\n<\/tr>\n | ||||||
| 1785<\/td>\n | 45.2.1.31.1 Get link partner result (1.33.14) 45.2.1.31.2 Send link partner result (1.33.12) 45.2.1.32 BiDi PMA\/PMD extended ability 1 (Register 1.34) <\/td>\n<\/tr>\n | ||||||
| 1786<\/td>\n | 45.2.1.32.1 25GBASE-BR40-U ability (1.34.11) 45.2.1.32.2 25GBASE-BR40-D ability (1.34.10) 45.2.1.32.3 25GBASE-BR20-U ability (1.34.9) 45.2.1.32.4 25GBASE-BR20-D ability (1.34.8) <\/td>\n<\/tr>\n | ||||||
| 1787<\/td>\n | 45.2.1.32.5 25GBASE-BR10-U ability (1.34.7) 45.2.1.32.6 25GBASE-BR10-D ability (1.34.6) 45.2.1.32.7 10GBASE-BR40-U ability (1.34.5) 45.2.1.32.8 10GBASE-BR40-D ability (1.34.4) 45.2.1.32.9 10GBASE-BR20-U ability (1.34.3) 45.2.1.32.10 10GBASE-BR20-D ability (1.34.2) 45.2.1.32.11 10GBASE-BR10-U ability (1.34.1) 45.2.1.32.12 10GBASE-BR10-D ability (1.34.0) <\/td>\n<\/tr>\n | ||||||
| 1788<\/td>\n | 45.2.1.33 BiDi PMA\/PMD extended ability 2 (Register 1.35) 45.2.1.33.1 50GBASE-BR40-U ability (1.35.5) 45.2.1.33.2 50GBASE-BR40-D ability (1.35.4) 45.2.1.33.3 50GBASE-BR20-U ability (1.35.3) 45.2.1.33.4 50GBASE-BR20-D ability (1.35.2) <\/td>\n<\/tr>\n | ||||||
| 1789<\/td>\n | 45.2.1.33.5 50GBASE-BR10-U ability (1.35.1) 45.2.1.33.6 50GBASE-BR10-D ability (1.35.0) 45.2.1.34 10P\/2B PMA\/PMD link loss register (Register 1.36) 45.2.1.35 10P\/2B RX SNR margin register (Register 1.37) 45.2.1.36 10P\/2B link partner RX SNR margin register (Register 1.38) <\/td>\n<\/tr>\n | ||||||
| 1790<\/td>\n | 45.2.1.37 10P\/2B line attenuation register (Register 1.39) 45.2.1.38 10P\/2B link partner line attenuation register (Register 1.40) 45.2.1.39 10P\/2B line quality thresholds register (Register 1.41) 45.2.1.39.1 Loop attenuation threshold (1.41.15:8) <\/td>\n<\/tr>\n | ||||||
| 1791<\/td>\n | 45.2.1.39.2 SNR margin threshold (1.41.7:4) 45.2.1.40 2B link partner line quality thresholds register (Register 1.42) 45.2.1.41 10P FEC correctable errors counter (Register 1.43) 45.2.1.42 10P FEC uncorrectable errors counter (Register 1.44) 45.2.1.43 10P link partner FEC correctable errors register (Register 1.45) <\/td>\n<\/tr>\n | ||||||
| 1792<\/td>\n | 45.2.1.44 10P link partner FEC uncorrectable errors register (Register 1.46) 45.2.1.45 10P electrical length register (Register 1.47) 45.2.1.45.1 Electrical length (1.47.15:0) 45.2.1.46 10P link partner electrical length register (Register 1.48) 45.2.1.47 10P PMA\/PMD general configuration register (Register 1.49) <\/td>\n<\/tr>\n | ||||||
| 1793<\/td>\n | 45.2.1.47.1 TX window length (1.49.7:0) 45.2.1.48 10P PSD configuration register (Register 1.50) 45.2.1.48.1 PBO disable (1.50.8) 45.2.1.49 10P downstream data rate configuration (Registers 1.51, 1.52) <\/td>\n<\/tr>\n | ||||||
| 1794<\/td>\n | 45.2.1.50 10P downstream Reed-Solomon configuration (Register 1.53) 45.2.1.50.1 RS codeword length (1.53.0) 45.2.1.51 10P upstream data rate configuration (Registers 1.54, 1.55) <\/td>\n<\/tr>\n | ||||||
| 1795<\/td>\n | 45.2.1.52 10P upstream 10P upstream Reed-Solomon configuration register (Register 1.56) 45.2.1.52.1 RS codeword length (1.56.0) 45.2.1.53 10P tone group registers (Registers 1.57, 1.58) <\/td>\n<\/tr>\n | ||||||
| 1796<\/td>\n | 45.2.1.54 10P tone control parameters (Registers 1.59, 1.60, 1.61, 1.62, 1.63) <\/td>\n<\/tr>\n | ||||||
| 1797<\/td>\n | 45.2.1.54.1 Tone active (1.59.15) 45.2.1.54.2 Tone direction (1.59.14) 45.2.1.54.3 Max SNR margin (1.59.13:5) 45.2.1.54.4 Target SNR margin (1.60.8:0) 45.2.1.54.5 Minimum SNR margin (1.61.8:0) 45.2.1.54.6 PSD level (1.62.8:0) 45.2.1.54.7 USPBO reference (1.63.8:0) 45.2.1.55 10P tone control action register (Register 1.64) <\/td>\n<\/tr>\n | ||||||
| 1798<\/td>\n | 45.2.1.55.1 Refresh tone status (1.64.5) 45.2.1.55.2 Change tone activity (1.64.4) 45.2.1.55.3 Change tone direction (1.64.3) <\/td>\n<\/tr>\n | ||||||
| 1799<\/td>\n | 45.2.1.55.4 Change SNR margin (1.64.2) 45.2.1.55.5 Change PSD level (1.64.1) 45.2.1.55.6 Change USPBO reference PSD (1.64.0) 45.2.1.56 10P tone status registers (Registers 1.65, 1.66, 1.67) <\/td>\n<\/tr>\n | ||||||
| 1800<\/td>\n | 45.2.1.56.1 Refresh status (1.65.15) 45.2.1.56.2 Active (1.65.14) 45.2.1.56.3 Direction (1.65.13) 45.2.1.56.4 RX PSD (1.65.7:0) 45.2.1.56.5 TX PSD (1.66.15:8) 45.2.1.56.6 Bit load (1.66.7:3) 45.2.1.56.7 SNR margin (1.67.9:0) 45.2.1.57 10P outgoing indicator bits status register (Register 1.68) <\/td>\n<\/tr>\n | ||||||
| 1801<\/td>\n | 45.2.1.57.1 LoM (1.68.8) 45.2.1.57.2 lpr (1.68.7) 45.2.1.57.3 po (1.68.6) 45.2.1.57.4 Rdi (1.68.5) 45.2.1.57.5 los (1.68.4) 45.2.1.57.6 fec-s (1.68.1) <\/td>\n<\/tr>\n | ||||||
| 1802<\/td>\n | 45.2.1.57.7 be-s (1.68.0) 45.2.1.58 10P incoming indicator bits status register (Register 1.69) 45.2.1.58.1 LoM (1.69.8) 45.2.1.58.2 Flpr (1.69.7) <\/td>\n<\/tr>\n | ||||||
| 1803<\/td>\n | 45.2.1.58.3 Fpo (1.69.6) 45.2.1.58.4 Rdi (1.69.5) 45.2.1.58.5 Flos (1.69.4) 45.2.1.58.6 Ffec-s (1.69.1) 45.2.1.58.7 Febe-s (1.69.0) 45.2.1.59 10P cyclic extension configuration register (Register 1.70) 45.2.1.60 10P attainable downstream data rate register (Register 1.71) <\/td>\n<\/tr>\n | ||||||
| 1804<\/td>\n | 45.2.1.61 2B general parameter register (Register 1.80) 45.2.1.61.1 PMMS target margin (1.80.14:10) <\/td>\n<\/tr>\n | ||||||
| 1805<\/td>\n | 45.2.1.61.2 Line probing control (1.80.9) 45.2.1.61.3 Noise environment (1.80.8) 45.2.1.61.4 Region (1.80.1:0) 45.2.1.62 2B PMD parameters registers (Registers 1.81 through 1.88) <\/td>\n<\/tr>\n | ||||||
| 1807<\/td>\n | 45.2.1.62.1 Minimum data rate (1.81, 1.83, 1.85, 1.87. Bits 14:8) 45.2.1.62.2 Max data rate (1.81, 1.83, 1.85, 1.87. Bits 6:0) <\/td>\n<\/tr>\n | ||||||
| 1808<\/td>\n | 45.2.1.62.3 Data rate step (1.82, 1.84, 1.86, 1.88. Bits 13:7) 45.2.1.62.4 Power (1.82, 1.84, 1.86, 1.88. Bits 6:2) 45.2.1.62.5 Constellation (1.82, 1.84, 1.86, 1.88. Bits 1:0) 45.2.1.63 2B code violation errors counter (Register 1.89) 45.2.1.64 2B link partner code violations register (Register 1.90) <\/td>\n<\/tr>\n | ||||||
| 1809<\/td>\n | 45.2.1.65 2B errored seconds counter (Register 1.91) 45.2.1.66 2B link partner errored seconds register (Register 1.92) 45.2.1.67 2B severely errored seconds counter (Register 1.93) 45.2.1.68 2B link partner severely errored seconds register (Register 1.94) <\/td>\n<\/tr>\n | ||||||
| 1810<\/td>\n | 45.2.1.69 2B LOSW counter (Register 1.95) 45.2.1.70 2B link partner LOSW register (Register 1.96) 45.2.1.71 2B unavailable seconds counter (Register 1.97) <\/td>\n<\/tr>\n | ||||||
| 1811<\/td>\n | 45.2.1.72 2B link partner unavailable seconds register (Register 1.98) 45.2.1.73 2B state defects register (Register 1.99) 45.2.1.73.1 Segment defect (1.99.15) 45.2.1.73.2 SNR margin defect (1.99.14) 45.2.1.73.3 Loop attenuation defect (1.99.13) <\/td>\n<\/tr>\n | ||||||
| 1812<\/td>\n | 45.2.1.73.4 Loss of sync word (1.99.12) 45.2.1.74 2B link partner state defects register (Register 1.100) 45.2.1.75 2B negotiated constellation register (Register 1.101) 45.2.1.75.1 Negotiated constellation (1.101.1:0) 45.2.1.76 2B extended PMD parameters registers (Registers 1.102 through 1.109) <\/td>\n<\/tr>\n | ||||||
| 1814<\/td>\n | 45.2.1.76.1 Minimum data rate (1.102, 1.104, 1.106, 1.108. Bits 14:8) 45.2.1.76.2 Max data rate (1.102, 1.104, 1.106, 1.108. Bits 6:0) <\/td>\n<\/tr>\n | ||||||
| 1815<\/td>\n | 45.2.1.76.3 Data rate step (1.103, 1.105, 1.107, 1.109. Bits 13:7) 45.2.1.76.4 Power (1.103, 1.105, 1.107, 1.109. Bits 6:2) 45.2.1.76.5 Constellation (1.103, 1.105, 1.107, 1.109. Bits 1:0) 45.2.1.77 MultiGBASE-T status (Register 1.129) 45.2.1.77.1 LP information valid (1.129.0) 45.2.1.78 MultiGBASE-T pair swap and polarity register (Register 1.130) <\/td>\n<\/tr>\n | ||||||
| 1816<\/td>\n | 45.2.1.78.1 Pair D polarity (1.130.11) 45.2.1.78.2 Pair C polarity (1.130.10) 45.2.1.78.3 Pair B polarity (1.130.9) 45.2.1.78.4 Pair A polarity (1.130.8) 45.2.1.78.5 MDI\/MDI-X connection (1.130.1:0) 45.2.1.79 MultiGBASE-T TX power backoff and PHY short reach setting (Register 1.131) <\/td>\n<\/tr>\n | ||||||
| 1817<\/td>\n | 45.2.1.79.1 MultiGBASE-T TX power backoff settings (1.131.15:10) 45.2.1.79.2 PHY short reach mode (1.131.0) 45.2.1.80 MultiGBASE-T test mode register (Register 1.132) <\/td>\n<\/tr>\n | ||||||
| 1818<\/td>\n | 45.2.1.80.1 Test mode control (1.132.15:13) 45.2.1.80.2 Transmitter test frequencies (1.132.12:10) 45.2.1.81 SNR operating margin channel A register (Register 1.133) 45.2.1.82 SNR operating margin channel B register (Register 1.134) <\/td>\n<\/tr>\n | ||||||
| 1819<\/td>\n | 45.2.1.83 SNR operating margin channel C register (Register 1.135) 45.2.1.84 SNR operating margin channel D register (Register 1.136) 45.2.1.85 Minimum margin channel A register (Register 1.137) 45.2.1.86 Minimum margin channel B register (Register 1.138) 45.2.1.87 Minimum margin channel C register (Register 1.139) 45.2.1.88 Minimum margin channel D register (Register 1.140) 45.2.1.89 RX signal power channel A register (Register 1.141) <\/td>\n<\/tr>\n | ||||||
| 1820<\/td>\n | 45.2.1.90 RX signal power channel B register (Register 1.142) 45.2.1.91 RX signal power channel C register (Register 1.143) 45.2.1.92 RX signal power channel D register (Register 1.144) 45.2.1.93 MultiGBASE-T skew delay register (Registers 1.145 and 1.146) <\/td>\n<\/tr>\n | ||||||
| 1821<\/td>\n | 45.2.1.94 MultiGBASE-T fast retrain status and control register (Register 1.147) 45.2.1.94.1 LP fast retrain count (1.147.15:11) 45.2.1.94.2 LD fast retrain count (1.147.10:6) <\/td>\n<\/tr>\n | ||||||
| 1822<\/td>\n | 45.2.1.94.3 Fast retrain ability (1.147.4) 45.2.1.94.4 Fast retrain negotiated (1.147.3) 45.2.1.94.5 Fast retrain signal type (1.147.2:1) 45.2.1.94.6 Fast retrain enable (1.147.0) 45.2.1.95 BASE-R PMD control register (Register 1.150) <\/td>\n<\/tr>\n | ||||||
| 1823<\/td>\n | 45.2.1.95.1 Restart training (1.150.0) 45.2.1.95.2 Training enable (1.150.1) 45.2.1.95.3 Transmitter equalizer disable (1.150.2) 45.2.1.96 BASE-R PMD status register (Register 1.151) <\/td>\n<\/tr>\n | ||||||
| 1824<\/td>\n | 45.2.1.96.1 Receiver status 0 (1.151.0) 45.2.1.96.2 Frame lock 0 (1.151.1) 45.2.1.96.3 Startup protocol status 0 (1.151.2) 45.2.1.96.4 Training failure 0 (1.151.3) 45.2.1.96.5 Receiver status 1, 2, 3 (1.151.4, 1.151.8, 1.151.12) 45.2.1.96.6 Frame lock 1, 2, 3 (1.151.5, 1.151.9, 1.151.13) 45.2.1.96.7 Startup protocol status 1, 2, 3 (1.151.6, 1.151.10, 1.151.14) 45.2.1.96.8 Training failure 1, 2, 3 (1.151.7, 1.151.11, 1.151.15) 45.2.1.97 BASE-R LP coefficient update, lane 0 register (Register 1.152) <\/td>\n<\/tr>\n | ||||||
| 1825<\/td>\n | 45.2.1.97.1 Preset (1.152.13) 45.2.1.97.2 Initialize (1.152.12) 45.2.1.97.3 Coefficient (k) update (1.152.5:0) <\/td>\n<\/tr>\n | ||||||
| 1826<\/td>\n | 45.2.1.98 BASE-R LP status report, lane 0 register (Register 1.153) 45.2.1.98.1 Receiver ready (1.153.15) 45.2.1.98.2 Coefficient (k) status (1.153.5:0) 45.2.1.99 BASE-R LD coefficient update, lane 0 register (Register 1.154) <\/td>\n<\/tr>\n | ||||||
| 1827<\/td>\n | 45.2.1.99.1 Preset (1.154.13) 45.2.1.99.2 Initialize (1.154.12) 45.2.1.99.3 Coefficient (k) update(1.154.5:0) <\/td>\n<\/tr>\n | ||||||
| 1828<\/td>\n | 45.2.1.100 BASE-R LD status report, lane 0 register (Register 1.155) 45.2.1.100.1 Receiver ready (1.155.15) 45.2.1.100.2 Coefficient (k) status (1.155.5:0) <\/td>\n<\/tr>\n | ||||||
| 1829<\/td>\n | 45.2.1.101 BASE-R PMD status 2 register (Register 1.156) <\/td>\n<\/tr>\n | ||||||
| 1830<\/td>\n | 45.2.1.101.1 Receiver status 4, 5, 6, 7 (1.156.0, 1.156.4, 1.156.8, 1.156.12) 45.2.1.101.2 Frame lock 4, 5, 6, 7 (1.156.1, 1.156.5, 1.156.9, 1.156.13) 45.2.1.101.3 Startup protocol status 4, 5, 6, 7 (1.156.2, 1.156.6, 1.156.10, 1.156.14) 45.2.1.101.4 Training failure 4, 5, 6, 7 (1.156.3, 1.156.7, 1.156.11, 1.156.15) 45.2.1.102 BASE-R PMD status 3 register (Register 1.157) 45.2.1.102.1 Receiver status 8, 9 (1.157.0, 1.157.4) <\/td>\n<\/tr>\n | ||||||
| 1831<\/td>\n | 45.2.1.102.2 Frame lock 8, 9 (1.157.1, 1.157.5) 45.2.1.102.3 Startup protocol status 8, 9 (1.157.2, 1.157.6) 45.2.1.102.4 Training failure 8, 9 (1.157.3, 1.157.7) 45.2.1.103 1000BASE-KX\/2.5GBASE-KX control register (Register 1.160) 45.2.1.103.1 PMD transmit disable (1.160.0) 45.2.1.104 1000BASE-KX\/2.5GBASE-KX status register (Register 1.161) <\/td>\n<\/tr>\n | ||||||
| 1832<\/td>\n | 45.2.1.104.1 PMD transmit fault ability (1.161.13) 45.2.1.104.2 PMD receive fault ability (1.161.12) 45.2.1.104.3 PMD transmit fault (1.161.11) 45.2.1.104.4 PMD receive fault (1.161.10) <\/td>\n<\/tr>\n | ||||||
| 1833<\/td>\n | 45.2.1.104.5 PMD transmit disable ability (1.161.8) 45.2.1.104.6 1000BASE-KX\/2.5GBASE-KX signal detect (1.161.0) 45.2.1.105 PMA overhead control 1, 2, and 3 registers (Register 1.162 through 1.164) <\/td>\n<\/tr>\n | ||||||
| 1834<\/td>\n | 45.2.1.106 PMA overhead status 1 and 2 registers (Register 1.165, 1.166) 45.2.1.107 BASE-R FEC ability register (Register 1.170) 45.2.1.107.1 BASE-R FEC ability (1.170.0) 45.2.1.107.2 BASE-R FEC error indication ability (1.170.1) <\/td>\n<\/tr>\n | ||||||
| 1835<\/td>\n | 45.2.1.108 BASE-R FEC control register (Register 1.171) 45.2.1.108.1 FEC enable (1.171.0) 45.2.1.108.2 FEC enable error indication (1.171.1) 45.2.1.109 Single-lane PHY BASE-R FEC corrected blocks counter (Register 1.172, 1.173) <\/td>\n<\/tr>\n | ||||||
| 1836<\/td>\n | 45.2.1.110 Single-lane PHY BASE-R FEC uncorrected blocks counter (Register 1.174, 1.175) 45.2.1.111 CAUI-4 C2M and 25GAUI C2M recommended CTLE register (Register 1.179) <\/td>\n<\/tr>\n | ||||||
| 1837<\/td>\n | 45.2.1.111.1 Recommended CTLE peaking (1.179.4:1) 45.2.1.112 25GAUI C2C and lane 0 CAUI-4 C2C transmitter equalization, receive direction register (Register 1.180) <\/td>\n<\/tr>\n | ||||||
| 1838<\/td>\n | 45.2.1.112.1 Request flag (1.180.15) 45.2.1.112.2 Post-cursor request (1.180.14:12) 45.2.1.112.3 Pre-cursor request (1.180.11:10) 45.2.1.112.4 Post-cursor remote setting (1.180.9:7) <\/td>\n<\/tr>\n | ||||||
| 1839<\/td>\n | 45.2.1.112.5 Pre-cursor remote setting (1.180.6:5) 45.2.1.112.6 Post-cursor local setting (1.180.4:2) 45.2.1.112.7 Pre-cursor local setting (1.180.1:0) 45.2.1.113 CAUI-4 chip-to-chip transmitter equalization, receive direction, lane 1 through lane 3 registers (Registers 1.181, 1.182, 1.183) 45.2.1.114 25GAUI C2C and lane 0 CAUI-4 C2C transmitter equalization, transmit direction register (Register 1.184) 45.2.1.114.1 Request flag (1.184.15) 45.2.1.114.2 Post-cursor request (1.184.14:12) <\/td>\n<\/tr>\n | ||||||
| 1840<\/td>\n | 45.2.1.114.3 Pre-cursor request (1.184.11:10) <\/td>\n<\/tr>\n | ||||||
| 1841<\/td>\n | 45.2.1.114.4 Post-cursor remote setting (1.184.9:7) 45.2.1.114.5 Pre-cursor remote setting (1.184.6:5) 45.2.1.114.6 Post-cursor local setting (1.184.4:2) 45.2.1.114.7 Pre-cursor local setting (1.184.1:0) 45.2.1.115 CAUI-4 chip-to-chip transmitter equalization, transmit direction, lane 1 through lane 3 registers (Registers 1.185, 1.186, 1.187) <\/td>\n<\/tr>\n | ||||||
| 1842<\/td>\n | 45.2.1.116 RS-FEC control register (Register 1.200) 45.2.1.116.1 FEC degraded SER enable (1.200.4) 45.2.1.116.2 Four-lane PMD (1.200.3) 45.2.1.116.3 RS-FEC enable (1.200.2) <\/td>\n<\/tr>\n | ||||||
| 1843<\/td>\n | 45.2.1.116.4 FEC bypass indication enable (1.200.1) 45.2.1.116.5 FEC bypass correction enable (1.200.0) 45.2.1.117 RS-FEC status register (Register 1.201) <\/td>\n<\/tr>\n | ||||||
| 1844<\/td>\n | 45.2.1.117.1 PCS align status (1.201.15) 45.2.1.117.2 RS-FEC align status (1.201.14) 45.2.1.117.3 FEC AM lock 3 (1.201.11) 45.2.1.117.4 FEC AM lock 2 (1.201.10) 45.2.1.117.5 FEC AM lock 1 (1.201.9) <\/td>\n<\/tr>\n | ||||||
| 1845<\/td>\n | 45.2.1.117.6 FEC AM lock 0 (1.201.8) 45.2.1.117.7 FEC optional states supported (1.201.7) 45.2.1.117.8 FEC degraded SER (1.201.4) 45.2.1.117.9 FEC degraded SER ability (1.201.3) 45.2.1.117.10 RS-FEC high SER (1.201.2) 45.2.1.117.11 FEC bypass indication ability (1.201.1) 45.2.1.117.12 FEC bypass correction ability (1.201.0) 45.2.1.118 RS-FEC corrected codewords counter (Register 1.202, 1.203) <\/td>\n<\/tr>\n | ||||||
| 1846<\/td>\n | 45.2.1.119 RS-FEC uncorrected codewords counter (Register 1.204, 1.205) 45.2.1.120 RS-FEC lane mapping register (Register 1.206) <\/td>\n<\/tr>\n | ||||||
| 1847<\/td>\n | 45.2.1.121 RS-FEC symbol error counter lane 0 (Register 1.210, 1.211) 45.2.1.122 RS-FEC symbol error counter lane 1 through 3 (Register 1.212, 1.213, 1.214, 1.215, 1.216, 1.217) 45.2.1.123 RS-FEC BIP error counter lane 0 (Register 1.230) 45.2.1.124 RS-FEC BIP error counter, lane 1 through 19 (Registers 1.231 through 1.249) <\/td>\n<\/tr>\n | ||||||
| 1848<\/td>\n | 45.2.1.125 RS-FEC PCS lane 0 mapping register (Register 1.250) 45.2.1.126 RS-FEC PCS lanes 1 through 19 mapping registers (Registers 1.251 through 1.269) 45.2.1.127 RS-FEC PCS alignment status 1 register (Register 1.280) <\/td>\n<\/tr>\n | ||||||
| 1849<\/td>\n | 45.2.1.127.1 Block lock 7 (1.280.7) 45.2.1.127.2 Block lock 6 (1.280.6) 45.2.1.127.3 Block lock 5 (1.280.5) <\/td>\n<\/tr>\n | ||||||
| 1850<\/td>\n | 45.2.1.127.4 Block lock 4 (1.280.4) 45.2.1.127.5 Block lock 3 (1.280.3) 45.2.1.127.6 Block lock 2 (1.280.2) 45.2.1.127.7 Block lock 1 (1.280.1) 45.2.1.127.8 Block lock 0 (1.280.0) 45.2.1.128 RS-FEC PCS alignment status 2 register (Register 1.281) <\/td>\n<\/tr>\n | ||||||
| 1851<\/td>\n | 45.2.1.128.1 Block lock 19 (1.281.11) 45.2.1.128.2 Block lock 18 (1.281.10) 45.2.1.128.3 Block lock 17 (1.281.9) 45.2.1.128.4 Block lock 16 (1.281.8) <\/td>\n<\/tr>\n | ||||||
| 1852<\/td>\n | 45.2.1.128.5 Block lock 15 (1.281.7) 45.2.1.128.6 Block lock 14 (1.281.6) 45.2.1.128.7 Block lock 13 (1.281.5) 45.2.1.128.8 Block lock 12 (1.281.4) 45.2.1.128.9 Block lock 11 (1.281.3) 45.2.1.128.10 Block lock 10 (1.281.2) 45.2.1.128.11 Block lock 9 (1.281.1) 45.2.1.128.12 Block lock 8 (1.281.0) 45.2.1.129 RS-FEC PCS alignment status 3 register (Register 1.282) <\/td>\n<\/tr>\n | ||||||
| 1853<\/td>\n | 45.2.1.129.1 Lane 7 aligned (1.282.7) 45.2.1.129.2 Lane 6 aligned (1.282.6) 45.2.1.129.3 Lane 5 aligned (1.282.5) <\/td>\n<\/tr>\n | ||||||
| 1854<\/td>\n | 45.2.1.129.4 Lane 4 aligned (1.282.4) 45.2.1.129.5 Lane 3 aligned (1.282.3) 45.2.1.129.6 Lane 2 aligned (1.282.2) 45.2.1.129.7 Lane 1 aligned (1.282.1) 45.2.1.129.8 Lane 0 aligned (1.282.0) 45.2.1.130 RS-FEC PCS alignment status 4 register (Register 1.283) <\/td>\n<\/tr>\n | ||||||
| 1855<\/td>\n | 45.2.1.130.1 Lane 19 aligned (1.283.11) 45.2.1.130.2 Lane 18 aligned (1.283.10) 45.2.1.130.3 Lane 17 aligned (1.283.9) <\/td>\n<\/tr>\n | ||||||
| 1856<\/td>\n | 45.2.1.130.4 Lane 16 aligned (1.283.8) 45.2.1.130.5 Lane 15 aligned (1.283.7) 45.2.1.130.6 Lane 14 aligned (1.283.6) 45.2.1.130.7 Lane 13 aligned (1.283.5) 45.2.1.130.8 Lane 12 aligned (1.283.4) 45.2.1.130.9 Lane 11 aligned (1.283.3) 45.2.1.130.10 Lane 10 aligned (1.283.2) 45.2.1.130.11 Lane 9 aligned (1.283.1) <\/td>\n<\/tr>\n | ||||||
| 1857<\/td>\n | 45.2.1.130.12 Lane 8 aligned (1.283.0) 45.2.1.131 BASE-R FEC corrected blocks counter, lanes 0 through 19 45.2.1.132 200GAUI-8 and 400GAUI-16 chip-to-module recommended CTLE, lane 0 register (Register 1.400) <\/td>\n<\/tr>\n | ||||||
| 1858<\/td>\n | 45.2.1.132.1 Recommended CTLE peaking (1.400.4:1) 45.2.1.133 200GAUI-8 and 400GAUI-16 chip-to-module recommended CTLE, lane 1 through lane 7 registers (Registers 1.401 through 1.407) 45.2.1.134 400GAUI-16 chip-to-module recommended CTLE, lane 8 through lane 15 registers (Registers 1.408 through 1.415) 45.2.1.135 50GAUI-n, 100GAUI-2, 200GAUI-n, and 400GAUI-n chip-to-chip transmitter equalization, receive direction, lane 0 register (Register 1.500) <\/td>\n<\/tr>\n | ||||||
| 1859<\/td>\n | 45.2.1.135.1 Request flag (1.500.15) 45.2.1.135.2 Post-cursor request (1.500.14:12) <\/td>\n<\/tr>\n | ||||||
| 1860<\/td>\n | 45.2.1.135.3 Pre-cursor request (1.500.11:10) 45.2.1.135.4 Post-cursor remote setting (1.500.9:7) 45.2.1.135.5 Pre-cursor remote setting (1.500.6:5) 45.2.1.135.6 Post-cursor local setting (1.500.4:2) 45.2.1.135.7 Pre-cursor local setting (1.500.1:0) 45.2.1.136 50GAUI-n, 100GAUI-2, 200GAUI-n, and 400GAUI-n chip-to-chip transmitter equalization, receive direction, lane 1 through lane 15 registers (Registers 1.501 through 1.515) <\/td>\n<\/tr>\n | ||||||
| 1861<\/td>\n | 45.2.1.137 50GAUI-n, 100GAUI-2, 200GAUI-n, and 400GAUI-n chip-to-chip transmitter equalization, transmit direction, lane 0 register (Register 1.516) <\/td>\n<\/tr>\n | ||||||
| 1862<\/td>\n | 45.2.1.137.1 Request flag (1.516.15) 45.2.1.137.2 Post-cursor request (1.516.14:12) 45.2.1.137.3 Pre-cursor request (1.516.11:10) 45.2.1.137.4 Post-cursor remote setting (1.516.9:7) 45.2.1.137.5 Pre-cursor remote setting (1.516.6:5) 45.2.1.137.6 Post-cursor local setting (1.516.4:2) <\/td>\n<\/tr>\n | ||||||
| 1863<\/td>\n | 45.2.1.137.7 Pre-cursor local setting (1.516.1:0) 45.2.1.138 50GAUI-n, 100GAUI-2, 200GAUI-n, and 400GAUI-n chip-to-chip transmitter equalization, transmit direction, lane 1 through lane 15 registers (Registers 1.517 through 1.531) 45.2.1.139 PMA precoder control Tx output (Register 1.600) 45.2.1.139.1 Lane 3 Tx output precoder enable (1.600.3) 45.2.1.139.2 Lane 2 Tx output precoder enable (1.600.2) 45.2.1.139.3 Lane 1 Tx output precoder enable (1.600.1) <\/td>\n<\/tr>\n | ||||||
| 1864<\/td>\n | 45.2.1.139.4 Lane 0 Tx output precoder enable (1.600.0) 45.2.1.140 PMA precoder control Rx input (Register 1.601) 45.2.1.140.1 Lane 3 Rx input precoder enable (1.601.3) 45.2.1.140.2 Lane 2 Rx input precoder enable (1.601.2) 45.2.1.140.3 Lane 1 Rx input precoder enable (1.601.1) 45.2.1.140.4 Lane 0 Rx input precoder enable (1.601.0) <\/td>\n<\/tr>\n | ||||||
| 1865<\/td>\n | 45.2.1.141 PMA precoder control Rx output (Register 1.602) 45.2.1.141.1 Lane 1 Rx output precoder enable (1.602.1) 45.2.1.141.2 Lane 0 Rx output precoder enable (1.602.0) 45.2.1.142 PMA precoder control Tx input (Register 1.603) 45.2.1.142.1 Lane 1 Tx input precoder enable (1.603.1) 45.2.1.142.2 Lane 0 Tx input precoder enable (1.603.0) <\/td>\n<\/tr>\n | ||||||
| 1866<\/td>\n | 45.2.1.143 PMA precoder request flag (Register 1.604) 45.2.1.143.1 Tx input precoder request flag (1.604.1) 45.2.1.143.2 Rx input precoder request flag (1.604.0) 45.2.1.144 PMA precoder request Rx input status (Register 1.605) 45.2.1.144.1 Lane 1 Rx input precoder request status (1.605.1) 45.2.1.144.2 Lane 0 Rx input precoder request status (1.605.0) <\/td>\n<\/tr>\n | ||||||
| 1867<\/td>\n | 45.2.1.145 PMA precoder request Tx input status (Register 1.606) 45.2.1.145.1 Lane 1 Tx input precoder request status(1.606.1) 45.2.1.145.2 Lane 0 Tx input precoder request status (1.606.0) 45.2.1.146 RS-FEC degraded SER activate threshold register (Register 1.650, 1.651) <\/td>\n<\/tr>\n | ||||||
| 1868<\/td>\n | 45.2.1.147 RS-FEC degraded SER deactivate threshold register (Register 1.652, 1.653) 45.2.1.148 RS-FEC degraded SER interval register (Register 1.654, 1.655) 45.2.1.149 BASE-R FEC uncorrected blocks counter, lanes 0 through 19 <\/td>\n<\/tr>\n | ||||||
| 1869<\/td>\n | 45.2.1.150 Tx optical channel control register (Register 1.800) 45.2.1.150.1 Tx optical channel index (1.800.5:0) 45.2.1.151 Tx optical channel ability 1 register (Register 1.801) <\/td>\n<\/tr>\n | ||||||
| 1870<\/td>\n | 45.2.1.151.1 Tx index ability 0 through 15 (1.801.0 through 1.801.15) 45.2.1.152 Tx optical channel ability 2 register (Register 1.802) <\/td>\n<\/tr>\n | ||||||
| 1871<\/td>\n | 45.2.1.152.1 Tx index ability 16 through 31 (1.802.0 through 1.802.15) 45.2.1.153 Tx optical channel ability 3 register (Register 1.803) <\/td>\n<\/tr>\n | ||||||
| 1872<\/td>\n | 45.2.1.153.1 Tx index ability 32 through 47 (1.803.0 through 1.803.15) <\/td>\n<\/tr>\n | ||||||
| 1873<\/td>\n | 45.2.1.154 Rx optical channel control register (Register 1.820) 45.2.1.154.1 Tx Rx different optical channel ability (1.820.15) 45.2.1.154.2 Rx optical channel index (1.820.5:0) <\/td>\n<\/tr>\n | ||||||
| 1874<\/td>\n | 45.2.1.155 Rx optical channel ability 1 register (Register 1.821) 45.2.1.155.1 Rx index ability 0 through 15 (1.821.0 through 1.821.15) <\/td>\n<\/tr>\n | ||||||
| 1875<\/td>\n | 45.2.1.156 Rx optical channel ability 2 register (Register 1.822) <\/td>\n<\/tr>\n | ||||||
| 1876<\/td>\n | 45.2.1.156.1 Rx index ability 16 through 31 (1.822.0 through 1.822.15) 45.2.1.157 Rx optical channel ability 3 register (Register 1.823) <\/td>\n<\/tr>\n | ||||||
| 1877<\/td>\n | 45.2.1.157.1 Rx index ability 32 through 47 (1.823.0 through 1.823.15) 45.2.1.158 BASE-H PMA\/PMD control register (Register 1.900) 45.2.1.158.1 Type selection (1.900.3:0) 45.2.1.159 Nx25G-EPON PMA\/PMD extended ability register (Registers 1.1000 through 1.1002) <\/td>\n<\/tr>\n | ||||||
| 1879<\/td>\n | 45.2.1.159.1 25GBASE-PQX-U3 (1.1000.15) <\/td>\n<\/tr>\n | ||||||
| 1880<\/td>\n | 45.2.1.159.2 25GBASE-PQX-U2 (1.1000.14) 45.2.1.159.3 25GBASE-PQX-D3 (1.1000.13) 45.2.1.159.4 25GBASE-PQX-D2 (1.1000.12) 45.2.1.159.5 25GBASE-PQG-U3 (1.1000.11) 45.2.1.159.6 25GBASE-PQG-U2 (1.1000.10) 45.2.1.159.7 25GBASE-PQG-D3 (1.1000.9) 45.2.1.159.8 25GBASE-PQG-D2 (1.1000.8) 45.2.1.159.9 25\/10GBASE-PQX-U3 (1.1000.7) 45.2.1.159.10 25\/10GBASE-PQX-U2 (1.1000.6) <\/td>\n<\/tr>\n | ||||||
| 1881<\/td>\n | 45.2.1.159.11 25\/10GBASE-PQX-D3 (1.1000.5) 45.2.1.159.12 25\/10GBASE-PQX-D2 (1.1000.4) 45.2.1.159.13 25\/10GBASE-PQG-U3 (1.1000.3) 45.2.1.159.14 25\/10GBASE-PQG-U2 (1.1000.2) 45.2.1.159.15 25\/10GBASE-PQG-D3 (1.1000.1) 45.2.1.159.16 25\/10GBASE-PQG-D2 (1.1000.0) 45.2.1.159.17 50\/25GBASE-PQX-U3 (1.1001.15) 45.2.1.159.18 50\/25GBASE-PQX-U2 (1.1001.14) 45.2.1.159.19 50\/25GBASE-PQX-D3 (1.1001.13) <\/td>\n<\/tr>\n | ||||||
| 1882<\/td>\n | 45.2.1.159.20 50\/25GBASE-PQX-D2 (1.1001.12) 45.2.1.159.21 50\/25GBASE-PQG-U3 (1.1001.11) 45.2.1.159.22 50\/25GBASE-PQG-U2 (1.1001.10) 45.2.1.159.23 50\/25GBASE-PQG-D3 (1.1001.9) 45.2.1.159.24 50\/25GBASE-PQG-D2 (1.1001.8) 45.2.1.159.25 50\/10GBASE-PQX-U3 (1.1001.7) 45.2.1.159.26 50\/10GBASE-PQX-U2 (1.1001.6) 45.2.1.159.27 50\/10GBASE-PQX-D3 (1.1001.5) 45.2.1.159.28 50\/10GBASE-PQX-D2 (1.1001.4) <\/td>\n<\/tr>\n | ||||||
| 1883<\/td>\n | 45.2.1.159.29 50\/10GBASE-PQG-U3 (1.1001.3) 45.2.1.159.30 50\/10GBASE-PQG-U2 (1.1001.2) 45.2.1.159.31 50\/10GBASE-PQG-D3 (1.1001.1) 45.2.1.159.32 50\/10GBASE-PQG-D2 (1.1001.0) 45.2.1.159.33 50GBASE-PQX-U3 (1.1002.7) 45.2.1.159.34 50GBASE-PQX-U2 (1.1002.6) 45.2.1.159.35 50GBASE-PQX-D3 (1.1002.5) 45.2.1.159.36 50GBASE-PQX-D2 (1.1002.4) 45.2.1.159.37 50GBASE-PQG-U3 (1.1002.3) <\/td>\n<\/tr>\n | ||||||
| 1884<\/td>\n | 45.2.1.159.38 50GBASE-PQG-U2 (1.1002.2) 45.2.1.159.39 50GBASE-PQG-D3 (1.1002.1) 45.2.1.159.40 50GBASE-PQG-D2 (1.1002.0) 45.2.1.160 BASE-R LP coefficient update register, lanes 1 through 9 (Register 1.1101, 1.1102, 1.1103, 1.1104, 1.1105, 1.1106, 1.1107, 1.1108, 1.1109) 45.2.1.161 BASE-R PAM4 PMD training LP control, lane 0 through lane 3 registers (Register 1.1120 through 1.1123) <\/td>\n<\/tr>\n | ||||||
| 1885<\/td>\n | 45.2.1.162 BASE-R LP status report register, lanes 1 through 9 (Register 1.1201, 1.1202, 1.1203, 1.1204, 1.1205, 1.1206, 1.1207, 1.1208, 1.1209) 45.2.1.163 BASE-R PAM4 PMD training LP status, lane 0 through lane 3 registers (Register 1.1220 through 1.1223) 45.2.1.164 BASE-R LD coefficient update register, lanes 1 through 9 (Register 1.1301, 1.1302, 1.1303, 1.1304, 1.1305, 1.1306, 1.1307, 1.1308, 1.1309) <\/td>\n<\/tr>\n | ||||||
| 1886<\/td>\n | 45.2.1.165 BASE-R PAM4 PMD training LD control, lane 0 through lane 3 registers (Register 1.1320 through 1.1323) <\/td>\n<\/tr>\n | ||||||
| 1887<\/td>\n | 45.2.1.166 BASE-R LD status report register, lanes 1 through 9 (Register 1.1401, 1.1402, 1.1403, 1.1404, 1.1405, 1.1406, 1.1407, 1.1408, 1.1409) <\/td>\n<\/tr>\n | ||||||
| 1888<\/td>\n | 45.2.1.167 BASE-R PAM4 PMD training LD status, lane 0 through lane 3 registers (Register 1.1420 through 1.1423) 45.2.1.168 PMD training pattern lanes 0 through 3 (Register 1.1450 through 1.1453) <\/td>\n<\/tr>\n | ||||||
| 1889<\/td>\n | 45.2.1.169 Test-pattern ability (Register 1.1500) <\/td>\n<\/tr>\n | ||||||
| 1891<\/td>\n | 45.2.1.170 PRBS pattern testing control (Register 1.1501) <\/td>\n<\/tr>\n | ||||||
| 1892<\/td>\n | 45.2.1.171 Square wave testing control (Register 1.1510) <\/td>\n<\/tr>\n | ||||||
| 1893<\/td>\n | 45.2.1.172 PRBS13Q testing control (Register 1.1512) <\/td>\n<\/tr>\n | ||||||
| 1894<\/td>\n | 45.2.1.173 PRBS Tx pattern testing error counter (Register 1.1600 through 1.1615) <\/td>\n<\/tr>\n | ||||||
| 1895<\/td>\n | 45.2.1.174 PRBS Rx pattern testing error counter (Register 1.1700 through 1.1715) 45.2.1.175 TimeSync PMA\/PMD capability (Register 1.1800) 45.2.1.176 TimeSync PMA\/PMD transmit path data delay (Registers 1.1801, 1.1802, 1.1803, 1.1804) <\/td>\n<\/tr>\n | ||||||
| 1896<\/td>\n | 45.2.1.177 TimeSync PMA\/PMD receive path data delay (Registers 1.1805, 1.1806, 1.1807, 1.1808) 45.2.1.178 10GPASS-XR control and status register (Register 1.1900) <\/td>\n<\/tr>\n | ||||||
| 1897<\/td>\n | 45.2.1.178.1 Time sync capable (1.1900.13) 45.2.1.178.2 US rate mismatch (1.1900.12) 45.2.1.178.3 DS rate mismatch (1.1900.11) <\/td>\n<\/tr>\n | ||||||
| 1898<\/td>\n | 45.2.1.178.4 Link up ready (1.1900.10) 45.2.1.178.5 Continuous pilot scaling factor (1.1900.9:3) 45.2.1.178.6 CRC40 errored blocks (1.1900.2) 45.2.1.178.7 PHY Discovery complete (1.1900.1) 45.2.1.178.8 PHY Discovery enable (1.1900.0) 45.2.1.179 DS OFDM control register (Register 1.1901) <\/td>\n<\/tr>\n | ||||||
| 1899<\/td>\n | 45.2.1.179.1 CLT tx mute (1.1901.15) 45.2.1.179.2 DS OFDM channels (1.1901.14:12) 45.2.1.179.3 DS time interleaving (1.1901.11:7) 45.2.1.179.4 DS windowing (1.1901.6:4) 45.2.1.179.5 DS cyclic prefix (1.1901.3:0) 45.2.1.180 DS OFDM channel frequency control register 1 through 5 (Register 1.1902 through 1.1906) <\/td>\n<\/tr>\n | ||||||
| 1900<\/td>\n | 45.2.1.180.1 DS OFDM freq ch 1 (1.1902.15:0) 45.2.1.180.2 DS OFDM freq ch 2 (1.1903.15:0) 45.2.1.180.3 DS OFDM freq ch 3 (1.1904.15:0) 45.2.1.180.4 DS OFDM freq ch 4 (1.1905.15:0) 45.2.1.180.5 DS OFDM freq ch 5 (1.1906.15:0) <\/td>\n<\/tr>\n | ||||||
| 1901<\/td>\n | 45.2.1.181 US OFDM control register (Register 1.1907) 45.2.1.181.1 Random seed (1.1907.15:8) 45.2.1.181.2 Resource Block size (1.1907.7) 45.2.1.181.3 US windowing (1.1907.6:4) 45.2.1.181.4 US cyclic prefix (1.1907.3:0) 45.2.1.182 US OFDM channel frequency control register (Register 1.1908) <\/td>\n<\/tr>\n | ||||||
| 1902<\/td>\n | 45.2.1.183 US OFDMA pilot pattern register (Register 1.1909) 45.2.1.183.1 Type 2 repeat (1.1909.14:12) 45.2.1.183.2 Type 2 start (1.1909.11:8) 45.2.1.183.3 Type 1 repeat (1.1909.6:4) 45.2.1.183.4 Type 1 start (1.1909.3:0) <\/td>\n<\/tr>\n | ||||||
| 1903<\/td>\n | 45.2.1.184 Profile control register (Register 1.1910) 45.2.1.184.1 US copy in process (1.1910.11) 45.2.1.184.2 US profile copy (1.1910.10) 45.2.1.184.3 US configuration ID (1.1910.9:8) <\/td>\n<\/tr>\n | ||||||
| 1904<\/td>\n | 45.2.1.184.4 DS copy channel ID (1.1910.6:4) 45.2.1.184.5 DS copy in process (1.1910.3) 45.2.1.184.6 DS profile copy (1.1910.2) 45.2.1.184.7 DS configuration ID (1.1910.1:0) 45.2.1.185 DS PHY Link control register (Register 1.1911) 45.2.1.185.1 DS PHY Link start (1.1911.11:0) 45.2.1.186 US PHY Link control register (Register 1.1912) 45.2.1.186.1 US PHY Link modulation (1.1912.15:12) <\/td>\n<\/tr>\n | ||||||
| 1905<\/td>\n | 45.2.1.186.2 US PHY Link start (1.1912.11:0) 45.2.1.187 PHY Discovery control registers (Registers 1.1913 and 1.1914) 45.2.1.188 New CNU control register (Register 1.1915) 45.2.1.188.1 CNU_ID assigned flag 1 (1.1915.15) <\/td>\n<\/tr>\n | ||||||
| 1906<\/td>\n | 45.2.1.188.2 Allowed CNU_ID (1.1915.14:0) 45.2.1.189 New CNU info registers 1 through 5 (Registers 1.1916 through 1.1920) 45.2.1.189.1 New CNU range (1.1916.15:0) 45.2.1.189.2 New CNU MAC 0 through 2 (1.1917.15:0 through 1.1919.15:0) <\/td>\n<\/tr>\n | ||||||
| 1907<\/td>\n | 45.2.1.190 DS PHY Link frame counter (Register 1.1921) 45.2.1.191 PMA\/PMD timing offset register (Registers 1.1922 and 1.1923) 45.2.1.192 PMA\/PMD power offset register (Register 1.1924) <\/td>\n<\/tr>\n | ||||||
| 1908<\/td>\n | 45.2.1.192.1 PMA\/PMD power offset (1.1924.7:0) 45.2.1.193 PMA\/PMD ranging offset registers (Registers 1.1925 and 1.1926) 45.2.1.194 DS PMA\/PMD data rate registers (Registers 1.1927, 1.1928 and 1.1929) 45.2.1.195 US PMA\/PMD data rate registers (Registers 1.1930, 1.1931 and 1.1932) <\/td>\n<\/tr>\n | ||||||
| 1909<\/td>\n | 45.2.1.196 10GPASS-XR FEC codeword counter (Registers 1.1933, 1.1934) 45.2.1.197 10GPASS-XR FEC codeword success counter (Registers 1.1935 and 1.1936) <\/td>\n<\/tr>\n | ||||||
| 1910<\/td>\n | 45.2.1.198 10GPASS-XR FEC codeword fail counter (Registers 1.1937 and 1.1938) 45.2.1.199 PHY Link EPFH counter (Register 1.1939) <\/td>\n<\/tr>\n | ||||||
| 1911<\/td>\n | 45.2.1.200 PHY Link EPFH error counter (Register 1.1940) 45.2.1.201 PHY Link EPCH counter (Register 1.1941) 45.2.1.202 PHY Link EPCH error counter (Register 1.1942) 45.2.1.203 PHY Link EMB counter (Register 1.1943) <\/td>\n<\/tr>\n | ||||||
| 1912<\/td>\n | 45.2.1.204 PHY Link EMB error counter (Register 1.1944) 45.2.1.205 PHY Link FPMB counter (Register 1.1945) 45.2.1.206 PHY Link FPMB error counter (Register 1.1946) <\/td>\n<\/tr>\n | ||||||
| 1913<\/td>\n | 45.2.1.207 US PHY Link response time register (Register 1.1947) 45.2.1.208 10GPASS-XR modulation ability register (Register 1.1948) 45.2.1.208.1 US modulation ability (1.1948.9:8) 45.2.1.208.2 DS OFDM channel ability (1.1948.7:5) 45.2.1.208.3 DS modulation ability (1.1948.4:0) <\/td>\n<\/tr>\n | ||||||
| 1914<\/td>\n | 45.2.1.209 PHY Discovery Response power control register (Register 1.1949) 45.2.1.209.1 PHY Discovery Response power step (1.1949.15:8) 45.2.1.209.2 PHY Discover Response initial power (1.1949.7:0) 45.2.1.210 US target receive power register (Register 1.1950) 45.2.1.211 DS transmit power registers (Registers 1.1951 through 1.1955) <\/td>\n<\/tr>\n | ||||||
| 1915<\/td>\n | 45.2.1.211.1 DS transmit power Ch1 (1.1951.8:0) 45.2.1.211.2 DS transmit power Ch2 (1.1952.8:0) 45.2.1.211.3 DS transmit power Ch3 (1.1953.8:0) 45.2.1.211.4 DS transmit power Ch4 (1.1954.8:0) 45.2.1.211.5 DS transmit power Ch5 (1.1955.8:0) <\/td>\n<\/tr>\n | ||||||
| 1916<\/td>\n | 45.2.1.212 US receive power measurement registers (1.1956 through 1.1957) 45.2.1.212.1 US receive power valid (1.1956.15) 45.2.1.212.2 US receive power measurement (1.1956.8:0) 45.2.1.212.3 US receive power CNU (1.1957.14:0) 45.2.1.213 Reported power register (1.1958) 45.2.1.213.1 Reported power (1.1958.8:0) <\/td>\n<\/tr>\n | ||||||
| 1917<\/td>\n | 45.2.1.214 BASE-T1 PMA\/PMD control register (Register 1.2100) 45.2.1.214.1 MASTER-SLAVE config value (1.2100.14) 45.2.1.214.2 Type selection (1.2100.3:0) <\/td>\n<\/tr>\n | ||||||
| 1918<\/td>\n | 45.2.1.215 100BASE-T1 PMA\/PMD test control register (Register 1.2102) 45.2.1.215.1 100BASE-T1 test mode control (1.2102.15:13) 45.2.1.216 IFEC control register (Register 1.2200) 45.2.1.216.1 IFEC bypass indication enable (1.2200.1) <\/td>\n<\/tr>\n | ||||||
| 1919<\/td>\n | 45.2.1.216.2 IFEC bypass correction enable (1.2200.0) 45.2.1.217 IFEC status register (Register 1.2201) 45.2.1.217.1 PCS align status (1.2201.15) <\/td>\n<\/tr>\n | ||||||
| 1920<\/td>\n | 45.2.1.217.2 IFEC align status (1.2201.14) 45.2.1.217.3 IFEC AM lock 3 (1.2201.11) 45.2.1.217.4 IFEC AM lock 2 (1.2201.10) 45.2.1.217.5 IFEC AM lock 1 (1.2201.9) 45.2.1.217.6 IFEC AM lock 0 (1.2201.8) 45.2.1.217.7 IFEC high SER (1.2201.2) 45.2.1.217.8 IFEC bypass indication ability (1.2201.1) <\/td>\n<\/tr>\n | ||||||
| 1921<\/td>\n | 45.2.1.217.9 IFEC bypass correction ability (1.2201.0) 45.2.1.218 IFEC corrected codewords counter (Register 1.2202, 1.2203) 45.2.1.219 IFEC uncorrected codewords counter (Register 1.2204, 1.2205) 45.2.1.220 IFEC lane mapping register (Register 1.2206) <\/td>\n<\/tr>\n | ||||||
| 1922<\/td>\n | 45.2.1.221 IFEC symbol error counter, lane 0 (Register 1.2210, 1.2211) 45.2.1.222 IFEC symbol error counter, lane 1 through 3 (Register 1.2212, 1.2213, 1.2214, 1.2215, 1.2216, 1.2217) 45.2.1.223 SC-FEC alignment status 1 register (Register 1.2246) <\/td>\n<\/tr>\n | ||||||
| 1923<\/td>\n | 45.2.1.223.1 SC-FEC align status (1.2246.12) 45.2.1.223.2 SC-FEC FAS lock 7 (1.2246.7) 45.2.1.223.3 SC-FEC FAS lock 6 (1.2246.6) <\/td>\n<\/tr>\n | ||||||
| 1924<\/td>\n | 45.2.1.223.4 SC-FEC FAS lock 5 (1.2246.5) 45.2.1.223.5 SC-FEC FAS lock 4 (1.2246.4) 45.2.1.223.6 SC-FEC FAS lock 3 (1.2246.3) 45.2.1.223.7 SC-FEC FAS lock 2 (1.2246.2) 45.2.1.223.8 SC-FEC FAS lock 1 (1.2246.1) 45.2.1.223.9 SC-FEC FAS lock 0 (1.2246.0) 45.2.1.224 SC-FEC alignment status 2 register (Register 1.2247) 45.2.1.224.1 SC-FEC FAS lock 19 (1.2247.11) <\/td>\n<\/tr>\n | ||||||
| 1925<\/td>\n | 45.2.1.224.2 SC-FEC FAS lock 18 (1.2247.10) 45.2.1.224.3 SC-FEC FAS lock 17 (1.2247.9) <\/td>\n<\/tr>\n | ||||||
| 1926<\/td>\n | 45.2.1.224.4 SC-FEC FAS lock 16 (1.2247.8) 45.2.1.224.5 SC-FEC FAS lock 15 (1.2247.7) 45.2.1.224.6 SC-FEC FAS lock 14 (1.2247.6) 45.2.1.224.7 SC-FEC FAS lock 13 (1.2247.5) 45.2.1.224.8 SC-FEC FAS lock 12 (1.2247.4) 45.2.1.224.9 SC-FEC FAS lock 11 (1.2247.3) 45.2.1.224.10 SC-FEC FAS lock 10 (1.2247.2) 45.2.1.224.11 SC-FEC FAS lock 9 (1.2247.1) <\/td>\n<\/tr>\n | ||||||
| 1927<\/td>\n | 45.2.1.224.12 SC-FEC FAS lock 8 (1.2247.0) 45.2.1.225 SC-FEC lane mapping, lane 0 register (Register 1.2250) 45.2.1.226 SC-FEC lane mapping, lane 1 through 19 registers (Registers 1.2251 through 1.2269) 45.2.1.227 SC-FEC corrected codewords counter (Register 1.2276, 1.2277) <\/td>\n<\/tr>\n | ||||||
| 1928<\/td>\n | 45.2.1.228 SC-FEC uncorrected codewords counter (Register 1.2278, 1.2279) 45.2.1.229 SC-FEC total bits register (Register 1.2280, 1.2281, 1.2282, 1.2283) 45.2.1.230 SC-FEC corrected bits register (Register 1.2284, 1.2285, 1.2286, 1.2287) <\/td>\n<\/tr>\n | ||||||
| 1929<\/td>\n | 45.2.1.231 10BASE-T1L PMA control register (Register 1.2294) 45.2.1.231.1 PMA reset (1.2294.15) <\/td>\n<\/tr>\n | ||||||
| 1930<\/td>\n | 45.2.1.231.2 Transmit disable (1.2294.14) 45.2.1.231.3 Transmit voltage amplitude control (1.2294.12) 45.2.1.231.4 Low-power (1.2294.11) 45.2.1.231.5 EEE enable (1.2294.10) <\/td>\n<\/tr>\n | ||||||
| 1931<\/td>\n | 45.2.1.231.6 Loopback (1.2294.0) 45.2.1.232 10BASE-T1L PMA status register (Register 1.2295) 45.2.1.232.1 Loopback ability (1.2295.13) <\/td>\n<\/tr>\n | ||||||
| 1932<\/td>\n | 45.2.1.232.2 2.4 Vpp operating mode ability (1.2295.12) 45.2.1.232.3 Low-power ability (1.2295.11) 45.2.1.232.4 EEE ability (1.2295.10) 45.2.1.232.5 Receive fault ability (1.2295.9) 45.2.1.232.6 Receive polarity (1.2295.2) 45.2.1.232.7 Receive fault (1.2295.1) 45.2.1.232.8 Receive link status (1.2295.0) 45.2.1.233 10BASE-T1L test mode control register (Register 1.2296) <\/td>\n<\/tr>\n | ||||||
| 1933<\/td>\n | 45.2.1.233.1 Test mode control (1.2296.15:13) 45.2.1.234 10BASE-T1S PMA control register (Register 1.2297) 45.2.1.234.1 PMA reset (1.2297.15) <\/td>\n<\/tr>\n | ||||||
| 1934<\/td>\n | 45.2.1.234.2 Transmit disable (1.2297.14) 45.2.1.234.3 Low-power (1.2297.11) 45.2.1.234.4 Multidrop mode (1.2297.10) 45.2.1.234.5 Loopback (1.2297.0) <\/td>\n<\/tr>\n | ||||||
| 1935<\/td>\n | 45.2.1.235 10BASE-T1S PMA status register (Register 1.2298) 45.2.1.235.1 10BASE-T1S loopback ability (1.2298.13) 45.2.1.235.2 Low-power ability (1.2298.11) 45.2.1.235.3 Multidrop ability (1.2298.10) <\/td>\n<\/tr>\n | ||||||
| 1936<\/td>\n | 45.2.1.235.4 Receive fault ability (1.2298.9) 45.2.1.235.5 Receive fault (1.2298.1) 45.2.1.236 10BASE-T1S test mode control register (Register 1.2299) 45.2.1.236.1 Test mode control (1.2299.15:13) 45.2.1.237 1000BASE-T1 PMA control register (Register 1.2304) <\/td>\n<\/tr>\n | ||||||
| 1937<\/td>\n | 45.2.1.237.1 PMA\/PMD reset (1.2304.15) 45.2.1.237.2 Transmit disable (1.2304.14) 45.2.1.237.3 Low power (1.2304.11) <\/td>\n<\/tr>\n | ||||||
| 1938<\/td>\n | 45.2.1.238 1000BASE-T1 PMA status register (Register 1.2305) 45.2.1.238.1 1000BASE-T1 OAM ability (1.2305.11) 45.2.1.238.2 EEE ability (1.2305.10) <\/td>\n<\/tr>\n | ||||||
| 1939<\/td>\n | 45.2.1.238.3 Receive fault ability (1.2305.9) 45.2.1.238.4 Low-power ability (1.2305.8) 45.2.1.238.5 Receive polarity (1.2305.2) 45.2.1.238.6 Receive fault (1.2305.1) 45.2.1.238.7 Receive link status (1.2305.0) 45.2.1.239 1000BASE-T1 training register (Register 1.2306) <\/td>\n<\/tr>\n | ||||||
| 1940<\/td>\n | 45.2.1.239.1 User field (1.2306.10:4) 45.2.1.239.2 1000BASE-T1 OAM advertisement (1.2306.1) 45.2.1.239.3 EEE advertisement (1.2306.0) 45.2.1.240 1000BASE-T1 link partner training register (Register 1.2307) 45.2.1.240.1 Link partner user field (1.2307.10:4) 45.2.1.240.2 Link partner 1000BASE-T1 OAM advertisement (1.2307.1) <\/td>\n<\/tr>\n | ||||||
| 1941<\/td>\n | 45.2.1.240.3 Link partner EEE advertisement (1.2307.0) 45.2.1.241 1000BASE-T1 test mode control register (Register 1.2308) 45.2.1.241.1 Test mode control (1.2308.15:13) 45.2.1.242 MultiGBASE-T1 PMA control register (Register 1.2309) <\/td>\n<\/tr>\n | ||||||
| 1942<\/td>\n | 45.2.1.242.1 PMA\/PMD reset (1.2309.15) 45.2.1.242.2 Transmit disable (1.2309.14) 45.2.1.242.3 Low power (1.2309.11) <\/td>\n<\/tr>\n | ||||||
| 1943<\/td>\n | 45.2.1.243 MultiGBASE-T1 PMA status register (1.2310) 45.2.1.243.1 MultiGBASE-T1 OAM ability (1.2310.11) 45.2.1.243.2 EEE ability (1.2310.10) <\/td>\n<\/tr>\n | ||||||
| 1944<\/td>\n | 45.2.1.243.3 Receive fault ability (1.2310.9) 45.2.1.243.4 Low-power ability (1.2310.8) 45.2.1.243.5 PrecodeSel (1.2310.4:3) 45.2.1.243.6 Receive polarity (1.2310.2) 45.2.1.243.7 Receive fault (1.2310.1) 45.2.1.243.8 Receive link status (1.2310.0) 45.2.1.244 MultiGBASE-T1 training register (1.2311) 45.2.1.244.1 Interleave request (1.2311.12:11) <\/td>\n<\/tr>\n | ||||||
| 1945<\/td>\n | 45.2.1.244.2 Precoder selection (1.2311.5) 45.2.1.244.3 Slow Wake request (1.2311.4) 45.2.1.244.4 User precoder selection (1.2311.3:2) <\/td>\n<\/tr>\n | ||||||
| 1946<\/td>\n | 45.2.1.244.5 MultiGBASE-T1 OAM advertisement (1.2311.1) 45.2.1.244.6 EEE advertisement (1.2311.0) 45.2.1.245 MultiGBASE-T1 link partner training register (1.2312) <\/td>\n<\/tr>\n | ||||||
| 1947<\/td>\n | 45.2.1.245.1 Link partner interleave request (1.2312.12:11) 45.2.1.245.2 Link partner Slow Wake requested (1.2312.4) 45.2.1.245.3 Link partner precoder requested (1.2312.3:2) 45.2.1.245.4 Link partner MultiGBASE-T1 OAM advertisement (1.2312.1) 45.2.1.245.5 Link partner EEE advertisement (1.2312.0) 45.2.1.246 MultiGBASE-T1 test mode control register (1.2313) 45.2.1.246.1 Test mode control (1.2313.15:13) 45.2.1.246.2 Local transmitter precoder override (1.2313.11) <\/td>\n<\/tr>\n | ||||||
| 1948<\/td>\n | 45.2.1.246.3 Local transmit precoder setting (1.2313.10:9) 45.2.1.246.4 Jitter test control (1.2313.1:0) 45.2.1.247 MultiGBASE-T1 SNR operating margin register (Register 1.2314) <\/td>\n<\/tr>\n | ||||||
| 1949<\/td>\n | 45.2.1.248 MultiGBASE-T1 minimum SNR margin register (Register 1.2315) 45.2.1.249 MultiGBASE-T1 user defined data (Register 1.2316) 45.2.1.249.1 MultiGBASE-T1 user defined data (1.2316.15:0) <\/td>\n<\/tr>\n | ||||||
| 1950<\/td>\n | 45.2.1.250 MultiGBASE-T1 link partner user defined data register (Register 1.2317) 45.2.1.250.1 MultiGBASE-T1 link partner user defined data register (1.2317.15:0) 45.2.2 WIS registers <\/td>\n<\/tr>\n | ||||||
| 1951<\/td>\n | 45.2.2.1 WIS control 1 register (Register 2.0) <\/td>\n<\/tr>\n | ||||||
| 1952<\/td>\n | 45.2.2.1.1 Reset (2.0.15) 45.2.2.1.2 Loopback (2.0.14) <\/td>\n<\/tr>\n | ||||||
| 1953<\/td>\n | 45.2.2.1.3 Low power (2.0.11) 45.2.2.1.4 Speed selection (2.0.13, 2.0.6, and 2.0.5:2) 45.2.2.2 WIS status 1 register (Register 2.1) 45.2.2.2.1 Fault (2.1.7) <\/td>\n<\/tr>\n | ||||||
| 1954<\/td>\n | 45.2.2.2.2 Link status (2.1.2) 45.2.2.2.3 Low-power ability (2.1.1) 45.2.2.3 WIS device identifier (Registers 2.2 and 2.3) 45.2.2.4 WIS speed ability (Register 2.4) 45.2.2.4.1 10G capable (2.4.0) 45.2.2.5 WIS devices in package (Registers 2.5 and 2.6) 45.2.2.6 10G WIS control 2 register (Register 2.7) <\/td>\n<\/tr>\n | ||||||
| 1955<\/td>\n | 45.2.2.6.1 PRBS31 receive test-pattern enable (2.7.5) 45.2.2.6.2 PRBS31 transmit test-pattern enable (2.7.4) 45.2.2.6.3 Test-pattern selection (2.7.3) 45.2.2.6.4 Receive test-pattern enable (2.7.2) <\/td>\n<\/tr>\n | ||||||
| 1956<\/td>\n | 45.2.2.6.5 Transmit test-pattern enable (2.7.1) 45.2.2.6.6 PCS type selection (2.7.0) 45.2.2.7 10G WIS status 2 register (Register 2.8) 45.2.2.7.1 Device present (2.8.15:14) 45.2.2.7.2 PRBS31 pattern testing ability (2.8.1) <\/td>\n<\/tr>\n | ||||||
| 1957<\/td>\n | 45.2.2.7.3 10GBASE-R ability (2.8.0) 45.2.2.8 10G WIS test-pattern error counter register (Register 2.9) 45.2.2.9 WIS package identifier (Registers 2.14 and 2.15) 45.2.2.10 10G WIS status 3 register (Register 2.33) 45.2.2.10.1 SEF (2.33.11) <\/td>\n<\/tr>\n | ||||||
| 1958<\/td>\n | 45.2.2.10.2 Far end PLM-P\/LCD-P (2.33.10) <\/td>\n<\/tr>\n | ||||||
| 1959<\/td>\n | 45.2.2.10.3 Far end AIS-P\/LOP-P (2.33.9) 45.2.2.10.4 LOF (2.33.7) 45.2.2.10.5 LOS (2.33.6) 45.2.2.10.6 RDI-L (2.33.5) 45.2.2.10.7 AIS-L (2.33.4) 45.2.2.10.8 LCD-P (2.33.3) <\/td>\n<\/tr>\n | ||||||
| 1960<\/td>\n | 45.2.2.10.9 PLM-P (2.33.2) 45.2.2.10.10 AIS-P (2.33.1) 45.2.2.10.11 LOP-P (2.33.0) 45.2.2.11 10G WIS far end path block error count (Register 2.37) 45.2.2.12 10G WIS J1 transmit (Registers 2.39 through 2.46) <\/td>\n<\/tr>\n | ||||||
| 1961<\/td>\n | 45.2.2.13 10G WIS J1 receive (Registers 2.47 through 2.54) <\/td>\n<\/tr>\n | ||||||
| 1962<\/td>\n | 45.2.2.14 10G WIS far end line BIP errors (Registers 2.55 and 2.56) <\/td>\n<\/tr>\n | ||||||
| 1963<\/td>\n | 45.2.2.15 10G WIS line BIP errors (Registers 2.57 and 2.58) 45.2.2.16 10G WIS path block error count (Register 2.59) 45.2.2.16.1 Path block error count (2.59.15:0) 45.2.2.17 10G WIS section BIP error count (Register 2.60) <\/td>\n<\/tr>\n | ||||||
| 1964<\/td>\n | 45.2.2.17.1 Section BIP error count (2.60.15:0) 45.2.2.18 10G WIS J0 transmit (Registers 2.64 through 2.71) <\/td>\n<\/tr>\n | ||||||
| 1965<\/td>\n | 45.2.2.19 10G WIS J0 receive (Registers 2.72 through 2.79) <\/td>\n<\/tr>\n | ||||||
| 1966<\/td>\n | 45.2.2.20 TimeSync WIS capability (Register 2.1800) 45.2.2.21 TimeSync WIS transmit path data delay (Registers 2.1801, 2.1802, 2.1803, 2.1804) 45.2.2.22 TimeSync WIS receive path data delay (Registers 2.1805, 2.1806, 2.1807, 2.1808) <\/td>\n<\/tr>\n | ||||||
| 1967<\/td>\n | 45.2.3 PCS registers <\/td>\n<\/tr>\n | ||||||
| 1970<\/td>\n | 45.2.3.1 PCS control 1 register (Register 3.0) <\/td>\n<\/tr>\n | ||||||
| 1971<\/td>\n | 45.2.3.1.1 Reset (3.0.15) 45.2.3.1.2 Loopback (3.0.14) 45.2.3.1.3 Low power (3.0.11) 45.2.3.1.4 Clock stop enable (3.0.10) 45.2.3.1.5 Speed selection (3.0.13, 3.0.6, 3.0.5:2) <\/td>\n<\/tr>\n | ||||||
| 1972<\/td>\n | 45.2.3.2 PCS status 1 register (Register 3.1) 45.2.3.2.1 Transmit LPI received (3.1.11) <\/td>\n<\/tr>\n | ||||||
| 1973<\/td>\n | 45.2.3.2.2 Receive LPI received (3.1.10) 45.2.3.2.3 Transmit LPI indication (3.1.9) 45.2.3.2.4 Receive LPI indication (3.1.8) 45.2.3.2.5 Fault (3.1.7) 45.2.3.2.6 Clock stop capable (3.1.6) 45.2.3.2.7 PCS receive link status (3.1.2) 45.2.3.2.8 Low-power ability (3.1.1) 45.2.3.3 PCS device identifier (Registers 3.2 and 3.3) <\/td>\n<\/tr>\n | ||||||
| 1974<\/td>\n | 45.2.3.4 PCS speed ability (Register 3.4) 45.2.3.4.1 10G capable (3.4.0) 45.2.3.4.2 10PASS-TS\/2BASE-TL capable 45.2.3.4.3 40G capable (3.4.2) <\/td>\n<\/tr>\n | ||||||
| 1975<\/td>\n | 45.2.3.4.4 100G capable (3.4.3) 45.2.3.4.5 25G capable (3.4.4) 45.2.3.4.6 50G capable (3.4.5) 45.2.3.4.7 2.5G capable (3.4.6) 45.2.3.4.8 5G Capable (3.4.7) 45.2.3.4.9 200G capable (3.4.8) 45.2.3.4.10 400G capable (3.4.9) 45.2.3.5 PCS devices in package (Registers 3.5 and 3.6) 45.2.3.6 PCS control 2 register (Register 3.7) 45.2.3.6.1 PCS type selection (3.7.4:0) <\/td>\n<\/tr>\n | ||||||
| 1976<\/td>\n | 45.2.3.7 PCS status 2 register (Register 3.8) <\/td>\n<\/tr>\n | ||||||
| 1977<\/td>\n | 45.2.3.7.1 Device present (3.8.15:14) 45.2.3.7.2 5GBASE-T capable (3.8.13) 45.2.3.7.3 2.5GBASE-T capable (3.8.12) 45.2.3.7.4 Transmit fault (3.8.11) <\/td>\n<\/tr>\n | ||||||
| 1978<\/td>\n | 45.2.3.7.5 Receive fault (3.8.10) 45.2.3.7.6 25GBASE-T capable (3.8.9) 45.2.3.7.7 50GBASE-R capable (3.8.8) 45.2.3.7.8 25GBASE-R capable (3.8.7) 45.2.3.7.9 40GBASE-T capable (3.8.6) 45.2.3.7.10 100GBASE-R capable (3.8.5) 45.2.3.7.11 40GBASE-R capable (3.8.4) 45.2.3.7.12 10GBASE-T capable (3.8.3) 45.2.3.7.13 10GBASE-W capable (3.8.2) <\/td>\n<\/tr>\n | ||||||
| 1979<\/td>\n | 45.2.3.7.14 10GBASE-X capable (3.8.1) 45.2.3.7.15 10GBASE-R capable (3.8.0) 45.2.3.8 PCS status 3 register (Register 3.9) <\/td>\n<\/tr>\n | ||||||
| 1980<\/td>\n | 45.2.3.8.1 25GBASE-PQ capable (3.9.7) 45.2.3.8.2 25\/10GBASE-PQ capable (3.9.6) 45.2.3.8.3 25GBASE-PQ Rx only capable (3.9.5) 45.2.3.8.4 25GBASE-PQ Tx only capable (3.9.4) 45.2.3.8.5 5GBASE-R capable (3.9.3) 45.2.3.8.6 2.5GBASE-X capable (3.9.2) 45.2.3.8.7 400GBASE-R capable (3.9.1) 45.2.3.8.8 200GBASE-R capable (3.9.0) 45.2.3.9 PCS package identifier (Registers 3.14 and 3.15) <\/td>\n<\/tr>\n | ||||||
| 1981<\/td>\n | 45.2.3.10 EEE control and capability 1 (Register 3.20) <\/td>\n<\/tr>\n | ||||||
| 1982<\/td>\n | 45.2.3.10.1 50GBASE-R EEE fast wake supported (3.20.14) 45.2.3.10.2 100GBASE-R EEE deep sleep supported (3.20.13) 45.2.3.10.3 100GBASE-R EEE fast wake supported (3.20.12) 45.2.3.10.4 25GBASE-R deep sleep (3.20.11) 45.2.3.10.5 25GBASE-R fast wake (3.20.10) 45.2.3.10.6 40GBASE-R EEE deep sleep supported (3.20.9) 45.2.3.10.7 40GBASE-R EEE fast wake supported (3.20.8) 45.2.3.10.8 40GBASE-T EEE supported (3.20.7) 45.2.3.10.9 10GBASE-KR EEE supported (3.20.6) 45.2.3.10.10 10GBASE-KX4 EEE supported (3.20.5) 45.2.3.10.11 1000BASE-KX EEE supported (3.20.4) 45.2.3.10.12 10GBASE-T EEE supported (3.20.3) <\/td>\n<\/tr>\n | ||||||
| 1983<\/td>\n | 45.2.3.10.13 1000BASE-T EEE supported (3.20.2) 45.2.3.10.14 100BASE-TX EEE supported (3.20.1) 45.2.3.10.15 LPI_FW (3.20.0) 45.2.3.11 EEE control and capability 2 (Register 3.21) 45.2.3.11.1 5GBASE-KR EEE supported (3.21.8) 45.2.3.11.2 2.5GBASE-KX EEE supported (3.21.7) <\/td>\n<\/tr>\n | ||||||
| 1984<\/td>\n | 45.2.3.11.3 400GBASE-R EEE fast wake supported (3.21.5) 45.2.3.11.4 200GBASE-R EEE fast wake supported (3.21.3) 45.2.3.11.5 25GBASE-T EEE supported (3.21.2) 45.2.3.11.6 5GBASE-T EEE supported (3.21.1) 45.2.3.11.7 2.5GBASE-T EEE supported (3.21.0) 45.2.3.12 EEE wake error counter (Register 3.22) 45.2.3.13 10GBASE-X PCS status register (Register 3.24) <\/td>\n<\/tr>\n | ||||||
| 1985<\/td>\n | 45.2.3.13.1 10GBASE-X receive lane alignment status (3.24.12) 45.2.3.13.2 Pattern testing ability (3.24.11) 45.2.3.13.3 Lane 3 sync (3.24.3) 45.2.3.13.4 Lane 2 sync (3.24.2) 45.2.3.13.5 Lane 1 sync (3.24.1) 45.2.3.13.6 Lane 0 sync (3.24.0) <\/td>\n<\/tr>\n | ||||||
| 1986<\/td>\n | 45.2.3.14 10GBASE-X PCS test control register (Register 3.25) 45.2.3.14.1 Transmit test-pattern enable (3.25.2) 45.2.3.14.2 Test pattern select (3.25.1:0) 45.2.3.15 BASE-R and MultiGBASE-T PCS status 1 register (Register 3.32) 45.2.3.15.1 BASE-R and MultiGBASE-T receive link status (3.32.12) <\/td>\n<\/tr>\n | ||||||
| 1987<\/td>\n | 45.2.3.15.2 PRBS9 pattern testing ability (3.32.3) 45.2.3.15.3 PRBS31 pattern testing ability (3.32.2) 45.2.3.15.4 BASE-R and MultiGBASE-T PCS high BER (3.32.1) <\/td>\n<\/tr>\n | ||||||
| 1988<\/td>\n | 45.2.3.15.5 BASE-R and MultiGBASE-T PCS block lock (3.32.0) 45.2.3.16 BASE-R and MultiGBASE-T PCS status 2 register (Register 3.33) 45.2.3.16.1 Latched block lock (3.33.15) <\/td>\n<\/tr>\n | ||||||
| 1989<\/td>\n | 45.2.3.16.2 Latched high BER (3.33.14) 45.2.3.16.3 BER (3.33.13:8) 45.2.3.16.4 Errored blocks (3.33.7:0) 45.2.3.17 5\/10\/25GBASE-R PCS test pattern seed A (Registers 3.34 through 3.37) <\/td>\n<\/tr>\n | ||||||
| 1990<\/td>\n | 45.2.3.18 5\/10\/25GBASE-R PCS test pattern seed B (Registers 3.38 through 3.41) 45.2.3.19 BASE-R PCS test-pattern control register (Register 3.42) <\/td>\n<\/tr>\n | ||||||
| 1991<\/td>\n | 45.2.3.19.1 Scrambled idle test-pattern enable (3.42.7) 45.2.3.19.2 Single Lane PHY BASE-R PRBS9 transmit test-pattern enable (3.42.6) 45.2.3.19.3 Single Lane PHY BASE-R PRBS31 receive test-pattern enable (3.42.5) <\/td>\n<\/tr>\n | ||||||
| 1992<\/td>\n | 45.2.3.19.4 Single Lane PHY BASE-R PRBS31 transmit test-pattern enable (3.42.4) 45.2.3.19.5 Transmit test-pattern enable (3.42.3) 45.2.3.19.6 Receive test-pattern enable (3.42.2) 45.2.3.19.7 Test-pattern select (3.42.1) 45.2.3.19.8 Data pattern select (3.42.0) 45.2.3.20 BASE-R PCS test-pattern error counter register (Register 3.43) <\/td>\n<\/tr>\n | ||||||
| 1993<\/td>\n | 45.2.3.21 BER high order counter (Register 3.44) 45.2.3.22 Errored blocks high order counter (Register 3.45) <\/td>\n<\/tr>\n | ||||||
| 1994<\/td>\n | 45.2.3.23 Multi-lane BASE-R PCS alignment status 1 register (Register 3.50) 45.2.3.23.1 Multi-lane BASE-R PCS alignment status (3.50.12) <\/td>\n<\/tr>\n | ||||||
| 1995<\/td>\n | 45.2.3.23.2 Block lock 7 (3.50.7) 45.2.3.23.3 Block lock 6 (3.50.6) 45.2.3.23.4 Block lock 5 (3.50.5) 45.2.3.23.5 Block lock 4 (3.50.4) 45.2.3.23.6 Block lock 3 (3.50.3) 45.2.3.23.7 Block lock 2 (3.50.2) 45.2.3.23.8 Block lock 1 (3.50.1) 45.2.3.23.9 Block lock 0 (3.50.0) 45.2.3.24 Multi-lane BASE-R PCS alignment status 2 register (Register 3.51) <\/td>\n<\/tr>\n | ||||||
| 1996<\/td>\n | 45.2.3.24.1 Block lock 19 (3.51.11) <\/td>\n<\/tr>\n | ||||||
| 1997<\/td>\n | 45.2.3.24.2 Block lock 18 (3.51.10) 45.2.3.24.3 Block lock 17 (3.51.9) 45.2.3.24.4 Block lock 16 (3.51.8) 45.2.3.24.5 Block lock 15 (3.51.7) 45.2.3.24.6 Block lock 14 (3.51.6) 45.2.3.24.7 Block lock 13 (3.51.5) 45.2.3.24.8 Block lock 12 (3.51.4) 45.2.3.24.9 Block lock 11 (3.51.3) 45.2.3.24.10 Block lock 10 (3.51.2) <\/td>\n<\/tr>\n | ||||||
| 1998<\/td>\n | 45.2.3.24.11 Block lock 9 (3.51.1) 45.2.3.24.12 Block lock 8 (3.51.0) 45.2.3.25 Multi-lane BASE-R PCS alignment status 3 register (Register 3.52) <\/td>\n<\/tr>\n | ||||||
| 1999<\/td>\n | 45.2.3.25.1 Lane 7 aligned (3.52.7) 45.2.3.25.2 Lane 6 aligned (3.52.6) 45.2.3.25.3 Lane 5 aligned (3.52.5) 45.2.3.25.4 Lane 4 aligned (3.52.4) 45.2.3.25.5 Lane 3 aligned (3.52.3) 45.2.3.25.6 Lane 2 aligned (3.52.2) 45.2.3.25.7 Lane 1 aligned (3.52.1) 45.2.3.25.8 Lane 0 aligned (3.52.0) 45.2.3.26 Multi-lane BASE-R PCS alignment status 4 register (Register 3.53) <\/td>\n<\/tr>\n | ||||||
| 2000<\/td>\n | 45.2.3.26.1 Lane 19 aligned (3.53.11) <\/td>\n<\/tr>\n | ||||||
| 2001<\/td>\n | 45.2.3.26.2 Lane 18 aligned (3.53.10) 45.2.3.26.3 Lane 17 aligned (3.53.9) 45.2.3.26.4 Lane 16 aligned (3.53.8) 45.2.3.26.5 Lane 15 aligned (3.53.7) 45.2.3.26.6 Lane 14 aligned (3.53.6) 45.2.3.26.7 Lane 13 aligned (3.53.5) 45.2.3.26.8 Lane 12 aligned (3.53.4) 45.2.3.26.9 Lane 11 aligned (3.53.3) 45.2.3.26.10 Lane 10 aligned (3.53.2) <\/td>\n<\/tr>\n | ||||||
| 2002<\/td>\n | 45.2.3.26.11 Lane 9 aligned (3.53.1) 45.2.3.26.12 Lane 8 aligned (3.53.0) 45.2.3.27 10P\/2B capability register (3.60) 45.2.3.27.1 PAF available (3.60.12) 45.2.3.27.2 Remote PAF supported (3.60.11) 45.2.3.28 10P\/2B PCS control register (Register 3.61) 45.2.3.28.1 MII receive during transmit (3.61.15) <\/td>\n<\/tr>\n | ||||||
| 2003<\/td>\n | 45.2.3.28.2 TX_EN and CRS infer a collision (3.61.14) 45.2.3.28.3 PAF enable (3.61.0) 45.2.3.29 10P\/2B PME available (Registers 3.62 and 3.63) <\/td>\n<\/tr>\n | ||||||
| 2004<\/td>\n | 45.2.3.30 10P\/2B PME aggregate registers (Registers 3.64 and 3.65) 45.2.3.31 10P\/2B PAF RX error register (Register 3.66) <\/td>\n<\/tr>\n | ||||||
| 2005<\/td>\n | 45.2.3.32 10P\/2B PAF small fragments register (Register 3.67) 45.2.3.33 10P\/2B PAF large fragments register (Register 3.68) 45.2.3.34 10P\/2B PAF overflow register (Register 3.69) <\/td>\n<\/tr>\n | ||||||
| 2006<\/td>\n | 45.2.3.35 10P\/2B PAF bad fragments register (Register 3.70) 45.2.3.36 10P\/2B PAF lost fragments register (Register 3.71) <\/td>\n<\/tr>\n | ||||||
| 2007<\/td>\n | 45.2.3.37 10P\/2B PAF lost starts of fragments register (Register 3.72) 45.2.3.38 10P\/2B PAF lost ends of fragments register (Register 3.73) 45.2.3.39 10GBASE-PR and 10\/1GBASE-PRX FEC ability register (Register 3.74) <\/td>\n<\/tr>\n | ||||||
| 2008<\/td>\n | 45.2.3.40 10GBASE-PR and 10\/1GBASE-PRX FEC control register (Register 3.75) 45.2.3.40.1 FEC enable error indication (3.75.1) 45.2.3.40.2 10 Gb\/s FEC Enable (3.75.0) 45.2.3.41 10G-EPON and Nx25G-EPON corrected FEC codewords counter (Register 3.76, 3.77) <\/td>\n<\/tr>\n | ||||||
| 2009<\/td>\n | 45.2.3.42 10G-EPON and Nx25G-EPON uncorrected FEC codewords counter (Register 3.78, 3.79) 45.2.3.43 10GBASE-PR, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor interval control register (Register 3.80) <\/td>\n<\/tr>\n | ||||||
| 2010<\/td>\n | 45.2.3.44 10GBASE-PR, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor status (Register 3.81) 45.2.3.44.1 10GBASE-PR, 10\/1GBASE-PRX, and Nx25G-EPON PCS high BER (3.81.0) <\/td>\n<\/tr>\n | ||||||
| 2011<\/td>\n | 45.2.3.44.2 10GBASE-PR, 10\/1GBASE-PRX, and Nx25G-EPON PCS latched high BER (3.81.1) 45.2.3.45 10GBASE-PR, 10\/1GBASE-PRX, and Nx25G-EPON BER monitor threshold control (Register 3.82) 45.2.3.46 Nx25G-EPON synchronization pattern registers (Registers 3.83 through 3.134) <\/td>\n<\/tr>\n | ||||||
| 2012<\/td>\n | 45.2.3.46.1 SP3 bit 257 (3.83.5) 45.2.3.46.2 SP3 balanced (3.83.4) 45.2.3.46.3 SP2 bit 257 (3.83.3) 45.2.3.46.4 SP2 balanced (3.83.2) 45.2.3.46.5 SP1 bit 257 (3.83.1) <\/td>\n<\/tr>\n | ||||||
| 2013<\/td>\n | 45.2.3.46.6 SP1 balanced (3.83.0) 45.2.3.46.7 SP1 pattern (3.84.0 through 3.99.15) 45.2.3.46.8 SP1 length (3.100.15:0) 45.2.3.46.9 SP2 pattern (3.101.0 through 3.116.15) 45.2.3.46.10 SP2 length (3.117.15:0) 45.2.3.46.11 SP3 pattern (3.118.0 through 3.133.15) 45.2.3.46.12 SP3 length (3.134.15:0) 45.2.3.47 BIP error counter lane 0 (Register 3.200) 45.2.3.48 BIP error counter, lanes 1 through 19 (Registers 3.201 through 3.219) <\/td>\n<\/tr>\n | ||||||
| 2014<\/td>\n | 45.2.3.49 Lane 0 mapping register (Register 3.400) 45.2.3.50 Lanes 1 through 19 mapping registers (Registers 3.401 through 3.419) 45.2.3.51 1000BASE-H OAM transmit registers (Registers 3.500 through 3.508) 45.2.3.51.1 TXO_REQ (3.500.15) <\/td>\n<\/tr>\n | ||||||
| 2015<\/td>\n | 45.2.3.51.2 TXO_PHYT (3.500.14) 45.2.3.51.3 TXO_MERT (3.500.13) 45.2.3.51.4 TXO_MSGT (3.500.12) 45.2.3.51.5 TXO_DATAx (Bits 3.500.11:0 and registers 3.501 through 3.508) <\/td>\n<\/tr>\n | ||||||
| 2016<\/td>\n | 45.2.3.52 1000BASE-H OAM receive registers (Registers 3.509 through 3.517) 45.2.3.52.1 RXO_VAL (3.509.15) <\/td>\n<\/tr>\n | ||||||
| 2017<\/td>\n | 45.2.3.52.2 RXO_MSGT (3.509.12) 45.2.3.52.3 RXO_DATAx (Bits 3.509.11:0 and registers 3.510 through 3.517) 45.2.3.53 1000BASE-H PCS control register (Register 3.518) 45.2.3.53.1 Operation mode (3.518.15:13) 45.2.3.53.2 Loopback mode (3.518.12:10) <\/td>\n<\/tr>\n | ||||||
| 2018<\/td>\n | 45.2.3.53.3 1000BASE-H OAM enable (3.518.1) 45.2.3.53.4 EEE enable (3.518.0) 45.2.3.54 1000BASE-H PCS status 1 register (Register 3.519) <\/td>\n<\/tr>\n | ||||||
| 2019<\/td>\n | 45.2.3.54.1 Local receiver status (3.519.15) 45.2.3.54.2 Remote receiver status (3.519.14) 45.2.3.54.3 Link status (3.519.13) 45.2.3.54.4 Local PHD reception status (3.519.12) 45.2.3.54.5 Remote PHD reception status (3.519.11) 45.2.3.54.6 PHD lock status (3.519.10) 45.2.3.54.7 THP lock status (3.519.9) <\/td>\n<\/tr>\n | ||||||
| 2020<\/td>\n | 45.2.3.54.8 Tx Assert LPI received (3.519.8) 45.2.3.54.9 Rx Assert LPI generated (3.519.7) 45.2.3.54.10 Tx LPI indication (3.519.6) 45.2.3.54.11 Rx LPI indication (3.519.5) 45.2.3.54.12 Remote 1000BASE-H OAM ability (3.519.3) 45.2.3.54.13 Remote EEE ability (3.519.2) 45.2.3.54.14 1000BASE-H OAM ability (3.519.1) <\/td>\n<\/tr>\n | ||||||
| 2021<\/td>\n | 45.2.3.54.15 EEE ability (3.519.0) 45.2.3.55 1000BASE-H PCS status 2 register (Register 3.520) 45.2.3.55.1 Local link margin (3.520.7:0) 45.2.3.56 1000BASE-H PCS status 3 register (Register 3.521) 45.2.3.56.1 Remote link margin (3.521.7:0) 45.2.3.57 1000BASE-H PCS status 4 register (Register 3.522) <\/td>\n<\/tr>\n | ||||||
| 2022<\/td>\n | 45.2.3.58 PCS FEC symbol error counter lane 0 (Register 3.600, 3.601) 45.2.3.59 PCS FEC symbol error counter lane 1 through 15 (Registers 3.602 through 3.631) <\/td>\n<\/tr>\n | ||||||
| 2023<\/td>\n | 45.2.3.60 PCS FEC control register (Register 3.800) 45.2.3.60.1 PCS FEC degraded SER enable (3.800.2) 45.2.3.60.2 PCS FEC bypass indication enable (3.800.1) 45.2.3.61 PCS FEC status register (Register 3.801) <\/td>\n<\/tr>\n | ||||||
| 2024<\/td>\n | 45.2.3.61.1 Local degraded SER received (3.801.6) 45.2.3.61.2 Remote degraded SER received (3.801.5) 45.2.3.61.3 PCS FEC degraded SER (3.801.4) 45.2.3.61.4 PCS FEC degraded SER ability (3.801.3) 45.2.3.61.5 PCS FEC high SER (3.801.2) 45.2.3.61.6 PCS FEC bypass indication ability (3.801.1) <\/td>\n<\/tr>\n | ||||||
| 2025<\/td>\n | 45.2.3.62 PCS FEC corrected codewords counter (Register 3.802, 3.803) 45.2.3.63 PCS FEC uncorrected codewords counter (Register 3.804, 3.805) 45.2.3.64 PCS FEC degraded SER activate threshold register (Register 3.806, 3.807) <\/td>\n<\/tr>\n | ||||||
| 2026<\/td>\n | 45.2.3.65 PCS FEC degraded SER deactivate threshold register (Register 3.808, 3.809) 45.2.3.66 PCS FEC degraded SER interval register (Register 3.810, 3.811) 45.2.3.67 TimeSync PCS capability (Register 3.1800) <\/td>\n<\/tr>\n | ||||||
| 2027<\/td>\n | 45.2.3.68 TimeSync PCS transmit path data delay (Registers 3.1801, 3.1802, 3.1803, 3.1804) 45.2.3.69 TimeSync PCS receive path data delay (Registers 3.1805, 3.1806, 3.1807, 3.1808) <\/td>\n<\/tr>\n | ||||||
| 2028<\/td>\n | 45.2.3.70 10BASE-T1L PCS control register (Register 3.2278) 45.2.3.70.1 PCS reset (3.2278.15) 45.2.3.70.2 Loopback (3.2278.14) 45.2.3.71 10BASE-T1L PCS status register (Register 3.2279) <\/td>\n<\/tr>\n | ||||||
| 2029<\/td>\n | 45.2.3.71.1 Tx LPI received (3.2279.11) 45.2.3.71.2 Rx LPI received (3.2279.10) 45.2.3.71.3 Tx LPI indication (3.2279.9) 45.2.3.71.4 Rx LPI indication (3.2279.8) <\/td>\n<\/tr>\n | ||||||
| 2030<\/td>\n | 45.2.3.71.5 Fault (3.2279.7) 45.2.3.71.6 PCS receive link status (3.2279.2) 45.2.3.72 10BASE-T1S PCS control register (Register 3.2291) 45.2.3.72.1 PCS reset (3.2291.15) <\/td>\n<\/tr>\n | ||||||
| 2031<\/td>\n | 45.2.3.72.2 Loopback (3.2291.14) 45.2.3.72.3 Duplex mode (3.2291.8) 45.2.3.73 10BASE-T1S PCS status register (Register 3.2292) <\/td>\n<\/tr>\n | ||||||
| 2032<\/td>\n | 45.2.3.73.1 Fault (3.2292.7) 45.2.3.73.2 Full-duplex capability (3.2292.6) 45.2.3.74 10BASE-T1S PCS diagnostic 1 (Register 3.2293) 45.2.3.74.1 Remote jabber count (3.2293.15:0) 45.2.3.75 10BASE-T1S PCS diagnostic 2 (Register 3.2294) <\/td>\n<\/tr>\n | ||||||
| 2033<\/td>\n | 45.2.3.75.1 CorruptedTxCnt (3.2294.15:0) 45.2.3.76 1000BASE-T1 PCS control register (Register 3.2304) 45.2.3.76.1 PCS reset (3.2304.15) 45.2.3.76.2 Loopback (3.2304.14) <\/td>\n<\/tr>\n | ||||||
| 2034<\/td>\n | 45.2.3.77 1000BASE-T1 PCS status 1 register (Register 3.2305) 45.2.3.77.1 Tx LPI received (3.2305.11) 45.2.3.77.2 Rx LPI received (3.2305.10) 45.2.3.77.3 Tx LPI indication (3.2305.9) <\/td>\n<\/tr>\n | ||||||
| 2035<\/td>\n | 45.2.3.77.4 Rx LPI indication (3.2305.8) 45.2.3.77.5 Fault (3.2305.7) 45.2.3.77.6 PCS receive link status (3.2305.2) 45.2.3.78 1000BASE-T1 PCS status 2 register (Register 3.2306) 45.2.3.78.1 Receive link status (3.2306.10) <\/td>\n<\/tr>\n | ||||||
| 2036<\/td>\n | 45.2.3.78.2 PCS high BER (3.2306.9) 45.2.3.78.3 PCS block lock (3.2306.8) 45.2.3.78.4 Latched high BER (3.2306.7) 45.2.3.78.5 Latched block lock (3.2306.6) 45.2.3.78.6 BER count (3.2306.5:0) 45.2.3.79 BASE-T1 OAM transmit register (Register 3.2308) <\/td>\n<\/tr>\n | ||||||
| 2037<\/td>\n | 45.2.3.79.1 BASE-T1 OAM message valid (3.2308.15) 45.2.3.79.2 Toggle value (3.2308.14) 45.2.3.79.3 BASE-T1 OAM message received (3.2308.13) 45.2.3.79.4 Received message toggle value (3.2308.12) <\/td>\n<\/tr>\n | ||||||
| 2038<\/td>\n | 45.2.3.79.5 Message number (3.2308.11:8) 45.2.3.79.6 Ping received (3.2308.3) 45.2.3.79.7 Ping transmit (3.2308.2) 45.2.3.79.8 Local SNR (3.2308.1:0) 45.2.3.80 BASE-T1 OAM message register (Registers 3.2309 to 3.2312) <\/td>\n<\/tr>\n | ||||||
| 2039<\/td>\n | 45.2.3.81 BASE-T1 OAM receive register (Register 3.2313) 45.2.3.81.1 Link partner BASE-T1 OAM message valid (3.2313.15) 45.2.3.81.2 Link partner toggle value (3.2313.14) 45.2.3.81.3 Link partner message number (3.2313.11:8) 45.2.3.81.4 Link partner SNR (3.2313.1:0) <\/td>\n<\/tr>\n | ||||||
| 2040<\/td>\n | 45.2.3.82 Link partner BASE-T1 OAM message register (Registers 3.2314 to 3.2317) 45.2.3.83 MultiGBASE-T1 OAM status message register (Register 3.2318 and 3.2319) <\/td>\n<\/tr>\n | ||||||
| 2041<\/td>\n | 45.2.3.84 Link partner MultiGBASE-T1 OAM status message register (Register 3.2320 and 3.2321) 45.2.3.85 MultiGBASE-T1 PCS control register (Register 3.2322) 45.2.3.85.1 PCS reset (3.2322.15) <\/td>\n<\/tr>\n | ||||||
| 2042<\/td>\n | 45.2.3.85.2 Loopback (3.2322.14) 45.2.3.86 MultiGBASE-T1 PCS status 1 register (Register 3.2323) <\/td>\n<\/tr>\n | ||||||
| 2043<\/td>\n | 45.2.3.86.1 Tx LPI received (3.2323.11) 45.2.3.86.2 Rx LPI received (3.2323.10) 45.2.3.86.3 Tx LPI indication (3.2323.9) 45.2.3.86.4 Rx LPI indication (3.2323.8) 45.2.3.86.5 Fault (3.2323.7) 45.2.3.86.6 PCS receive link status (3.2323.2) 45.2.3.87 MultiGBASE-T1 PCS status 2 register (Register 3.2324) 45.2.3.87.1 Receive link status (3.2324.10) <\/td>\n<\/tr>\n | ||||||
| 2044<\/td>\n | 45.2.3.87.2 PCS high RFER (3.2324.9) 45.2.3.87.3 PCS block lock (3.2324.8) 45.2.3.87.4 Latched high BER (3.2324.7) 45.2.3.87.5 Latched block lock (3.2324.6) <\/td>\n<\/tr>\n | ||||||
| 2045<\/td>\n | 45.2.3.87.6 BER count (3.2324.5:0) 45.2.4 PHY XS registers <\/td>\n<\/tr>\n | ||||||
| 2046<\/td>\n | 45.2.4.1 PHY XS control 1 register (Register 4.0) <\/td>\n<\/tr>\n | ||||||
| 2047<\/td>\n | 45.2.4.1.1 Reset (4.0.15) 45.2.4.1.2 Loopback (4.0.14) <\/td>\n<\/tr>\n | ||||||
| 2048<\/td>\n | 45.2.4.1.3 Low power (4.0.11) 45.2.4.1.4 Clock stop enable (4.0.10) 45.2.4.1.5 XAUI stop enable (4.0.9) 45.2.4.1.6 Speed selection (4.0.13, 4.0.6, 4.0.5:2) 45.2.4.2 PHY XS status 1 register (Register 4.1) <\/td>\n<\/tr>\n | ||||||
| 2049<\/td>\n | 45.2.4.2.1 Transmit LPI received (4.1.11) 45.2.4.2.2 Receive LPI received (4.1.10) 45.2.4.2.3 Transmit LPI indication (4.1.9) <\/td>\n<\/tr>\n | ||||||
| 2050<\/td>\n | 45.2.4.2.4 Receive LPI indication (4.1.8) 45.2.4.2.5 Fault (4.1.7) 45.2.4.2.6 Clock stop capable (4.1.6) 45.2.4.2.7 PHY XS transmit link status (4.1.2) 45.2.4.2.8 Low-power ability (4.1.1) 45.2.4.3 PHY XS device identifier (Registers 4.2 and 4.3) 45.2.4.4 PHY XS speed ability (Register 4.4) 45.2.4.4.1 400G capable (4.4.9) <\/td>\n<\/tr>\n | ||||||
| 2051<\/td>\n | 45.2.4.4.2 200G capable (4.4.8) 45.2.4.4.3 10G capable (4.4.0) 45.2.4.5 PHY XS devices in package (Registers 4.5 and 4.6) 45.2.4.6 PHY XS status 2 register (Register 4.8) <\/td>\n<\/tr>\n | ||||||
| 2052<\/td>\n | 45.2.4.6.1 Device present (4.8.15:14) 45.2.4.6.2 Transmit fault (4.8.11) 45.2.4.6.3 Receive fault (4.8.10) 45.2.4.7 PHY XS package identifier (Registers 4.14 and 4.15) <\/td>\n<\/tr>\n | ||||||
| 2053<\/td>\n | 45.2.4.8 EEE capability (Register 4.20) 45.2.4.8.1 PHY XS EEE supported (4.20.4) 45.2.4.8.2 XAUI stop capable (4.20.0) 45.2.4.9 EEE wake error counter (Register 4.22) 45.2.4.10 10G PHY XGXS lane status register (Register 4.24) 45.2.4.10.1 PHY XGXS transmit lane alignment status (4.24.12) <\/td>\n<\/tr>\n | ||||||
| 2054<\/td>\n | 45.2.4.10.2 Pattern testing ability (4.24.11) 45.2.4.10.3 PHY XS loopback ability (4.24.10) 45.2.4.10.4 Lane 3 sync (4.24.3) 45.2.4.10.5 Lane 2 sync (4.24.2) <\/td>\n<\/tr>\n | ||||||
| 2055<\/td>\n | 45.2.4.10.6 Lane 1 sync (4.24.1) 45.2.4.10.7 Lane 0 sync (4.24.0) 45.2.4.11 10G PHY XGXS test control register (Register 4.25) 45.2.4.11.1 10G PHY XGXS test-pattern enable (4.25.2) 45.2.4.11.2 10G PHY XGXS test-pattern select (4.25.1:0) 45.2.4.12 BASE-R PHY XS status 1 register (Register 4.32) <\/td>\n<\/tr>\n | ||||||
| 2056<\/td>\n | 45.2.4.12.1 BASE-R PHY XS receive link status (4.32.12) 45.2.4.13 BASE-R PHY XS test-pattern control register (Register 4.42) 45.2.4.13.1 Transmit test-pattern enable (4.42.3) 45.2.4.14 Multi-lane BASE-R PHY XS alignment status 1 register (Register 4.50) <\/td>\n<\/tr>\n | ||||||
| 2057<\/td>\n | 45.2.4.14.1 PHY XS lane alignment status (4.50.12) 45.2.4.15 Multi-lane BASE-R PHY XS alignment status 3 register (Register 4.52) <\/td>\n<\/tr>\n | ||||||
| 2058<\/td>\n | 45.2.4.15.1 Lane 7 aligned (4.52.7) 45.2.4.15.2 Lane 6 aligned (4.52.6) 45.2.4.15.3 Lane 5 aligned (4.52.5) 45.2.4.15.4 Lane 4 aligned (4.52.4) 45.2.4.15.5 Lane 3 aligned (4.52.3) 45.2.4.15.6 Lane 2 aligned (4.52.2) <\/td>\n<\/tr>\n | ||||||
| 2059<\/td>\n | 45.2.4.15.7 Lane 1 aligned (4.52.1) 45.2.4.15.8 Lane 0 aligned (4.52.0) 45.2.4.16 Multi-lane BASE-R PHY XS alignment status 4 register (Register 4.53) <\/td>\n<\/tr>\n | ||||||
| 2060<\/td>\n | 45.2.4.16.1 Lane 15 aligned (4.53.7) 45.2.4.16.2 Lane 14 aligned (4.53.6) 45.2.4.16.3 Lane 13 aligned (4.53.5) 45.2.4.16.4 Lane 12 aligned (4.53.4) 45.2.4.16.5 Lane 11 aligned (4.53.3) 45.2.4.16.6 Lane 10 aligned (4.53.2) 45.2.4.16.7 Lane 9 aligned (4.53.1) 45.2.4.16.8 Lane 8 aligned (4.53.0) 45.2.4.17 PHY XS lane mapping, lane 0 register (Register 4.400) <\/td>\n<\/tr>\n | ||||||
| 2061<\/td>\n | 45.2.4.18 PHY XS lane mapping, lane 1 through lane 15 registers (Registers 4.401 through 4.415) 45.2.4.19 PHY XS FEC symbol error counter lane 0 (Register 4.600, 4.601) 45.2.4.20 PHY XS FEC symbol error counter lane 1 through 15 (Registers 4.602 through 4.631) 45.2.4.21 PHY XS FEC control register (Register 4.800) <\/td>\n<\/tr>\n | ||||||
| 2062<\/td>\n | 45.2.4.21.1 PHY XS FEC degraded SER enable (4.800.2) 45.2.4.21.2 PHY XS FEC bypass indication enable (4.800.1) 45.2.4.22 PHY XS FEC status register (Register 4.801) <\/td>\n<\/tr>\n | ||||||
| 2063<\/td>\n | 45.2.4.22.1 Remote degraded SER received (4.801.5) 45.2.4.22.2 PHY XS FEC degraded SER (4.801.4) 45.2.4.22.3 PHY XS FEC degraded SER ability (4.801.3) 45.2.4.22.4 PHY XS FEC high SER (4.801.2) 45.2.4.22.5 PHY XS FEC bypass indication ability (4.801.1) <\/td>\n<\/tr>\n | ||||||
| 2064<\/td>\n | 45.2.4.23 PHY XS FEC corrected codewords counter (Register 4.802, 4.803) 45.2.4.24 PHY XS FEC uncorrected codewords counter (Register 4.804, 4.805) <\/td>\n<\/tr>\n | ||||||
| 2065<\/td>\n | 45.2.4.25 PHY XS FEC degraded SER activate threshold register (Register 4.806, 4.807) 45.2.4.26 PHY XS FEC degraded SER deactivate threshold register (Register 4.808, 4.809) 45.2.4.27 PHY XS FEC degraded SER interval register (Register 4.810, 4.811) <\/td>\n<\/tr>\n | ||||||
| 2066<\/td>\n | 45.2.4.28 TimeSync PHY XS capability (Register 4.1800) 45.2.4.29 TimeSync PHY XS transmit path data delay (Registers 4.1801, 4.1802, 4.1803, 4.1804) 45.2.4.30 TimeSync PHY XS receive path data delay (Registers 4.1805, 4.1806, 4.1807, 4.1808) <\/td>\n<\/tr>\n | ||||||
| 2067<\/td>\n | 45.2.5 DTE XS registers <\/td>\n<\/tr>\n | ||||||
| 2069<\/td>\n | 45.2.5.1 DTE XS control 1 register (Register 5.0) 45.2.5.1.1 Reset (5.0.15) <\/td>\n<\/tr>\n | ||||||
| 2070<\/td>\n | 45.2.5.1.2 Loopback (5.0.14) 45.2.5.1.3 Low power (5.0.11) 45.2.5.1.4 Clock stop enable (5.0.10) 45.2.5.1.5 XAUI stop enable (5.0.9) 45.2.5.1.6 Speed selection (5.0.13, 5.0.6, 5.0.5:2) <\/td>\n<\/tr>\n | ||||||
| 2071<\/td>\n | 45.2.5.2 DTE XS status 1 register (Register 5.1) 45.2.5.2.1 Transmit LPI received (5.1.11) 45.2.5.2.2 Receive LPI received (5.1.10) <\/td>\n<\/tr>\n | ||||||
| 2072<\/td>\n | 45.2.5.2.3 Transmit LPI indication (5.1.9) 45.2.5.2.4 Receive LPI indication (5.1.8) 45.2.5.2.5 Fault (5.1.7) 45.2.5.2.6 Clock stop capable (5.1.6) 45.2.5.2.7 DTE XS receive link status (5.1.2) 45.2.5.2.8 Low-power ability (5.1.1) 45.2.5.3 DTE XS device identifier (Registers 5.2 and 5.3) 45.2.5.4 DTE XS speed ability (Register 5.4) <\/td>\n<\/tr>\n | ||||||
| 2073<\/td>\n | 45.2.5.4.1 400G capable (5.4.9) 45.2.5.4.2 200G capable (5.4.8) 45.2.5.4.3 10G capable (5.4.0) 45.2.5.5 DTE XS devices in package (Registers 5.5 and 5.6) 45.2.5.6 DTE XS status 2 register (Register 5.8) <\/td>\n<\/tr>\n | ||||||
| 2074<\/td>\n | 45.2.5.6.1 Device present (5.8.15:14) 45.2.5.6.2 Transmit fault (5.8.11) 45.2.5.6.3 Receive fault (5.8.10) 45.2.5.7 DTE XS package identifier (Registers 5.14 and 5.15) <\/td>\n<\/tr>\n | ||||||
| 2075<\/td>\n | 45.2.5.8 EEE capability (Register 5.20) 45.2.5.8.1 PHY XS EEE supported (5.20.4) 45.2.5.8.2 XAUI stop capable (5.20.0) 45.2.5.9 EEE wake error counter (Register 5.22) 45.2.5.10 10G DTE XGXS lane status register (Register 5.24) 45.2.5.10.1 DTE XGXS receive lane alignment status (5.24.12) <\/td>\n<\/tr>\n | ||||||
| 2076<\/td>\n | 45.2.5.10.2 Pattern testing ability (5.24.11) 45.2.5.10.3 Ignored (5.24.10) 45.2.5.10.4 Lane 3 sync (5.24.3) 45.2.5.10.5 Lane 2 sync (5.24.2) 45.2.5.10.6 Lane 1 sync (5.24.1) <\/td>\n<\/tr>\n | ||||||
| 2077<\/td>\n | 45.2.5.10.7 Lane 0 sync (5.24.0) 45.2.5.11 10G DTE XGXS test control register (Register 5.25) 45.2.5.11.1 10G DTE XGXS test-pattern enable (5.25.2) 45.2.5.11.2 10G DTE XGXS test-pattern select (5.25.1:0) 45.2.5.12 BASE-R DTE XS status 1 register (Register 5.32) <\/td>\n<\/tr>\n | ||||||
| 2078<\/td>\n | 45.2.5.12.1 BASE-R DTE XS receive link status (5.32.12) 45.2.5.13 BASE-R DTE XS test-pattern control register (Register 5.42) 45.2.5.13.1 Transmit test-pattern enable (5.42.3) 45.2.5.14 Multi-lane BASE-R DTE XS alignment status 1 register (Register 5.50) <\/td>\n<\/tr>\n | ||||||
| 2079<\/td>\n | 45.2.5.14.1 DTE XS lane alignment status (5.50.12) 45.2.5.15 Multi-lane BASE-R DTE XS alignment status 3 register (Register 5.52) <\/td>\n<\/tr>\n | ||||||
| 2080<\/td>\n | 45.2.5.15.1 Lane 7 aligned (5.52.7) 45.2.5.15.2 Lane 6 aligned (5.52.6) 45.2.5.15.3 Lane 5 aligned (5.52.5) 45.2.5.15.4 Lane 4 aligned (5.52.4) 45.2.5.15.5 Lane 3 aligned (5.52.3) 45.2.5.15.6 Lane 2 aligned (5.52.2) 45.2.5.15.7 Lane 1 aligned (5.52.1) <\/td>\n<\/tr>\n | ||||||
| 2081<\/td>\n | 45.2.5.15.8 Lane 0 aligned (5.52.0) 45.2.5.16 Multi-lane BASE-R DTE XS alignment status 4 register (Register 5.53) 45.2.5.16.1 Lane 15 aligned (5.53.7) <\/td>\n<\/tr>\n | ||||||
| 2082<\/td>\n | 45.2.5.16.2 Lane 14 aligned (5.53.6) 45.2.5.16.3 Lane 13 aligned (5.53.5) 45.2.5.16.4 Lane 12 aligned (5.53.4) 45.2.5.16.5 Lane 11 aligned (5.53.3) 45.2.5.16.6 Lane 10 aligned (5.53.2) 45.2.5.16.7 Lane 9 aligned (5.53.1) 45.2.5.16.8 Lane 8 aligned (5.53.0) 45.2.5.17 DTE XS lane mapping, lane 0 register (Register 5.400) 45.2.5.18 DTE XS lane mapping, lane 1 through lane 15 registers (Registers 5.401 through 5.415) <\/td>\n<\/tr>\n | ||||||
| 2083<\/td>\n | 45.2.5.19 DTE XS FEC symbol error counter lane 0 (Register 5.600, 5.601) 45.2.5.20 DTE XS FEC symbol error counter lane 1 through 15 (Registers 5.602 through 5.631) <\/td>\n<\/tr>\n | ||||||
| 2084<\/td>\n | 45.2.5.21 DTE XS FEC control register (Register 5.800) 45.2.5.21.1 DTE XS FEC degraded SER enable (5.800.2) 45.2.5.21.2 DTE XS FEC bypass indication enable (5.800.1) 45.2.5.22 DTE XS FEC status register (Register 5.801) <\/td>\n<\/tr>\n | ||||||
| 2085<\/td>\n | 45.2.5.22.1 Local degraded SER received (5.801.6) 45.2.5.22.2 Remote degraded SER received (5.801.5) 45.2.5.22.3 DTE XS FEC degraded SER (5.801.4) 45.2.5.22.4 DTE XS FEC degraded SER ability (5.801.3) 45.2.5.22.5 DTE XS FEC high SER (5.801.2) <\/td>\n<\/tr>\n | ||||||
| 2086<\/td>\n | 45.2.5.22.6 DTE XS FEC bypass indication ability (5.801.1) 45.2.5.23 DTE XS FEC corrected codewords counter (Register 5.802, 5.803) 45.2.5.24 DTE XS FEC uncorrected codewords counter (Register 5.804, 5.805) <\/td>\n<\/tr>\n | ||||||
| 2087<\/td>\n | 45.2.5.25 DTE XS FEC degraded SER activate threshold register (Register 5.806, 5.807) 45.2.5.26 DTE XS FEC degraded SER deactivate threshold register (Register 5.808, 5.809) 45.2.5.27 DTE XS FEC degraded SER interval register (Register 5.810, 5.811) <\/td>\n<\/tr>\n | ||||||
| 2088<\/td>\n | 45.2.5.28 TimeSync DTE XS capability (Register 5.1800) 45.2.5.29 TimeSync DTE XS transmit path data delay (Registers 5.1801, 5.1802, 5.1803, 5.1804) 45.2.5.30 TimeSync DTE XS receive path data delay (Registers 5.1805, 5.1806, 5.1807, 5.1808) <\/td>\n<\/tr>\n | ||||||
| 2089<\/td>\n | 45.2.6 TC registers <\/td>\n<\/tr>\n | ||||||
| 2090<\/td>\n | 45.2.6.1 TC control register (Register 6.0) <\/td>\n<\/tr>\n | ||||||
| 2091<\/td>\n | 45.2.6.1.1 Reset (6.0.15) 45.2.6.1.2 Speed selection (6.0.13, 6.0.6, 6.0.5:2) 45.2.6.2 TC device identifier (Registers 6.2 and 6.3) 45.2.6.3 TC speed ability (Register 6.4) <\/td>\n<\/tr>\n | ||||||
| 2092<\/td>\n | 45.2.6.3.1 10PASS-TS\/2BASE-TL capable (6.4.1) 45.2.6.4 TC devices in package registers (Registers 6.5, 6.6) 45.2.6.5 TC package identifier registers (Registers 6.14, 6.15) 45.2.6.6 10P\/2B aggregation discovery control register (Register 6.16) 45.2.6.6.1 Discovery operation (6.16.1:0) <\/td>\n<\/tr>\n | ||||||
| 2093<\/td>\n | 45.2.6.7 10P\/2B aggregation and discovery status register (Register 6.17) 45.2.6.7.1 Link partner aggregate operation result (6.17.1) <\/td>\n<\/tr>\n | ||||||
| 2094<\/td>\n | 45.2.6.7.2 Discovery operation result (6.17.0) 45.2.6.8 10P\/2B aggregation discovery code (Registers 6.18, 6.19, 6.20) 45.2.6.9 10P\/2B link partner PME aggregate control register (Register 6.21) <\/td>\n<\/tr>\n | ||||||
| 2095<\/td>\n | 45.2.6.9.1 Link partner aggregate operation (6.21.1:0) 45.2.6.10 10P\/2B link partner PME aggregate data (Registers 6.22, 6.23) <\/td>\n<\/tr>\n | ||||||
| 2096<\/td>\n | 45.2.6.11 10P\/2B TC CRC error register (Register 6.24) 45.2.6.12 10P\/2B TPS-TC coding violations counter (Registers 6.25, 6.26) 45.2.6.13 10P\/2B TC indications register (Register 6.27) <\/td>\n<\/tr>\n | ||||||
| 2097<\/td>\n | 45.2.6.13.1 Local TC synchronized (6.27.8) 45.2.6.13.2 Remote TC synchronized (6.27.0) 45.2.6.14 TimeSync TC capability (Register 6.1800) 45.2.6.15 TimeSync TC transmit path data delay (Registers 6.1801, 6.1802, 6.1803, 6.1804) <\/td>\n<\/tr>\n | ||||||
| 2098<\/td>\n | 45.2.6.16 TimeSync TC receive path data delay (Registers 6.1805, 6.1806, 6.1807, 6.1808) 45.2.7 Auto-Negotiation registers <\/td>\n<\/tr>\n | ||||||
| 2099<\/td>\n | 45.2.7.1 AN control register (Register 7.0) <\/td>\n<\/tr>\n | ||||||
| 2100<\/td>\n | 45.2.7.1.1 AN reset (7.0.15) 45.2.7.1.2 Extended Next Page control (7.0.13) 45.2.7.1.3 Auto-Negotiation enable (7.0.12) <\/td>\n<\/tr>\n | ||||||
| 2101<\/td>\n | 45.2.7.1.4 Restart Auto-Negotiation (7.0.9) 45.2.7.2 AN status (Register 7.1) 45.2.7.2.1 Parallel detection fault (7.1.9) <\/td>\n<\/tr>\n | ||||||
| 2102<\/td>\n | 45.2.7.2.2 Extended Next Page status (7.1.7) 45.2.7.2.3 Page received (7.1.6) 45.2.7.2.4 Auto-Negotiation complete (7.1.5) 45.2.7.2.5 Remote fault (7.1.4) 45.2.7.2.6 Auto-Negotiation ability (7.1.3) 45.2.7.2.7 Link status (7.1.2) <\/td>\n<\/tr>\n | ||||||
| 2103<\/td>\n | 45.2.7.2.8 Link partner Auto-Negotiation ability (7.1.0) 45.2.7.3 Auto-Negotiation device identifier (Registers 7.2 and 7.3) 45.2.7.4 AN devices in package (Registers 7.5 and 7.6) 45.2.7.5 AN package identifier (Registers 7.14 and 7.15) 45.2.7.6 AN advertisement register (7.16, 7.17, and 7.18) <\/td>\n<\/tr>\n | ||||||
| 2104<\/td>\n | 45.2.7.7 AN LP Base Page ability register (7.19, 7.20, and 7.21) <\/td>\n<\/tr>\n | ||||||
| 2105<\/td>\n | 45.2.7.8 AN XNP transmit register (7.22, 7.23, and 7.24) 45.2.7.9 AN LP XNP ability register (7.25, 7.26, and 7.27) <\/td>\n<\/tr>\n | ||||||
| 2106<\/td>\n | 45.2.7.10 MultiGBASE-T AN control 1 register (Register 7.32) <\/td>\n<\/tr>\n | ||||||
| 2107<\/td>\n | 45.2.7.10.1 MASTER-SLAVE manual config enable (7.32.15) 45.2.7.10.2 MASTER-SLAVE config value (7.32.14) 45.2.7.10.3 Port type (7.32.13) <\/td>\n<\/tr>\n | ||||||
| 2108<\/td>\n | 45.2.7.10.4 10GBASE-T capability (7.32.12) 45.2.7.10.5 40GBASE-T capability (7.32.11) 45.2.7.10.6 25GBASE-T capability (7.32.10) 45.2.7.10.7 25GBASE-T Fast retrain ability (7.32.9) 45.2.7.10.8 5GBASE-T capability (7.32.8) 45.2.7.10.9 2.5GBASE-T capability (7.32.7) 45.2.7.10.10 5GBASE-T Fast retrain ability (7.32.6) 45.2.7.10.11 2.5GBASE-T Fast retrain ability (7.32.5) <\/td>\n<\/tr>\n | ||||||
| 2109<\/td>\n | 45.2.7.10.12 40GBASE-T Fast retrain ability (7.32.3) 45.2.7.10.13 10GBASE-T LD PMA training reset request (7.32.2) 45.2.7.10.14 10GBASE-T Fast retrain ability (7.32.1) 45.2.7.10.15 10GBASE-T LD loop timing ability (7.32.0) 45.2.7.11 MultiGBASE-T AN status 1 register (Register 7.33) 45.2.7.11.1 MASTER-SLAVE configuration fault (7.33.15) 45.2.7.11.2 MASTER-SLAVE configuration resolution (7.33.14) <\/td>\n<\/tr>\n | ||||||
| 2111<\/td>\n | 45.2.7.11.3 Local receiver status (7.33.13) 45.2.7.11.4 Remote receiver status (7.33.12) 45.2.7.11.5 Link partner 10GBASE-T capability (7.33.11) 45.2.7.11.6 Link partner loop timing ability (7.33.10) 45.2.7.11.7 10GBASE-T Link partner PMA training reset request (7.33.9) 45.2.7.11.8 Link partner 40GBASE-T capability (7.33.8) 45.2.7.11.9 Link partner 25GBASE-T capability (7.33.7) 45.2.7.11.10 Link partner 5GBASE-T capability (7.33.6) <\/td>\n<\/tr>\n | ||||||
| 2112<\/td>\n | 45.2.7.11.11 Link partner 2.5GBASE-T capability (7.33.5) 45.2.7.11.12 5GBASE-T Fast retrain ability (7.33.4) 45.2.7.11.13 2.5GBASE-T Fast retrain ability (7.33.3) 45.2.7.11.14 25GBASE-T Fast retrain ability (7.33.2) 45.2.7.11.15 10GBASE-T Fast retrain ability (7.33.1) 45.2.7.11.9 40GBASE-T Fast retrain ability (7.33.0) 45.2.7.12 Backplane Ethernet, BASE-R copper status (Register 7.48) <\/td>\n<\/tr>\n | ||||||
| 2113<\/td>\n | 45.2.7.12.1 BASE-R FEC negotiated (7.48.4) <\/td>\n<\/tr>\n | ||||||
| 2114<\/td>\n | 45.2.7.12.2 RS-FEC negotiated (7.48.7) 45.2.7.12.3 Negotiated Port Type (7.48.1, 7.48.2, 7.48.3, 7.48.5, 7.48.6, 7.48.8, 7.48.9, 7.48.10, 7.48.11, 7.48.12, 7.48.13, 7.48.14, 7.48.15, 7.49.0, 7.49.1, 7.49.2) 45.2.7.12.4 Backplane Ethernet, BASE-R copper AN ability (7.48.0) 45.2.7.13 Backplane Ethernet, BASE-R copper status 2 (Register 7.49) 45.2.7.13.1 Negotiated Port Type <\/td>\n<\/tr>\n | ||||||
| 2115<\/td>\n | 45.2.7.14 EEE advertisement 1 (Register 7.60) <\/td>\n<\/tr>\n | ||||||
| 2117<\/td>\n | 45.2.7.14.1 25GBASE-R EEE supported (7.60.14) 45.2.7.14.2 100GBASE-CR4 EEE supported (7.60.13) 45.2.7.14.3 100GBASE-KR4 EEE supported (7.60.12) 45.2.7.14.4 100GBASE-KP4 EEE supported (7.60.11) 45.2.7.14.5 100GBASE-CR10 EEE supported (7.60.10) 45.2.7.14.6 40GBASE-T EEE supported (7.60.9) 45.2.7.14.7 40GBASE-CR4 EEE supported (7.60.8) 45.2.7.14.8 40GBASE-KR4 EEE supported (7.60.7) 45.2.7.14.9 10GBASE-KR EEE supported (7.60.6) <\/td>\n<\/tr>\n | ||||||
| 2118<\/td>\n | 45.2.7.14.10 10GBASE-KX4 EEE supported (7.60.5) 45.2.7.14.11 1000BASE-KX EEE supported (7.60.4) 45.2.7.14.12 10GBASE-T EEE supported (7.60.3) 45.2.7.14.13 1000BASE-T EEE supported (7.60.2) 45.2.7.14.14 100BASE-TX EEE supported (7.60.1) 45.2.7.14.15 25GBASE-T EEE supported (7.60.0) 45.2.7.15 EEE link partner ability 1 (Register 7.61) <\/td>\n<\/tr>\n | ||||||
| 2120<\/td>\n | 45.2.7.16 EEE advertisement 2 (Register 7.62) <\/td>\n<\/tr>\n | ||||||
| 2121<\/td>\n | 45.2.7.16.1 5GBASE-KR EEE (7.62.3) 45.2.7.16.2 2.5GBASE-KX EEE (7.62.2) 45.2.7.16.3 5GBASE-T EEE (7.62.1) 45.2.7.16.4 2.5GBASE-T EEE (7.62.0) 45.2.7.17 EEE link partner ability 2 (Register 7.63) <\/td>\n<\/tr>\n | ||||||
| 2122<\/td>\n | 45.2.7.18 MultiGBASE-T AN control 2 (Register 7.64) 45.2.7.18.1 2.5GBASE-T THP Bypass Request <\/td>\n<\/tr>\n | ||||||
| 2123<\/td>\n | 45.2.7.18.2 5GBASE-T THP Bypass Request 45.2.7.18.3 25GBASE-T THP Bypass Request 45.2.7.18.4 40GBASE-T THP Bypass Request 45.2.7.19 MultiGBASE-T AN status 2 (Register 7.65) <\/td>\n<\/tr>\n | ||||||
| 2124<\/td>\n | 45.2.7.19.1 2.5GBASE-T Link Partner THP Bypass Request 45.2.7.19.2 5GBASE-T Link Partner THP Bypass Request 45.2.7.19.3 25GBASE-T Link Partner THP Bypass Request 45.2.7.19.4 40GBASE-T Link Partner THP Bypass Request 45.2.7.20 BASE-T1 AN control register (Register 7.512) 45.2.7.20.1 AN reset (7.512.15) <\/td>\n<\/tr>\n | ||||||
| 2125<\/td>\n | 45.2.7.20.2 Auto-Negotiation enable (7.512.12) 45.2.7.20.3 Restart Auto-Negotiation (7.512.9) <\/td>\n<\/tr>\n | ||||||
| 2126<\/td>\n | 45.2.7.21 BASE-T1 AN status (Register 7.513) 45.2.7.21.1 Page received (7.513.6) 45.2.7.21.2 Auto-Negotiation complete (7.513.5) 45.2.7.21.3 Remote fault (7.513.4) <\/td>\n<\/tr>\n | ||||||
| 2127<\/td>\n | 45.2.7.21.4 Auto-Negotiation ability (7.513.3) 45.2.7.21.5 Link status (7.513.2) 45.2.7.22 BASE-T1 AN advertisement register (Registers 7.514, 7.515, and 7.516) <\/td>\n<\/tr>\n | ||||||
| 2128<\/td>\n | 45.2.7.23 BASE-T1 AN LP Base Page ability register (Registers 7.517, 7.518, and 7.519) 45.2.7.24 BASE-T1 AN Next Page transmit register (Registers 7.520, 7.521, and 7.522) <\/td>\n<\/tr>\n | ||||||
| 2129<\/td>\n | 45.2.7.25 BASE-T1 AN LP Next Page ability register (Registers 7.523, 7.524, and 7.525) <\/td>\n<\/tr>\n | ||||||
| 2130<\/td>\n | 45.2.7.26 10BASE-T1 AN control register (Register 7.526) 45.2.7.26.1 10BASE-T1L capability advertisement (7.526.15) 45.2.7.26.2 10BASE-T1L EEE ability advertisement (7.526.14) <\/td>\n<\/tr>\n | ||||||
| 2131<\/td>\n | 45.2.7.26.3 10BASE-T1L increased transmit\/receive level ability advertisement (7.526.13) 45.2.7.26.4 10BASE-T1L increased transmit level request (7.526.12) 45.2.7.26.5 10BASE-T1S full duplex ability advertisement (7.526.7) 45.2.7.26.6 10BASE-T1S half duplex capability advertisement (7.526.6) 45.2.7.27 10BASE-T1 AN status register (Register 7.527) <\/td>\n<\/tr>\n | ||||||
| 2132<\/td>\n | 45.2.8 OFDM PMA\/PMD registers <\/td>\n<\/tr>\n | ||||||
| 2133<\/td>\n | 45.2.8.1 10GPASS-XR DS OFDM channel ID register (Register 12.0) 45.2.8.1.1 DS OFDM channel ID (12.0.2:0) 45.2.8.2 10GPASS-XR DS profile descriptor control 1 through 1023 (Registers 12.1 through 12.1023) <\/td>\n<\/tr>\n | ||||||
| 2134<\/td>\n | 45.2.8.2.1 DS modulation type SC7 (12.1.15:12) 45.2.8.2.2 DS modulation type SC6 (12.1.11:8) 45.2.8.2.3 DS modulation type SC5 (12.1.7:4) 45.2.8.2.4 DS modulation type SC4 (12.1.3:0) 45.2.8.3 10GPASS-XR US profile descriptor control 0 through 1023 registers (Registers 12.1024 through 12.2047) <\/td>\n<\/tr>\n | ||||||
| 2135<\/td>\n | 45.2.8.3.1 US modulation type SC3 (12.1024.15:12) 45.2.8.3.2 US modulation type SC2 (12.1024.11:8) 45.2.8.3.3 US modulation type SC1 (12.1024.7:4) 45.2.8.3.4 US modulation type SC0 (12.1024.3:0) 45.2.8.4 10GPASS-XR US pre-equalizer coefficients 0 through 4095 (Registers 12.2048 through 12.10239) <\/td>\n<\/tr>\n | ||||||
| 2136<\/td>\n | 45.2.8.4.1 Real pre-equalizer coefficient SC0 (12.2048.15:0) 45.2.8.4.2 Imaginary pre-equalizer coefficient SC0 (12.2049.15:0) 45.2.8.5 10GPASS-XR receive MER control registers (Registers 12.10240 and 12.10241) 45.2.8.5.1 MER measurement valid (12.10240.3) 45.2.8.5.2 Receive MER Channel ID (12.10240.2:0) 45.2.8.5.3 Receive MER CNU ID (12.10241.14:0) <\/td>\n<\/tr>\n | ||||||
| 2137<\/td>\n | 45.2.8.6 10GPASS-XR receive MER measurement registers (Registers 12.10242 through 12.12287) 45.2.8.6.1 Receive MER SC5 (12.10242.15:8) 45.2.8.6.2 Receive MER SC4 (12.10242.7:0) <\/td>\n<\/tr>\n | ||||||
| 2138<\/td>\n | 45.2.9 Power Unit registers 45.2.9.1 PoDL PSE Control register (Register 13.0) 45.2.9.1.1 Enable power classification (13.0.1) 45.2.9.1.2 PSE Enable (13.0.0) 45.2.9.2 PoDL PSE Status 1 register (Register 13.1) <\/td>\n<\/tr>\n | ||||||
| 2140<\/td>\n | 45.2.9.2.1 Power Denied (13.1.15) 45.2.9.2.2 Valid Signature (13.1.14) 45.2.9.2.3 Invalid Signature (13.1.13) 45.2.9.2.4 Class Timeout (13.1.12) 45.2.9.2.5 Overload (13.1.11) 45.2.9.2.6 MFVS Absent (13.1.10) 45.2.9.2.7 PSE Type (13.1.9:7) 45.2.9.2.8 PD Class (13.1.6:3) <\/td>\n<\/tr>\n | ||||||
| 2141<\/td>\n | 45.2.9.2.9 PSE Status (13.1.2:0) 45.2.9.3 PoDL PSE Status 2 register (Register 13.2) 45.2.9.3.1 Invalid Class (13.2.15) <\/td>\n<\/tr>\n | ||||||
| 2142<\/td>\n | 45.2.9.3.2 PD Extended Class (13.2.10:9) 45.2.9.3.3 PD Type (13.2.2:0) 45.2.9.4 PoDL PSE Status 3 register (Register 13.3) 45.2.9.4.1 PD Assigned Power (13.3.11:0) 45.2.9.5 PoDL PSE Status 4 register (Register 13.4) 45.2.9.5.1 PD Requested Power (13.4.11:0) <\/td>\n<\/tr>\n | ||||||
| 2143<\/td>\n | 45.2.10 Clause 22 extension registers 45.2.10.1 Clause 22 extension devices in package registers (Registers 29.5, 29.6) 45.2.10.2 FEC capability register (Register 29.7) 45.2.10.2.1 FEC capable (29.7.0) <\/td>\n<\/tr>\n | ||||||
| 2144<\/td>\n | 45.2.10.3 FEC control register (Register 29.8) 45.2.10.3.1 FEC enable (29.8.0) 45.2.10.4 FEC buffer head coding violation counter (Register 29.9) 45.2.10.5 FEC corrected blocks counter (Register 29.10) <\/td>\n<\/tr>\n | ||||||
| 2145<\/td>\n | 45.2.10.6 FEC uncorrected blocks counter (Register 29.11) 45.2.11 Vendor specific MMD 1 registers 45.2.11.1 Vendor specific MMD 1 device identifier (Registers 30.2 and 30.3) <\/td>\n<\/tr>\n | ||||||
| 2146<\/td>\n | 45.2.11.2 Vendor specific MMD 1 status register (Register 30.8) 45.2.11.2.1 Device present (30.8.15:14) 45.2.11.3 Vendor specific MMD 1 package identifier (Registers 30.14 and 30.15) 45.2.12 Vendor specific MMD 2 registers <\/td>\n<\/tr>\n | ||||||
| 2147<\/td>\n | 45.2.12.1 Vendor specific MMD 2 device identifier (Registers 31.2 and 31.3) 45.2.12.2 Vendor specific MMD 2 status register (Register 31.8) 45.2.12.2.1 Device present (31.8.15:14) <\/td>\n<\/tr>\n | ||||||
| 2148<\/td>\n | 45.2.12.3 Vendor specific MMD 2 package identifier (Registers 31.14 and 31.15) 45.3 Management frame structure <\/td>\n<\/tr>\n | ||||||
| 2149<\/td>\n | 45.3.1 IDLE (idle condition) 45.3.2 PRE (preamble) 45.3.3 ST (start of frame) 45.3.4 OP (operation code) 45.3.5 PRTAD (port address) 45.3.6 DEVAD (device address) 45.3.7 TA (turnaround) 45.3.8 ADDRESS \/ DATA <\/td>\n<\/tr>\n | ||||||
| 2150<\/td>\n | 45.4 Electrical interface 45.4.1 Electrical specification 45.4.2 Timing specification <\/td>\n<\/tr>\n | ||||||
| 2152<\/td>\n | 45.5 Protocol implementation conformance statement (PICS) proforma for Clause 45, Management Data Input\/Output (MDIO) Interface 45.5.1 Introduction 45.5.2 Identification 45.5.2.1 Implementation identification 45.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2153<\/td>\n | 45.5.2.3 Major capabilities\/options 45.5.3 PICS proforma tables for the Management Data Input Output (MDIO) Interface 45.5.3.1 MDIO signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 2154<\/td>\n | 45.5.3.2 PMA\/PMD MMD options <\/td>\n<\/tr>\n | ||||||
| 2156<\/td>\n | 45.5.3.3 PMA\/PMD management functions <\/td>\n<\/tr>\n | ||||||
| 2170<\/td>\n | 45.5.3.4 WIS options 45.5.3.5 WIS management functions <\/td>\n<\/tr>\n | ||||||
| 2173<\/td>\n | 45.5.3.6 PCS options <\/td>\n<\/tr>\n | ||||||
| 2174<\/td>\n | 45.5.3.7 PCS management functions <\/td>\n<\/tr>\n | ||||||
| 2187<\/td>\n | 45.5.3.8 Auto-Negotiation options 45.5.3.9 Auto-Negotiation management functions <\/td>\n<\/tr>\n | ||||||
| 2194<\/td>\n | 45.5.3.10 PHY XS options 45.5.3.11 PHY XS management functions <\/td>\n<\/tr>\n | ||||||
| 2196<\/td>\n | 45.5.3.12 DTE XS options 45.5.3.13 DTE XS management functions <\/td>\n<\/tr>\n | ||||||
| 2198<\/td>\n | 45.5.3.14 OFDM management functions 45.5.3.15 Power over Data Lines (PoDL) of Single Balanced Twisted-Pair Ethernet management functions <\/td>\n<\/tr>\n | ||||||
| 2199<\/td>\n | 45.5.3.16 Vendor specific MMD 1 management functions 45.5.3.17 Vendor specific MMD 2 management functions <\/td>\n<\/tr>\n | ||||||
| 2200<\/td>\n | 45.5.3.18 Management frame structure <\/td>\n<\/tr>\n | ||||||
| 2201<\/td>\n | 45.5.3.19 TC management functions <\/td>\n<\/tr>\n | ||||||
| 2203<\/td>\n | 45.5.3.20 Clause 22 extension options 45.5.3.21 Clause 22 extension management functions <\/td>\n<\/tr>\n | ||||||
| 2204<\/td>\n | 45.5.3.22 Signal timing characteristics 45.5.3.23 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 2205<\/td>\n | 46. Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII) 46.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2206<\/td>\n | 46.1.1 Summary of major concepts 46.1.2 Application 46.1.3 Rate of operation <\/td>\n<\/tr>\n | ||||||
| 2207<\/td>\n | 46.1.4 Delay constraints 46.1.5 Allocation of functions 46.1.6 XGMII structure <\/td>\n<\/tr>\n | ||||||
| 2208<\/td>\n | 46.1.7 Mapping of XGMII signals to PLS service primitives 46.1.7.1 Mapping of PLS_DATA.request 46.1.7.1.1 Function 46.1.7.1.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2209<\/td>\n | 46.1.7.1.3 When generated 46.1.7.1.4 Effect of receipt 46.1.7.2 Mapping of PLS_DATA.indication 46.1.7.2.1 Function 46.1.7.2.2 Semantics of the service primitive 46.1.7.2.3 When generated <\/td>\n<\/tr>\n | ||||||
| 2210<\/td>\n | 46.1.7.2.4 Effect of receipt 46.1.7.3 Mapping of PLS_CARRIER.indication 46.1.7.4 Mapping of PLS_SIGNAL.indication 46.1.7.5 Mapping of PLS_DATA_VALID.indication 46.1.7.5.1 Function 46.1.7.5.2 Semantics of the service primitive 46.1.7.5.3 When generated 46.1.7.5.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 2211<\/td>\n | 46.2 XGMII data stream 46.2.1 Inter-frame 46.2.2 Preamble and start of frame delimiter <\/td>\n<\/tr>\n | ||||||
| 2212<\/td>\n | 46.2.3 Data 46.2.4 End of frame delimiter 46.2.5 Definition of Start of Packet and End of Packet Delimiters 46.3 XGMII functional specifications <\/td>\n<\/tr>\n | ||||||
| 2213<\/td>\n | 46.3.1 Transmit 46.3.1.1 TX_CLK (transmit clock) 46.3.1.2 TXC (transmit control) 46.3.1.3 TXD (transmit data) <\/td>\n<\/tr>\n | ||||||
| 2215<\/td>\n | 46.3.1.4 Start control character alignment <\/td>\n<\/tr>\n | ||||||
| 2216<\/td>\n | 46.3.1.5 Transmit direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 2217<\/td>\n | 46.3.2 Receive 46.3.2.1 RX_CLK (receive clock) 46.3.2.2 RXC (receive control) <\/td>\n<\/tr>\n | ||||||
| 2219<\/td>\n | 46.3.2.3 RXD (receive data) 46.3.2.4 Receive direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 2220<\/td>\n | 46.3.3 Error and fault handling 46.3.3.1 Response to error indications by the XGMII 46.3.3.2 Conditions for generation of transmit Error control characters 46.3.3.3 Response to received invalid frame sequences <\/td>\n<\/tr>\n | ||||||
| 2221<\/td>\n | 46.3.4 Link fault signaling <\/td>\n<\/tr>\n | ||||||
| 2222<\/td>\n | 46.3.4.1 Conventions 46.3.4.2 Variables and counters 46.3.4.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 2223<\/td>\n | 46.4 LPI assertion and detection <\/td>\n<\/tr>\n | ||||||
| 2224<\/td>\n | 46.4.1 LPI messages 46.4.2 Transmit LPI state diagram <\/td>\n<\/tr>\n | ||||||
| 2225<\/td>\n | 46.4.2.1 Variables and counters <\/td>\n<\/tr>\n | ||||||
| 2226<\/td>\n | 46.4.3 Considerations for transmit system behavior 46.4.4 Considerations for receive system behavior 46.5 XGMII electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 2228<\/td>\n | 46.6 Protocol implementation conformance statement (PICS) proforma for Clause 46, Reconciliation Sublayer (RS) and 10 Gigabit Media Independent Interface (XGMII) 46.6.1 Introduction 46.6.2 Identification 46.6.2.1 Implementation identification 46.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2229<\/td>\n | 46.6.2.3 Major capabilities\/options 46.6.3 PICS proforma tables for Reconciliation Sublayer and 10 Gigabit Media Independent Interface 46.6.3.1 General 46.6.3.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 2230<\/td>\n | 46.6.3.3 Data stream structure <\/td>\n<\/tr>\n | ||||||
| 2231<\/td>\n | 46.6.3.4 LPI functions 46.6.3.5 Link Interruption 46.6.3.6 XGMII signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 2232<\/td>\n | 46.6.3.7 Link fault signaling state diagram <\/td>\n<\/tr>\n | ||||||
| 2233<\/td>\n | 46.6.3.8 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 2234<\/td>\n | 47. XGMII Extender Sublayer (XGXS) and 10 Gigabit Attachment Unit Interface (XAUI) 47.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2235<\/td>\n | 47.1.1 Summary of major concepts 47.1.2 Application 47.1.3 Rate of operation <\/td>\n<\/tr>\n | ||||||
| 2236<\/td>\n | 47.1.4 Allocation of functions 47.1.5 Global signal detect function 47.1.6 Global transmit disable function 47.2 Functional specifications 47.2.1 PCS and PMA functionality <\/td>\n<\/tr>\n | ||||||
| 2237<\/td>\n | 47.2.2 Delay constraints 47.3 XAUI Electrical characteristics 47.3.1 Signal levels 47.3.2 Signal paths <\/td>\n<\/tr>\n | ||||||
| 2238<\/td>\n | 47.3.3 Driver characteristics 47.3.3.1 Load 47.3.3.2 Amplitude and swing <\/td>\n<\/tr>\n | ||||||
| 2239<\/td>\n | 47.3.3.3 Transition time 47.3.3.4 Output impedance 47.3.3.5 Driver template and jitter <\/td>\n<\/tr>\n | ||||||
| 2240<\/td>\n | 47.3.4 Receiver characteristics 47.3.4.1 Bit error ratio 47.3.4.2 Reference input signals <\/td>\n<\/tr>\n | ||||||
| 2241<\/td>\n | 47.3.4.3 Input signal amplitude 47.3.4.4 AC-coupling 47.3.4.5 Input impedance 47.3.4.6 Jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 2242<\/td>\n | 47.3.4.7 EEE receiver timing 47.3.5 Interconnect characteristics 47.3.5.1 Characteristic impedance 47.3.5.2 Connector impedance <\/td>\n<\/tr>\n | ||||||
| 2243<\/td>\n | 47.4 Electrical measurement requirements 47.4.1 Compliance interconnect definition <\/td>\n<\/tr>\n | ||||||
| 2244<\/td>\n | 47.4.2 Eye template measurements <\/td>\n<\/tr>\n | ||||||
| 2245<\/td>\n | 47.4.3 Jitter test requirements 47.4.3.1 Transmit jitter 47.4.3.2 Jitter tolerance 47.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2246<\/td>\n | 47.6 Protocol implementation conformance statement (PICS) proforma for Clause 47, XGMII Extender (XGMII) and 10 Gigabit Attachment Unit Interface (XAUI) 47.6.1 Introduction 47.6.2 Identification 47.6.2.1 Implementation identification 47.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2247<\/td>\n | 47.6.3 Major capabilities\/options 47.6.4 PICS proforma tables for XGXS and XAUI 47.6.4.1 Compatibility considerations 47.6.4.2 XGXS and XAUI functions 47.6.4.3 Electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 2248<\/td>\n | 47.6.4.4 LPI functions <\/td>\n<\/tr>\n | ||||||
| 2249<\/td>\n | 48. Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 10GBASE-X 48.1 Overview 48.1.1 Objectives <\/td>\n<\/tr>\n | ||||||
| 2250<\/td>\n | 48.1.2 Relationship of 10GBASE-X to other standards 48.1.3 Summary of 10GBASE-X sublayers 48.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 2251<\/td>\n | 48.1.3.2 Physical Medium Attachment (PMA) sublayer 48.1.3.3 Physical Medium Dependent (PMD) sublayer 48.1.4 Rate of operation 48.1.5 Allocation of functions <\/td>\n<\/tr>\n | ||||||
| 2252<\/td>\n | 48.1.6 Inter-sublayer interfaces 48.1.7 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 2253<\/td>\n | 48.1.8 Special symbols 48.2 Physical Coding Sublayer (PCS) 48.2.1 PCS service interface (XGMII) 48.2.2 Functions within the PCS <\/td>\n<\/tr>\n | ||||||
| 2254<\/td>\n | 48.2.3 Use of code-groups <\/td>\n<\/tr>\n | ||||||
| 2256<\/td>\n | 48.2.4 Ordered sets and special code-groups 48.2.4.1 Data (\/D\/) <\/td>\n<\/tr>\n | ||||||
| 2258<\/td>\n | 48.2.4.2 Idle (||I||) and Low Power Idle (||LPIDLE||) <\/td>\n<\/tr>\n | ||||||
| 2259<\/td>\n | 48.2.4.2.1 Sync ||K|| <\/td>\n<\/tr>\n | ||||||
| 2260<\/td>\n | 48.2.4.2.2 Align ||A|| 48.2.4.2.3 Skip ||R|| <\/td>\n<\/tr>\n | ||||||
| 2261<\/td>\n | 48.2.4.3 Encapsulation 48.2.4.3.1 Start ||S|| 48.2.4.3.2 Terminate ||T|| 48.2.4.4 Error \/E\/ 48.2.4.5 Link status <\/td>\n<\/tr>\n | ||||||
| 2262<\/td>\n | 48.2.4.5.1 Sequence ||Q|| 48.2.5 Management function requirements <\/td>\n<\/tr>\n | ||||||
| 2263<\/td>\n | 48.2.6 Detailed functions and state diagrams 48.2.6.1 State variables 48.2.6.1.1 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 2264<\/td>\n | 48.2.6.1.2 Constants <\/td>\n<\/tr>\n | ||||||
| 2265<\/td>\n | 48.2.6.1.3 Variables <\/td>\n<\/tr>\n | ||||||
| 2268<\/td>\n | 48.2.6.1.4 Functions <\/td>\n<\/tr>\n | ||||||
| 2269<\/td>\n | 48.2.6.1.5 Counters 48.2.6.1.6 Timers <\/td>\n<\/tr>\n | ||||||
| 2270<\/td>\n | 48.2.6.1.7 Messages <\/td>\n<\/tr>\n | ||||||
| 2271<\/td>\n | 48.2.6.2 State diagrams 48.2.6.2.1 Transmit 48.2.6.2.2 Synchronization <\/td>\n<\/tr>\n | ||||||
| 2273<\/td>\n | 48.2.6.2.3 Deskew 48.2.6.2.4 Receive 48.2.6.2.5 LPI state diagrams <\/td>\n<\/tr>\n | ||||||
| 2279<\/td>\n | 48.2.6.2.6 LPI status and management <\/td>\n<\/tr>\n | ||||||
| 2280<\/td>\n | 48.2.6.3 Initialization process 48.2.6.4 Link status reporting 48.2.6.4.1 Link status detection 48.2.6.4.2 Link status signaling 48.2.6.4.3 Link status messages 48.2.7 Auto-Negotiation for Backplane Ethernet 48.3 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 2281<\/td>\n | 48.3.1 Functions within the PMA 48.3.1.1 PMA transmit process 48.3.1.2 PMA receive process <\/td>\n<\/tr>\n | ||||||
| 2282<\/td>\n | 48.3.2 Service interface 48.3.2.1 PMA_UNITDATA.request 48.3.2.1.1 Semantics of the service primitive 48.3.2.1.2 When generated 48.3.2.1.3 Effect of receipt 48.3.2.2 PMA_UNITDATA.indication 48.3.2.2.1 Semantics of the service primitive 48.3.2.2.2 When generated 48.3.2.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 2283<\/td>\n | 48.3.3 Loopback mode 48.3.3.1 Receiver considerations 48.3.3.2 Transmitter considerations 48.3.4 Test functions 48.4 Compatibility considerations 48.5 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 2284<\/td>\n | 48.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2285<\/td>\n | 48.7 Protocol implementation conformance statement (PICS) proforma for Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer, type 10GBASE-X 48.7.1 Introduction 48.7.2 Identification 48.7.2.1 Implementation identification 48.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2286<\/td>\n | 48.7.3 Major capabilities\/options 48.7.4 PICS proforma tables for the PCS and PMA sublayer, type 10GBASE-X 48.7.4.1 Compatibility considerations 48.7.4.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 2287<\/td>\n | 48.7.4.3 PMA functions 48.7.4.4 Interface functions <\/td>\n<\/tr>\n | ||||||
| 2288<\/td>\n | 48.7.4.5 LPI functions <\/td>\n<\/tr>\n | ||||||
| 2289<\/td>\n | 49. Physical Coding Sublayer (PCS) for 64B\/66B, type 10GBASE-R 49.1 Overview 49.1.1 Scope 49.1.2 Objectives 49.1.3 Relationship of 10GBASE-R to other standards <\/td>\n<\/tr>\n | ||||||
| 2290<\/td>\n | 49.1.4 Summary of 10GBASE-R and 10GBASE-W sublayers 49.1.4.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 2291<\/td>\n | 49.1.4.2 WAN Interface Sublayer (WIS) 49.1.4.3 Physical Medium Attachment (PMA) sublayer 49.1.4.4 Physical Medium Dependent (PMD) sublayer 49.1.4.5 Bit ordering across 10GBASE-R and 10GBASE-W sublayers. <\/td>\n<\/tr>\n | ||||||
| 2292<\/td>\n | 49.1.5 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 2293<\/td>\n | 49.1.6 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 2294<\/td>\n | 49.2 Physical Coding Sublayer (PCS) 49.2.1 PCS service interface (XGMII) 49.2.2 Functions within the PCS <\/td>\n<\/tr>\n | ||||||
| 2295<\/td>\n | 49.2.3 Use of blocks 49.2.4 64B\/66B transmission code 49.2.4.1 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 2296<\/td>\n | 49.2.4.2 Transmission order 49.2.4.3 Block structure <\/td>\n<\/tr>\n | ||||||
| 2298<\/td>\n | 49.2.4.4 Control codes 49.2.4.5 Ordered sets <\/td>\n<\/tr>\n | ||||||
| 2299<\/td>\n | 49.2.4.6 Valid and invalid blocks 49.2.4.7 Idle (\/I\/) and Low Power Idle (\/LI\/) <\/td>\n<\/tr>\n | ||||||
| 2300<\/td>\n | 49.2.4.8 Start (\/S\/) 49.2.4.9 Terminate (\/T\/) 49.2.4.10 ordered set (\/O\/) 49.2.4.11 Error (\/E\/) <\/td>\n<\/tr>\n | ||||||
| 2301<\/td>\n | 49.2.5 Transmit process 49.2.6 Scrambler <\/td>\n<\/tr>\n | ||||||
| 2302<\/td>\n | 49.2.7 Gearbox 49.2.8 Test-pattern generators <\/td>\n<\/tr>\n | ||||||
| 2303<\/td>\n | 49.2.9 Block synchronization 49.2.10 Descrambler 49.2.11 Receive process <\/td>\n<\/tr>\n | ||||||
| 2304<\/td>\n | 49.2.12 Test-pattern checker <\/td>\n<\/tr>\n | ||||||
| 2305<\/td>\n | 49.2.13 Detailed functions and state diagrams 49.2.13.1 State diagram conventions 49.2.13.2 State variables 49.2.13.2.1 Constants 49.2.13.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2307<\/td>\n | 49.2.13.2.3 Functions <\/td>\n<\/tr>\n | ||||||
| 2309<\/td>\n | 49.2.13.2.4 Counters 49.2.13.2.5 Timers <\/td>\n<\/tr>\n | ||||||
| 2310<\/td>\n | 49.2.13.3 State diagrams 49.2.13.3.1 LPI state diagrams <\/td>\n<\/tr>\n | ||||||
| 2313<\/td>\n | 49.2.14 PCS Management 49.2.14.1 Status <\/td>\n<\/tr>\n | ||||||
| 2314<\/td>\n | 49.2.14.2 Counters 49.2.14.3 Test mode control 49.2.14.4 Loopback 49.2.15 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 2315<\/td>\n | 49.2.16 Auto-Negotiation for Backplane Ethernet <\/td>\n<\/tr>\n | ||||||
| 2319<\/td>\n | 49.3 Protocol implementation conformance statement (PICS) proforma for Clause 49, Physical Coding Sublayer (PCS) type 10GBASE-R 49.3.1 Introduction 49.3.2 Identification 49.3.2.1 Implementation identification 49.3.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2320<\/td>\n | 49.3.3 Major capabilities\/options 49.3.4 PICS Proforma Tables for PCS, type 10GBASE-R 49.3.4.1 Coding rules <\/td>\n<\/tr>\n | ||||||
| 2321<\/td>\n | 49.3.4.2 Scrambler and Descrambler 49.3.5 Test-pattern modes <\/td>\n<\/tr>\n | ||||||
| 2322<\/td>\n | 49.3.5.1 Bit order 49.3.6 Management 49.3.6.1 State diagrams 49.3.6.2 WIS <\/td>\n<\/tr>\n | ||||||
| 2323<\/td>\n | 49.3.6.3 Loopback 49.3.6.4 Delay Constraints 49.3.6.5 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n | ||||||
| 2324<\/td>\n | 49.3.6.6 LPI functions <\/td>\n<\/tr>\n | ||||||
| 2325<\/td>\n | 50. WAN Interface Sublayer (WIS), type 10GBASE-W 50.1 Overview 50.1.1 Scope <\/td>\n<\/tr>\n | ||||||
| 2326<\/td>\n | 50.1.2 Objectives <\/td>\n<\/tr>\n | ||||||
| 2327<\/td>\n | 50.1.3 Relationship to other sublayers 50.1.4 Summary of functions <\/td>\n<\/tr>\n | ||||||
| 2328<\/td>\n | 50.1.5 Sublayer interfaces 50.1.6 Functional block diagram 50.1.7 Notational conventions <\/td>\n<\/tr>\n | ||||||
| 2329<\/td>\n | 50.2 WIS Service Interface 50.2.1 WIS_UNITDATA.request 50.2.1.1 Semantics of the service primitive 50.2.1.2 When generated <\/td>\n<\/tr>\n | ||||||
| 2330<\/td>\n | 50.2.1.3 Effect of receipt 50.2.2 WIS_UNITDATA.indication 50.2.2.1 Semantics of the service primitive 50.2.2.2 When generated 50.2.2.3 Effect of receipt 50.2.3 WIS_SIGNAL.request 50.2.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2331<\/td>\n | 50.2.3.2 When generated 50.2.3.3 Effect of receipt 50.2.4 WIS_SIGNAL.indication 50.2.4.1 Semantics of the service primitive 50.2.4.2 When generated 50.2.4.3 Effect of receipt 50.3 Functions within the WIS <\/td>\n<\/tr>\n | ||||||
| 2333<\/td>\n | 50.3.1 Payload mapping and data-unit delineation <\/td>\n<\/tr>\n | ||||||
| 2334<\/td>\n | 50.3.1.1 Transmit payload mapping <\/td>\n<\/tr>\n | ||||||
| 2335<\/td>\n | 50.3.1.2 Receive payload mapping 50.3.2 WIS frame generation <\/td>\n<\/tr>\n | ||||||
| 2336<\/td>\n | 50.3.2.1 Transmit Path Overhead insertion <\/td>\n<\/tr>\n | ||||||
| 2337<\/td>\n | 50.3.2.2 Transmit Line Overhead insertion <\/td>\n<\/tr>\n | ||||||
| 2338<\/td>\n | 50.3.2.3 Transmit Section Overhead insertion <\/td>\n<\/tr>\n | ||||||
| 2339<\/td>\n | 50.3.2.4 Receive Path, Line, and Section Overhead extraction <\/td>\n<\/tr>\n | ||||||
| 2340<\/td>\n | 50.3.2.5 Fault processing <\/td>\n<\/tr>\n | ||||||
| 2341<\/td>\n | 50.3.3 Scrambling <\/td>\n<\/tr>\n | ||||||
| 2342<\/td>\n | 50.3.3.1 Scrambler polynomial 50.3.3.2 Scrambler bit ordering 50.3.4 Octet and frame delineation 50.3.5 Error propagation <\/td>\n<\/tr>\n | ||||||
| 2343<\/td>\n | 50.3.5.1 Propagated errors 50.3.5.2 Error propagation timing 50.3.5.3 Loss of Code-group Delineation 50.3.6 Mapping between WIS and PMA <\/td>\n<\/tr>\n | ||||||
| 2344<\/td>\n | 50.3.7 WIS data delay constraints <\/td>\n<\/tr>\n | ||||||
| 2345<\/td>\n | 50.3.8 WIS test-pattern generator and checker 50.3.8.1 Square wave test pattern 50.3.8.2 PRBS31 test pattern <\/td>\n<\/tr>\n | ||||||
| 2346<\/td>\n | 50.3.8.3 Mixed-frequency test pattern <\/td>\n<\/tr>\n | ||||||
| 2347<\/td>\n | 50.3.8.3.1 Test Signal Structure (TSS) <\/td>\n<\/tr>\n | ||||||
| 2348<\/td>\n | 50.3.8.3.2 Continuous Identical Digits 50.3.9 Loopback 50.3.10 Link status 50.3.11 Management interface <\/td>\n<\/tr>\n | ||||||
| 2349<\/td>\n | 50.3.11.1 Management registers 50.3.11.2 WIS managed object class 50.3.11.3 Management support objects <\/td>\n<\/tr>\n | ||||||
| 2350<\/td>\n | 50.4 Synchronization state diagram 50.4.1 State diagram variables 50.4.1.1 Constants <\/td>\n<\/tr>\n | ||||||
| 2351<\/td>\n | 50.4.1.2 Variables 50.4.1.3 Functions <\/td>\n<\/tr>\n | ||||||
| 2352<\/td>\n | 50.4.1.4 Counters 50.4.2 State diagram <\/td>\n<\/tr>\n | ||||||
| 2354<\/td>\n | 50.4.3 Parameter values 50.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2356<\/td>\n | 50.6 Protocol implementation conformance statement (PICS) proforma for Clause 50, WAN Interface Sublayer (WIS), type 10GBASE-W 50.6.1 Introduction 50.6.2 Identification 50.6.2.1 Implementation identification 50.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2357<\/td>\n | 50.6.3 Major capabilities\/options 50.6.4 PICS proforma tables for the WAN Interface Sublayer (WIS), type 10GBASE-W 50.6.4.1 Compatibility considerations 50.6.4.2 WIS transmit functions <\/td>\n<\/tr>\n | ||||||
| 2358<\/td>\n | 50.6.4.3 WIS receive functions <\/td>\n<\/tr>\n | ||||||
| 2359<\/td>\n | 50.6.4.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 2360<\/td>\n | 50.6.4.5 Error notification 50.6.4.6 Management registers and functions <\/td>\n<\/tr>\n | ||||||
| 2361<\/td>\n | 50.6.4.7 WIS test-pattern generator and checker <\/td>\n<\/tr>\n | ||||||
| 2362<\/td>\n | 51. Physical Medium Attachment (PMA) sublayer, type Serial 51.1 Overview 51.1.1 Scope 51.1.2 Summary of functions <\/td>\n<\/tr>\n | ||||||
| 2363<\/td>\n | 51.2 PMA Service Interface 51.2.1 PMA_UNITDATA.request 51.2.1.1 Semantics of the service primitive 51.2.1.2 When generated <\/td>\n<\/tr>\n | ||||||
| 2364<\/td>\n | 51.2.1.3 Effect of receipt 51.2.2 PMA_UNITDATA.indication 51.2.2.1 Semantics of the service primitive 51.2.2.2 When generated 51.2.2.3 Effect of receipt 51.2.3 PMA_SIGNAL.indication 51.2.3.1 Semantics of the service primitive 51.2.3.2 When generated 51.2.3.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 2365<\/td>\n | 51.2.4 PMA_RXMODE.request 51.2.4.1 Semantics of the service primitive 51.2.4.2 When generated 51.2.4.3 Effect of receipt 51.2.5 PMA_TXMODE.request 51.2.5.1 Semantics of the service primitive 51.2.5.2 When generated 51.2.5.3 Effect of receipt 51.2.6 PMA_ENERGY.indication 51.2.6.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2366<\/td>\n | 51.2.6.2 When generated 51.2.6.3 Effect of receipt 51.3 Functions within the PMA 51.3.1 PMA transmit function 51.3.2 PMA receive function 51.3.3 Delay Constraints <\/td>\n<\/tr>\n | ||||||
| 2367<\/td>\n | 51.4 Sixteen-Bit Interface (XSBI) <\/td>\n<\/tr>\n | ||||||
| 2368<\/td>\n | 51.4.1 Required signals <\/td>\n<\/tr>\n | ||||||
| 2370<\/td>\n | 51.4.2 Optional Signals <\/td>\n<\/tr>\n | ||||||
| 2371<\/td>\n | 51.5 General electrical characteristics of the XSBI 51.5.1 DC characteristics 51.5.2 Valid signal levels <\/td>\n<\/tr>\n | ||||||
| 2372<\/td>\n | 51.5.3 Rise and fall time definition 51.5.4 Output load 51.6 XSBI transmit interface electrical characteristics 51.6.1 XSBI transmit interface timing <\/td>\n<\/tr>\n | ||||||
| 2373<\/td>\n | 51.6.1.1 PMA client output timing <\/td>\n<\/tr>\n | ||||||
| 2374<\/td>\n | 51.6.1.2 PMA input timing 51.6.2 XSBI PMA_TX_CLK and PMA_TXCLK_SRC Specification <\/td>\n<\/tr>\n | ||||||
| 2375<\/td>\n | 51.7 XSBI receive interface electrical characteristics 51.7.1 XSBI receive interface timing <\/td>\n<\/tr>\n | ||||||
| 2376<\/td>\n | 51.7.1.1 PMA output timing <\/td>\n<\/tr>\n | ||||||
| 2377<\/td>\n | 51.7.1.2 PMA client input timing 51.7.2 XSBI PMA_RX_CLK specification 51.8 PMA loopback mode (optional) <\/td>\n<\/tr>\n | ||||||
| 2378<\/td>\n | 51.9 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2379<\/td>\n | 51.10 Protocol implementation conformance statement (PICS) proforma for Clause 51, Physical Medium Attachment (PMA) sublayer, type Serial 51.10.1 Introduction 51.10.2 Identification 51.10.2.1 Implementation identification 51.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2380<\/td>\n | 51.10.3 Major capabilities\/options 51.10.4 PICS proforma tables for the PMA Interface Sublayer, type Serial 51.10.4.1 Compatibility considerations 51.10.4.2 PMA transmit functions <\/td>\n<\/tr>\n | ||||||
| 2381<\/td>\n | 51.10.4.3 PMA receive functions 51.10.4.4 PMA delay constraints <\/td>\n<\/tr>\n | ||||||
| 2382<\/td>\n | 52. Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-S (short wavelength serial), 10GBASE-L (long wavelength serial), and 10GBASE-E (extra long wavelength serial) 52.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2383<\/td>\n | 52.1.1 Physical Medium Dependent (PMD) sublayer service interface 52.1.1.1 PMD_UNITDATA.request <\/td>\n<\/tr>\n | ||||||
| 2384<\/td>\n | 52.1.1.1.1 Semantics of the service primitive 52.1.1.1.2 When generated 52.1.1.1.3 Effect of receipt 52.1.1.2 PMD_UNITDATA.indication 52.1.1.2.1 Semantics of the service primitive 52.1.1.2.2 When generated 52.1.1.2.3 Effect of receipt 52.1.1.3 PMD_SIGNAL.indication 52.1.1.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2385<\/td>\n | 52.1.1.3.2 When generated 52.1.1.3.3 Effect of receipt 52.2 Delay constraints 52.3 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 2386<\/td>\n | 52.4 PMD functional specifications 52.4.1 PMD block diagram 52.4.2 PMD Transmit function 52.4.3 PMD Receive function 52.4.4 PMD Signal Detect function <\/td>\n<\/tr>\n | ||||||
| 2387<\/td>\n | 52.4.5 PMD_reset function 52.4.6 PMD_fault function 52.4.7 PMD_global_transmit_disable function <\/td>\n<\/tr>\n | ||||||
| 2388<\/td>\n | 52.4.8 PMD_transmit_fault function 52.4.9 PMD_receive_fault function 52.5 PMD to MDI optical specifications for 10GBASE-S <\/td>\n<\/tr>\n | ||||||
| 2389<\/td>\n | 52.5.1 10GBASE-S transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2391<\/td>\n | 52.5.2 10GBASE-S receive optical specifications 52.5.3 Illustrative 10GBASE-S link power budgets 52.6 PMD to MDI optical specifications for 10GBASE-L <\/td>\n<\/tr>\n | ||||||
| 2392<\/td>\n | 52.6.1 10GBASE-L transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2394<\/td>\n | 52.6.2 10GBASE-L receive optical specifications 52.6.3 Illustrative 10GBASE-L link power budgets <\/td>\n<\/tr>\n | ||||||
| 2395<\/td>\n | 52.7 PMD to MDI optical specifications for 10GBASE-E <\/td>\n<\/tr>\n | ||||||
| 2396<\/td>\n | 52.7.1 10GBASE-E transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2397<\/td>\n | 52.7.2 10GBASE-E receive optical specifications 52.7.3 Illustrative 10GBASE-E link power budgets 52.8 Jitter specifications for 10GBASE-R and 10GBASE-W <\/td>\n<\/tr>\n | ||||||
| 2398<\/td>\n | 52.8.1 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 2399<\/td>\n | 52.9 Optical measurement requirements 52.9.1 Test patterns 52.9.1.1 Test-pattern definition <\/td>\n<\/tr>\n | ||||||
| 2401<\/td>\n | 52.9.1.2 Square wave pattern definition 52.9.2 Center wavelength, spectral width, and side mode suppression ratio (SMSR) measurements 52.9.3 Average optical power measurements 52.9.4 Extinction ratio measurements 52.9.5 Optical modulation amplitude (OMA) test procedure <\/td>\n<\/tr>\n | ||||||
| 2402<\/td>\n | 52.9.6 Relative intensity noise optical modulation amplitude (RINxOMA) measuring procedure 52.9.6.1 General test description 52.9.6.2 Component descriptions <\/td>\n<\/tr>\n | ||||||
| 2403<\/td>\n | 52.9.6.3 Test Procedure <\/td>\n<\/tr>\n | ||||||
| 2404<\/td>\n | 52.9.7 Transmitter optical waveform <\/td>\n<\/tr>\n | ||||||
| 2405<\/td>\n | 52.9.8 Receiver sensitivity measurements <\/td>\n<\/tr>\n | ||||||
| 2406<\/td>\n | 52.9.9 Stressed receiver conformance test 52.9.9.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 2408<\/td>\n | 52.9.9.2 Parameter definitions <\/td>\n<\/tr>\n | ||||||
| 2409<\/td>\n | 52.9.9.3 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 2410<\/td>\n | 52.9.9.4 Stressed receiver conformance test procedure <\/td>\n<\/tr>\n | ||||||
| 2411<\/td>\n | 52.9.10 Transmitter and dispersion penalty measurement 52.9.10.1 Reference transmitter requirements 52.9.10.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 2412<\/td>\n | 52.9.10.3 Reference receiver requirements 52.9.10.4 Test procedure <\/td>\n<\/tr>\n | ||||||
| 2413<\/td>\n | 52.9.11 Measurement of the receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n | ||||||
| 2414<\/td>\n | 52.10 Environmental specifications 52.10.1 General safety 52.10.2 Laser safety 52.10.3 Installation 52.11 Environment 52.11.1 Electromagnetic emission <\/td>\n<\/tr>\n | ||||||
| 2415<\/td>\n | 52.11.2 Temperature, humidity, and handling 52.12 PMD labeling requirements 52.13 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 2416<\/td>\n | 52.14 Characteristics of the fiber optic cabling (channel) 52.14.1 Optical fiber and cable 52.14.2 Optical fiber connection 52.14.2.1 Connection insertion loss <\/td>\n<\/tr>\n | ||||||
| 2417<\/td>\n | 52.14.2.2 Maximum discrete reflectance 52.14.3 10GBASE-E attenuator management <\/td>\n<\/tr>\n | ||||||
| 2418<\/td>\n | 52.14.4 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 2419<\/td>\n | 52.15 Protocol implementation conformance statement (PICS) proforma for Clause 52, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-S (short wavelength serial), 10GBASE-L (long wavelength serial), and 10GBASE-E (extra long w… 52.15.1 Introduction 52.15.2 Identification 52.15.2.1 Implementation identification 52.15.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2420<\/td>\n | 52.15.2.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 2421<\/td>\n | 52.15.3 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, types 10GBASE-R and 10GBASE-W 52.15.3.1 PMD functional specifications 52.15.3.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 2422<\/td>\n | 52.15.3.3 PMD to MDI optical specifications for 10GBASE-SR 52.15.3.4 PMD to MDI optical specifications for 10GBASE-SW 52.15.3.5 PMD to MDI optical specifications for 10GBASE-LR <\/td>\n<\/tr>\n | ||||||
| 2423<\/td>\n | 52.15.3.6 PMD to MDI optical specifications for 10GBASE-LW 52.15.3.7 PMD to MDI optical specifications for 10GBASE-ER 52.15.3.8 PMD to MDI optical specifications for 10GBASE-EW <\/td>\n<\/tr>\n | ||||||
| 2424<\/td>\n | 52.15.3.9 Optical measurement requirements 52.15.3.10 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 2425<\/td>\n | 52.15.3.11 Environmental specifications 52.15.3.12 Environment <\/td>\n<\/tr>\n | ||||||
| 2426<\/td>\n | 53. Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-LX4 53.1 Overview 53.1.1 Physical Medium Dependent (PMD) service interface 53.1.2 PMD_UNITDATA.request <\/td>\n<\/tr>\n | ||||||
| 2427<\/td>\n | 53.1.2.1 Semantics of the service primitive 53.1.2.2 When generated 53.1.2.3 Effect of Receipt 53.1.3 PMD_UNITDATA.indication 53.1.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2428<\/td>\n | 53.1.3.2 When generated 53.1.3.3 Effect of receipt 53.1.4 PMD_SIGNAL.indication 53.1.4.1 Semantics of the service primitive 53.1.4.2 When generated 53.1.4.3 Effect of receipt 53.2 Delay constraints 53.3 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 2429<\/td>\n | 53.4 PMD functional specifications 53.4.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 2430<\/td>\n | 53.4.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 2431<\/td>\n | 53.4.3 PMD receive function 53.4.4 Global PMD signal detect function 53.4.5 PMD lane by lane signal detect function <\/td>\n<\/tr>\n | ||||||
| 2432<\/td>\n | 53.4.6 PMD reset function 53.4.7 Global PMD transmit disable function 53.4.8 PMD lane by lane transmit disable function 53.4.9 PMD fault function 53.4.10 PMD transmit fault function (optional) 53.4.11 PMD receive fault function (optional) 53.5 Wavelength-division multiplexed-lane assignments 53.6 Operating ranges for 10GBASE-LX4 PMD <\/td>\n<\/tr>\n | ||||||
| 2434<\/td>\n | 53.7 PMD to MDI optical specifications for 10GBASE-LX4 53.7.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2435<\/td>\n | 53.7.2 Receive optical specifications 53.7.3 Illustrative 10GBASE-LX4 link power budget and penalties 53.8 Jitter specifications for each lane of the 10GBASE-LX4 PMD 53.8.1 Transmit jitter specification <\/td>\n<\/tr>\n | ||||||
| 2437<\/td>\n | 53.8.1.1 Channel requirements for transmit jitter testing 53.8.1.2 Test pattern requirements for transmit jitter testing 53.8.2 Receive jitter tolerance specification 53.8.2.1 Input jitter for receiver jitter test <\/td>\n<\/tr>\n | ||||||
| 2438<\/td>\n | 53.8.2.2 Added sinusoidal jitter for receiver jitter test <\/td>\n<\/tr>\n | ||||||
| 2439<\/td>\n | 53.9 Optical measurement requirements 53.9.1 Wavelength range measurements <\/td>\n<\/tr>\n | ||||||
| 2440<\/td>\n | 53.9.2 Optical power measurements 53.9.3 Source spectral window measurements 53.9.4 Extinction ratio measurements 53.9.5 Optical Modulation Amplitude (OMA) measurements 53.9.6 Relative Intensity Noise [RIN12(OMA)] 53.9.7 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 2442<\/td>\n | 53.9.8 Transmit rise\/fall characteristics 53.9.9 Receive sensitivity measurements 53.9.10 Transmitter jitter conformance (per lane) 53.9.10.1 Block diagram and general description of test set up <\/td>\n<\/tr>\n | ||||||
| 2443<\/td>\n | 53.9.10.2 Channel requirements for transmit jitter testing <\/td>\n<\/tr>\n | ||||||
| 2444<\/td>\n | 53.9.10.3 Transmit jitter test procedure 53.9.11 Receive sensitivity measurements 53.9.12 Stressed receiver conformance test 53.9.12.1 Block diagram of stressed receiver tolerance test set up <\/td>\n<\/tr>\n | ||||||
| 2445<\/td>\n | 53.9.12.2 Stressed receiver conformance test procedure 53.9.12.3 Characterization of receiver input signal <\/td>\n<\/tr>\n | ||||||
| 2446<\/td>\n | 53.9.12.4 Jitter tolerance test procedure 53.9.13 Measurement of the receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n | ||||||
| 2447<\/td>\n | 53.9.14 Conformance test signal at TP3 for receiver testing <\/td>\n<\/tr>\n | ||||||
| 2449<\/td>\n | 53.9.15 Receiver test suite for WDM conformance testing <\/td>\n<\/tr>\n | ||||||
| 2451<\/td>\n | 53.10 Environmental specifications 53.10.1 General safety 53.10.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 2452<\/td>\n | 53.10.3 Installation 53.11 Environment 53.11.1 Electromagnetic emission 53.11.2 Temperature, humidity, and handling 53.12 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 2453<\/td>\n | 53.13 Fiber optic cabling model 53.14 Characteristics of the fiber optic cabling (channel) 53.14.1 Optical fiber and cable <\/td>\n<\/tr>\n | ||||||
| 2454<\/td>\n | 53.14.2 Optical fiber connection 53.14.2.1 Connection insertion loss <\/td>\n<\/tr>\n | ||||||
| 2455<\/td>\n | 53.14.2.2 Connection return loss 53.14.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 2456<\/td>\n | 53.15 Protocol implementation conformance statement (PICS) proforma for Clause 53, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-LX4 53.15.1 Introduction 53.15.2 Identification 53.15.2.1 Implementation identification 53.15.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2457<\/td>\n | 53.15.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 2458<\/td>\n | 53.15.4 PICS proforma tables for 10GBASE-LX4 and baseband medium 53.15.4.1 PMD Functional specifications <\/td>\n<\/tr>\n | ||||||
| 2459<\/td>\n | 53.15.4.2 PMD to MDI optical specifications for 10GBASE-LX4 53.15.4.3 Management functions <\/td>\n<\/tr>\n | ||||||
| 2460<\/td>\n | 53.15.4.4 Jitter specifications <\/td>\n<\/tr>\n | ||||||
| 2461<\/td>\n | 53.15.4.5 Optical measurement requirements <\/td>\n<\/tr>\n | ||||||
| 2464<\/td>\n | 53.15.4.6 Characteristics of the fiber optic cabling <\/td>\n<\/tr>\n | ||||||
| 2465<\/td>\n | 54. Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-CX4 54.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2466<\/td>\n | 54.2 Physical Medium Dependent (PMD) service interface 54.3 Delay constraints 54.4 PMD MDIO function mapping 54.5 PMD functional specifications 54.5.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 2467<\/td>\n | 54.5.2 PMD Transmit function 54.5.3 PMD Receive function 54.5.4 Global PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 2468<\/td>\n | 54.5.5 PMD lane-by-lane signal detect function 54.5.6 Global PMD transmit disable function 54.5.7 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n | ||||||
| 2469<\/td>\n | 54.5.8 Loopback mode 54.5.9 PMD fault function 54.5.10 PMD transmit fault function 54.5.11 PMD receive fault function 54.6 MDI Electrical specifications for 10GBASE-CX4 54.6.1 Signal levels <\/td>\n<\/tr>\n | ||||||
| 2470<\/td>\n | 54.6.2 Signal paths 54.6.3 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 2471<\/td>\n | 54.6.3.1 Test fixtures 54.6.3.2 Test-fixture impedance 54.6.3.3 Signaling speed range <\/td>\n<\/tr>\n | ||||||
| 2472<\/td>\n | 54.6.3.4 Output amplitude 54.6.3.5 Output return loss <\/td>\n<\/tr>\n | ||||||
| 2473<\/td>\n | 54.6.3.6 Differential output template <\/td>\n<\/tr>\n | ||||||
| 2475<\/td>\n | 54.6.3.7 Transition time 54.6.3.8 Transmit jitter 54.6.3.9 Transmit jitter test requirements 54.6.4 Receiver characteristics 54.6.4.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 2476<\/td>\n | 54.6.4.2 Signaling speed range 54.6.4.3 AC-coupling 54.6.4.4 Input signal amplitude 54.6.4.5 Input return loss 54.7 Cable assembly characteristics <\/td>\n<\/tr>\n | ||||||
| 2477<\/td>\n | 54.7.1 Characteristic impedance and reference impedance 54.7.2 Cable assembly insertion loss <\/td>\n<\/tr>\n | ||||||
| 2478<\/td>\n | 54.7.3 Cable assembly return loss <\/td>\n<\/tr>\n | ||||||
| 2479<\/td>\n | 54.7.4 Near-End Crosstalk (NEXT) 54.7.4.1 Differential Near-End Crosstalk 54.7.4.2 Multiple Disturber Near-End Crosstalk (MDNEXT) <\/td>\n<\/tr>\n | ||||||
| 2480<\/td>\n | 54.7.5 Far-End Crosstalk (FEXT) 54.7.5.1 Equal Level Far-End Crosstalk (ELFEXT) loss <\/td>\n<\/tr>\n | ||||||
| 2481<\/td>\n | 54.7.5.2 Multiple Disturber Equal Level Far-End Crosstalk (MDELFEXT) loss <\/td>\n<\/tr>\n | ||||||
| 2482<\/td>\n | 54.7.6 Shielding 54.7.7 Crossover function <\/td>\n<\/tr>\n | ||||||
| 2483<\/td>\n | 54.8 MDI specification 54.8.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 2484<\/td>\n | 54.8.2 Connector pin assignments 54.9 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2485<\/td>\n | 54.10 Protocol implementation conformance statement (PICS) proforma for Clause 54, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-CX4 54.10.1 Introduction 54.10.2 Identification 54.10.2.1 Implementation identification 54.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2486<\/td>\n | 54.10.3 PICS proforma tables for 10GBASE-CX4 and baseband medium 54.10.4 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 2487<\/td>\n | 54.10.4.1 PMD Functional specifications <\/td>\n<\/tr>\n | ||||||
| 2488<\/td>\n | 54.10.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 2489<\/td>\n | 54.10.4.3 Transmitter specifications <\/td>\n<\/tr>\n | ||||||
| 2490<\/td>\n | 54.10.4.4 Receiver specifications 54.10.4.5 Cable assembly specifications <\/td>\n<\/tr>\n | ||||||
| 2491<\/td>\n | 54.10.4.6 MDI connector specifications <\/td>\n<\/tr>\n | ||||||
| 2492<\/td>\n | 55. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T 55.1 Overview 55.1.1 Objectives <\/td>\n<\/tr>\n | ||||||
| 2493<\/td>\n | 55.1.2 Relationship of 10GBASE-T to other standards 55.1.3 Operation of 10GBASE-T <\/td>\n<\/tr>\n | ||||||
| 2497<\/td>\n | 55.1.3.1 Physical Coding Sublayer (PCS) 55.1.3.2 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 2498<\/td>\n | 55.1.3.3 EEE capability <\/td>\n<\/tr>\n | ||||||
| 2499<\/td>\n | 55.1.4 Signaling 55.1.5 Interfaces <\/td>\n<\/tr>\n | ||||||
| 2500<\/td>\n | 55.1.6 Conventions in this clause 55.2 10GBASE-T service primitives and interfaces 55.2.1 Technology Dependent Interface 55.2.1.1 PMA_LINK.request 55.2.1.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 2501<\/td>\n | 55.2.1.1.2 When generated 55.2.1.1.3 Effect of receipt 55.2.1.2 PMA_LINK.indication 55.2.1.2.1 Semantics of the primitive 55.2.1.2.2 When generated 55.2.1.2.3 Effect of receipt 55.2.2 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 2503<\/td>\n | 55.2.2.1 PMA_TXMODE.indication 55.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 2504<\/td>\n | 55.2.2.1.2 When generated 55.2.2.1.3 Effect of receipt 55.2.2.2 PMA_CONFIG.indication 55.2.2.2.1 Semantics of the primitive 55.2.2.2.2 When generated 55.2.2.2.3 Effect of receipt 55.2.2.3 PMA_UNITDATA.request <\/td>\n<\/tr>\n | ||||||
| 2505<\/td>\n | 55.2.2.3.1 Semantics of the primitive 55.2.2.3.2 When generated 55.2.2.3.3 Effect of receipt 55.2.2.4 PMA_UNITDATA.indication 55.2.2.4.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 2506<\/td>\n | 55.2.2.4.2 When generated 55.2.2.4.3 Effect of receipt 55.2.2.5 PMA_SCRSTATUS.request 55.2.2.5.1 Semantics of the primitive 55.2.2.5.2 When generated 55.2.2.5.3 Effect of receipt 55.2.2.6 PMA_PCSSTATUS.request 55.2.2.6.1 Semantics of the primitive 55.2.2.6.2 When generated <\/td>\n<\/tr>\n | ||||||
| 2507<\/td>\n | 55.2.2.6.3 Effect of receipt 55.2.2.7 PMA_RXSTATUS.indication 55.2.2.7.1 Semantics of the primitive 55.2.2.7.2 When generated 55.2.2.7.3 Effect of receipt 55.2.2.8 PMA_REMRXSTATUS.request 55.2.2.8.1 Semantics of the primitive 55.2.2.8.2 When generated <\/td>\n<\/tr>\n | ||||||
| 2508<\/td>\n | 55.2.2.8.3 Effect of receipt 55.2.2.9 PMA_ALERTDETECT.indication 55.2.2.9.1 Semantics of the primitive 55.2.2.9.2 When generated 55.2.2.9.3 Effect of receipt 55.2.2.10 PCS_RX_LPI_STATUS.request 55.2.2.10.1 Semantics of the primitive 55.2.2.10.2 When generated 55.2.2.10.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 2509<\/td>\n | 55.2.2.11 PMA_PCSDATAMODE.indication 55.2.2.11.1 Semantics of the primitive 55.2.2.11.2 When generated 55.2.2.11.3 Effect of receipt 55.2.2.12 PMA_FR_ACTIVE.indication 55.2.2.12.1 Semantics of the primitive 55.2.2.12.2 When generated 55.2.2.12.3 Effect of receipt 55.3 Physical Coding Sublayer (PCS) 55.3.1 PCS service interface (XGMII) 55.3.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 2510<\/td>\n | 55.3.2.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 2511<\/td>\n | 55.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 2512<\/td>\n | 55.3.2.2.1 Use of blocks 55.3.2.2.2 65B-LDPC transmission code 55.3.2.2.3 Notation conventions 55.3.2.2.4 Transmission order 55.3.2.2.5 Block structure <\/td>\n<\/tr>\n | ||||||
| 2516<\/td>\n | 55.3.2.2.6 Control codes 55.3.2.2.7 Ordered sets <\/td>\n<\/tr>\n | ||||||
| 2517<\/td>\n | 55.3.2.2.8 Valid and invalid blocks 55.3.2.2.9 Idle (\/I\/) <\/td>\n<\/tr>\n | ||||||
| 2518<\/td>\n | 55.3.2.2.10 LPI (\/LI\/) <\/td>\n<\/tr>\n | ||||||
| 2519<\/td>\n | 55.3.2.2.11 Start (\/S\/) 55.3.2.2.12 Terminate (\/T\/) 55.3.2.2.13 ordered set (\/O\/) 55.3.2.2.14 Error (\/E\/) 55.3.2.2.15 Transmit process <\/td>\n<\/tr>\n | ||||||
| 2520<\/td>\n | 55.3.2.2.16 PCS scrambler <\/td>\n<\/tr>\n | ||||||
| 2521<\/td>\n | 55.3.2.2.17 CRC8 55.3.2.2.18 LDPC encoder 55.3.2.2.19 DSQ128 bit mapping <\/td>\n<\/tr>\n | ||||||
| 2522<\/td>\n | 55.3.2.2.20 DSQ128 to 4D-PAM16 <\/td>\n<\/tr>\n | ||||||
| 2523<\/td>\n | 55.3.2.2.21 65B-LDPC framer 55.3.2.2.22 EEE capability <\/td>\n<\/tr>\n | ||||||
| 2524<\/td>\n | 55.3.2.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 2525<\/td>\n | 55.3.2.3.1 Frame and block synchronization 55.3.2.3.2 PCS descrambler 55.3.2.3.3 CRC8 receive function 55.3.3 Test-pattern generators <\/td>\n<\/tr>\n | ||||||
| 2526<\/td>\n | 55.3.4 PMA training side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 2527<\/td>\n | 55.3.4.1 Generation of bits San, Sbn, Scn, Sdn 55.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn <\/td>\n<\/tr>\n | ||||||
| 2528<\/td>\n | 55.3.4.3 PMA training mode descrambler polynomials 55.3.5 LPI signaling <\/td>\n<\/tr>\n | ||||||
| 2529<\/td>\n | 55.3.5.1 LPI Synchronization <\/td>\n<\/tr>\n | ||||||
| 2530<\/td>\n | 55.3.5.2 Quiet period signaling 55.3.5.3 Refresh period signaling <\/td>\n<\/tr>\n | ||||||
| 2531<\/td>\n | 55.3.6 Detailed functions and state diagrams 55.3.6.1 State diagram conventions 55.3.6.2 State diagram parameters 55.3.6.2.1 Constants 55.3.6.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2533<\/td>\n | 55.3.6.2.3 Timers <\/td>\n<\/tr>\n | ||||||
| 2534<\/td>\n | 55.3.6.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 2536<\/td>\n | 55.3.6.2.5 Counters 55.3.6.3 State diagrams 55.3.7 PCS management 55.3.7.1 Status <\/td>\n<\/tr>\n | ||||||
| 2537<\/td>\n | 55.3.7.2 Counters <\/td>\n<\/tr>\n | ||||||
| 2544<\/td>\n | 55.3.7.3 Loopback 55.4 Physical Medium Attachment (PMA) sublayer 55.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 2545<\/td>\n | 55.4.2 PMA functions 55.4.2.1 PMA Reset function 55.4.2.2 PMA Transmit function <\/td>\n<\/tr>\n | ||||||
| 2546<\/td>\n | 55.4.2.2.1 Alert signal <\/td>\n<\/tr>\n | ||||||
| 2547<\/td>\n | 55.4.2.2.2 Link failure signal 55.4.2.3 PMA transmit disable function 55.4.2.3.1 Global PMA transmit disable function 55.4.2.3.2 PMA pair by pair transmit disable function 55.4.2.3.3 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 2548<\/td>\n | 55.4.2.4 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 2549<\/td>\n | 55.4.2.5 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 2550<\/td>\n | 55.4.2.5.1 Infofield notation 55.4.2.5.2 Start of Frame Delimiter 55.4.2.5.3 Current transmitter settings <\/td>\n<\/tr>\n | ||||||
| 2551<\/td>\n | 55.4.2.5.4 Next transmitter settings 55.4.2.5.5 Requested transmitter settings 55.4.2.5.6 Message Field <\/td>\n<\/tr>\n | ||||||
| 2552<\/td>\n | 55.4.2.5.7 SNR_margin <\/td>\n<\/tr>\n | ||||||
| 2553<\/td>\n | 55.4.2.5.8 Transition counter 55.4.2.5.9 Coefficient exchange handshake 55.4.2.5.10 Reserved Fields 55.4.2.5.11 Vendor-specific field 55.4.2.5.12 Coefficient Field 55.4.2.5.13 CRC16 <\/td>\n<\/tr>\n | ||||||
| 2554<\/td>\n | 55.4.2.5.14 Startup sequence <\/td>\n<\/tr>\n | ||||||
| 2557<\/td>\n | 55.4.2.5.15 Fast retrain function 55.4.2.6 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 2558<\/td>\n | 55.4.2.7 Refresh Monitor function 55.4.2.8 Clock Recovery function 55.4.3 MDI 55.4.3.1 MDI signals transmitted by the PHY <\/td>\n<\/tr>\n | ||||||
| 2559<\/td>\n | 55.4.3.2 Signals received at the MDI 55.4.4 Automatic MDI\/MDI-X configuration <\/td>\n<\/tr>\n | ||||||
| 2560<\/td>\n | 55.4.5 State variables 55.4.5.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 2563<\/td>\n | 55.4.5.2 Timers <\/td>\n<\/tr>\n | ||||||
| 2564<\/td>\n | 55.4.5.3 Functions 55.4.5.4 Counters <\/td>\n<\/tr>\n | ||||||
| 2565<\/td>\n | 55.4.6 State diagrams 55.4.6.1 PHY Control state diagram <\/td>\n<\/tr>\n | ||||||
| 2566<\/td>\n | 55.4.6.2 Transition counter state diagrams <\/td>\n<\/tr>\n | ||||||
| 2568<\/td>\n | 55.4.6.3 Link Monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 2569<\/td>\n | 55.4.6.4 EEE Refresh monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 2570<\/td>\n | 55.4.6.5 Fast retrain state diagram 55.5 PMA electrical specifications 55.5.1 Electrical isolation 55.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 2573<\/td>\n | 55.5.2.1 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 2574<\/td>\n | 55.5.3 Transmitter electrical specifications 55.5.3.1 Maximum output droop 55.5.3.2 Transmitter linearity. <\/td>\n<\/tr>\n | ||||||
| 2575<\/td>\n | 55.5.3.3 Transmitter timing jitter 55.5.3.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 2576<\/td>\n | 55.5.3.5 Transmit clock frequency 55.5.4 Receiver electrical specifications 55.5.4.1 Receiver differential input signals <\/td>\n<\/tr>\n | ||||||
| 2577<\/td>\n | 55.5.4.2 Receiver frequency tolerance 55.5.4.3 Common-mode noise rejection 55.5.4.4 Alien crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 2578<\/td>\n | 55.5.4.5 Short reach mode link test 55.5.4.5.1 Short reach test channels 55.6 Management interfaces 55.6.1 Support for Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 2579<\/td>\n | 55.6.1.1 10GBASE-T use of registers during Auto-Negotiation 55.6.1.2 10GBASE-T Auto-Negotiation page use <\/td>\n<\/tr>\n | ||||||
| 2581<\/td>\n | 55.6.1.3 Sending Next Pages 55.6.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n | ||||||
| 2583<\/td>\n | 55.7 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 2584<\/td>\n | 55.7.1 Cabling system characteristics 55.7.2 Link segment transmission parameters 55.7.2.1 Insertion loss <\/td>\n<\/tr>\n | ||||||
| 2585<\/td>\n | 55.7.2.2 Differential characteristic impedance 55.7.2.3 Return loss 55.7.2.4 Coupling parameters between duplex channels comprising one link segment 55.7.2.4.1 Differential near-end crosstalk <\/td>\n<\/tr>\n | ||||||
| 2586<\/td>\n | 55.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss 55.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 2587<\/td>\n | 55.7.2.4.4 Equal level far-end crosstalk (ELFEXT) <\/td>\n<\/tr>\n | ||||||
| 2588<\/td>\n | 55.7.2.4.5 Multiple disturber equal level far-end crosstalk (MDELFEXT) 55.7.2.4.6 Multiple disturber power sum equal level far-end crosstalk (PS ELFEXT) 55.7.2.5 Maximum link delay 55.7.2.6 Link delay skew 55.7.3 Coupling parameters between link segments <\/td>\n<\/tr>\n | ||||||
| 2589<\/td>\n | 55.7.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss 55.7.3.1.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss <\/td>\n<\/tr>\n | ||||||
| 2590<\/td>\n | 55.7.3.1.2 PSANEXT loss to insertion loss ratio requirements <\/td>\n<\/tr>\n | ||||||
| 2592<\/td>\n | 55.7.3.2 Multiple disturber alien far-end crosstalk (MDAFEXT) loss 55.7.3.2.1 Multiple disturber power sum alien equal level far-end crosstalk (PSAELFEXT) <\/td>\n<\/tr>\n | ||||||
| 2593<\/td>\n | 55.7.3.2.2 PSAELFEXT to insertion loss ratio requirements <\/td>\n<\/tr>\n | ||||||
| 2595<\/td>\n | 55.7.3.3 Alien crosstalk margin computation <\/td>\n<\/tr>\n | ||||||
| 2599<\/td>\n | 55.7.4 Noise environment <\/td>\n<\/tr>\n | ||||||
| 2600<\/td>\n | 55.8 MDI specification 55.8.1 MDI connectors 55.8.2 MDI electrical specifications <\/td>\n<\/tr>\n | ||||||
| 2601<\/td>\n | 55.8.2.1 MDI return loss 55.8.2.2 MDI impedance balance <\/td>\n<\/tr>\n | ||||||
| 2602<\/td>\n | 55.8.2.3 MDI fault tolerance <\/td>\n<\/tr>\n | ||||||
| 2603<\/td>\n | 55.9 Environmental specifications 55.9.1 General safety 55.9.2 Network safety 55.9.3 Installation and maintenance guidelines <\/td>\n<\/tr>\n | ||||||
| 2604<\/td>\n | 55.9.4 Telephone voltages 55.9.5 Electromagnetic compatibility 55.9.6 Temperature and humidity 55.10 PHY labeling 55.11 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 2606<\/td>\n | 55.12 Protocol implementation conformance statement (PICS) proforma for Clause 55\u2014Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10GBASE-T 55.12.1 Identification 55.12.1.1 Implementation identification 55.12.1.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2607<\/td>\n | 55.12.2 Major capabilities\/options 55.12.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 2609<\/td>\n | 55.12.3.1 PCS Receive functions 55.12.3.2 Other PCS functions 55.12.4 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 2611<\/td>\n | 55.12.5 Management interface <\/td>\n<\/tr>\n | ||||||
| 2612<\/td>\n | 55.12.6 PMA electrical specifications <\/td>\n<\/tr>\n | ||||||
| 2613<\/td>\n | 55.12.7 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 2614<\/td>\n | 55.12.8 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 2615<\/td>\n | 55.12.9 General safety and environmental requirements 55.12.10 Timing requirements <\/td>\n<\/tr>\n | ||||||
| 2616<\/td>\n | 56. Introduction to Ethernet for subscriber access networks 56.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2623<\/td>\n | 56.1.1 Summary of P2P sublayers 56.1.1.1 P2P fiber media 56.1.1.2 P2P copper media 56.1.2 Summary of P2MP sublayers <\/td>\n<\/tr>\n | ||||||
| 2624<\/td>\n | 56.1.2.1 Multipoint MAC Control Protocol (MPCP) 56.1.2.2 Reconciliation Sublayer (RS) and media independent interfaces <\/td>\n<\/tr>\n | ||||||
| 2625<\/td>\n | 56.1.3 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 2631<\/td>\n | 56.1.4 Management <\/td>\n<\/tr>\n | ||||||
| 2634<\/td>\n | 56.1.5 Unidirectional transmission <\/td>\n<\/tr>\n | ||||||
| 2635<\/td>\n | 56.2 State diagrams 56.3 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 2636<\/td>\n | 57. Operations, Administration, and Maintenance (OAM) 57.1 Overview 57.1.1 Scope 57.1.2 Summary of objectives and major concepts <\/td>\n<\/tr>\n | ||||||
| 2637<\/td>\n | 57.1.3 Summary of non-objectives 57.1.4 Positioning of OAM within the IEEE 802.3 architecture 57.1.5 Compatibility considerations 57.1.5.1 Application 57.1.5.2 Interoperability between OAM capable DTEs <\/td>\n<\/tr>\n | ||||||
| 2638<\/td>\n | 57.1.5.3 MAC Control PAUSE 57.1.5.4 Interface to MAC Control client 57.1.5.5 Frame loss during OAM remote loopback 57.1.6 State diagram conventions 57.2 Functional specifications 57.2.1 Interlayer service interfaces <\/td>\n<\/tr>\n | ||||||
| 2639<\/td>\n | 57.2.2 Principles of operation 57.2.3 Instances of the MAC data service interface 57.2.4 Responsibilities of OAM client <\/td>\n<\/tr>\n | ||||||
| 2640<\/td>\n | 57.2.5 OAM client interactions 57.2.5.1 OAMPDU.request 57.2.5.1.1 Function 57.2.5.1.2 Semantics of the service primitive 57.2.5.1.3 When generated 57.2.5.1.4 Effect of receipt 57.2.5.2 OAMPDU.indication 57.2.5.2.1 Function <\/td>\n<\/tr>\n | ||||||
| 2641<\/td>\n | 57.2.5.2.2 Semantics of the service primitive 57.2.5.2.3 When generated 57.2.5.2.4 Effect of receipt 57.2.5.3 OAM_CTL.request 57.2.5.3.1 Function 57.2.5.3.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2642<\/td>\n | 57.2.5.3.3 When generated 57.2.5.3.4 Effect of receipt 57.2.5.4 OAM_CTL.indication 57.2.5.4.1 Function 57.2.5.4.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 2643<\/td>\n | 57.2.5.4.3 When generated 57.2.5.4.4 Effect of receipt 57.2.6 Instances of the OAM internal service interface 57.2.7 Internal block diagram <\/td>\n<\/tr>\n | ||||||
| 2644<\/td>\n | 57.2.8 OAM internal interactions 57.2.8.1 OAMI.request 57.2.8.1.1 Function 57.2.8.1.2 Semantics of the service primitive 57.2.8.1.3 When generated 57.2.8.1.4 Effect of receipt 57.2.8.2 OAMI.indication 57.2.8.2.1 Function <\/td>\n<\/tr>\n | ||||||
| 2645<\/td>\n | 57.2.8.2.2 Semantics of the service primitive 57.2.8.2.3 When generated 57.2.8.2.4 Effect of receipt 57.2.9 Modes <\/td>\n<\/tr>\n | ||||||
| 2646<\/td>\n | 57.2.9.1 Active mode 57.2.9.2 Passive mode 57.2.10 OAM events 57.2.10.1 Critical link events 57.2.10.2 Link events 57.2.10.3 Local event procedure <\/td>\n<\/tr>\n | ||||||
| 2647<\/td>\n | 57.2.10.4 Remote event procedure 57.2.11 OAM remote loopback 57.2.11.1 Initiating OAM remote loopback <\/td>\n<\/tr>\n | ||||||
| 2648<\/td>\n | 57.2.11.2 During OAM remote loopback 57.2.11.3 Exiting OAM remote loopback 57.2.11.4 Loss of OAMPDUs during OAM remote loopback <\/td>\n<\/tr>\n | ||||||
| 2649<\/td>\n | 57.2.11.5 Loss of frames during OAM remote loopback 57.2.11.6 Timing considerations for OAM remote loopback 57.2.12 Unidirectional OAM operation 57.3 Detailed functions and state diagrams <\/td>\n<\/tr>\n | ||||||
| 2650<\/td>\n | 57.3.1 State diagram variables 57.3.1.1 Constants 57.3.1.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2652<\/td>\n | 57.3.1.3 Messages <\/td>\n<\/tr>\n | ||||||
| 2653<\/td>\n | 57.3.1.4 Counters 57.3.1.5 Timers <\/td>\n<\/tr>\n | ||||||
| 2654<\/td>\n | 57.3.2 Control 57.3.2.1 OAM Discovery <\/td>\n<\/tr>\n | ||||||
| 2655<\/td>\n | 57.3.2.1.1 FAULT state 57.3.2.1.2 ACTIVE_SEND_LOCAL state 57.3.2.1.3 PASSIVE_WAIT state 57.3.2.1.4 SEND_LOCAL_REMOTE state 57.3.2.1.5 SEND_LOCAL_REMOTE_OK state 57.3.2.1.6 SEND_ANY state <\/td>\n<\/tr>\n | ||||||
| 2656<\/td>\n | 57.3.2.1.7 Sending Discovery status to peer 57.3.2.2 Transmit 57.3.2.2.1 RESET state 57.3.2.2.2 WAIT_FOR_TX state <\/td>\n<\/tr>\n | ||||||
| 2657<\/td>\n | 57.3.2.2.3 Expiration of pdu_timer 57.3.2.2.4 Valid request to send an OAMPDU 57.3.2.2.5 TX_OAMPDU state 57.3.2.2.6 Transmit rules <\/td>\n<\/tr>\n | ||||||
| 2658<\/td>\n | 57.3.2.3 Receive rules 57.3.3 Multiplexer 57.3.3.1 WAIT_FOR_TX state 57.3.3.1.1 Valid request to send an OAMPDU <\/td>\n<\/tr>\n | ||||||
| 2659<\/td>\n | 57.3.3.1.2 Valid request to forward or loopback frame 57.3.3.2 TX_FRAME state 57.3.4 Parser <\/td>\n<\/tr>\n | ||||||
| 2660<\/td>\n | 57.3.4.1 Reception of OAMPDU 57.3.4.2 Reception of non-OAMPDUs 57.3.4.2.1 Reception of non-OAMPDU in FWD mode 57.3.4.2.2 Reception of non-OAMPDU in LB mode 57.3.4.2.3 Reception of non-OAMPDU in DISCARD mode 57.4 OAMPDUs 57.4.1 Ordering and representation of octets <\/td>\n<\/tr>\n | ||||||
| 2661<\/td>\n | 57.4.2 Structure 57.4.2.1 Flags field <\/td>\n<\/tr>\n | ||||||
| 2662<\/td>\n | 57.4.2.2 Code field 57.4.3 OAMPDU descriptions <\/td>\n<\/tr>\n | ||||||
| 2663<\/td>\n | 57.4.3.1 Information OAMPDU 57.4.3.2 Event Notification OAMPDU <\/td>\n<\/tr>\n | ||||||
| 2664<\/td>\n | 57.4.3.3 Variable Request OAMPDU <\/td>\n<\/tr>\n | ||||||
| 2665<\/td>\n | 57.4.3.4 Variable Response OAMPDU 57.4.3.5 Loopback Control OAMPDU <\/td>\n<\/tr>\n | ||||||
| 2666<\/td>\n | 57.4.3.6 Organization Specific OAMPDU 57.5 OAM TLVs 57.5.1 Parsing <\/td>\n<\/tr>\n | ||||||
| 2667<\/td>\n | 57.5.2 Information TLVs 57.5.2.1 Local Information TLV <\/td>\n<\/tr>\n | ||||||
| 2670<\/td>\n | 57.5.2.2 Remote Information TLV 57.5.2.3 Organization Specific Information TLV 57.5.3 Link Event TLVs <\/td>\n<\/tr>\n | ||||||
| 2671<\/td>\n | 57.5.3.1 Errored Symbol Period Event TLV <\/td>\n<\/tr>\n | ||||||
| 2672<\/td>\n | 57.5.3.2 Errored Frame Event TLV 57.5.3.3 Errored Frame Period Event TLV <\/td>\n<\/tr>\n | ||||||
| 2673<\/td>\n | 57.5.3.4 Errored Frame Seconds Summary Event TLV <\/td>\n<\/tr>\n | ||||||
| 2674<\/td>\n | 57.5.3.5 Organization Specific Event TLVs <\/td>\n<\/tr>\n | ||||||
| 2675<\/td>\n | 57.6 Variables 57.6.1 Variable Descriptors 57.6.2 Variable Containers <\/td>\n<\/tr>\n | ||||||
| 2676<\/td>\n | 57.6.2.1 Format of Variable Containers when returning attributes 57.6.2.2 Format of Variable Containers when returning packages and objects <\/td>\n<\/tr>\n | ||||||
| 2677<\/td>\n | 57.6.3 Parsing <\/td>\n<\/tr>\n | ||||||
| 2678<\/td>\n | 57.6.4 Variable Branch\/Leaf examples 57.6.5 Variable Indications <\/td>\n<\/tr>\n | ||||||
| 2680<\/td>\n | 57.7 Protocol implementation conformance statement (PICS) proforma for Clause 57, Operations, Administration, and Maintenance (OAM) 57.7.1 Introduction 57.7.2 Identification 57.7.2.1 Implementation identification 57.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2681<\/td>\n | 57.7.2.3 Major capabilities\/options 57.7.3 PICS proforma tables for Operation, Administration, and Maintenance (OAM) 57.7.3.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 2682<\/td>\n | 57.7.3.2 Event Notification Generation and Reception <\/td>\n<\/tr>\n | ||||||
| 2683<\/td>\n | 57.7.3.3 OAMPDUs <\/td>\n<\/tr>\n | ||||||
| 2684<\/td>\n | 57.7.3.4 Local Information TLVs 57.7.3.5 Remote Information TLVs <\/td>\n<\/tr>\n | ||||||
| 2685<\/td>\n | 57.7.3.6 Organization Specific Information TLVs 57.7.4 Link Event TLVs <\/td>\n<\/tr>\n | ||||||
| 2686<\/td>\n | 57.7.5 Variables Descriptors and Containers <\/td>\n<\/tr>\n | ||||||
| 2687<\/td>\n | 58. Physical Medium Dependent (PMD) sublayer and medium, type 100BASE-LX10 (Long Wavelength) and 100BASE-BX10 (Bi-Directional Long Wavelength) 58.1 Overview 58.1.1 Goals and objectives <\/td>\n<\/tr>\n | ||||||
| 2688<\/td>\n | 58.1.2 Positioning of this PMD set within the IEEE 802.3 architecture 58.1.3 Terminology and conventions 58.1.4 Physical Medium Dependent (PMD) sublayer service interface <\/td>\n<\/tr>\n | ||||||
| 2689<\/td>\n | 58.1.4.1 Delay constraints 58.1.4.2 PMD_UNITDATA.request 58.1.4.3 PMD_UNITDATA.indication 58.1.4.4 PMD_SIGNAL.indication 58.2 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 2690<\/td>\n | 58.2.1 PMD block diagram 58.2.2 PMD transmit function 58.2.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 2691<\/td>\n | 58.2.4 100BASE-LX10 and 100BASE-BX10 signal detect function 58.3 PMD to MDI optical specifications for 100BASE-LX10 58.3.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2692<\/td>\n | 58.3.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2693<\/td>\n | 58.4 PMD to MDI optical specifications for 100BASE-BX10 58.4.1 Transmit optical specifications <\/td>\n<\/tr>\n | ||||||
| 2694<\/td>\n | 58.4.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2695<\/td>\n | 58.5 Illustrative 100BASE-LX10 and 100BASE-BX10 channels and penalties 58.6 Jitter at TP1 and TP4 for 100BASE-LX10 and 100BASE-BX10 <\/td>\n<\/tr>\n | ||||||
| 2696<\/td>\n | 58.7 Optical measurement requirements 58.7.1 Test patterns 58.7.1.1 100BASE-X optical frame-based test pattern <\/td>\n<\/tr>\n | ||||||
| 2699<\/td>\n | 58.7.2 Wavelength and spectral width measurements 58.7.3 Optical power measurements 58.7.4 Extinction ratio measurements 58.7.5 Optical modulation amplitude (OMA) measurements (optional) <\/td>\n<\/tr>\n | ||||||
| 2700<\/td>\n | 58.7.6 OMA relationship to extinction ratio and power measurements 58.7.7 Relative intensity noise optical modulation amplitude (RINxOMA) measuring procedure 58.7.7.1 General test description 58.7.7.2 Component descriptions <\/td>\n<\/tr>\n | ||||||
| 2701<\/td>\n | 58.7.7.3 Test procedure 58.7.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 2703<\/td>\n | 58.7.9 Transmitter and dispersion penalty (TDP) measurement <\/td>\n<\/tr>\n | ||||||
| 2704<\/td>\n | 58.7.9.1 Reference transmitter requirements 58.7.9.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 2705<\/td>\n | 58.7.9.3 Reference receiver requirements <\/td>\n<\/tr>\n | ||||||
| 2706<\/td>\n | 58.7.9.4 Test procedure 58.7.9.5 Approximate measures of TDP 58.7.10 Receiver sensitivity measurements <\/td>\n<\/tr>\n | ||||||
| 2707<\/td>\n | 58.7.11 Stressed receiver conformance test 58.7.11.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 2709<\/td>\n | 58.7.11.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 2711<\/td>\n | 58.7.11.3 Stressed receiver conformance test procedure 58.7.11.4 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 2712<\/td>\n | 58.7.12 Jitter measurements <\/td>\n<\/tr>\n | ||||||
| 2713<\/td>\n | 58.8 Environmental, safety, and labeling 58.8.1 General safety 58.8.2 Laser safety 58.8.3 Installation 58.8.4 Environment 58.8.5 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 2714<\/td>\n | 58.9 Characteristics of the fiber optic cabling 58.9.1 Fiber optic cabling model 58.9.2 Optical fiber and cable <\/td>\n<\/tr>\n | ||||||
| 2715<\/td>\n | 58.9.3 Optical fiber connection 58.9.4 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 2716<\/td>\n | 58.10 Protocol implementation conformance statement (PICS) proforma for Clause 58, Physical Medium Dependent (PMD) sublayer and medium, type 100BASE-LX10 (Long Wavelength) and 100BASE-BX10 (Bi-Directional Long Wavelength) 58.10.1 Introduction 58.10.2 Identification 58.10.2.1 Implementation identification 58.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2717<\/td>\n | 58.10.2.3 Major capabilities\/options 58.10.3 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100BASE-LX10 and 100BASE-BX10 58.10.3.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 2718<\/td>\n | 58.10.3.2 PMD to MDI optical specifications for 100BASE-LX10 58.10.3.3 PMD to MDI optical specifications for 100BASE-BX10-D 58.10.3.4 PMD to MDI optical specifications for 100BASE-BX10-U <\/td>\n<\/tr>\n | ||||||
| 2719<\/td>\n | 58.10.3.5 Optical measurement requirements 58.10.3.6 Environmental specifications 58.10.3.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 2721<\/td>\n | 59. Physical Medium Dependent (PMD) sublayer and medium, type 1000BASE-LX10 (Long Wavelength) and 1000BASE-BX10 (Bi-Directional Long Wavelength) 59.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2722<\/td>\n | 59.1.1 Goals and objectives 59.1.2 Positioning of 1000BASE-LX10 and 1000BASE-BX10 PMDs within the IEEE 802.3 architecture 59.1.3 Terminology and conventions <\/td>\n<\/tr>\n | ||||||
| 2723<\/td>\n | 59.1.4 Physical Medium Dependent (PMD) sublayer service interface 59.1.5 Delay constraints 59.1.5.1 PMD_UNITDATA.request 59.1.5.2 PMD_UNITDATA.indication 59.1.5.3 PMD_SIGNAL.indication <\/td>\n<\/tr>\n | ||||||
| 2724<\/td>\n | 59.2 PMD functional specifications 59.2.1 PMD block diagram 59.2.2 PMD transmit function 59.2.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 2725<\/td>\n | 59.2.4 PMD signal detect function 59.3 PMD to MDI optical specifications for 1000BASE-LX10 <\/td>\n<\/tr>\n | ||||||
| 2726<\/td>\n | 59.3.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2727<\/td>\n | 59.3.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2729<\/td>\n | 59.4 PMD to MDI optical specifications for 1000BASE-BX10-D and 1000BASE-BX10-U 59.4.1 Transmit optical specifications <\/td>\n<\/tr>\n | ||||||
| 2730<\/td>\n | 59.4.2 Receiver optical specifications 59.5 Illustrative 1000BASE-LX10 and 1000BASE-BX10 channels and penalties 59.6 Jitter specifications 59.7 Optical measurement requirements <\/td>\n<\/tr>\n | ||||||
| 2731<\/td>\n | 59.7.1 Test patterns <\/td>\n<\/tr>\n | ||||||
| 2734<\/td>\n | 59.7.2 Wavelength and spectral width measurements <\/td>\n<\/tr>\n | ||||||
| 2735<\/td>\n | 59.7.3 Optical power measurements 59.7.4 Extinction ratio measurements 59.7.5 OMA measurements (optional) 59.7.6 OMA relationship to extinction ratio and power measurements 59.7.7 Relative intensity noise optical modulation amplitude (RIN12OMA) 59.7.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 2736<\/td>\n | 59.7.9 Transmit rise\/fall characteristics 59.7.10 Transmitter and dispersion penalty (TDP) 59.7.11 Receive sensitivity measurements <\/td>\n<\/tr>\n | ||||||
| 2737<\/td>\n | 59.7.12 Total jitter measurements 59.7.13 Deterministic or high probability jitter measurement 59.7.14 Stressed receiver conformance test 59.7.15 Measurement of the receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n | ||||||
| 2738<\/td>\n | 59.8 Environmental, safety, and labeling specifications 59.8.1 General safety 59.8.2 Laser safety 59.8.3 Installation 59.8.4 Environment 59.8.5 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 2739<\/td>\n | 59.9 Characteristics of the fiber optic cabling 59.9.1 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 2740<\/td>\n | 59.9.2 Optical fiber and cable 59.9.3 Optical fiber connection <\/td>\n<\/tr>\n | ||||||
| 2741<\/td>\n | 59.9.4 Medium Dependent Interface (MDI) 59.9.5 Single-mode fiber offset-launch mode-conditioning patch cord for MMF operation of 1000BASE-LX10 <\/td>\n<\/tr>\n | ||||||
| 2743<\/td>\n | 59.10 Protocol implementation conformance statement (PICS) proforma for Clause 59, Physical Medium Dependent (PMD) sublayer and medium, type 1000BASE-LX10 (Long Wavelength) and 1000BASE-BX10 (Bi-Directional Long Wavelength) 59.10.1 Introduction 59.10.2 Identification 59.10.2.1 Implementation identification 59.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2744<\/td>\n | 59.10.3 Major capabilities\/options 59.10.3.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 2745<\/td>\n | 59.10.3.2 PMD to MDI optical specifications for 1000BASE-LX10 59.10.3.3 PMD to MDI optical specifications for 1000BASE-BX10-D 59.10.3.4 PMD to MDI optical specifications for 1000BASE-BX10-U <\/td>\n<\/tr>\n | ||||||
| 2746<\/td>\n | 59.10.3.5 Optical Measurement requirements 59.10.3.6 Environmental, safety, and labeling specifications <\/td>\n<\/tr>\n | ||||||
| 2747<\/td>\n | 59.10.3.7 Characteristics of the fiber optic cabling 59.10.3.8 Offset-launch mode-conditioning patch cord <\/td>\n<\/tr>\n | ||||||
| 2748<\/td>\n | 60. Physical Medium Dependent (PMD) sublayer and medium, type 1000BASE-PX (long wavelength passive optical networks) 60.1 Overview 60.1.1 Goals and objectives 60.1.2 Positioning of this PMD set within the IEEE 802.3 architecture <\/td>\n<\/tr>\n | ||||||
| 2749<\/td>\n | 60.1.3 Terminology and conventions 60.1.4 Physical Medium Dependent (PMD) sublayer service interface <\/td>\n<\/tr>\n | ||||||
| 2750<\/td>\n | 60.1.5 Delay constraints 60.1.5.1 PMD_UNITDATA.request 60.1.5.2 PMD_UNITDATA.indication <\/td>\n<\/tr>\n | ||||||
| 2751<\/td>\n | 60.1.5.3 PMD_SIGNAL.request 60.1.5.4 PMD_SIGNAL.indication 60.2 PMD functional specifications 60.2.1 PMD block diagram 60.2.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 2752<\/td>\n | 60.2.3 PMD receive function 60.2.4 PMD signal detect function 60.2.4.1 ONU PMD signal detect (downstream) 60.2.4.2 OLT PMD signal detect (upstream) <\/td>\n<\/tr>\n | ||||||
| 2753<\/td>\n | 60.2.4.3 1000BASE-PX Signal detect functions 60.2.5 PMD transmit enable function for ONU 60.3 PMD to MDI optical specifications for 1000BASE-PX10-D and 1000BASE-PX10-U 60.3.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2755<\/td>\n | 60.3.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2756<\/td>\n | 60.4 PMD to MDI optical specifications for 1000BASE-PX20-D and 1000BASE-PX20-U <\/td>\n<\/tr>\n | ||||||
| 2757<\/td>\n | 60.4.1 Transmitter optical specifications 60.4.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2759<\/td>\n | 60.5 PMD to MDI optical specifications for 1000BASE-PX30-D and 1000BASE-PX30-U <\/td>\n<\/tr>\n | ||||||
| 2760<\/td>\n | 60.5.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2761<\/td>\n | 60.5.2 Receiver optical specifications 60.6 PMD to MDI optical specifications for 1000BASE-PX40-D and 1000BASE-PX40-U <\/td>\n<\/tr>\n | ||||||
| 2763<\/td>\n | 60.6.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 2764<\/td>\n | 60.6.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 2765<\/td>\n | 60.7 Illustrative 1000BASE-PX channels and penalties 60.8 Jitter at TP1 to TP4 for 1000BASE-PX 60.9 Optical measurement requirements <\/td>\n<\/tr>\n | ||||||
| 2766<\/td>\n | 60.9.1 Frame-based test patterns 60.9.2 Wavelength, spectral width, and side mode suppression ratio (SMSR) measurements 60.9.3 Optical power measurements 60.9.4 Extinction ratio measurements <\/td>\n<\/tr>\n | ||||||
| 2767<\/td>\n | 60.9.5 OMA measurements (optional) 60.9.6 OMA relationship to extinction ratio and power measurements 60.9.7 Relative intensity noise optical modulation amplitude (RIN15OMA) 60.9.8 Transmitter optical waveform (transmit eye) 60.9.9 Transmitter and dispersion penalty (TDP) <\/td>\n<\/tr>\n | ||||||
| 2768<\/td>\n | 60.9.10 Receive sensitivity measurement 60.9.11 Stressed receive conformance test 60.9.12 Jitter measurements 60.9.13 Other measurements 60.9.13.1 Laser On\/Off timing measurement 60.9.13.1.1 Definitions <\/td>\n<\/tr>\n | ||||||
| 2769<\/td>\n | 60.9.13.1.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 2770<\/td>\n | 60.9.13.2 Receiver settling timing measurement 60.9.13.2.1 Definitions <\/td>\n<\/tr>\n | ||||||
| 2771<\/td>\n | 60.9.13.2.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 2772<\/td>\n | 60.10 Environmental, safety, and labeling 60.10.1 General safety 60.10.2 Laser safety 60.10.3 Installation 60.10.4 Environment 60.10.5 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 2773<\/td>\n | 60.11 Characteristics of the fiber optic cabling 60.11.1 Fiber optic cabling model 60.11.2 Optical fiber and cable <\/td>\n<\/tr>\n | ||||||
| 2774<\/td>\n | 60.11.3 Optical fiber connection 60.11.4 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 2775<\/td>\n | 60.12 Protocol implementation conformance statement (PICS) proforma for Clause 60, Physical Medium Dependent (PMD) sublayer and medium, type 1000BASE-PX (long wavelength passive optical networks) 60.12.1 Introduction 60.12.2 Identification 60.12.2.1 Implementation identification 60.12.2.2 Protocol Summary <\/td>\n<\/tr>\n | ||||||
| 2776<\/td>\n | 60.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 2777<\/td>\n | 60.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 1000BASE-PX (long wavelength passive optical networks) 60.12.4.1 PMD functional specifications 60.12.4.2 PMD to MDI optical specifications for 1000BASE-PX10-D <\/td>\n<\/tr>\n | ||||||
| 2778<\/td>\n | 60.12.4.3 PMD to MDI optical specifications for 1000BASE-PX10-U 60.12.4.4 PMD to MDI optical specifications for 1000BASE-PX20-D <\/td>\n<\/tr>\n | ||||||
| 2779<\/td>\n | 60.12.4.5 PMD to MDI optical specifications for 1000BASE-PX20-U 60.12.4.6 PMD to MDI optical specifications for 1000BASE-PX30-D 60.12.4.7 PMD to MDI optical specifications for 1000BASE-PX30-U <\/td>\n<\/tr>\n | ||||||
| 2780<\/td>\n | 60.12.4.8 PMD to MDI optical specifications for 1000BASE-PX40-D 60.12.4.9 PMD to MDI optical specifications for 1000BASE-PX40-U <\/td>\n<\/tr>\n | ||||||
| 2781<\/td>\n | 60.12.4.10 Optical measurement requirements 60.12.4.11 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 2782<\/td>\n | 60.12.4.12 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 2783<\/td>\n | 61. Physical Coding Sublayer (PCS), Transmission Convergence (TC) sublayer, and common specifications, type 10PASS-TS and type 2BASE-TL 61.1 Overview 61.1.1 Scope <\/td>\n<\/tr>\n | ||||||
| 2784<\/td>\n | 61.1.2 Objectives 61.1.3 Relation of 2BASE-TL and 10PASS-TS to other standards <\/td>\n<\/tr>\n | ||||||
| 2785<\/td>\n | 61.1.4 Summary 61.1.4.1 Summary of Physical Coding Sublayer (PCS) specification <\/td>\n<\/tr>\n | ||||||
| 2786<\/td>\n | 61.1.4.1.1 Implementation of Media Independent Interface 61.1.4.1.2 Summary of MAC-PHY Rate Matching specification 61.1.4.1.3 Summary of PME Aggregation specification <\/td>\n<\/tr>\n | ||||||
| 2787<\/td>\n | 61.1.4.1.4 Overview of management 61.1.4.2 Summary of Transmission Convergence (TC) specification 61.1.4.3 Summary of handshaking and PHY control specification 61.1.5 Application of 2BASE-TL, 10PASS-TS 61.1.5.1 Compatibility considerations 61.1.5.2 Incorporating the 2BASE-TL, 10PASS-TS PHY into a DTE 61.1.5.3 Application and examples of PME Aggregation <\/td>\n<\/tr>\n | ||||||
| 2788<\/td>\n | 61.1.5.3.1 Addressing PCS and PME instances 61.1.5.3.2 Indicating PME aggregation capability <\/td>\n<\/tr>\n | ||||||
| 2790<\/td>\n | 61.1.5.3.3 Setting PME aggregation connection <\/td>\n<\/tr>\n | ||||||
| 2791<\/td>\n | 61.1.5.4 Support for handshaking <\/td>\n<\/tr>\n | ||||||
| 2792<\/td>\n | 61.2 PCS functional specifications 61.2.1 MAC-PHY Rate Matching functional specifications 61.2.1.1 MAC-PHY Rate Matching functions 61.2.1.2 MAC-PHY Rate Matching functional interfaces 61.2.1.2.1 MAC-PHY Rate Matching \u2013 MII signals 61.2.1.2.2 MAC-PHY Rate Matching\u2013Management entity signals 61.2.1.3 MAC-PHY Rate Matching state diagrams 61.2.1.3.1 MAC-PHY Rate Matching state diagram constants 61.2.1.3.2 MAC-PHY Rate Matching state diagram variables <\/td>\n<\/tr>\n | ||||||
| 2793<\/td>\n | 61.2.1.3.3 MAC-PHY Rate Matching state diagram timers 61.2.1.3.4 MAC-PHY Rate Matching state diagram functions 61.2.1.3.5 MAC-PHY Rate Matching state diagrams <\/td>\n<\/tr>\n | ||||||
| 2795<\/td>\n | 61.2.2 PME Aggregation functional specifications <\/td>\n<\/tr>\n | ||||||
| 2796<\/td>\n | 61.2.2.1 PAF Enable and Bypass 61.2.2.2 PME Aggregation functions <\/td>\n<\/tr>\n | ||||||
| 2797<\/td>\n | 61.2.2.3 PME Aggregation Transmit function 61.2.2.4 PME Aggregation Receive function 61.2.2.4.1 Expected sequence number 61.2.2.4.2 PME Aggregation Receive function state diagram variables <\/td>\n<\/tr>\n | ||||||
| 2798<\/td>\n | 61.2.2.4.3 PME Aggregation Receive function state diagram 61.2.2.4.4 PME Aggregation Receive function state diagram description <\/td>\n<\/tr>\n | ||||||
| 2799<\/td>\n | 61.2.2.5 PME Aggregation restrictions <\/td>\n<\/tr>\n | ||||||
| 2800<\/td>\n | 61.2.2.6 PME Aggregation transmit function restrictions <\/td>\n<\/tr>\n | ||||||
| 2801<\/td>\n | 61.2.2.7 Error-detecting rules 61.2.2.7.1 Errors during fragment reception <\/td>\n<\/tr>\n | ||||||
| 2802<\/td>\n | 61.2.2.7.2 Errors in fragment sequencing 61.2.2.7.3 Errors in packet reassembly 61.2.2.8 PME aggregation functional interfaces 61.2.2.8.1 PME aggregation\u2013g-interface signals 61.2.2.8.2 PME aggregation\u2013management entity signals <\/td>\n<\/tr>\n | ||||||
| 2803<\/td>\n | 61.2.2.8.3 PME aggregation register functions <\/td>\n<\/tr>\n | ||||||
| 2804<\/td>\n | 61.2.2.8.4 PME aggregation discovery register functions 61.2.3 PCS sublayer: Management entity signals <\/td>\n<\/tr>\n | ||||||
| 2806<\/td>\n | 61.3 TC sublayer functional specifications <\/td>\n<\/tr>\n | ||||||
| 2807<\/td>\n | 61.3.1 The g-interface <\/td>\n<\/tr>\n | ||||||
| 2808<\/td>\n | 61.3.2 The a(b)-interface 61.3.2.1 a(b) data flow: reference G.993.1 section 7.1.1 61.3.2.2 a(b) synchronization flow <\/td>\n<\/tr>\n | ||||||
| 2809<\/td>\n | 61.3.2.3 a(b) OAM flow 61.3.3 TC functions 61.3.3.1 TC encapsulation and coding <\/td>\n<\/tr>\n | ||||||
| 2812<\/td>\n | 61.3.3.2 Sync insertion and transmit control <\/td>\n<\/tr>\n | ||||||
| 2813<\/td>\n | 61.3.3.3 TC-CRC functions <\/td>\n<\/tr>\n | ||||||
| 2814<\/td>\n | 61.3.3.4 Bit ordering <\/td>\n<\/tr>\n | ||||||
| 2816<\/td>\n | 61.3.3.5 Sync detection <\/td>\n<\/tr>\n | ||||||
| 2817<\/td>\n | 61.3.3.5.1 State diagram variables 61.3.3.5.2 State diagram 61.3.3.6 Receive control <\/td>\n<\/tr>\n | ||||||
| 2818<\/td>\n | 61.3.3.7 State diagrams for 64\/65-octet encapsulation 61.3.3.7.1 Transmit state diagram <\/td>\n<\/tr>\n | ||||||
| 2821<\/td>\n | 61.3.3.7.2 Receive state diagram <\/td>\n<\/tr>\n | ||||||
| 2824<\/td>\n | 61.3.3.8 TC sublayer management entity signals 61.4 Handshaking and PHY control specification for type 2BASE-TL and 10PASS-TS 61.4.1 Overview 61.4.2 Replacement of 1, \u201cScope\u201d 61.4.2.1 Scope <\/td>\n<\/tr>\n | ||||||
| 2825<\/td>\n | 61.4.2.2 Purpose 61.4.3 Changes to 6.1, \u201cDescription of signals\u201d 61.4.4 Changes to 9.4, \u201cStandard information field (S)\u201d <\/td>\n<\/tr>\n | ||||||
| 2826<\/td>\n | 61.4.5 Changes to 9.5, \u201cNon-standard information field (NS)\u201d 61.4.6 Applicability of Annex A\u2013B and Appendix I\u2013VI 61.4.7 PME Aggregation \u2013 remote access of PME Aggregation registers 61.4.7.1 Remote_discovery_register <\/td>\n<\/tr>\n | ||||||
| 2828<\/td>\n | 61.4.7.2 PME_Aggregate_register <\/td>\n<\/tr>\n | ||||||
| 2829<\/td>\n | 61.4.7.3 Timing and preferred transactions 61.5 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 2830<\/td>\n | 61.6 MDI specification 61.7 System considerations 61.8 Environmental specifications 61.9 PHY labeling <\/td>\n<\/tr>\n | ||||||
| 2831<\/td>\n | 61.10 Protocol implementation conformance statement (PICS) proforma for Clause 61, Physical Coding Sublayer (PCS), Transmission Convergence (TC) sublayer, and common specifications type 10PASS-TS, 2BASE-TL 61.10.1 Introduction 61.10.2 Identification 61.10.2.1 Implementation identification 61.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2832<\/td>\n | 61.10.3 Major capabilities\/options 61.10.4 PICS proforma tables for the Physical Coding Sublayer (PCS), Transmission Convergence (TC) sublayer, and common specifications type 10PASS-TS, 2BASE-TL 61.10.4.1 MAC-PHY Rate Matching <\/td>\n<\/tr>\n | ||||||
| 2833<\/td>\n | 61.10.4.2 64\/65-octet Encapsulation <\/td>\n<\/tr>\n | ||||||
| 2834<\/td>\n | 61.10.4.3 PME Aggregation <\/td>\n<\/tr>\n | ||||||
| 2839<\/td>\n | 61.10.4.4 Handshaking <\/td>\n<\/tr>\n | ||||||
| 2840<\/td>\n | 62. Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD), type 10PASS-TS 62.1 Overview 62.1.1 Scope 62.1.2 Objectives 62.1.3 Relation of 10PASS-TS to other standards 62.1.4 Summary of Physical Medium Attachment (PMA) specification 62.1.4.1 a(b)-interface 62.1.4.2 I-interface 62.1.4.2.1 I Data Flow <\/td>\n<\/tr>\n | ||||||
| 2841<\/td>\n | 62.1.4.2.2 I Synchronization Flow 62.2 PMA functional specifications 62.2.1 PMA functional diagram 62.2.2 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 2842<\/td>\n | 62.2.3 General exceptions <\/td>\n<\/tr>\n | ||||||
| 2843<\/td>\n | 62.2.4 Specific requirements and exceptions 62.2.4.1 Replacement of 9.3.1, \u201cPMS-TC functional diagram\u201d 62.2.4.2 Changes to 9.3.3, \u201cForward error correction\u201d 62.2.4.3 Changes to 9.3.5, \u201cFraming\u201d 62.3 PMD functional specifications 62.3.1 PMD Overview <\/td>\n<\/tr>\n | ||||||
| 2844<\/td>\n | 62.3.2 PMD functional specifications 62.3.3 General exceptions 62.3.4 Specific requirements and exceptions <\/td>\n<\/tr>\n | ||||||
| 2845<\/td>\n | 62.3.4.1 Replacement of 8.2.1, \u201cMulti-carrier Modulation\u201d <\/td>\n<\/tr>\n | ||||||
| 2846<\/td>\n | 62.3.4.2 Changes to 8.2.2, \u201cCyclic extension\u201d 62.3.4.3 Changes to 8.2.3, \u201cSynchronization\u201d 62.3.4.4 Replacement of 8.2.4, \u201cPower back-off in the upstream direction\u201d <\/td>\n<\/tr>\n | ||||||
| 2847<\/td>\n | 62.3.4.5 Changes to 8.2.5, \u201cConstellation encoder\u201d 62.3.4.6 Band notch profiles <\/td>\n<\/tr>\n | ||||||
| 2848<\/td>\n | 62.3.4.7 Changes to section 10, \u201cOperations and maintenance\u201d <\/td>\n<\/tr>\n | ||||||
| 2849<\/td>\n | 62.3.4.8 Changes to 11.1, \u201cVDSL Link State and Timing Diagram\u201d <\/td>\n<\/tr>\n | ||||||
| 2850<\/td>\n | 62.3.4.9 Changes to section 18 (Annex 4), \u201cHandshake procedure for VDSL\u201d 62.3.4.9.1 Replacement of 18.1, \u201cIntroduction\u201d 62.3.4.9.2 Replacement of 18.2, \u201cDescription of signals\u201d 62.3.4.9.3 Replacement of 18.3, \u201cMessage coding format\u201d 62.3.4.9.4 Replacement of 18.4.1, \u201cHandshake – 10PASS-TS-O\u201d <\/td>\n<\/tr>\n | ||||||
| 2852<\/td>\n | 62.3.4.9.5 Replacement of 18.4.2, \u201cHandshake – 10PASS-TS-R\u201d <\/td>\n<\/tr>\n | ||||||
| 2853<\/td>\n | 62.3.5 Transmission medium interface characteristics <\/td>\n<\/tr>\n | ||||||
| 2854<\/td>\n | 62.3.5.1 Transmit signal characteristics 62.3.5.1.1 Wide-band power <\/td>\n<\/tr>\n | ||||||
| 2855<\/td>\n | 62.3.5.1.2 Power spectral density (PSD) 62.3.5.1.3 Egress control 62.3.5.2 Termination impedance 62.3.5.3 Return loss <\/td>\n<\/tr>\n | ||||||
| 2856<\/td>\n | 62.3.5.4 Output signal balance <\/td>\n<\/tr>\n | ||||||
| 2857<\/td>\n | 62.4 Protocol implementation conformance statement (PICS) proforma for Clause 62, Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD), type 10PASS-TS 62.4.1 Introduction 62.4.2 Identification 62.4.2.1 Implementation identification 62.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2858<\/td>\n | 62.4.3 Major capabilities\/options 62.4.4 PICS proforma tables for the Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD), type 10PASS-TS 62.4.4.1 MCM-VDSL based PMA <\/td>\n<\/tr>\n | ||||||
| 2859<\/td>\n | 62.4.4.2 MCM-VDSL based PMD <\/td>\n<\/tr>\n | ||||||
| 2862<\/td>\n | 63. Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD), type 2BASE-TL 63.1 2BASE-TL Overview 63.1.1 Scope 63.1.2 Objectives 63.1.3 Relation of 2BASE-TL to other standards 63.1.4 Summary of Physical Medium Attachment (PMA) specification <\/td>\n<\/tr>\n | ||||||
| 2863<\/td>\n | 63.1.4.1 a(b)-interface 63.1.4.2 The I-interface 63.1.4.2.1 The I Data Flow <\/td>\n<\/tr>\n | ||||||
| 2864<\/td>\n | 63.1.4.2.2 I Synchronization Flow 63.1.4.3 Operation Channel (OC) 63.1.5 Summary of Physical Medium Dependent (PMD) specification <\/td>\n<\/tr>\n | ||||||
| 2865<\/td>\n | 63.2 2BASE-TL PMA functional specifications 63.2.1 General exceptions 63.2.2 Specific requirements and exceptions <\/td>\n<\/tr>\n | ||||||
| 2866<\/td>\n | 63.2.2.1 Changes to 7.1, \u201cData Mode Operation\u201d 63.2.2.2 Changes to Section 9, \u201cManagement\u201d 63.2.2.3 Relation between the 2BASE-TL registers and the SHDSL management functions <\/td>\n<\/tr>\n | ||||||
| 2867<\/td>\n | 63.3 2BASE-TL PMD functional specifications 63.3.1 General exceptions <\/td>\n<\/tr>\n | ||||||
| 2868<\/td>\n | 63.3.2 Specific requirements and exceptions 63.3.2.1 Replacement of section 5, \u201cTransport Capacity\u201d <\/td>\n<\/tr>\n | ||||||
| 2869<\/td>\n | 63.3.2.2 Changes to section 6, \u201cPMD Layer Functional Characteristics\u201d <\/td>\n<\/tr>\n | ||||||
| 2870<\/td>\n | 63.3.2.3 Changes to section 10, \u201cClock Architecture\u201d 63.3.2.4 Changes to Annex A, \u201cRegional Requirements\u2014Region 1\u201d 63.3.2.4.1 General Changes 63.3.2.4.2 Additional requirement: wetting current <\/td>\n<\/tr>\n | ||||||
| 2871<\/td>\n | 63.3.2.5 Changes to Annex B, \u201cRegional Requirements\u2014Region 2\u201d 63.3.2.5.1 General changes 63.3.2.5.2 Additional requirement: wetting current 63.3.2.6 Changes to Annex C, \u201cRegional Requirements \u2013 Region 3\u201d <\/td>\n<\/tr>\n | ||||||
| 2872<\/td>\n | 63.4 Protocol implementation conformance statement (PICS) proforma for Clause 63, Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD), type 2BASE-TL 63.4.1 Introduction 63.4.2 Identification 63.4.2.1 Implementation identification 63.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2873<\/td>\n | 63.4.3 Major capabilities\/options 63.4.4 PICS proforma tables for the Physical Medium Attachment (PMA) and Physical Medium Dependent (PMD) sublayers, type 2BASE-TL 63.4.4.1 SHDSL based PMA <\/td>\n<\/tr>\n | ||||||
| 2874<\/td>\n | 63.4.4.2 SHDSL based PMD <\/td>\n<\/tr>\n | ||||||
| 2875<\/td>\n | 64. Multipoint MAC Control 64.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2876<\/td>\n | 64.1.1 Goals and objectives 64.1.2 Position of Multipoint MAC Control within the IEEE 802.3 hierarchy <\/td>\n<\/tr>\n | ||||||
| 2878<\/td>\n | 64.1.3 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 2879<\/td>\n | 64.1.4 Service interfaces 64.1.5 State diagram conventions 64.2 Multipoint MAC Control operation <\/td>\n<\/tr>\n | ||||||
| 2880<\/td>\n | 64.2.1 Principles of Multipoint MAC Control <\/td>\n<\/tr>\n | ||||||
| 2881<\/td>\n | 64.2.1.1 Ranging and Timing Process <\/td>\n<\/tr>\n | ||||||
| 2882<\/td>\n | 64.2.2 Multipoint transmission control, Control Parser, and Control Multiplexer <\/td>\n<\/tr>\n | ||||||
| 2885<\/td>\n | 64.2.2.1 Constants 64.2.2.2 Counters <\/td>\n<\/tr>\n | ||||||
| 2886<\/td>\n | 64.2.2.3 Variables <\/td>\n<\/tr>\n | ||||||
| 2887<\/td>\n | 64.2.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 2888<\/td>\n | 64.2.2.5 Timers 64.2.2.6 Messages 64.2.2.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 2894<\/td>\n | 64.3 Multipoint Control Protocol (MPCP) 64.3.1 Principles of Multipoint Control Protocol 64.3.2 Compatibility considerations 64.3.2.1 PAUSE operation <\/td>\n<\/tr>\n | ||||||
| 2895<\/td>\n | 64.3.2.2 Optional Shared LAN Emulation 64.3.2.3 Multicast and single copy broadcast support 64.3.2.4 Delay requirements 64.3.3 Discovery Processing <\/td>\n<\/tr>\n | ||||||
| 2899<\/td>\n | 64.3.3.1 Constants 64.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2900<\/td>\n | 64.3.3.3 Functions 64.3.3.4 Timers 64.3.3.5 Messages <\/td>\n<\/tr>\n | ||||||
| 2903<\/td>\n | 64.3.3.6 State diagram <\/td>\n<\/tr>\n | ||||||
| 2908<\/td>\n | 64.3.4 Report Processing 64.3.4.1 Constants 64.3.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2909<\/td>\n | 64.3.4.3 Functions 64.3.4.4 Timers 64.3.4.5 Messages <\/td>\n<\/tr>\n | ||||||
| 2910<\/td>\n | 64.3.4.6 State diagram <\/td>\n<\/tr>\n | ||||||
| 2912<\/td>\n | 64.3.5 Gate Processing 64.3.5.1 Constants <\/td>\n<\/tr>\n | ||||||
| 2913<\/td>\n | 64.3.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 2914<\/td>\n | 64.3.5.3 Functions <\/td>\n<\/tr>\n | ||||||
| 2915<\/td>\n | 64.3.5.4 Timers 64.3.5.5 Messages <\/td>\n<\/tr>\n | ||||||
| 2917<\/td>\n | 64.3.5.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 2920<\/td>\n | 64.3.6 MPCPDU structure and encoding <\/td>\n<\/tr>\n | ||||||
| 2921<\/td>\n | 64.3.6.1 GATE description <\/td>\n<\/tr>\n | ||||||
| 2923<\/td>\n | 64.3.6.2 REPORT description <\/td>\n<\/tr>\n | ||||||
| 2924<\/td>\n | 64.3.6.3 REGISTER_REQ description <\/td>\n<\/tr>\n | ||||||
| 2926<\/td>\n | 64.3.6.4 REGISTER description <\/td>\n<\/tr>\n | ||||||
| 2927<\/td>\n | 64.3.6.5 REGISTER_ACK description <\/td>\n<\/tr>\n | ||||||
| 2929<\/td>\n | 64.4 Protocol implementation conformance statement (PICS) proforma for Clause 64, Multipoint MAC Control 64.4.1 Introduction 64.4.2 Identification 64.4.2.1 Implementation identification 64.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2930<\/td>\n | 64.4.3 Major capabilities\/options 64.4.4 PICS proforma tables for Multipoint MAC Control 64.4.4.1 Compatibility Considerations 64.4.4.2 Multipoint MAC Control <\/td>\n<\/tr>\n | ||||||
| 2931<\/td>\n | 64.4.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 2932<\/td>\n | 64.4.4.4 MPCP <\/td>\n<\/tr>\n | ||||||
| 2933<\/td>\n | 65. Extensions of the Reconciliation Sublayer (RS) and Physical Coding Sublayer (PCS)\/Physical Media Attachment (PMA) for 1000BASE-X for multipoint links and forward error correction 65.1 Extensions of the Reconciliation Sublayer (RS) for point-to-point emulation 65.1.1 Overview 65.1.2 Principle of operation <\/td>\n<\/tr>\n | ||||||
| 2934<\/td>\n | 65.1.3 Functional specifications 65.1.3.1 Variables 65.1.3.2 Transmit <\/td>\n<\/tr>\n | ||||||
| 2935<\/td>\n | 65.1.3.2.1 SLD 65.1.3.2.2 LLID 65.1.3.2.3 CRC-8 65.1.3.3 Receive function <\/td>\n<\/tr>\n | ||||||
| 2936<\/td>\n | 65.1.3.3.1 SLD 65.1.3.3.2 LLID <\/td>\n<\/tr>\n | ||||||
| 2937<\/td>\n | 65.1.3.3.3 CRC-8 65.2 Extensions of the physical coding sublayer for data detection and forward error correction 65.2.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2938<\/td>\n | 65.2.2 Burst-mode operation 65.2.2.1 Principle of operation <\/td>\n<\/tr>\n | ||||||
| 2940<\/td>\n | 65.2.2.2 Detailed functions and state diagrams 65.2.2.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 2941<\/td>\n | 65.2.2.2.2 Functions 65.2.2.2.3 Messages 65.2.2.2.4 Counters <\/td>\n<\/tr>\n | ||||||
| 2942<\/td>\n | 65.2.2.3 State diagrams 65.2.3 Forward error correction <\/td>\n<\/tr>\n | ||||||
| 2943<\/td>\n | 65.2.3.1 FEC code 65.2.3.2 FEC frame format 65.2.3.2.1 Placing parity octets 65.2.3.2.2 Shortened last block 65.2.3.2.3 Special frame markers <\/td>\n<\/tr>\n | ||||||
| 2944<\/td>\n | 65.2.3.3 FEC sublayer operation 65.2.3.3.1 Principles of operation <\/td>\n<\/tr>\n | ||||||
| 2945<\/td>\n | 65.2.3.3.2 Functional block diagram 65.2.3.3.3 Transmission <\/td>\n<\/tr>\n | ||||||
| 2946<\/td>\n | 65.2.3.3.4 Reception 65.2.3.4 Detailed functions and state diagrams <\/td>\n<\/tr>\n | ||||||
| 2947<\/td>\n | 65.2.3.4.1 State variables 65.2.3.4.2 Notation conventions 65.2.3.4.3 Constants <\/td>\n<\/tr>\n | ||||||
| 2948<\/td>\n | 65.2.3.4.4 Variables <\/td>\n<\/tr>\n | ||||||
| 2950<\/td>\n | 65.2.3.4.5 Functions 65.2.3.4.6 Counters <\/td>\n<\/tr>\n | ||||||
| 2951<\/td>\n | 65.2.3.4.7 Messages 65.2.3.5 State diagrams 65.2.3.5.1 Transmit state diagram 65.2.3.5.2 Receive synchronization state diagram 65.2.3.5.3 Receive state diagram <\/td>\n<\/tr>\n | ||||||
| 2952<\/td>\n | 65.2.3.6 Error monitoring capability <\/td>\n<\/tr>\n | ||||||
| 2954<\/td>\n | 65.2.3.6.1 buffer_head_coding_violation_counter 65.2.3.6.2 FEC_corrected_blocks_counter <\/td>\n<\/tr>\n | ||||||
| 2955<\/td>\n | 65.2.3.6.3 FEC_uncorrected_Blocks_counter 65.3 Extensions to PMA for 1000BASE-PX 65.3.1 Extensions for 1000BASE-PX-U 65.3.1.1 Physical Medium Attachment (PMA) sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 2956<\/td>\n | 65.3.1.2 Loop-timing specifications for ONUs 65.3.2 Extensions for 1000BASE-PX-D 65.3.2.1 CDR lock timing measurement 65.3.2.1.1 Definitions 65.3.2.1.2 Test specification 65.3.3 Delay variation requirements <\/td>\n<\/tr>\n | ||||||
| 2957<\/td>\n | 65.4 Protocol implementation conformance statement (PICS) proforma for Clause 65, Extensions of the Reconciliation Sublayer (RS) and Physical Coding Sublayer (PCS)\/Physical Media Attachment (PMA) for 1000BASE-X for multipoint links and forward error … 65.4.1 Introduction 65.4.2 Identification 65.4.2.1 Implementation identification 65.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2958<\/td>\n | 65.4.3 Major capabilities\/options 65.4.4 PICS proforma tables for Extensions of Reconciliation Sublayer (RS) and Physical Coding Sublayer (PCS)\/Physical Media Attachment (PMA) for 1000BASE-X for multipoint links and forward error correction 65.4.4.1 Operating modes of OLT MACs 65.4.4.2 ONU and OLT variables <\/td>\n<\/tr>\n | ||||||
| 2959<\/td>\n | 65.4.4.3 Preamble mapping and replacement 65.4.4.4 Data detection 65.4.4.5 FEC requirements <\/td>\n<\/tr>\n | ||||||
| 2960<\/td>\n | 65.4.4.6 FEC State diagrams 65.4.4.7 PMA 65.4.4.8 OLT Receiver 65.4.4.9 Delay variation <\/td>\n<\/tr>\n | ||||||
| 2961<\/td>\n | 66. Extensions of the 10 Gb\/s Reconciliation Sublayer (RS), 100BASE-X PHY, and 1000BASE-X PHY for unidirectional transport 66.1 Modifications to the physical coding sublayer (PCS) and physical medium attachment (PMA) sublayer, type 100BASE-X 66.1.1 Overview 66.1.2 Functional specifications 66.1.2.1 Variables 66.1.2.2 Transmit state diagram <\/td>\n<\/tr>\n | ||||||
| 2962<\/td>\n | 66.1.2.3 Far-end fault generate <\/td>\n<\/tr>\n | ||||||
| 2963<\/td>\n | 66.2 Modifications to the physical coding sublayer (PCS) and physical medium attachment (PMA) sublayer, type 1000BASE-X 66.2.1 Overview 66.2.2 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 2964<\/td>\n | 66.2.2.1 Variables 66.2.2.2 Transmit 66.2.2.3 Transmit state diagram <\/td>\n<\/tr>\n | ||||||
| 2965<\/td>\n | 66.3 Modifications to the reconciliation sublayer (RS) for P2P 10 Gb\/s operation 66.3.1 Overview 66.3.2 Functional specifications 66.3.2.1 Link fault signaling 66.3.2.2 Variables 66.3.2.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 2966<\/td>\n | 66.4 Modifications to the RS for P2MP 10 Gb\/s operation 66.4.1 Overview 66.4.2 Functional specifications 66.4.2.1 Link fault signaling 66.4.2.2 Variables 66.4.2.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 2968<\/td>\n | 66.5 Protocol implementation conformance statement (PICS) proforma for Clause 66, Extensions of the 10 Gb\/s Reconciliation Sublayer (RS), 100BASE-X PHY, and 1000BASE-X PHY for unidirectional transport 66.5.1 Introduction 66.5.2 Identification 66.5.2.1 Implementation identification 66.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 2969<\/td>\n | 66.5.3 Major capabilities\/options 66.5.4 PICS proforma tables for Extensions of the 10 Gb\/s Reconciliation Sublayer (RS), 100BASE-X PHY, and 1000BASE-X PHY for unidirectional transport 66.5.4.1 Maintaining compatibility with IEEE 802.1 protocols 66.5.4.2 Extensions of the 100BASE-X PHY <\/td>\n<\/tr>\n | ||||||
| 2970<\/td>\n | 66.5.4.3 Extensions of the 1000BASE-X PHY 66.5.4.4 Extensions of the 10 Gb\/s P2P RS <\/td>\n<\/tr>\n | ||||||
| 2971<\/td>\n | 66.5.4.5 Extensions of the 10 Gb\/s P2MP RS <\/td>\n<\/tr>\n | ||||||
| 2972<\/td>\n | 67. System considerations for Ethernet subscriber access networks 67.1 Overview <\/td>\n<\/tr>\n | ||||||
| 2974<\/td>\n | 67.2 Discussion and examples of EFM P2MP topologies 67.2.1 Trade off between link span and split ratio for P2MP PON architecture 67.2.2 Single splitter topology for P2MP PON architecture <\/td>\n<\/tr>\n | ||||||
| 2975<\/td>\n | 67.2.3 Tree-and-branch topology for P2MP PON architecture 67.2.4 Interoperability between certain 1000BASE-PX10 and 1000BASE-PX20 <\/td>\n<\/tr>\n | ||||||
| 2976<\/td>\n | 67.3 Hybrid media topologies 67.4 Topology limitations 67.5 Deployment restrictions for subscriber access copper 67.6 Operations, Administration, and Maintenance <\/td>\n<\/tr>\n | ||||||
| 2977<\/td>\n | 67.6.1 Unidirectional links 67.6.2 Active and Passive modes 67.6.3 Link status signaling in P2MP networks <\/td>\n<\/tr>\n | ||||||
| 2978<\/td>\n | 68. Physical medium dependent (PMD) sublayer type 10GBASE-LRM 68.1 Overview 68.1.1 Physical Medium Dependent (PMD) sublayer service interface 68.2 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 2979<\/td>\n | 68.3 PMD MDIO function mapping 68.4 PMD functional specifications 68.4.1 PMD block diagram 68.4.2 PMD transmit function 68.4.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 2980<\/td>\n | 68.4.4 PMD signal detect function 68.4.5 PMD_reset function 68.4.6 PMD_fault function 68.4.7 PMD_global_transmit_disable function <\/td>\n<\/tr>\n | ||||||
| 2981<\/td>\n | 68.4.8 PMD_transmit_fault function 68.4.9 PMD_receive_fault function 68.5 PMD to MDI optical specifications 68.5.1 Transmitter optical specifications 68.5.2 Characteristics of signal within, and at the receiving end of, a compliant 10GBASE- LRM channel <\/td>\n<\/tr>\n | ||||||
| 2982<\/td>\n | 68.5.3 Receiver optical specifications 68.5.3.1 Dynamic response 68.6 Definitions of optical parameters and measurement methods 68.6.1 Test patterns and related subclauses for optical parameters 68.6.2 Optical modulation amplitude (OMA) <\/td>\n<\/tr>\n | ||||||
| 2983<\/td>\n | 68.6.3 Extinction ratio measurement 68.6.4 Relationship between OMA, extinction ratio and average power 68.6.5 Transmitter optical waveform\u2014transmitter eye mask <\/td>\n<\/tr>\n | ||||||
| 2984<\/td>\n | 68.6.5.1 Examples of transmitter eye mask acceptable hit count <\/td>\n<\/tr>\n | ||||||
| 2985<\/td>\n | 68.6.6 Transmitter waveform and dispersion penalty (TWDP) 68.6.6.1 TWDP measurement procedure <\/td>\n<\/tr>\n | ||||||
| 2991<\/td>\n | 68.6.6.2 TWDP signal processing algorithm , , <\/td>\n<\/tr>\n | ||||||
| 2993<\/td>\n | 68.6.7 Transmitter signal to noise ratio <\/td>\n<\/tr>\n | ||||||
| 2994<\/td>\n | 68.6.8 Transmitter uncorrelated jitter <\/td>\n<\/tr>\n | ||||||
| 2995<\/td>\n | 68.6.9 Comprehensive stressed receiver sensitivity and overload 68.6.9.1 Comprehensive stressed receiver sensitivity and overload test block diagram <\/td>\n<\/tr>\n | ||||||
| 2996<\/td>\n | 68.6.9.2 Comprehensive stressed receiver test signal characteristics <\/td>\n<\/tr>\n | ||||||
| 2997<\/td>\n | 68.6.9.3 Comprehensive stressed receiver test signal calibration <\/td>\n<\/tr>\n | ||||||
| 3000<\/td>\n | 68.6.9.4 Comprehensive stressed receiver test procedure 68.6.10 Simple stressed receiver sensitivity and overload (optional) 68.6.11 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 3001<\/td>\n | 68.7 Safety, installation, environment, and labeling 68.7.1 Safety <\/td>\n<\/tr>\n | ||||||
| 3002<\/td>\n | 68.7.2 Installation 68.7.3 Environment 68.7.4 PMD labeling 68.8 Fiber optic cabling model 68.9 Characteristics of the fiber optic cabling (channel) 68.9.1 Optical fiber and cable 68.9.2 Optical fiber connections <\/td>\n<\/tr>\n | ||||||
| 3003<\/td>\n | 68.9.2.1 Connection insertion loss 68.9.2.2 Maximum discrete reflectance 68.9.3 Single-mode fiber offset-launch mode-conditioning patch cord <\/td>\n<\/tr>\n | ||||||
| 3004<\/td>\n | 68.10 Protocol implementation conformance statement (PICS) proforma for Clause 68, Physical medium dependent (PMD) sublayer type 10GBASE-LRM 68.10.1 Introduction 68.10.2 Identification 68.10.2.1 Implementation identification 68.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3005<\/td>\n | 68.10.2.3 Major capabilities\/options 68.10.3 PICS proforma tables for physical medium dependent (PMD) sublayer type 10GBASE-LRM 68.10.3.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3006<\/td>\n | 68.10.3.2 Management functions 68.10.3.3 PMD to MDI optical specifications <\/td>\n<\/tr>\n | ||||||
| 3007<\/td>\n | 68.10.3.4 Definitions of optical parameters and measurement methods 68.10.3.5 Safety, installation, environment, and labeling <\/td>\n<\/tr>\n | ||||||
| 3008<\/td>\n | 68.10.3.6 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 3009<\/td>\n | 69. Introduction to Ethernet operation over electrical backplanes 69.1 Overview 69.1.1 Scope 69.1.2 Relationship of Backplane Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 3014<\/td>\n | 69.2 Summary of Backplane Ethernet Sublayers 69.2.1 Reconciliation sublayer and media independent interfaces 69.2.2 Management interface <\/td>\n<\/tr>\n | ||||||
| 3015<\/td>\n | 69.2.3 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 3016<\/td>\n | 69.2.4 Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 3017<\/td>\n | 69.2.5 Management 69.2.6 Low-Power Idle 69.3 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3018<\/td>\n | 69.4 State diagrams 69.5 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 3020<\/td>\n | 70. Physical Medium Dependent sublayer and baseband medium, type 1000BASE-KX 70.1 Overview 70.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3021<\/td>\n | 70.2.1 PMD_RXQUIET.request 70.2.1.1 Semantics of the service primitive 70.2.1.2 When generated 70.2.1.3 Effect of receipt 70.2.2 PMD_TXQUIET.request 70.2.2.1 Semantics of the service primitive 70.2.2.2 When generated 70.2.2.3 Effect of receipt 70.3 PCS requirements for Auto-Negotiation (AN) service interface 70.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3022<\/td>\n | 70.5 PMD MDIO function mapping 70.6 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3023<\/td>\n | 70.6.1 Link block diagram 70.6.2 PMD transmit function 70.6.3 PMD receive function 70.6.4 PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 3024<\/td>\n | 70.6.5 PMD transmit disable function 70.6.6 Loopback mode 70.6.7 PMD fault function 70.6.8 PMD transmit fault function 70.6.9 PMD receive fault function 70.6.10 PMD LPI function <\/td>\n<\/tr>\n | ||||||
| 3025<\/td>\n | 70.7 1000BASE-KX electrical characteristics 70.7.1 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3026<\/td>\n | 70.7.1.1 Test fixtures 70.7.1.2 Test fixture impedance 70.7.1.3 Signaling speed 70.7.1.4 Differential output eye mask <\/td>\n<\/tr>\n | ||||||
| 3027<\/td>\n | 70.7.1.5 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 3028<\/td>\n | 70.7.1.6 Differential output return loss 70.7.1.7 Transition time <\/td>\n<\/tr>\n | ||||||
| 3029<\/td>\n | 70.7.1.8 Transmit jitter 70.7.1.9 Transmit jitter test requirements 70.7.2 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3030<\/td>\n | 70.7.2.1 Receiver interference tolerance 70.7.2.2 Signaling speed range 70.7.2.3 AC-coupling 70.7.2.4 Input signal amplitude <\/td>\n<\/tr>\n | ||||||
| 3031<\/td>\n | 70.7.2.5 Differential input return loss 70.8 Interconnect characteristics 70.9 Environmental specifications 70.9.1 General safety 70.9.2 Network safety 70.9.3 Installation and maintenance guidelines 70.9.4 Electromagnetic compatibility 70.9.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3032<\/td>\n | 70.10 Protocol implementation conformance statement (PICS) proforma for Clause 70, Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-KX 70.10.1 Introduction 70.10.2 Identification 70.10.2.1 Implementation identification 70.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3033<\/td>\n | 70.10.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3034<\/td>\n | 70.10.4 PICS proforma tables for Clause 70, Physical Medium Dependent (PMD) sublayer and baseband medium, type 1000BASE-KX 70.10.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3035<\/td>\n | 70.10.4.2 Management functions 70.10.4.3 Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 3036<\/td>\n | 70.10.4.4 Receiver electrical characteristics 70.10.4.5 Environmental and safety specifications <\/td>\n<\/tr>\n | ||||||
| 3037<\/td>\n | 71. Physical Medium Dependent sublayer and baseband medium, type 10GBASE-KX4 71.1 Overview 71.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3038<\/td>\n | 71.2.1 PMD_RXQUIET.request 71.2.1.1 Semantics of the service primitive 71.2.1.2 When generated 71.2.1.3 Effect of receipt 71.2.2 PMD_TXQUIET.request 71.2.2.1 Semantics of the service primitive 71.2.2.2 When generated 71.2.2.3 Effect of receipt 71.3 PCS requirements for Auto-Negotiation (AN) service interface <\/td>\n<\/tr>\n | ||||||
| 3039<\/td>\n | 71.4 Delay constraints 71.5 PMD MDIO function mapping 71.6 PMD functional specifications 71.6.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 3040<\/td>\n | 71.6.2 PMD Transmit function <\/td>\n<\/tr>\n | ||||||
| 3041<\/td>\n | 71.6.3 PMD Receive function 71.6.4 Global PMD signal detect function 71.6.5 PMD lane-by-lane signal detect function 71.6.6 Global PMD transmit disable function 71.6.7 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n | ||||||
| 3042<\/td>\n | 71.6.8 Loopback mode 71.6.9 PMD fault function 71.6.10 PMD transmit fault function 71.6.11 PMD receive fault function 71.6.12 PMD LPI function <\/td>\n<\/tr>\n | ||||||
| 3043<\/td>\n | 71.7 Electrical characteristics for 10GBASE-KX4 71.7.1 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3044<\/td>\n | 71.7.1.1 Test fixtures 71.7.1.2 Test fixture impedance 71.7.1.3 Signaling speed 71.7.1.4 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 3045<\/td>\n | 71.7.1.5 Output return loss <\/td>\n<\/tr>\n | ||||||
| 3046<\/td>\n | 71.7.1.6 Differential output template <\/td>\n<\/tr>\n | ||||||
| 3048<\/td>\n | 71.7.1.7 Transition time 71.7.1.8 Transmit jitter 71.7.1.9 Transmit jitter test requirements 71.7.2 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3049<\/td>\n | 71.7.2.1 Receiver interference tolerance 71.7.2.2 Signaling speed 71.7.2.3 AC-coupling 71.7.2.4 Input signal amplitude <\/td>\n<\/tr>\n | ||||||
| 3050<\/td>\n | 71.7.2.5 Differential input return loss 71.8 Interconnect characteristics 71.9 Environmental specifications 71.9.1 General safety 71.9.2 Network safety 71.9.3 Installation and maintenance guidelines 71.9.4 Electromagnetic compatibility 71.9.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3051<\/td>\n | 71.10 Protocol implementation conformance statement (PICS) proforma for Clause 71, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-KX4 71.10.1 Introduction 71.10.2 Identification 71.10.2.1 Implementation identification 71.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3052<\/td>\n | 71.10.3 Major capabilities\/options 71.10.4 PICS proforma tables for Clause 71, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-KX4 71.10.4.1 PCS requirements for AN service interface <\/td>\n<\/tr>\n | ||||||
| 3053<\/td>\n | 71.10.4.2 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3055<\/td>\n | 71.10.4.3 Management functions <\/td>\n<\/tr>\n | ||||||
| 3056<\/td>\n | 71.10.4.4 Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 3057<\/td>\n | 71.10.4.5 Receiver electrical characteristics 71.10.4.6 Environmental and safety specifications <\/td>\n<\/tr>\n | ||||||
| 3058<\/td>\n | 72. Physical Medium Dependent sublayer and baseband medium, type 10GBASE-KR 72.1 Overview 72.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3059<\/td>\n | 72.2.1 PMD_RX_MODE.request 72.2.1.1 Semantics of the service primitive 72.2.1.2 When generated 72.2.1.3 Effect of receipt 72.2.2 PMD_TX_MODE.request 72.2.2.1 Semantics of the service primitive 72.2.2.2 When generated 72.2.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3060<\/td>\n | 72.3 PCS requirements for Auto-Negotiation (AN) service interface 72.4 Delay constraints 72.5 PMD MDIO function mapping 72.6 PMD functional specifications 72.6.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 3061<\/td>\n | 72.6.2 PMD transmit function 72.6.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 3062<\/td>\n | 72.6.4 PMD signal detect function 72.6.5 PMD transmit disable function 72.6.6 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 3063<\/td>\n | 72.6.7 PMD_fault function 72.6.8 PMD transmit fault function 72.6.9 PMD receive fault function 72.6.10 PMD control function 72.6.10.1 Overview 72.6.10.2 Training frame structure <\/td>\n<\/tr>\n | ||||||
| 3064<\/td>\n | 72.6.10.2.1 Frame marker 72.6.10.2.2 Control channel encoding 72.6.10.2.3 Coefficient update field <\/td>\n<\/tr>\n | ||||||
| 3065<\/td>\n | 72.6.10.2.3.1 Preset 72.6.10.2.3.2 Initialize <\/td>\n<\/tr>\n | ||||||
| 3066<\/td>\n | 72.6.10.2.3.3 Coefficient (k) update <\/td>\n<\/tr>\n | ||||||
| 3067<\/td>\n | 72.6.10.2.4 Status report field 72.6.10.2.4.4 Receiver ready 72.6.10.2.4.5 Coefficient (k) status <\/td>\n<\/tr>\n | ||||||
| 3068<\/td>\n | 72.6.10.2.5 Coefficient update process 72.6.10.2.6 Training pattern 72.6.10.3 State variables 72.6.10.3.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3071<\/td>\n | 72.6.10.3.2 Timers 72.6.10.3.3 Counters 72.6.10.3.4 Functions <\/td>\n<\/tr>\n | ||||||
| 3072<\/td>\n | 72.6.10.4 State diagrams 72.6.10.4.1 Frame lock 72.6.10.4.2 Training 72.6.10.4.3 Coefficient update <\/td>\n<\/tr>\n | ||||||
| 3075<\/td>\n | 72.6.11 PMD LPI function <\/td>\n<\/tr>\n | ||||||
| 3076<\/td>\n | 72.7 10GBASE-KR electrical characteristics 72.7.1 Transmitter characteristics 72.7.1.1 Test fixture <\/td>\n<\/tr>\n | ||||||
| 3077<\/td>\n | 72.7.1.2 Test fixture impedance 72.7.1.3 Signaling speed 72.7.1.4 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 3078<\/td>\n | 72.7.1.5 Differential output return loss <\/td>\n<\/tr>\n | ||||||
| 3079<\/td>\n | 72.7.1.6 Common-mode output return loss <\/td>\n<\/tr>\n | ||||||
| 3080<\/td>\n | 72.7.1.7 Transition time 72.7.1.8 Transmit jitter test requirements 72.7.1.9 Transmit jitter <\/td>\n<\/tr>\n | ||||||
| 3081<\/td>\n | 72.7.1.10 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 3082<\/td>\n | 72.7.1.11 Transmitter output waveform requirements <\/td>\n<\/tr>\n | ||||||
| 3084<\/td>\n | 72.7.2 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3085<\/td>\n | 72.7.2.1 Receiver interference tolerance 72.7.2.2 Signaling speed range 72.7.2.3 AC-coupling 72.7.2.4 Input signal amplitude <\/td>\n<\/tr>\n | ||||||
| 3086<\/td>\n | 72.7.2.5 Differential input return loss 72.8 Interconnect characteristics 72.9 Environmental specifications 72.9.1 General safety 72.9.2 Network safety 72.9.3 Installation and maintenance guidelines 72.9.4 Electromagnetic compatibility 72.9.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3087<\/td>\n | 72.10 Protocol implementation conformance statement (PICS) proforma for Clause 72, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-KR 72.10.1 Introduction 72.10.2 Identification 72.10.2.1 Implementation identification 72.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3088<\/td>\n | 72.10.3 Major capabilities\/options 72.10.4 PICS proforma tables for Clause 72, Physical Medium Dependent (PMD) sublayer and baseband medium, type 10GBASE-KR 72.10.4.1 PCS requirements for AN service interface <\/td>\n<\/tr>\n | ||||||
| 3089<\/td>\n | 72.10.4.2 PMD functional specifications 72.10.4.3 Management functions <\/td>\n<\/tr>\n | ||||||
| 3090<\/td>\n | 72.10.4.4 PMD Control functions <\/td>\n<\/tr>\n | ||||||
| 3092<\/td>\n | 72.10.4.5 Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 3094<\/td>\n | 72.10.4.6 Receiver electrical characteristics 72.10.4.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3095<\/td>\n | 73. Auto-Negotiation for backplane and copper cable assembly 73.1 Auto-Negotiation introduction <\/td>\n<\/tr>\n | ||||||
| 3096<\/td>\n | 73.2 Relationship to the ISO\/IEC Open Systems Interconnection (OSI) reference model 73.3 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 3097<\/td>\n | 73.4 Transmit function requirements 73.5 DME transmission 73.5.1 DME electrical specifications 73.5.2 DME page encoding <\/td>\n<\/tr>\n | ||||||
| 3098<\/td>\n | 73.5.3 DME page timing <\/td>\n<\/tr>\n | ||||||
| 3099<\/td>\n | 73.5.3.1 Manchester violation delimiter 73.6 Link codeword encoding <\/td>\n<\/tr>\n | ||||||
| 3100<\/td>\n | 73.6.1 Selector Field 73.6.2 Echoed Nonce Field 73.6.3 Transmitted Nonce Field <\/td>\n<\/tr>\n | ||||||
| 3101<\/td>\n | 73.6.4 Technology Ability Field 73.6.5 FEC capability <\/td>\n<\/tr>\n | ||||||
| 3102<\/td>\n | 73.6.5.1 FEC resolution for 25G PHYs 73.6.5.2 FEC resolution for 10 Gb\/s per lane PHYs 73.6.5.3 FEC control variables 73.6.6 Pause Ability <\/td>\n<\/tr>\n | ||||||
| 3103<\/td>\n | 73.6.7 Remote Fault 73.6.8 Acknowledge 73.6.9 Next Page 73.6.10 Transmit Switch function <\/td>\n<\/tr>\n | ||||||
| 3104<\/td>\n | 73.7 Receive function requirements 73.7.1 DME page reception 73.7.2 Receive Switch function 73.7.3 Link codeword matching 73.7.4 Arbitration function requirements 73.7.4.1 Parallel Detection function <\/td>\n<\/tr>\n | ||||||
| 3105<\/td>\n | 73.7.5 Renegotiation function 73.7.6 Priority Resolution function <\/td>\n<\/tr>\n | ||||||
| 3106<\/td>\n | 73.7.7 Next Page function <\/td>\n<\/tr>\n | ||||||
| 3107<\/td>\n | 73.7.7.1 Next page encodings <\/td>\n<\/tr>\n | ||||||
| 3108<\/td>\n | 73.7.7.2 Use of Next Pages 73.8 Management register requirements <\/td>\n<\/tr>\n | ||||||
| 3109<\/td>\n | 73.9 Technology-Dependent interface 73.9.1 AN_LINK.indication 73.9.1.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 3110<\/td>\n | 73.9.1.2 When generated 73.9.1.3 Effect of receipt 73.10 State diagrams and variable definitions 73.10.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 3117<\/td>\n | 73.10.2 State diagram timers <\/td>\n<\/tr>\n | ||||||
| 3119<\/td>\n | 73.10.3 State diagram counters <\/td>\n<\/tr>\n | ||||||
| 3120<\/td>\n | 73.10.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3123<\/td>\n | 73.11 Protocol implementation conformance statement (PICS) proforma for Clause 73, Auto-Negotiation for backplane and copper cable assembly 73.11.1 Introduction 73.11.2 Identification 73.11.2.1 Implementation identification 73.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3124<\/td>\n | 73.11.3 Major capabilities\/options 73.11.4 PICS proforma tables for Auto-Negotiation for backplane and copper cable assembly 73.11.4.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 3125<\/td>\n | 73.11.4.2 DME transmission <\/td>\n<\/tr>\n | ||||||
| 3126<\/td>\n | 73.11.4.3 Link codeword encoding <\/td>\n<\/tr>\n | ||||||
| 3127<\/td>\n | 73.11.4.4 Receive function requirements <\/td>\n<\/tr>\n | ||||||
| 3128<\/td>\n | 73.11.4.5 Next Page function 73.11.4.6 Management register requirements <\/td>\n<\/tr>\n | ||||||
| 3129<\/td>\n | 73.11.4.7 State diagrams and variable definitions 73.11.4.8 Service primitives <\/td>\n<\/tr>\n | ||||||
| 3130<\/td>\n | 73.11.4.9 Auto-Negotiation annexes <\/td>\n<\/tr>\n | ||||||
| 3131<\/td>\n | 74. Forward error correction (FEC) sublayer for BASE-R PHYs 74.1 Overview 74.2 Objectives 74.3 Relationship to other sublayers <\/td>\n<\/tr>\n | ||||||
| 3132<\/td>\n | 74.4 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 3133<\/td>\n | 74.4.1 Functional Block Diagram for 10GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 3134<\/td>\n | 74.4.2 Functional block diagram for 25GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 3135<\/td>\n | 74.4.3 Functional block diagram for 40GBASE-R PHYs 74.4.4 Functional block diagram for 100GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 3136<\/td>\n | 74.5 FEC service interface <\/td>\n<\/tr>\n | ||||||
| 3137<\/td>\n | 74.5.1 10GBASE-R service primitives 74.5.1.1 FEC_UNITDATA.request 74.5.1.1.1 Semantics of the service primitive 74.5.1.1.2 When generated 74.5.1.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3138<\/td>\n | 74.5.1.2 FEC_UNITDATA.indication 74.5.1.2.1 Semantics of the service primitive 74.5.1.2.2 When generated 74.5.1.2.3 Effect of receipt 74.5.1.3 FEC_SIGNAL.indication 74.5.1.3.1 Semantics of the service primitive 74.5.1.3.2 When generated 74.5.1.3.3 Effect of receipt 74.5.1.4 FEC_ENERGY.indication (optional) <\/td>\n<\/tr>\n | ||||||
| 3139<\/td>\n | 74.5.1.4.1 Effect of receipt 74.5.1.5 FEC_LPI_ACTIVE.request (optional) 74.5.1.5.1 When generated 74.5.1.5.2 Effect of receipt 74.5.1.6 FEC_RX_MODE.request (optional) 74.5.1.6.1 When generated 74.5.1.6.2 Effect of receipt 74.5.1.7 FEC_TX_MODE.request (optional) 74.5.1.7.1 When generated <\/td>\n<\/tr>\n | ||||||
| 3140<\/td>\n | 74.5.1.7.2 Effect of receipt 74.5.2 25GBASE-R service primitives <\/td>\n<\/tr>\n | ||||||
| 3141<\/td>\n | 74.5.3 40GBASE-R and 100GBASE-R service primitives <\/td>\n<\/tr>\n | ||||||
| 3142<\/td>\n | 74.6 Delay constraints 74.7 FEC principle of operation 74.7.1 FEC code <\/td>\n<\/tr>\n | ||||||
| 3143<\/td>\n | 74.7.2 FEC block format 74.7.3 Composition of the FEC block <\/td>\n<\/tr>\n | ||||||
| 3144<\/td>\n | 74.7.4 Functions within FEC sublayer 74.7.4.1 Reverse gearbox function 74.7.4.1.1 Reverse gearbox function for 10GBASE-R 74.7.4.1.2 Reverse gearbox function for 25GBASE-R, 40GBASE-R, and 100GBASE-R <\/td>\n<\/tr>\n | ||||||
| 3145<\/td>\n | 74.7.4.2 FEC Encoder <\/td>\n<\/tr>\n | ||||||
| 3146<\/td>\n | 74.7.4.3 FEC transmission bit ordering 74.7.4.4 FEC (2112,2080) encoder <\/td>\n<\/tr>\n | ||||||
| 3147<\/td>\n | 74.7.4.4.1 PN-2112 pseudo-noise sequence generator <\/td>\n<\/tr>\n | ||||||
| 3148<\/td>\n | 74.7.4.5 FEC decoder <\/td>\n<\/tr>\n | ||||||
| 3149<\/td>\n | 74.7.4.5.1 FEC (2112,2080) decoding <\/td>\n<\/tr>\n | ||||||
| 3150<\/td>\n | 74.7.4.6 FEC receive bit ordering 74.7.4.7 FEC block synchronization <\/td>\n<\/tr>\n | ||||||
| 3151<\/td>\n | 74.7.4.8 FEC rapid block synchronization for EEE (optional) <\/td>\n<\/tr>\n | ||||||
| 3152<\/td>\n | 74.8 FEC MDIO function mapping 74.8.1 FEC capability 74.8.2 FEC Enable <\/td>\n<\/tr>\n | ||||||
| 3153<\/td>\n | 74.8.3 FEC Enable Error Indication 74.8.3.1 FEC Error Indication ability 74.8.4 FEC Error monitoring capability 74.8.4.1 FEC_corrected_blocks_counter 74.8.4.2 FEC_uncorrected_blocks_counter <\/td>\n<\/tr>\n | ||||||
| 3154<\/td>\n | 74.9 BASE-R PHY test-pattern mode 74.10 Detailed functions and state diagrams 74.10.1 State diagram conventions 74.10.2 State variables 74.10.2.1 Constants 74.10.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3155<\/td>\n | 74.10.2.3 Functions 74.10.2.4 Counters 74.10.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3157<\/td>\n | 74.11 Protocol implementation conformance statement (PICS) proforma for Clause 74, forward error correction (FEC) sublayer for BASE-R PHYs 74.11.1 Introduction 74.11.2 Identification 74.11.2.1 Implementation identification 74.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3158<\/td>\n | 74.11.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3159<\/td>\n | 74.11.4 Management <\/td>\n<\/tr>\n | ||||||
| 3160<\/td>\n | 74.11.5 FEC requirements <\/td>\n<\/tr>\n | ||||||
| 3161<\/td>\n | 74.11.6 FEC Error Monitoring <\/td>\n<\/tr>\n | ||||||
| 3162<\/td>\n | 75. Physical Medium Dependent (PMD) sublayer and medium for passive optical networks, type 10GBASE\u2013PR and 10\/1GBASE\u2013PRX 75.1 Overview 75.1.1 Terminology and conventions 75.1.2 Goals and objectives 75.1.3 Power budget classes <\/td>\n<\/tr>\n | ||||||
| 3163<\/td>\n | 75.1.4 Power budgets <\/td>\n<\/tr>\n | ||||||
| 3164<\/td>\n | 75.1.5 Positioning of PMD sublayer within the IEEE 802.3 architecture 75.2 PMD types <\/td>\n<\/tr>\n | ||||||
| 3167<\/td>\n | 75.2.1 Mapping of PMDs to power budgets <\/td>\n<\/tr>\n | ||||||
| 3168<\/td>\n | 75.2.1.1 Asymmetric-rate, 10 Gb\/s downstream and 1 Gb\/s upstream power budgets (PRX type) 75.2.1.2 Symmetric-rate, 10 Gb\/s power budgets (PR type) 75.3 PMD functional specifications 75.3.1 PMD service interface <\/td>\n<\/tr>\n | ||||||
| 3169<\/td>\n | 75.3.1.1 Delay constraints 75.3.1.2 PMD_UNITDATA.request 75.3.1.3 PMD_UNITDATA.indication 75.3.1.4 PMD_SIGNAL.request 75.3.1.5 PMD_SIGNAL.indication <\/td>\n<\/tr>\n | ||||||
| 3170<\/td>\n | 75.3.2 PMD block diagram 75.3.3 PMD transmit function 75.3.4 PMD receive function 75.3.5 PMD signal detect function 75.3.5.1 ONU PMD signal detect <\/td>\n<\/tr>\n | ||||||
| 3171<\/td>\n | 75.3.5.2 OLT PMD signal detect 75.3.5.3 10GBASE\u2013PR and 10\/1GBASE\u2013PRX Signal detect functions <\/td>\n<\/tr>\n | ||||||
| 3172<\/td>\n | 75.3.6 PMD transmit enable function for ONU 75.4 PMD to MDI optical specifications for 10\/10G\u2013EPON and 10\/1G\u2013EPON OLT PMDs 75.4.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3173<\/td>\n | 75.4.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 3175<\/td>\n | 75.5 PMD to MDI optical specifications for 10\/10G\u2013EPON and 10\/1G\u2013EPON ONU PMDs <\/td>\n<\/tr>\n | ||||||
| 3176<\/td>\n | 75.5.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3177<\/td>\n | 75.5.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 3178<\/td>\n | 75.6 Dual-rate (coexistence) mode <\/td>\n<\/tr>\n | ||||||
| 3179<\/td>\n | 75.6.1 Downstream dual-rate operation 75.6.2 Upstream dual-rate operation 75.7 Definitions of optical parameters and measurement methods 75.7.1 Insertion loss 75.7.2 Allocation for penalties in 10G\u2013EPON PMDs <\/td>\n<\/tr>\n | ||||||
| 3180<\/td>\n | 75.7.3 Test patterns 75.7.4 Wavelength, spectral width, and side mode suppression ratio (SMSR) measurement <\/td>\n<\/tr>\n | ||||||
| 3181<\/td>\n | 75.7.5 Optical power measurements 75.7.6 Extinction ratio measurements 75.7.7 Optical modulation amplitude (OMA) test procedure 75.7.8 Relative intensity noise optical modulation amplitude (RINxOMA) measuring procedure 75.7.9 Transmit optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 3182<\/td>\n | 75.7.10 Transmitter and dispersion penalty (TDP) 75.7.11 Receive sensitivity 75.7.12 Stressed receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 3183<\/td>\n | 75.7.13 Jitter measurements 75.7.14 Laser on\/off timing measurement 75.7.15 Receiver settling timing measurement 75.7.15.1 Definitions <\/td>\n<\/tr>\n | ||||||
| 3184<\/td>\n | 75.7.15.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 3185<\/td>\n | 75.8 Environmental, safety, and labeling 75.8.1 General safety 75.8.2 Laser safety 75.8.3 Installation 75.8.4 Environment 75.8.5 PMD labeling <\/td>\n<\/tr>\n | ||||||
| 3186<\/td>\n | 75.9 Characteristics of the fiber optic cabling 75.9.1 Fiber optic cabling model 75.9.2 Optical fiber and cable <\/td>\n<\/tr>\n | ||||||
| 3187<\/td>\n | 75.9.3 Optical fiber connection 75.9.4 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 3188<\/td>\n | 75.10 Protocol implementation conformance statement (PICS) proforma for Clause 75, Physical Medium Dependent (PMD) sublayer and medium for passive optical networks, type 10GBASE\u2013PR and 10\/1GBASE\u2013PRX 75.10.1 Introduction 75.10.2 Identification 75.10.2.1 Implementation identification 75.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3189<\/td>\n | 75.10.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3190<\/td>\n | 75.10.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium for passive optical networks, type 10GBASE\u2013PR and 10\/1GBASE\u2013PRX 75.10.4.1 PMD functional specifications 75.10.4.2 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013D1 <\/td>\n<\/tr>\n | ||||||
| 3191<\/td>\n | 75.10.4.3 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013D2 75.10.4.4 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013D3 75.10.4.5 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013D4 <\/td>\n<\/tr>\n | ||||||
| 3192<\/td>\n | 75.10.4.6 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013D1 75.10.4.7 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013D2 75.10.4.8 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013D3 <\/td>\n<\/tr>\n | ||||||
| 3193<\/td>\n | 75.10.4.9 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013D4 75.10.4.10 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013U1 75.10.4.11 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013U3 <\/td>\n<\/tr>\n | ||||||
| 3194<\/td>\n | 75.10.4.12 PMD to MDI optical specifications for 10GBASE\u2013PR\u2013U4 75.10.4.13 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013U1 75.10.4.14 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013U2 <\/td>\n<\/tr>\n | ||||||
| 3195<\/td>\n | 75.10.4.15 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013U3 75.10.4.16 PMD to MDI optical specifications for 10\/1GBASE\u2013PRX\u2013U4 75.10.4.17 Definitions of optical parameters and measurement methods <\/td>\n<\/tr>\n | ||||||
| 3196<\/td>\n | 75.10.4.18 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 3197<\/td>\n | 75.10.4.19 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3198<\/td>\n | 76. Reconciliation Sublayer, Physical Coding Sublayer, and Physical Media Attachment for 10G-EPON 76.1 Overview 76.1.1 Conventions 76.1.2 Delay constraints 76.2 Reconciliation Sublayer (RS) for 10G-EPON 76.2.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3201<\/td>\n | 76.2.2 Dual-speed Media Independent Interface 76.2.2.1 10\/10G-EPON 76.2.2.2 10\/1G-EPON 76.2.2.3 Dual-rate mode <\/td>\n<\/tr>\n | ||||||
| 3202<\/td>\n | 76.2.2.4 Mapping of XGMII and GMII primitives <\/td>\n<\/tr>\n | ||||||
| 3203<\/td>\n | 76.2.3 Summary of major concepts 76.2.3.1 Application 76.2.4 GMII structure 76.2.5 XGMII structure <\/td>\n<\/tr>\n | ||||||
| 3204<\/td>\n | 76.2.6 Mapping of XGMII and GMII signals to PLS service primitives 76.2.6.1 Functional specifications for multiple MACs 76.2.6.1.1 Variables 76.2.6.1.2 RS Transmit function <\/td>\n<\/tr>\n | ||||||
| 3205<\/td>\n | 76.2.6.1.3 RS Receive function 76.2.6.1.3.1 SLD 76.2.6.1.3.2 LLID <\/td>\n<\/tr>\n | ||||||
| 3206<\/td>\n | 76.2.6.1.3.3 CRC-8 76.3 Physical Coding Sublayer (PCS) for 10G-EPON 76.3.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3207<\/td>\n | 76.3.1.1 10\/1GBASE-PRX PCS 76.3.1.2 10GBASE-PR PCS <\/td>\n<\/tr>\n | ||||||
| 3208<\/td>\n | 76.3.2 PCS transmit function 76.3.2.1 Idle control character deletion <\/td>\n<\/tr>\n | ||||||
| 3209<\/td>\n | 76.3.2.1.1 Constants 76.3.2.1.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3210<\/td>\n | 76.3.2.1.3 Functions 76.3.2.1.4 Counters 76.3.2.1.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3212<\/td>\n | 76.3.2.2 64B\/66B Encode <\/td>\n<\/tr>\n | ||||||
| 3213<\/td>\n | 76.3.2.3 Scrambler 76.3.2.4 FEC encoding 76.3.2.4.1 FEC Algorithm [RS(255,223)] <\/td>\n<\/tr>\n | ||||||
| 3215<\/td>\n | 76.3.2.4.2 Parity calculation <\/td>\n<\/tr>\n | ||||||
| 3217<\/td>\n | 76.3.2.4.3 FEC Transmission Block Formatting 76.3.2.5 Data Detector 76.3.2.5.1 Burst Mode operation (ONU only) <\/td>\n<\/tr>\n | ||||||
| 3219<\/td>\n | 76.3.2.5.2 Constants <\/td>\n<\/tr>\n | ||||||
| 3220<\/td>\n | 76.3.2.5.3 Variables <\/td>\n<\/tr>\n | ||||||
| 3221<\/td>\n | 76.3.2.5.4 Functions 76.3.2.5.5 Messages 76.3.2.5.6 Counters <\/td>\n<\/tr>\n | ||||||
| 3222<\/td>\n | 76.3.2.5.7 State diagrams 76.3.2.6 Gearbox <\/td>\n<\/tr>\n | ||||||
| 3225<\/td>\n | 76.3.3 PCS receive Function 76.3.3.1 OLT synchronizer 76.3.3.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3226<\/td>\n | 76.3.3.1.2 Counters 76.3.3.1.3 Functions <\/td>\n<\/tr>\n | ||||||
| 3228<\/td>\n | 76.3.3.1.4 State diagram 76.3.3.2 ONU Synchronizer <\/td>\n<\/tr>\n | ||||||
| 3230<\/td>\n | 76.3.3.2.1 Constants 76.3.3.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3231<\/td>\n | 76.3.3.2.3 Counters 76.3.3.2.4 Functions 76.3.3.2.5 State diagram 76.3.3.3 FEC decoding process <\/td>\n<\/tr>\n | ||||||
| 3233<\/td>\n | 76.3.3.3.1 Variables 76.3.3.3.2 Counters <\/td>\n<\/tr>\n | ||||||
| 3234<\/td>\n | 76.3.3.3.3 Functions 76.3.3.3.4 State diagrams 76.3.3.4 BER monitor <\/td>\n<\/tr>\n | ||||||
| 3235<\/td>\n | 76.3.3.4.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3236<\/td>\n | 76.3.3.4.2 Timers 76.3.3.4.3 Counters 76.3.3.4.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3237<\/td>\n | 76.3.3.5 Descrambler 76.3.3.6 64B\/66B Decode <\/td>\n<\/tr>\n | ||||||
| 3238<\/td>\n | 76.3.3.7 Idle Insertion 76.3.3.7.1 Constants 76.3.3.7.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3239<\/td>\n | 76.3.3.7.3 Functions 76.3.3.7.4 Messages 76.3.3.7.5 State diagrams 76.4 10GBASE-PR and 10\/1GBASE-PRX PMA <\/td>\n<\/tr>\n | ||||||
| 3241<\/td>\n | 76.4.1 Extensions for 10GBASE-PR-U and 10\/1GBASE-PRX-U 76.4.1.1 Physical Medium Attachment (PMA) sublayer interfaces 76.4.1.2 Loop-timing specifications for ONUs 76.4.2 Extensions for 10GBASE-PR-D and 10\/1GBASE-PRX-D 76.4.2.1 CDR lock timing measurement for the upstream direction 76.4.2.1.1 Test specification <\/td>\n<\/tr>\n | ||||||
| 3242<\/td>\n | 76.5 Protocol implementation conformance statement (PICS) proforma for Clause 76, Reconciliation Sublayer, Physical Coding Sublayer, and Physical Media Attachment for 10G-EPON 76.5.1 Introduction 76.5.2 Identification 76.5.2.1 Implementation identification <\/td>\n<\/tr>\n | ||||||
| 3243<\/td>\n | 76.5.2.2 Protocol summary 76.5.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3244<\/td>\n | 76.5.4 PICS proforma tables for Reconciliation Sublayer (RS), Physical Coding Sublayer (PCS), and Physical Media Attachment (PMA) for point-to-multipoint media, types 10GBASE\u2013PR and 10\/1GBASE\u2013PRX 76.5.4.1 Operating modes of OLT MACs 76.5.4.2 ONU and OLT variables <\/td>\n<\/tr>\n | ||||||
| 3245<\/td>\n | 76.5.4.3 Preamble mapping and replacement 76.5.4.4 Coding Rules 76.5.4.5 Data detection <\/td>\n<\/tr>\n | ||||||
| 3246<\/td>\n | 76.5.4.6 Idle control character deletion 76.5.4.7 FEC requirements <\/td>\n<\/tr>\n | ||||||
| 3247<\/td>\n | 76.5.4.8 FEC state diagrams 76.5.4.9 PCS Idle Insertion 76.5.4.10 PMA 76.5.4.11 Delay variation <\/td>\n<\/tr>\n | ||||||
| 3248<\/td>\n | 77. Multipoint MAC Control for 10G\u2013EPON 77.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3249<\/td>\n | 77.1.1 Goals and objectives 77.1.2 Position of Multipoint MAC Control within the IEEE 802.3 hierarchy <\/td>\n<\/tr>\n | ||||||
| 3253<\/td>\n | 77.1.3 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 3254<\/td>\n | 77.1.4 Service interfaces 77.1.5 State diagram conventions 77.2 Multipoint MAC Control operation <\/td>\n<\/tr>\n | ||||||
| 3255<\/td>\n | 77.2.1 Principles of Multipoint MAC Control <\/td>\n<\/tr>\n | ||||||
| 3256<\/td>\n | 77.2.1.1 Ranging and timing process <\/td>\n<\/tr>\n | ||||||
| 3257<\/td>\n | 77.2.2 Multipoint transmission control, Control Parser, and Control Multiplexer <\/td>\n<\/tr>\n | ||||||
| 3259<\/td>\n | 77.2.2.1 Constants <\/td>\n<\/tr>\n | ||||||
| 3260<\/td>\n | 77.2.2.2 Counters 77.2.2.3 Variables <\/td>\n<\/tr>\n | ||||||
| 3263<\/td>\n | 77.2.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 3264<\/td>\n | 77.2.2.5 Timers 77.2.2.6 Messages 77.2.2.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3270<\/td>\n | 77.3 Multipoint Control Protocol (MPCP) 77.3.1 Principles of Multipoint Control Protocol 77.3.2 Compatibility considerations 77.3.2.1 PAUSE operation <\/td>\n<\/tr>\n | ||||||
| 3271<\/td>\n | 77.3.2.2 Optional Shared LAN emulation 77.3.2.3 Multicast and single copy broadcast support 77.3.2.4 Delay requirements 77.3.3 Discovery processing <\/td>\n<\/tr>\n | ||||||
| 3275<\/td>\n | 77.3.3.1 Constants 77.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3277<\/td>\n | 77.3.3.3 Functions 77.3.3.4 Timers 77.3.3.5 Messages <\/td>\n<\/tr>\n | ||||||
| 3280<\/td>\n | 77.3.3.6 State Diagrams <\/td>\n<\/tr>\n | ||||||
| 3285<\/td>\n | 77.3.4 Report Processing 77.3.4.1 Constants 77.3.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3286<\/td>\n | 77.3.4.3 Functions 77.3.4.4 Timers 77.3.4.5 Messages <\/td>\n<\/tr>\n | ||||||
| 3287<\/td>\n | 77.3.4.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3288<\/td>\n | 77.3.5 Gate Processing <\/td>\n<\/tr>\n | ||||||
| 3289<\/td>\n | 77.3.5.1 Constants <\/td>\n<\/tr>\n | ||||||
| 3290<\/td>\n | 77.3.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3292<\/td>\n | 77.3.5.3 Functions <\/td>\n<\/tr>\n | ||||||
| 3293<\/td>\n | 77.3.5.4 Timers 77.3.5.5 Messages <\/td>\n<\/tr>\n | ||||||
| 3294<\/td>\n | 77.3.5.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3297<\/td>\n | 77.3.6 MPCPDU structure and encoding <\/td>\n<\/tr>\n | ||||||
| 3298<\/td>\n | 77.3.6.1 GATE description <\/td>\n<\/tr>\n | ||||||
| 3300<\/td>\n | 77.3.6.2 REPORT description <\/td>\n<\/tr>\n | ||||||
| 3303<\/td>\n | 77.3.6.3 REGISTER_REQ description <\/td>\n<\/tr>\n | ||||||
| 3304<\/td>\n | 77.3.6.4 REGISTER description <\/td>\n<\/tr>\n | ||||||
| 3306<\/td>\n | 77.3.6.5 REGISTER_ACK description 77.4 Discovery Process in dual-rate systems 77.4.1 OLT speed-specific discovery <\/td>\n<\/tr>\n | ||||||
| 3307<\/td>\n | 77.4.2 ONU speed-specific registration <\/td>\n<\/tr>\n | ||||||
| 3310<\/td>\n | 77.5 Protocol implementation conformance statement (PICS) proforma for Clause 77, Multipoint MAC Control 77.5.1 Introduction 77.5.2 Identification 77.5.2.1 Implementation identification 77.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3311<\/td>\n | 77.5.3 Major capabilities\/options 77.5.4 PICS proforma tables for Multipoint MAC Control 77.5.4.1 Compatibility considerations 77.5.4.2 Multipoint MAC Control <\/td>\n<\/tr>\n | ||||||
| 3312<\/td>\n | 77.5.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3313<\/td>\n | 77.5.4.4 MPCP <\/td>\n<\/tr>\n | ||||||
| 3314<\/td>\n | 78. Energy-Efficient Ethernet (EEE) 78.1 Overview 78.1.1 LPI Signaling <\/td>\n<\/tr>\n | ||||||
| 3315<\/td>\n | 78.1.1.1 Reconciliation sublayer service interfaces 78.1.1.2 Responsibilities of LPI Client 78.1.2 LPI Client service interface <\/td>\n<\/tr>\n | ||||||
| 3316<\/td>\n | 78.1.2.1 LP_IDLE.request 78.1.2.1.1 Function 78.1.2.1.2 Semantics of the service primitive 78.1.2.1.3 When generated 78.1.2.1.4 Effect of receipt 78.1.2.2 LP_IDLE.indication 78.1.2.2.1 Function 78.1.2.2.2 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 3317<\/td>\n | 78.1.2.2.3 When generated 78.1.2.2.4 Effect of receipt 78.1.3 Reconciliation sublayer operation 78.1.3.1 RS LPI assert function <\/td>\n<\/tr>\n | ||||||
| 3318<\/td>\n | 78.1.3.2 LPI detect function 78.1.3.3 PHY LPI operation 78.1.3.3.1 PHY LPI transmit operation <\/td>\n<\/tr>\n | ||||||
| 3319<\/td>\n | 78.1.3.3.2 PHY LPI receive operation <\/td>\n<\/tr>\n | ||||||
| 3320<\/td>\n | 78.1.4 PHY types optionally supporting EEE <\/td>\n<\/tr>\n | ||||||
| 3322<\/td>\n | 78.2 LPI mode timing parameters description <\/td>\n<\/tr>\n | ||||||
| 3324<\/td>\n | 78.3 Capabilities Negotiation <\/td>\n<\/tr>\n | ||||||
| 3325<\/td>\n | 78.4 Data Link Layer capabilities <\/td>\n<\/tr>\n | ||||||
| 3326<\/td>\n | 78.4.1 Data Link Layer capabilities timing requirements 78.4.2 Control state diagrams 78.4.2.1 Conventions 78.4.2.2 Constants <\/td>\n<\/tr>\n | ||||||
| 3327<\/td>\n | 78.4.2.3 Variables <\/td>\n<\/tr>\n | ||||||
| 3330<\/td>\n | 78.4.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 3331<\/td>\n | 78.4.2.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3335<\/td>\n | 78.4.3 State change procedure across a link <\/td>\n<\/tr>\n | ||||||
| 3337<\/td>\n | 78.4.3.1 Transmitting link partner\u2019s state change procedure across a link 78.4.3.2 Receiving link partner\u2019s state change procedure across a link <\/td>\n<\/tr>\n | ||||||
| 3338<\/td>\n | 78.5 Communication link access latency <\/td>\n<\/tr>\n | ||||||
| 3341<\/td>\n | 78.5.1 PHY extension using extender sublayers <\/td>\n<\/tr>\n | ||||||
| 3342<\/td>\n | 78.5.2 25 Gb\/s 40 Gb\/s, and 100 Gb\/s PHY extension using 25GAUI, XLAUI, or CAUI-n <\/td>\n<\/tr>\n | ||||||
| 3343<\/td>\n | 78.6 Protocol implementation conformance statement (PICS) proforma for EEE Data Link Layer Capabilities 78.6.1 Introduction 78.6.2 Identification 78.6.2.1 Implementation identification 78.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3344<\/td>\n | 78.6.3 Major capabilities\/options 78.6.4 DLL requirements <\/td>\n<\/tr>\n | ||||||
| 3345<\/td>\n | 79. IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements 79.1 Overview 79.1.1 IEEE 802.3 LLDP frame format <\/td>\n<\/tr>\n | ||||||
| 3346<\/td>\n | 79.1.1.1 Destination Address field 79.1.1.2 Source Address field 79.1.1.3 Length\/Type field 79.1.1.4 LLDPDU field 79.1.1.5 Pad field 79.1.1.6 Frame Check Sequence field 79.2 Requirements of the IEEE 802.3 Organizationally Specific TLV set <\/td>\n<\/tr>\n | ||||||
| 3347<\/td>\n | 79.3 IEEE 802.3 Organizationally Specific TLVs 79.3.1 MAC\/PHY Configuration\/Status TLV 79.3.1.1 Auto-negotiation support\/status <\/td>\n<\/tr>\n | ||||||
| 3348<\/td>\n | 79.3.1.2 PMD auto-negotiation advertised capability field 79.3.1.3 Operational MAU type 79.3.1.4 MAC\/PHY Configuration\/Status TLV usage rules 79.3.2 Power Via MDI TLV <\/td>\n<\/tr>\n | ||||||
| 3349<\/td>\n | 79.3.2.1 MDI power support <\/td>\n<\/tr>\n | ||||||
| 3350<\/td>\n | 79.3.2.1.1 Port class 79.3.2.1.2 PSE MDI power support 79.3.2.1.3 PSE MDI power state 79.3.2.1.4 PSE pairs control ability <\/td>\n<\/tr>\n | ||||||
| 3351<\/td>\n | 79.3.2.2 PSE power pair 79.3.2.3 Power class 79.3.2.4 Power type\/source\/priority 79.3.2.4.1 Power type <\/td>\n<\/tr>\n | ||||||
| 3352<\/td>\n | 79.3.2.4.2 Power source 79.3.2.4.3 PD 4PID 79.3.2.4.4 Power priority 79.3.2.5 PD requested power value <\/td>\n<\/tr>\n | ||||||
| 3353<\/td>\n | 79.3.2.6 PSE allocated power value 79.3.2.7 Dual-signature PD requested power value for Mode A and Mode B <\/td>\n<\/tr>\n | ||||||
| 3354<\/td>\n | 79.3.2.8 PSE allocated power value Alternative A and Alternative B 79.3.2.9 Power status <\/td>\n<\/tr>\n | ||||||
| 3355<\/td>\n | 79.3.2.9.1 PSE powering status 79.3.2.9.2 PD powered status <\/td>\n<\/tr>\n | ||||||
| 3356<\/td>\n | 79.3.2.9.3 PSE power pairs ext 79.3.2.9.4 Dual-signature power Class ext Mode A 79.3.2.9.5 Dual-signature power Class ext Mode B 79.3.2.9.6 Power Class ext 79.3.2.10 System setup <\/td>\n<\/tr>\n | ||||||
| 3357<\/td>\n | 79.3.2.10.1 Power Type ext 79.3.2.10.2 PD Load 79.3.2.11 PSE maximum available power value 79.3.2.12 Autoclass 79.3.2.12.1 PSE Autoclass support <\/td>\n<\/tr>\n | ||||||
| 3358<\/td>\n | 79.3.2.12.2 Autoclass completed 79.3.2.12.3 Autoclass request 79.3.2.13 Power down 79.3.2.13.1 Power down request 79.3.2.13.2 Power down time 79.3.2.14 Power Via MDI TLV usage rules 79.3.3 Link Aggregation TLV (deprecated) <\/td>\n<\/tr>\n | ||||||
| 3359<\/td>\n | 79.3.3.1 Aggregation status 79.3.3.2 Aggregated port ID 79.3.3.3 Link Aggregation TLV usage rules 79.3.4 Maximum Frame Size TLV <\/td>\n<\/tr>\n | ||||||
| 3360<\/td>\n | 79.3.4.1 Maximum frame size 79.3.4.2 Maximum Frame Size TLV usage rules <\/td>\n<\/tr>\n | ||||||
| 3361<\/td>\n | 79.3.5 EEE TLV 79.3.5.1 Transmit Tw 79.3.5.2 Receive Tw 79.3.5.3 Fallback Tw <\/td>\n<\/tr>\n | ||||||
| 3362<\/td>\n | 79.3.5.4 Echo Transmit and Receive Tw 79.3.5.5 EEE TLV usage rules 79.3.6 EEE Fast Wake TLV 79.3.6.1 Transmit fast wake 79.3.6.2 Receive fast wake <\/td>\n<\/tr>\n | ||||||
| 3363<\/td>\n | 79.3.6.3 Echo of Transmit fast wake and Receive fast wake 79.3.6.4 EEE Fast Wake TLV usage rules 79.3.7 Additional Ethernet Capabilities TLV 79.3.7.1 Additional Ethernet capabilities 79.3.7.2 Additional Ethernet Capabilities TLV usage rules <\/td>\n<\/tr>\n | ||||||
| 3364<\/td>\n | 79.3.8 Power via MDI Measurements TLV 79.3.8.1 Measurements 79.3.8.2 PSE power price index <\/td>\n<\/tr>\n | ||||||
| 3367<\/td>\n | 79.3.8.3 Power Via MDI Measurements TLV usage rules 79.4 IEEE 802.3 Organizationally Specific TLV selection management 79.4.1 IEEE 802.3 Organizationally Specific TLV selection variable\/LLDP Configuration managed object class cross reference 79.4.2 IEEE 802.3 Organizationally Specific TLV\/LLDP Local and Remote System group managed object class cross references <\/td>\n<\/tr>\n | ||||||
| 3373<\/td>\n | 79.5 Protocol implementation conformance statement (PICS) proforma for IEEE 802.3 Organizationally Specific Link Layer Discovery Protocol (LLDP) type, length, and value (TLV) information elements 79.5.1 Introduction 79.5.2 Identification 79.5.2.1 Implementation identification 79.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3374<\/td>\n | 79.5.3 Major capabilities\/options 79.5.4 IEEE 802.3 Organizationally Specific TLV <\/td>\n<\/tr>\n | ||||||
| 3375<\/td>\n | 79.5.5 MAC\/PHY Configuration\/Status TLV 79.5.6 EEE TLV <\/td>\n<\/tr>\n | ||||||
| 3376<\/td>\n | 79.5.7 EEE Fast Wake TLV 79.5.8 Power Via MDI TLV <\/td>\n<\/tr>\n | ||||||
| 3380<\/td>\n | 79.5.9 Link Aggregation TLV 79.5.10 Maximum Frame Size TLV <\/td>\n<\/tr>\n | ||||||
| 3381<\/td>\n | 79.5.11 Additional Ethernet Capabilities TLV 79.5.12 Power via MDI Measurements TLV <\/td>\n<\/tr>\n | ||||||
| 3382<\/td>\n | 80. Introduction to 40 Gb\/s and 100 Gb\/s networks 80.1 Overview 80.1.1 Scope 80.1.2 Objectives 80.1.3 Relationship of 40 Gigabit and 100 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 3383<\/td>\n | 80.1.4 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 3386<\/td>\n | 80.1.5 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 3389<\/td>\n | 80.2 Summary of 40 Gigabit and 100 Gigabit Ethernet sublayers 80.2.1 Reconciliation Sublayer (RS) and Media Independent Interface 80.2.2 Physical Coding Sublayer (PCS) 80.2.3 Forward error correction (FEC) sublayers 80.2.4 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 3390<\/td>\n | 80.2.5 Physical Medium Dependent (PMD) sublayer 80.2.6 Auto-Negotiation 80.2.7 Management interface (MDIO\/MDC) 80.2.8 Management 80.3 Service interface specification method and notation 80.3.1 Inter-sublayer service interface <\/td>\n<\/tr>\n | ||||||
| 3391<\/td>\n | 80.3.2 Instances of the Inter-sublayer service interface <\/td>\n<\/tr>\n | ||||||
| 3397<\/td>\n | 80.3.3 Semantics of inter-sublayer service interface primitives 80.3.3.1 IS_UNITDATA_i.request 80.3.3.1.1 Semantics of the service primitive 80.3.3.1.2 When generated 80.3.3.1.3 Effect of receipt 80.3.3.2 IS_UNITDATA_i.indication 80.3.3.2.1 Semantics of the service primitive 80.3.3.2.2 When generated <\/td>\n<\/tr>\n | ||||||
| 3398<\/td>\n | 80.3.3.2.3 Effect of receipt 80.3.3.3 IS_SIGNAL.indication 80.3.3.3.1 Semantics of the service primitive 80.3.3.3.2 When generated 80.3.3.3.3 Effect of receipt 80.3.3.4 IS_TX_MODE.request 80.3.3.4.1 Semantics of the service primitive 80.3.3.4.2 When generated 80.3.3.4.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3399<\/td>\n | 80.3.3.5 IS_RX_MODE.request 80.3.3.5.1 Semantics of the service primitive 80.3.3.5.2 When generated 80.3.3.5.3 Effect of receipt 80.3.3.6 IS_RX_LPI_ACTIVE.request 80.3.3.6.1 Semantics of the service primitive 80.3.3.6.2 When generated 80.3.3.6.3 Effect of receipt 80.3.3.7 IS_ENERGY_DETECT.indication <\/td>\n<\/tr>\n | ||||||
| 3400<\/td>\n | 80.3.3.7.1 Semantics of the service primitive 80.3.3.7.2 When generated 80.3.3.7.3 Effect of receipt 80.3.3.8 IS_RX_TX_MODE.indication 80.3.3.8.1 Semantics of the service primitive 80.3.3.8.2 When generated 80.3.3.8.3 Effect of receipt 80.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3402<\/td>\n | 80.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3407<\/td>\n | 80.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3408<\/td>\n | 80.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 3409<\/td>\n | 81. Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation (XLGMII and CGMII) 81.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3410<\/td>\n | 81.1.1 Summary of major concepts 81.1.2 Application 81.1.3 Rate of operation 81.1.4 Delay constraints 81.1.5 Allocation of functions <\/td>\n<\/tr>\n | ||||||
| 3411<\/td>\n | 81.1.6 XLGMII\/CGMII structure 81.1.7 Mapping of XLGMII\/CGMII signals to PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 3412<\/td>\n | 81.1.7.1 Mapping of PLS_DATA.request 81.1.7.1.1 Function 81.1.7.1.2 Semantics of the service primitive 81.1.7.1.3 When generated 81.1.7.1.4 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3413<\/td>\n | 81.1.7.2 Mapping of PLS_DATA.indication 81.1.7.2.1 Function 81.1.7.2.2 Semantics of the service primitive 81.1.7.2.3 When generated 81.1.7.2.4 Effect of receipt 81.1.7.3 Mapping of PLS_CARRIER.indication <\/td>\n<\/tr>\n | ||||||
| 3414<\/td>\n | 81.1.7.4 Mapping of PLS_SIGNAL.indication 81.1.7.5 Mapping of PLS_DATA_VALID.indication 81.1.7.5.1 Function 81.1.7.5.2 Semantics of the service primitive 81.1.7.5.3 When generated 81.1.7.5.4 Effect of receipt 81.2 XLGMII\/CGMII data stream <\/td>\n<\/tr>\n | ||||||
| 3415<\/td>\n | 81.2.1 Inter-frame 81.2.2 Preamble and start of frame delimiter <\/td>\n<\/tr>\n | ||||||
| 3416<\/td>\n | 81.2.3 Data 81.2.4 End of frame delimiter 81.2.5 Definition of Start of Packet and End of Packet Delimiters 81.3 XLGMII\/CGMII functional specifications 81.3.1 Transmit 81.3.1.1 TX_CLK <\/td>\n<\/tr>\n | ||||||
| 3417<\/td>\n | 81.3.1.2 TXC (transmit control) 81.3.1.3 TXD (transmit data) <\/td>\n<\/tr>\n | ||||||
| 3419<\/td>\n | 81.3.1.4 Start control character alignment <\/td>\n<\/tr>\n | ||||||
| 3420<\/td>\n | 81.3.1.5 Transmit direction LPI transition 81.3.2 Receive 81.3.2.1 RX_CLK (receive clock) 81.3.2.2 RXC (receive control) <\/td>\n<\/tr>\n | ||||||
| 3422<\/td>\n | 81.3.2.3 RXD (receive data) <\/td>\n<\/tr>\n | ||||||
| 3423<\/td>\n | 81.3.2.4 Receive direction LPI transition <\/td>\n<\/tr>\n | ||||||
| 3424<\/td>\n | 81.3.3 Error and fault handling 81.3.3.1 Response to error indications by the XLGMII\/CGMII 81.3.3.2 Conditions for generation of transmit Error control characters 81.3.3.3 Response to received invalid frame sequences <\/td>\n<\/tr>\n | ||||||
| 3425<\/td>\n | 81.3.4 Link fault signaling 81.3.4.1 Variables and counters <\/td>\n<\/tr>\n | ||||||
| 3426<\/td>\n | 81.3.4.2 State diagram <\/td>\n<\/tr>\n | ||||||
| 3427<\/td>\n | 81.4 LPI assertion and detection <\/td>\n<\/tr>\n | ||||||
| 3428<\/td>\n | 81.4.1 LPI messages <\/td>\n<\/tr>\n | ||||||
| 3429<\/td>\n | 81.4.2 Transmit LPI state diagram 81.4.2.1 Variables and counters 81.4.2.2 State diagram 81.4.3 Considerations for transmit system behavior 81.4.4 Considerations for receive system behavior <\/td>\n<\/tr>\n | ||||||
| 3431<\/td>\n | 81.5 Protocol implementation conformance statement (PICS) proforma for Clause 81, Reconciliation Sublayer (RS) and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation 81.5.1 Introduction 81.5.2 Identification 81.5.2.1 Implementation identification 81.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3432<\/td>\n | 81.5.2.3 Major capabilities\/options 81.5.3 PICS proforma tables for Reconciliation Sublayer and Media Independent Interface for 40 Gb\/s and 100 Gb\/s operation 81.5.3.1 General <\/td>\n<\/tr>\n | ||||||
| 3433<\/td>\n | 81.5.3.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 3434<\/td>\n | 81.5.3.3 Data stream structure 81.5.3.4 XLGMII\/CGMII signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 3435<\/td>\n | 81.5.3.5 Link fault signaling state diagram 81.5.3.6 LPI functions <\/td>\n<\/tr>\n | ||||||
| 3436<\/td>\n | 81.5.3.7 Link Interruption <\/td>\n<\/tr>\n | ||||||
| 3437<\/td>\n | 82. Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R 82.1 Overview 82.1.1 Scope 82.1.2 Relationship of 40GBASE-R and 100GBASE-R to other standards <\/td>\n<\/tr>\n | ||||||
| 3438<\/td>\n | 82.1.3 Summary of 40GBASE-R and 100GBASE-R sublayers 82.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 3439<\/td>\n | 82.1.4 Inter-sublayer interfaces 82.1.4.1 PCS service interface (XLGMII\/CGMII) 82.1.4.2 Physical Medium Attachment (PMA) or forward error correction (FEC) service interface <\/td>\n<\/tr>\n | ||||||
| 3440<\/td>\n | 82.1.5 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 3441<\/td>\n | 82.2 Physical Coding Sublayer (PCS) 82.2.1 Functions within the PCS <\/td>\n<\/tr>\n | ||||||
| 3442<\/td>\n | 82.2.2 Use of blocks 82.2.3 64B\/66B transmission code 82.2.3.1 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 3443<\/td>\n | 82.2.3.2 Transmission order 82.2.3.3 Block structure <\/td>\n<\/tr>\n | ||||||
| 3446<\/td>\n | 82.2.3.4 Control codes <\/td>\n<\/tr>\n | ||||||
| 3447<\/td>\n | 82.2.3.5 Valid and invalid blocks 82.2.3.6 Idle (\/I\/) 82.2.3.7 Start (\/S\/) <\/td>\n<\/tr>\n | ||||||
| 3448<\/td>\n | 82.2.3.8 Terminate (\/T\/) 82.2.3.9 ordered set (\/O\/) 82.2.3.10 Error (\/E\/) 82.2.4 Transmit process 82.2.5 Scrambler <\/td>\n<\/tr>\n | ||||||
| 3449<\/td>\n | 82.2.6 Block distribution 82.2.7 Alignment marker insertion <\/td>\n<\/tr>\n | ||||||
| 3452<\/td>\n | 82.2.8 BIP calculations 82.2.9 Rapid alignment marker insertion <\/td>\n<\/tr>\n | ||||||
| 3454<\/td>\n | 82.2.10 PMA or FEC Interface <\/td>\n<\/tr>\n | ||||||
| 3455<\/td>\n | 82.2.11 Test-pattern generators 82.2.12 Block synchronization 82.2.13 PCS lane deskew <\/td>\n<\/tr>\n | ||||||
| 3456<\/td>\n | 82.2.14 PCS lane reorder 82.2.15 Alignment marker removal 82.2.16 Descrambler 82.2.17 Receive process <\/td>\n<\/tr>\n | ||||||
| 3457<\/td>\n | 82.2.18 Test-pattern checker 82.2.19 Detailed functions and state diagrams 82.2.19.1 State diagram conventions 82.2.19.2 State variables 82.2.19.2.1 Constants <\/td>\n<\/tr>\n | ||||||
| 3458<\/td>\n | 82.2.19.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3461<\/td>\n | 82.2.19.2.3 Functions <\/td>\n<\/tr>\n | ||||||
| 3462<\/td>\n | 82.2.19.2.4 Counters <\/td>\n<\/tr>\n | ||||||
| 3463<\/td>\n | 82.2.19.2.5 Timers <\/td>\n<\/tr>\n | ||||||
| 3464<\/td>\n | 82.2.19.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3471<\/td>\n | 82.2.19.3.1 LPI state diagrams <\/td>\n<\/tr>\n | ||||||
| 3474<\/td>\n | 82.3 PCS Management 82.3.1 PCS MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3475<\/td>\n | 82.4 Loopback 82.5 Delay constraints 82.6 Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 3476<\/td>\n | 82.7 Protocol implementation conformance statement (PICS) proforma for Clause 82, Physical Coding Sublayer (PCS) for 64B\/66B, type 40GBASE-R and 100GBASE-R 82.7.1 Introduction 82.7.2 Identification 82.7.2.1 Implementation identification 82.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3477<\/td>\n | 82.7.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3478<\/td>\n | 82.7.4 PICS proforma tables for PCS, type 40GBASE-R and 100GBASE-R 82.7.4.1 Coding rules 82.7.4.2 Scrambler and Descrambler 82.7.4.3 Deskew and Reordering <\/td>\n<\/tr>\n | ||||||
| 3479<\/td>\n | 82.7.4.4 Alignment Markers 82.7.4.5 Test-pattern modes 82.7.4.6 Bit order 82.7.4.7 Management <\/td>\n<\/tr>\n | ||||||
| 3480<\/td>\n | 82.7.4.8 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3481<\/td>\n | 82.7.4.9 Loopback 82.7.4.10 Delay constraints 82.7.4.11 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n | ||||||
| 3482<\/td>\n | 82.7.4.12 LPI functions <\/td>\n<\/tr>\n | ||||||
| 3483<\/td>\n | 83. Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE-R 83.1 Overview 83.1.1 Scope 83.1.2 Position of the PMA in the 40GBASE-R or 100GBASE-R sublayers 83.1.3 Summary of functions 83.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n | ||||||
| 3486<\/td>\n | 83.2 PMA interfaces 83.3 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 3489<\/td>\n | 83.4 Service interface below PMA <\/td>\n<\/tr>\n | ||||||
| 3490<\/td>\n | 83.5 Functions within the PMA 83.5.1 Per input-lane clock and data recovery 83.5.2 Bit-level multiplexing <\/td>\n<\/tr>\n | ||||||
| 3492<\/td>\n | 83.5.3 Skew and Skew Variation 83.5.3.1 Skew generation toward SP0 83.5.3.2 Skew generation toward SP1 83.5.3.3 Skew tolerance at SP1 83.5.3.4 Skew generation toward SP2 83.5.3.5 Skew tolerance at SP5 83.5.3.6 Skew generation at SP6 <\/td>\n<\/tr>\n | ||||||
| 3493<\/td>\n | 83.5.3.7 Skew tolerance at SP6 83.5.3.8 Skew generation toward SP7 83.5.4 Delay constraints 83.5.5 Clocking architecture <\/td>\n<\/tr>\n | ||||||
| 3494<\/td>\n | 83.5.6 Signal drivers 83.5.7 Link status 83.5.8 PMA local loopback mode 83.5.9 PMA remote loopback mode (optional) <\/td>\n<\/tr>\n | ||||||
| 3495<\/td>\n | 83.5.10 PMA test patterns (optional) <\/td>\n<\/tr>\n | ||||||
| 3497<\/td>\n | 83.5.11 Energy Efficient Ethernet 83.5.11.1 PMA quiet and alert signals 83.5.11.2 Detection of PMA quiet and alert signals <\/td>\n<\/tr>\n | ||||||
| 3498<\/td>\n | 83.5.11.3 Additional transmit functions in the Tx direction <\/td>\n<\/tr>\n | ||||||
| 3499<\/td>\n | 83.5.11.4 Additional receive functions in the Tx direction 83.5.11.5 Additional transmit functions in the Rx direction <\/td>\n<\/tr>\n | ||||||
| 3500<\/td>\n | 83.5.11.6 Additional receive functions in the Rx direction 83.5.11.7 Support for BASE-R FEC 83.6 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3504<\/td>\n | 83.7 Protocol implementation conformance statement (PICS) proforma for Clause 83, Physical Medium Attachment (PMA) sublayer, type 40GBASE-R and 100GBASE- R 83.7.1 Introduction 83.7.2 Identification 83.7.2.1 Implementation identification 83.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3505<\/td>\n | 83.7.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3507<\/td>\n | 83.7.4 Skew generation and tolerance 83.7.5 Test patterns <\/td>\n<\/tr>\n | ||||||
| 3508<\/td>\n | 83.7.6 Loopback modes 83.7.7 EEE deep sleep with XLAUI\/CAUI <\/td>\n<\/tr>\n | ||||||
| 3509<\/td>\n | 84. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4 84.1 Overview 84.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3511<\/td>\n | 84.3 PCS requirements for Auto-Negotiation (AN) service interface 84.4 Delay constraints 84.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3512<\/td>\n | 84.6 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3513<\/td>\n | 84.7 PMD functional specifications 84.7.1 Link block diagram 84.7.2 PMD transmit function 84.7.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 3514<\/td>\n | 84.7.4 Global PMD signal detect function 84.7.5 PMD lane-by-lane signal detect function 84.7.6 Global PMD transmit disable function <\/td>\n<\/tr>\n | ||||||
| 3515<\/td>\n | 84.7.7 PMD lane-by-lane transmit disable function 84.7.8 Loopback mode 84.7.9 PMD_fault function 84.7.10 PMD transmit fault function 84.7.11 PMD receive fault function <\/td>\n<\/tr>\n | ||||||
| 3516<\/td>\n | 84.7.12 PMD control function 84.8 40GBASE-KR4 electrical characteristics 84.8.1 Transmitter characteristics 84.8.1.1 Test fixture 84.8.2 Receiver characteristics 84.8.2.1 Receiver interference tolerance 84.9 Interconnect characteristics 84.10 Environmental specifications 84.10.1 General safety <\/td>\n<\/tr>\n | ||||||
| 3517<\/td>\n | 84.10.2 Network safety 84.10.3 Installation and maintenance guidelines 84.10.4 Electromagnetic compatibility 84.10.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3518<\/td>\n | 84.11 Protocol implementation conformance statement (PICS) proforma for Clause 84, Physical Medium Dependent sublayer and baseband medium, type 40GBASE-KR4 84.11.1 Introduction 84.11.2 Identification 84.11.2.1 Implementation identification 84.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3519<\/td>\n | 84.11.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3520<\/td>\n | 84.11.4 PICS proforma tables for Clause 84, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-KR4 84.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3521<\/td>\n | 84.11.4.2 Management functions 84.11.4.3 Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 3522<\/td>\n | 84.11.4.4 Receiver electrical characteristics 84.11.4.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3523<\/td>\n | 85. Physical Medium Dependent sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3524<\/td>\n | 85.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3525<\/td>\n | 85.3 PCS requirements for Auto-Negotiation (AN) service interface 85.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3526<\/td>\n | 85.5 Skew constraints 85.6 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3528<\/td>\n | 85.7 PMD functional specifications 85.7.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 3530<\/td>\n | 85.7.2 PMD Transmit function 85.7.3 PMD Receive function 85.7.4 Global PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 3531<\/td>\n | 85.7.5 PMD lane-by-lane signal detect function 85.7.6 Global PMD transmit disable function 85.7.7 PMD lane-by-lane transmit disable function 85.7.8 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 3532<\/td>\n | 85.7.9 PMD_fault function 85.7.10 PMD transmit fault function 85.7.11 PMD receive fault function 85.7.12 PMD control function 85.8 MDI Electrical specifications for 40GBASE-CR4 and 100GBASE-CR10 85.8.1 Signal levels 85.8.2 Signal paths <\/td>\n<\/tr>\n | ||||||
| 3533<\/td>\n | 85.8.3 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3534<\/td>\n | 85.8.3.1 Transmitter differential output return loss 85.8.3.2 Transmitter noise parameter measurements <\/td>\n<\/tr>\n | ||||||
| 3535<\/td>\n | 85.8.3.3 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 3537<\/td>\n | 85.8.3.3.1 Coefficient initialization 85.8.3.3.2 Coefficient step size <\/td>\n<\/tr>\n | ||||||
| 3538<\/td>\n | 85.8.3.3.3 Coefficient range 85.8.3.3.4 Waveform acquisition 85.8.3.3.5 Linear fit to the waveform measurement at TP2 <\/td>\n<\/tr>\n | ||||||
| 3539<\/td>\n | 85.8.3.3.6 Transfer function between the transmit function and TP2 <\/td>\n<\/tr>\n | ||||||
| 3540<\/td>\n | 85.8.3.4 Insertion loss TP0 to TP2 or TP3 to TP5 85.8.3.5 Test fixture <\/td>\n<\/tr>\n | ||||||
| 3541<\/td>\n | 85.8.3.6 Test fixture impedance 85.8.3.7 Test fixture insertion loss 85.8.3.8 Data dependent jitter (DDJ) <\/td>\n<\/tr>\n | ||||||
| 3542<\/td>\n | 85.8.3.9 Signaling rate range <\/td>\n<\/tr>\n | ||||||
| 3543<\/td>\n | 85.8.4 Receiver characteristics at TP3 summary 85.8.4.1 Receiver differential input return loss <\/td>\n<\/tr>\n | ||||||
| 3544<\/td>\n | 85.8.4.2 Receiver interference tolerance test 85.8.4.2.1 Test setup 85.8.4.2.2 Test channel <\/td>\n<\/tr>\n | ||||||
| 3545<\/td>\n | 85.8.4.2.3 Test channel calibration 85.8.4.2.4 Pattern generator <\/td>\n<\/tr>\n | ||||||
| 3546<\/td>\n | 85.8.4.2.5 Test procedure 85.8.4.3 Bit error ratio 85.8.4.4 Signaling rate range 85.8.4.5 AC-coupling 85.9 Channel characteristics 85.10 Cable assembly characteristics <\/td>\n<\/tr>\n | ||||||
| 3547<\/td>\n | 85.10.1 Characteristic impedance and reference impedance 85.10.2 Cable assembly insertion loss <\/td>\n<\/tr>\n | ||||||
| 3549<\/td>\n | 85.10.3 Cable assembly insertion loss deviation (ILD) <\/td>\n<\/tr>\n | ||||||
| 3550<\/td>\n | 85.10.4 Cable assembly return loss <\/td>\n<\/tr>\n | ||||||
| 3551<\/td>\n | 85.10.5 Cable assembly multiple disturber near-end crosstalk (MDNEXT) loss 85.10.6 Cable assembly multiple disturber far-end crosstalk (MDFEXT) loss <\/td>\n<\/tr>\n | ||||||
| 3552<\/td>\n | 85.10.7 Cable assembly integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n | ||||||
| 3554<\/td>\n | 85.10.8 Cable assembly test fixture 85.10.9 Mated test fixtures <\/td>\n<\/tr>\n | ||||||
| 3555<\/td>\n | 85.10.9.1 Mated test fixtures insertion loss 85.10.9.2 Mated test fixtures return loss <\/td>\n<\/tr>\n | ||||||
| 3556<\/td>\n | 85.10.9.3 Mated test fixtures common-mode conversion loss <\/td>\n<\/tr>\n | ||||||
| 3557<\/td>\n | 85.10.9.4 Mated test fixtures integrated crosstalk noise 85.10.10 Shielding 85.10.11 Crossover function <\/td>\n<\/tr>\n | ||||||
| 3558<\/td>\n | 85.11 MDI specification 85.11.1 40GBASE-CR4 MDI connectors 85.11.1.1 Style-1 40GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 3559<\/td>\n | 85.11.1.1.1 Style-1 AC-coupling <\/td>\n<\/tr>\n | ||||||
| 3560<\/td>\n | 85.11.1.2 Style-2 40GBASE-CR4 MDI connectors 85.11.1.2.1 Style-2 40GBASE-CR4 Connector pin assignments <\/td>\n<\/tr>\n | ||||||
| 3561<\/td>\n | 85.11.2 100GBASE-CR10 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 3563<\/td>\n | 85.11.2.1 100GBASE-CR10 MDI AC-coupling 85.11.3 Electronic keying 85.12 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3564<\/td>\n | 85.13 Protocol implementation conformance statement (PICS) proforma for Clause 85, Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.1 Introduction 85.13.2 Identification 85.13.2.1 Implementation identification 85.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3565<\/td>\n | 85.13.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3566<\/td>\n | 85.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 40GBASE-CR4 and 100GBASE-CR10 85.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3567<\/td>\n | 85.13.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 3568<\/td>\n | 85.13.4.3 Transmitter specifications 85.13.4.4 Receiver specifications <\/td>\n<\/tr>\n | ||||||
| 3569<\/td>\n | 85.13.4.5 Cable assembly specifications <\/td>\n<\/tr>\n | ||||||
| 3570<\/td>\n | 85.13.4.6 MDI connector specifications 85.13.4.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3571<\/td>\n | 86. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-SR4 and 100GBASE-SR10 86.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3573<\/td>\n | 86.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3574<\/td>\n | 86.3 Delay and Skew 86.3.1 Delay constraints 86.3.2 Skew and Skew Variation constraints 86.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3575<\/td>\n | 86.5 PMD functional specifications 86.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 3576<\/td>\n | 86.5.2 PMD transmit function 86.5.3 PMD receive function 86.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 3577<\/td>\n | 86.5.5 PMD lane-by-lane signal detect function 86.5.6 PMD reset function 86.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 3578<\/td>\n | 86.5.8 PMD lane-by-lane transmit disable function (optional) 86.5.9 PMD fault function (optional) 86.5.10 PMD transmit fault function (optional) 86.5.11 PMD receive fault function (optional) 86.6 Lane assignments 86.7 PMD to MDI specifications for 40GBASE-SR4 or 100GBASE-SR10 <\/td>\n<\/tr>\n | ||||||
| 3579<\/td>\n | 86.7.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3580<\/td>\n | 86.7.2 Characteristics of signal within, and at the receiving end of, a compliant optical channel <\/td>\n<\/tr>\n | ||||||
| 3581<\/td>\n | 86.7.3 40GBASE-SR4 or 100GBASE-SR10 receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 3582<\/td>\n | 86.7.4 40GBASE-SR4 or 100GBASE-SR10 illustrative link power budget 86.8 Definitions of optical and dual-use parameters and measurement methods 86.8.1 Test points and compliance boards 86.8.2 Test patterns and related subclauses <\/td>\n<\/tr>\n | ||||||
| 3585<\/td>\n | 86.8.2.1 Multi-lane testing considerations 86.8.3 Parameters applicable to both electrical and optical signals 86.8.3.1 Skew and Skew Variation <\/td>\n<\/tr>\n | ||||||
| 3586<\/td>\n | 86.8.3.2 Eye diagrams 86.8.3.2.1 Eye mask acceptable hit count examples 86.8.3.3 Jitter 86.8.3.3.1 J2 Jitter 86.8.3.3.2 J9 Jitter <\/td>\n<\/tr>\n | ||||||
| 3587<\/td>\n | 86.8.4 Optical parameter definitions 86.8.4.1 Wavelength and spectral width 86.8.4.2 Average optical power 86.8.4.3 Optical Modulation Amplitude (OMA) 86.8.4.4 Transmitter and dispersion penalty (TDP) 86.8.4.5 Extinction ratio 86.8.4.6 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 3588<\/td>\n | 86.8.4.6.1 Optical transmitter eye mask <\/td>\n<\/tr>\n | ||||||
| 3589<\/td>\n | 86.8.4.7 Stressed receiver sensitivity 86.8.4.8 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 3590<\/td>\n | 86.9 Safety, installation, environment, and labeling 86.9.1 General safety 86.9.2 Laser safety 86.9.3 Installation 86.9.4 Environment 86.9.5 PMD labeling 86.10 Optical channel <\/td>\n<\/tr>\n | ||||||
| 3591<\/td>\n | 86.10.1 Fiber optic cabling model 86.10.2 Characteristics of the fiber optic cabling (channel) 86.10.2.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 3592<\/td>\n | 86.10.2.2 Optical fiber connection 86.10.2.2.1 Connection insertion loss 86.10.2.2.2 Maximum discrete reflectance 86.10.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 3593<\/td>\n | 86.10.3.1 Optical lane assignments for 40GBASE-SR4 86.10.3.2 Optical lane assignments for 100GBASE-SR10 <\/td>\n<\/tr>\n | ||||||
| 3594<\/td>\n | 86.10.3.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 3596<\/td>\n | 86.11 Protocol implementation conformance statement (PICS) proforma for Clause 86, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-SR4 and 100GBASE-SR10 86.11.1 Introduction 86.11.2 Identification 86.11.2.1 Implementation identification 86.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3597<\/td>\n | 86.11.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3598<\/td>\n | 86.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 40GBASE-SR4 and 100GBASE-SR10 86.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3599<\/td>\n | 86.11.4.2 Management functions 86.11.4.3 Optical specifications for 40GBASE-SR4 or 100GBASE-SR10 <\/td>\n<\/tr>\n | ||||||
| 3600<\/td>\n | 86.11.4.4 Definitions of parameters and measurement methods 86.11.4.5 Environmental and safety specifications <\/td>\n<\/tr>\n | ||||||
| 3601<\/td>\n | 86.11.4.6 Optical channel and MDI <\/td>\n<\/tr>\n | ||||||
| 3602<\/td>\n | 87. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.1 Overview 87.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3604<\/td>\n | 87.3 Delay and Skew 87.3.1 Delay constraints 87.3.2 Skew constraints 87.4 PMD MDIO function mapping 87.5 PMD functional specifications 87.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 3605<\/td>\n | 87.5.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 3606<\/td>\n | 87.5.3 PMD receive function 87.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 3607<\/td>\n | 87.5.5 PMD lane-by-lane signal detect function 87.5.6 PMD reset function 87.5.7 PMD global transmit disable function (optional) 87.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n | ||||||
| 3608<\/td>\n | 87.5.9 PMD fault function (optional) 87.5.10 PMD transmit fault function (optional) 87.5.11 PMD receive fault function (optional) 87.6 Wavelength-division-multiplexed lane assignments 87.7 PMD to MDI optical specifications for 40GBASE-LR4 and 40GBASE-ER4 <\/td>\n<\/tr>\n | ||||||
| 3609<\/td>\n | 87.7.1 40GBASE-LR4 and 40GBASE-ER4 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3610<\/td>\n | 87.7.2 40GBASE-LR4 and 40GBASE-ER4 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 3611<\/td>\n | 87.7.3 40GBASE-LR4 and 40GBASE-ER4 illustrative link power budgets 87.8 Definition of optical parameters and measurement methods <\/td>\n<\/tr>\n | ||||||
| 3612<\/td>\n | 87.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 3613<\/td>\n | 87.8.2 Skew and Skew Variation 87.8.3 Wavelength and side mode suppression ratio (SMSR) 87.8.4 Average optical power 87.8.5 Optical Modulation Amplitude (OMA) 87.8.6 Transmitter and dispersion penalty 87.8.6.1 Reference transmitter requirements <\/td>\n<\/tr>\n | ||||||
| 3614<\/td>\n | 87.8.6.2 Channel requirements 87.8.6.3 Reference receiver requirements <\/td>\n<\/tr>\n | ||||||
| 3615<\/td>\n | 87.8.6.4 Test procedure 87.8.7 Extinction ratio 87.8.8 Relative Intensity Noise (RIN20OMA) 87.8.9 Transmitter optical waveform (transmit eye) 87.8.10 Receiver sensitivity 87.8.11 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 3616<\/td>\n | 87.8.11.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 3617<\/td>\n | 87.8.11.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 3619<\/td>\n | 87.8.11.3 Stressed receiver conformance test signal verification 87.8.11.4 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 3620<\/td>\n | 87.8.11.5 Stressed receiver conformance test procedure for WDM conformance testing <\/td>\n<\/tr>\n | ||||||
| 3621<\/td>\n | 87.8.12 Receiver 3 dB electrical upper cutoff frequency 87.9 Safety, installation, environment, and labeling 87.9.1 General safety 87.9.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 3622<\/td>\n | 87.9.3 Installation 87.9.4 Environment 87.9.4.1 Electromagnetic emission 87.9.4.2 Temperature, humidity, and handling 87.9.5 PMD labeling requirements 87.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 3623<\/td>\n | 87.11 Characteristics of the fiber optic cabling (channel) 87.11.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 3624<\/td>\n | 87.11.2 Optical fiber connection 87.11.2.1 Connection insertion loss 87.11.2.2 Maximum discrete reflectance 87.11.3 Medium Dependent Interface (MDI) requirements 87.12 Requirements for interoperation between 40GBASE-LR4 and 40GBASE-ER4 <\/td>\n<\/tr>\n | ||||||
| 3625<\/td>\n | 87.13 Protocol implementation conformance statement (PICS) proforma for Clause 87, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.13.1 Introduction 87.13.2 Identification 87.13.2.1 Implementation identification 87.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3626<\/td>\n | 87.13.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3627<\/td>\n | 87.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-LR4 and 40GBASE-ER4 87.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3628<\/td>\n | 87.13.4.2 Management functions 87.13.4.3 PMD to MDI optical specifications for 40GBASE-LR4 87.13.4.4 PMD to MDI optical specifications for 40GBASE-ER4 <\/td>\n<\/tr>\n | ||||||
| 3629<\/td>\n | 87.13.4.5 Optical measurement methods 87.13.4.6 Environmental specifications 87.13.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 3630<\/td>\n | 88. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4 88.1 Overview 88.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3632<\/td>\n | 88.3 Delay and Skew 88.3.1 Delay constraints 88.3.2 Skew constraints 88.4 PMD MDIO function mapping 88.5 PMD functional specifications 88.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 3634<\/td>\n | 88.5.2 PMD transmit function 88.5.3 PMD receive function 88.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 3635<\/td>\n | 88.5.5 PMD lane-by-lane signal detect function 88.5.6 PMD reset function 88.5.7 PMD global transmit disable function (optional) 88.5.8 PMD lane-by-lane transmit disable function <\/td>\n<\/tr>\n | ||||||
| 3636<\/td>\n | 88.5.9 PMD fault function (optional) 88.5.10 PMD transmit fault function (optional) 88.5.11 PMD receive fault function (optional) 88.6 Wavelength-division-multiplexed lane assignments 88.7 PMD to MDI optical specifications for 100GBASE-LR4 and 100GBASE-ER4 <\/td>\n<\/tr>\n | ||||||
| 3637<\/td>\n | 88.7.1 100GBASE-LR4 and 100GBASE-ER4 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3639<\/td>\n | 88.7.2 100GBASE-LR4 and 100GBASE-ER4 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 3640<\/td>\n | 88.7.3 100GBASE-LR4 and 100GBASE-ER4 illustrative link power budgets 88.8 Definition of optical parameters and measurement methods 88.8.1 Test patterns for optical parameters 88.8.2 Wavelength and side mode suppression ratio (SMSR) 88.8.3 Average optical power <\/td>\n<\/tr>\n | ||||||
| 3641<\/td>\n | 88.8.4 Optical Modulation Amplitude (OMA) 88.8.5 Transmitter and dispersion penalty (TDP) <\/td>\n<\/tr>\n | ||||||
| 3642<\/td>\n | 88.8.5.1 Reference transmitter requirements 88.8.5.2 Channel requirements 88.8.5.3 Reference receiver requirements <\/td>\n<\/tr>\n | ||||||
| 3643<\/td>\n | 88.8.5.4 Test procedure 88.8.6 Extinction ratio 88.8.7 Relative Intensity Noise (RIN20OMA) 88.8.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 3644<\/td>\n | 88.8.9 Receiver sensitivity 88.8.10 Stressed receiver sensitivity 88.8.11 Receiver 3 dB electrical upper cutoff frequency 88.9 Safety, installation, environment, and labeling 88.9.1 General safety 88.9.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 3645<\/td>\n | 88.9.3 Installation 88.9.4 Environment 88.9.5 Electromagnetic emission 88.9.6 Temperature, humidity, and handling 88.9.7 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 3646<\/td>\n | 88.10 Fiber optic cabling model 88.11 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 3647<\/td>\n | 88.11.1 Optical fiber cable 88.11.2 Optical fiber connection 88.11.2.1 Connection insertion loss 88.11.2.2 Maximum discrete reflectance 88.11.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 3648<\/td>\n | 88.12 Protocol implementation conformance statement (PICS) proforma for Clause 88, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-LR4 and 100GBASE-ER4 88.12.1 Introduction 88.12.2 Identification 88.12.2.1 Implementation identification 88.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3649<\/td>\n | 88.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3650<\/td>\n | 88.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 100GBASE-LR4 and 100GBASE-ER4 88.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3651<\/td>\n | 88.12.4.2 Management functions 88.12.4.3 PMD to MDI optical specifications for 100GBASE-LR4 88.12.4.4 PMD to MDI optical specifications for 100GBASE-ER4 <\/td>\n<\/tr>\n | ||||||
| 3652<\/td>\n | 88.12.4.5 Optical measurement methods 88.12.4.6 Environmental specifications 88.12.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 3653<\/td>\n | 89. Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3654<\/td>\n | 89.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3655<\/td>\n | 89.3 Delay and skew 89.3.1 Delay constraints 89.3.2 Skew constraints 89.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3656<\/td>\n | 89.5 PMD functional specifications 89.5.1 PMD block diagram 89.5.2 PMD transmit function 89.5.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 3657<\/td>\n | 89.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 3658<\/td>\n | 89.5.5 PMD reset function 89.5.6 PMD global transmit disable function (optional) 89.5.7 PMD fault function (optional) 89.5.8 PMD transmit fault function (optional) 89.5.9 PMD receive fault function (optional) 89.6 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n | ||||||
| 3659<\/td>\n | 89.6.1 40GBASE-FR transmitter optical specifications 89.6.2 40GBASE-FR receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 3660<\/td>\n | 89.6.3 40GBASE-FR illustrative link power budget 89.6.4 Comparison of power budget methodology <\/td>\n<\/tr>\n | ||||||
| 3661<\/td>\n | 89.7 Definition of optical parameters and measurement methods 89.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 3662<\/td>\n | 89.7.2 Skew and Skew Variation 89.7.3 Wavelength and side mode suppression ratio (SMSR) 89.7.4 Average optical power 89.7.5 Dispersion penalty 89.7.5.1 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 3663<\/td>\n | 89.7.5.2 Reference receiver requirements 89.7.5.3 Test procedure 89.7.6 Extinction ratio <\/td>\n<\/tr>\n | ||||||
| 3664<\/td>\n | 89.7.7 Relative Intensity Noise (RIN20OMA) 89.7.8 Transmitter optical waveform (transmit eye) 89.7.9 Receiver sensitivity 89.7.10 Receiver jitter tolerance 89.7.11 Receiver 3 dB electrical upper cutoff frequency <\/td>\n<\/tr>\n | ||||||
| 3665<\/td>\n | 89.8 Safety, installation, environment, and labeling 89.8.1 General safety 89.8.2 Laser safety 89.8.3 Installation 89.8.4 Environment <\/td>\n<\/tr>\n | ||||||
| 3666<\/td>\n | 89.8.4.1 Electromagnetic emission 89.8.4.2 Temperature, humidity, and handling 89.8.5 PMD labeling requirements 89.9 Fiber optic cabling model 89.10 Characteristics of the fiber optic cabling (channel) 89.10.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 3667<\/td>\n | 89.10.2 Optical fiber connection 89.10.2.1 Connection insertion loss 89.10.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 3668<\/td>\n | 89.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 3669<\/td>\n | 89.11 Protocol implementation conformance statement (PICS) proforma for Clause 89, Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.11.1 Introduction 89.11.2 Identification 89.11.2.1 Implementation identification 89.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3670<\/td>\n | 89.11.3 Major capabilities\/options 89.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 40GBASE-FR 89.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3671<\/td>\n | 89.11.4.2 Management functions 89.11.4.3 PMD to MDI optical specifications for 40GBASE-FR <\/td>\n<\/tr>\n | ||||||
| 3672<\/td>\n | 89.11.4.4 Optical measurement methods 89.11.4.5 Environmental specifications 89.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 3673<\/td>\n | 90. Ethernet support for time synchronization protocols 90.1 Introduction 90.2 Overview 90.3 Relationship with other IEEE standards 90.4 Time Synchronization Service Interface (TSSI) 90.4.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 3674<\/td>\n | 90.4.1.1 Interlayer service interfaces 90.4.1.2 Responsibilities of TimeSync Client <\/td>\n<\/tr>\n | ||||||
| 3675<\/td>\n | 90.4.2 TSSI 90.4.3 Detailed service specification 90.4.3.1 TS_TX.indication primitive 90.4.3.1.1 Semantics 90.4.3.1.2 Condition for generation 90.4.3.1.3 Effect of receipt 90.4.3.2 TS_RX.indication primitive 90.4.3.2.1 Semantics <\/td>\n<\/tr>\n | ||||||
| 3676<\/td>\n | 90.4.3.2.2 Condition for generation 90.4.3.2.3 Effect of receipt 90.5 generic Reconciliation Sublayer (gRS) 90.5.1 TS_SFD_Detect_TX function 90.5.2 TS_SFD_Detect_RX function <\/td>\n<\/tr>\n | ||||||
| 3677<\/td>\n | 90.6 Overview of management features <\/td>\n<\/tr>\n | ||||||
| 3678<\/td>\n | 90.7 Data delay measurement <\/td>\n<\/tr>\n | ||||||
| 3680<\/td>\n | 90.8 Protocol implementation conformance statement (PICS) proforma for Clause 90, Ethernet support for time synchronization protocols 90.8.1 Introduction 90.8.2 Identification 90.8.2.1 Implementation identification 90.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3681<\/td>\n | 90.8.3 TSSI indication 90.8.4 Data delay reporting <\/td>\n<\/tr>\n | ||||||
| 3682<\/td>\n | 91. Reed-Solomon forward error correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.1 Overview 91.1.1 Scope 91.1.2 Position of RS-FEC in the 100GBASE-R sublayers 91.2 FEC service interface <\/td>\n<\/tr>\n | ||||||
| 3684<\/td>\n | 91.3 PMA compatibility 91.4 Delay constraints 91.5 Functions within the RS-FEC sublayer 91.5.1 Functional block diagram 91.5.2 Transmit function 91.5.2.1 Lane block synchronization 91.5.2.2 Alignment lock and deskew 91.5.2.3 Lane reorder <\/td>\n<\/tr>\n | ||||||
| 3685<\/td>\n | 91.5.2.4 Alignment marker removal <\/td>\n<\/tr>\n | ||||||
| 3687<\/td>\n | 91.5.2.5 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n | ||||||
| 3688<\/td>\n | 91.5.2.6 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 3690<\/td>\n | 91.5.2.7 Reed-Solomon encoder <\/td>\n<\/tr>\n | ||||||
| 3692<\/td>\n | 91.5.2.8 Symbol distribution 91.5.2.9 Transmit bit ordering 91.5.3 Receive function 91.5.3.1 Alignment lock and deskew <\/td>\n<\/tr>\n | ||||||
| 3694<\/td>\n | 91.5.3.2 Lane reorder 91.5.3.3 Reed-Solomon decoder <\/td>\n<\/tr>\n | ||||||
| 3695<\/td>\n | 91.5.3.3.1 FEC Degraded SER (optional) <\/td>\n<\/tr>\n | ||||||
| 3696<\/td>\n | 91.5.3.4 Alignment marker removal 91.5.3.5 256B\/257B to 64B\/66B transcoder <\/td>\n<\/tr>\n | ||||||
| 3697<\/td>\n | 91.5.3.6 Block distribution 91.5.3.7 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 3698<\/td>\n | 91.5.3.8 Receive bit ordering 91.5.4 Detailed functions and state diagrams 91.5.4.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 3700<\/td>\n | 91.5.4.2 State variables 91.5.4.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3702<\/td>\n | 91.5.4.2.2 Functions 91.5.4.2.3 Counters <\/td>\n<\/tr>\n | ||||||
| 3703<\/td>\n | 91.5.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3707<\/td>\n | 91.6 RS-FEC MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3709<\/td>\n | 91.6.1 FEC_bypass_correction_enable 91.6.2 FEC_bypass_indication_enable 91.6.3 four_lane_pmd 91.6.4 FEC_degraded_SER_enable <\/td>\n<\/tr>\n | ||||||
| 3710<\/td>\n | 91.6.5 FEC_degraded_SER_activate_threshold 91.6.6 FEC_degraded_SER_deactivate_threshold 91.6.7 FEC_degraded_SER_interval 91.6.8 FEC_bypass_correction_ability 91.6.9 FEC_bypass_indication_ability 91.6.10 hi_ser 91.6.11 FEC_degraded_SER_ability 91.6.12 FEC_degraded_SER 91.6.13 FEC_optional_states <\/td>\n<\/tr>\n | ||||||
| 3711<\/td>\n | 91.6.14 amps_lock 91.6.15 fec_align_status 91.6.16 FEC_corrected_cw_counter 91.6.17 FEC_uncorrected_cw_counter 91.6.18 FEC_lane_mapping 91.6.19 FEC_symbol_error_counter_i 91.6.20 align_status 91.6.21 BIP_error_counter_i <\/td>\n<\/tr>\n | ||||||
| 3712<\/td>\n | 91.6.22 lane_mapping 91.6.23 block_lock 91.6.24 am_lock <\/td>\n<\/tr>\n | ||||||
| 3713<\/td>\n | 91.7 Protocol implementation conformance statement (PICS) proforma for Clause 91, Reed-Solomon forward error correction (RS-FEC) sublayer for 100GBASE-R PHYs 91.7.1 Introduction 91.7.2 Identification 91.7.2.1 Implementation identification 91.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3714<\/td>\n | 91.7.3 Major capabilities\/options 91.7.4 PICS proforma tables for Reed-Solomon forward error correction (RS-FEC) sublayer for 100GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 3715<\/td>\n | 91.7.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 3716<\/td>\n | 91.7.4.2 Receive function <\/td>\n<\/tr>\n | ||||||
| 3718<\/td>\n | 91.7.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3719<\/td>\n | 92. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3720<\/td>\n | 92.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3721<\/td>\n | 92.3 PCS requirements for Auto-Negotiation (AN) service interface 92.4 Delay constraints 92.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3722<\/td>\n | 92.6 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3723<\/td>\n | 92.7 PMD functional specifications 92.7.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 3725<\/td>\n | 92.7.2 PMD Transmit function 92.7.3 PMD Receive function 92.7.4 Global PMD signal detect function 92.7.5 PMD lane-by-lane signal detect function <\/td>\n<\/tr>\n | ||||||
| 3726<\/td>\n | 92.7.6 Global PMD transmit disable function 92.7.7 PMD lane-by-lane transmit disable function 92.7.8 Loopback mode 92.7.9 PMD fault function 92.7.10 PMD transmit fault function <\/td>\n<\/tr>\n | ||||||
| 3727<\/td>\n | 92.7.11 PMD receive fault function 92.7.12 PMD control function <\/td>\n<\/tr>\n | ||||||
| 3728<\/td>\n | 92.8 100GBASE-CR4 electrical characteristics 92.8.1 Signal levels 92.8.2 Signal paths 92.8.3 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3729<\/td>\n | 92.8.3.1 Signal levels <\/td>\n<\/tr>\n | ||||||
| 3730<\/td>\n | 92.8.3.2 Transmitter differential output return loss 92.8.3.3 Common-mode to differential mode output return loss <\/td>\n<\/tr>\n | ||||||
| 3731<\/td>\n | 92.8.3.4 Common-mode to common-mode output return loss <\/td>\n<\/tr>\n | ||||||
| 3732<\/td>\n | 92.8.3.5 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 3733<\/td>\n | 92.8.3.5.1 Linear fit to the measured waveform 92.8.3.5.2 Steady-state voltage and linear fit pulse peak 92.8.3.5.3 Coefficient initialization <\/td>\n<\/tr>\n | ||||||
| 3734<\/td>\n | 92.8.3.5.4 Coefficient step size 92.8.3.5.5 Coefficient range 92.8.3.6 Insertion loss TP0 to TP2 or TP3 to TP5 92.8.3.7 Transmitter signal-to-noise-and-distortion ratio (SNDR) <\/td>\n<\/tr>\n | ||||||
| 3735<\/td>\n | 92.8.3.8 Transmitter output jitter <\/td>\n<\/tr>\n | ||||||
| 3736<\/td>\n | 92.8.3.8.1 Even-odd jitter 92.8.3.8.2 Effective bounded uncorrelated jitter and effective random jitter <\/td>\n<\/tr>\n | ||||||
| 3737<\/td>\n | 92.8.3.9 Signaling rate range 92.8.4 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3738<\/td>\n | 92.8.4.1 Receiver input amplitude tolerance 92.8.4.2 Receiver differential input return loss 92.8.4.3 Differential to common-mode input return loss 92.8.4.4 Receiver interference tolerance test <\/td>\n<\/tr>\n | ||||||
| 3739<\/td>\n | 92.8.4.4.1 Test setup 92.8.4.4.2 Test channel <\/td>\n<\/tr>\n | ||||||
| 3740<\/td>\n | 92.8.4.4.3 Test channel calibration 92.8.4.4.4 Pattern generator <\/td>\n<\/tr>\n | ||||||
| 3741<\/td>\n | 92.8.4.4.5 Test procedure 92.8.4.5 Receiver jitter tolerance 92.8.4.6 Signaling rate range 92.9 Channel characteristics <\/td>\n<\/tr>\n | ||||||
| 3742<\/td>\n | 92.10 Cable assembly characteristics 92.10.1 Characteristic impedance and reference impedance 92.10.2 Cable assembly insertion loss <\/td>\n<\/tr>\n | ||||||
| 3744<\/td>\n | 92.10.3 Cable assembly differential return loss 92.10.4 Differential to common-mode return loss <\/td>\n<\/tr>\n | ||||||
| 3746<\/td>\n | 92.10.5 Differential to common-mode conversion loss 92.10.6 Common-mode to common-mode return loss 92.10.7 Cable assembly Channel Operating Margin 92.10.7.1 Channel signal path <\/td>\n<\/tr>\n | ||||||
| 3747<\/td>\n | 92.10.7.1.1 TP0 to TP1 and TP4 to TP5 signal paths 92.10.7.2 Channel crosstalk paths <\/td>\n<\/tr>\n | ||||||
| 3748<\/td>\n | 92.11 Test fixtures 92.11.1 TP2 or TP3 test fixture 92.11.1.1 Test fixture return loss 92.11.1.2 Test fixture insertion loss <\/td>\n<\/tr>\n | ||||||
| 3750<\/td>\n | 92.11.2 Cable assembly test fixture 92.11.3 Mated test fixtures 92.11.3.1 Mated test fixtures insertion loss <\/td>\n<\/tr>\n | ||||||
| 3751<\/td>\n | 92.11.3.2 Mated test fixtures return loss <\/td>\n<\/tr>\n | ||||||
| 3752<\/td>\n | 92.11.3.3 Mated test fixtures common-mode conversion insertion loss 92.11.3.4 Mated test fixtures common-mode return loss <\/td>\n<\/tr>\n | ||||||
| 3754<\/td>\n | 92.11.3.5 Mated test fixtures common-mode to differential mode return loss 92.11.3.6 Mated test fixtures integrated crosstalk noise <\/td>\n<\/tr>\n | ||||||
| 3755<\/td>\n | 92.11.3.6.1 Mated test fixture multiple disturber near-end crosstalk (MDNEXT) loss 92.11.3.6.2 Mated test fixture multiple disturber far-end crosstalk (MDFEXT) loss 92.11.3.6.3 Mated test fixture integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n | ||||||
| 3756<\/td>\n | 92.12 MDI specification <\/td>\n<\/tr>\n | ||||||
| 3757<\/td>\n | 92.12.1 100GBASE-CR4 MDI connectors 92.12.1.1 Style-1 100GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 3758<\/td>\n | 92.12.1.2 Style-2 100GBASE-CR4 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 3759<\/td>\n | 92.13 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3760<\/td>\n | 92.14 Protocol implementation conformance statement (PICS) proforma for Clause 92, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.1 Introduction 92.14.2 Identification 92.14.2.1 Implementation identification 92.14.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3761<\/td>\n | 92.14.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3762<\/td>\n | 92.14.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-CR4 92.14.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3763<\/td>\n | 92.14.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 3764<\/td>\n | 92.14.4.3 Transmitter specifications <\/td>\n<\/tr>\n | ||||||
| 3765<\/td>\n | 92.14.4.4 Receiver specifications <\/td>\n<\/tr>\n | ||||||
| 3766<\/td>\n | 92.14.4.5 Cable assembly specifications <\/td>\n<\/tr>\n | ||||||
| 3767<\/td>\n | 92.14.4.6 MDI connector specifications 92.14.4.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3768<\/td>\n | 93. Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3769<\/td>\n | 93.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3770<\/td>\n | 93.3 PCS requirements for Auto-Negotiation (AN) service interface 93.4 Delay constraints 93.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3771<\/td>\n | 93.6 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3772<\/td>\n | 93.7 PMD functional specifications 93.7.1 Link block diagram 93.7.2 PMD Transmit function <\/td>\n<\/tr>\n | ||||||
| 3773<\/td>\n | 93.7.3 PMD Receive function 93.7.4 Global PMD signal detect function 93.7.5 PMD lane-by-lane signal detect function <\/td>\n<\/tr>\n | ||||||
| 3774<\/td>\n | 93.7.6 Global PMD transmit disable function 93.7.7 PMD lane-by-lane transmit disable function 93.7.8 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 3775<\/td>\n | 93.7.9 PMD fault function 93.7.10 PMD transmit fault function 93.7.11 PMD receive fault function 93.7.12 PMD control function <\/td>\n<\/tr>\n | ||||||
| 3776<\/td>\n | 93.8 100GBASE-KR4 electrical characteristics 93.8.1 Transmitter characteristics 93.8.1.1 Transmitter test fixture <\/td>\n<\/tr>\n | ||||||
| 3778<\/td>\n | 93.8.1.2 Signaling rate and range 93.8.1.3 Signal levels <\/td>\n<\/tr>\n | ||||||
| 3779<\/td>\n | 93.8.1.4 Transmitter output return loss 93.8.1.5 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 3781<\/td>\n | 93.8.1.5.1 Linear fit to the measured waveform 93.8.1.5.2 Steady-state voltage and linear fit pulse peak 93.8.1.5.3 Coefficient initialization 93.8.1.5.4 Coefficient step size 93.8.1.5.5 Coefficient range <\/td>\n<\/tr>\n | ||||||
| 3782<\/td>\n | 93.8.1.6 Transmitter signal-to-noise-and-distortion ratio (SNDR) 93.8.1.7 Transmitter output jitter 93.8.2 Receiver characteristics 93.8.2.1 Receiver test fixture <\/td>\n<\/tr>\n | ||||||
| 3783<\/td>\n | 93.8.2.2 Receiver input return loss <\/td>\n<\/tr>\n | ||||||
| 3784<\/td>\n | 93.8.2.3 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 3785<\/td>\n | 93.8.2.4 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 3786<\/td>\n | 93.9 Channel characteristics 93.9.1 Channel Operating Margin 93.9.2 Insertion loss <\/td>\n<\/tr>\n | ||||||
| 3788<\/td>\n | 93.9.3 Return loss 93.9.4 AC-coupling 93.10 Environmental specifications 93.10.1 General safety <\/td>\n<\/tr>\n | ||||||
| 3789<\/td>\n | 93.10.2 Network safety 93.10.3 Installation and maintenance guidelines 93.10.4 Electromagnetic compatibility 93.10.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3790<\/td>\n | 93.11 Protocol implementation conformance statement (PICS) proforma for Clause 93, Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.1 Introduction 93.11.2 Identification 93.11.2.1 Implementation identification 93.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3791<\/td>\n | 93.11.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3792<\/td>\n | 93.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 100GBASE-KR4 93.11.4.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 3793<\/td>\n | 93.11.4.2 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3795<\/td>\n | 93.11.4.3 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3796<\/td>\n | 93.11.4.4 Channel characteristics 93.11.4.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3797<\/td>\n | 94. Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3798<\/td>\n | 94.2 Physical Medium Attachment (PMA) Sublayer 94.2.1 PMA Service Interface <\/td>\n<\/tr>\n | ||||||
| 3799<\/td>\n | 94.2.1.1 PMA:IS_UNITDATA_i.request 94.2.1.1.1 Semantics of the service primitive 94.2.1.1.2 When generated 94.2.1.1.3 Effect of receipt 94.2.1.2 PMA:IS_UNITDATA_i.indication 94.2.1.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 3800<\/td>\n | 94.2.1.2.2 When generated 94.2.1.2.3 Effect of receipt 94.2.1.3 PMA:IS_SIGNAL.indication 94.2.1.3.1 Semantics of the service primitive 94.2.1.3.2 When generated 94.2.1.3.3 Effect of receipt 94.2.1.4 PMA:IS_TX_MODE.request 94.2.1.4.1 Semantics of the service primitive 94.2.1.4.2 When generated 94.2.1.4.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3801<\/td>\n | 94.2.1.5 PMA:IS_RX_MODE.request 94.2.1.5.1 Semantics of the service primitive 94.2.1.5.2 When generated 94.2.1.5.3 Effect of receipt 94.2.1.6 PMA:IS_ENERGY_DETECT.indication 94.2.1.6.1 Semantics of the service primitive 94.2.1.6.2 When generated 94.2.1.6.3 Effect of receipt 94.2.1.7 PMA:IS_RX_TX_MODE.indication <\/td>\n<\/tr>\n | ||||||
| 3802<\/td>\n | 94.2.1.7.1 Semantics of the service primitive 94.2.1.7.2 When generated 94.2.1.7.3 Effect of receipt 94.2.2 PMA Transmit Functional Specifications <\/td>\n<\/tr>\n | ||||||
| 3803<\/td>\n | 94.2.2.1 FEC Interface 94.2.2.2 Overhead Frame 94.2.2.3 Overhead <\/td>\n<\/tr>\n | ||||||
| 3804<\/td>\n | 94.2.2.4 Termination Blocks <\/td>\n<\/tr>\n | ||||||
| 3805<\/td>\n | 94.2.2.5 Gray Mapping 94.2.2.6 Precoding 94.2.2.7 PAM4 encoding <\/td>\n<\/tr>\n | ||||||
| 3806<\/td>\n | 94.2.2.8 PMD Interface 94.2.3 PMA Receive Functional Specifications <\/td>\n<\/tr>\n | ||||||
| 3807<\/td>\n | 94.2.3.1 Overhead 94.2.4 Skew constraints 94.2.5 Delay constraints 94.2.6 Link status 94.2.7 PMA local loopback mode <\/td>\n<\/tr>\n | ||||||
| 3808<\/td>\n | 94.2.8 PMA remote loopback mode (optional) 94.2.9 PMA test patterns 94.2.9.1 JP03A test pattern 94.2.9.2 JP03B test pattern 94.2.9.3 Quaternary PRBS13 test pattern <\/td>\n<\/tr>\n | ||||||
| 3809<\/td>\n | 94.2.9.4 Transmitter linearity test pattern 94.2.10 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3810<\/td>\n | 94.3 Physical Medium Dependent (PMD) Sublayer 94.3.1 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3811<\/td>\n | 94.3.1.1 PMD:IS_UNITDATA_i.request 94.3.1.1.1 Semantics of the service primitive 94.3.1.1.2 When generated 94.3.1.1.3 Effect of receipt 94.3.1.2 PMD:IS_UNITDATA_i.indication 94.3.1.2.1 Semantics of the service primitive 94.3.1.2.2 When generated 94.3.1.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3812<\/td>\n | 94.3.1.3 PMD:IS_SIGNAL.indication 94.3.1.3.1 Semantics of the service primitive 94.3.1.3.2 When generated 94.3.1.3.3 Effect of receipt 94.3.2 PCS requirements for Auto-Negotiation (AN) service interface 94.3.3 Delay constraints 94.3.4 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3813<\/td>\n | 94.3.5 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3814<\/td>\n | 94.3.6 PMD functional specifications 94.3.6.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 3815<\/td>\n | 94.3.6.2 PMD Transmit function 94.3.6.3 PMD Receive function 94.3.6.4 Global PMD signal detect function 94.3.6.5 PMD lane-by-lane signal detect function 94.3.6.6 Global PMD transmit disable function <\/td>\n<\/tr>\n | ||||||
| 3816<\/td>\n | 94.3.6.7 PMD lane-by-lane transmit disable function 94.3.6.8 Loopback mode 94.3.7 PMD fault function 94.3.8 PMD transmit fault function <\/td>\n<\/tr>\n | ||||||
| 3817<\/td>\n | 94.3.9 PMD receive fault function 94.3.10 PMD control function 94.3.10.1 Overview 94.3.10.2 Training frame structure <\/td>\n<\/tr>\n | ||||||
| 3818<\/td>\n | 94.3.10.3 Training frame words 94.3.10.4 Frame marker 94.3.10.5 Control channel encoding 94.3.10.5.1 Differential Manchester encoding 94.3.10.5.2 Control channel structure 94.3.10.6 Coefficient update field <\/td>\n<\/tr>\n | ||||||
| 3820<\/td>\n | 94.3.10.6.1 Preset 94.3.10.6.2 Initialize 94.3.10.6.3 Parity 94.3.10.6.4 Coefficient (k) update 94.3.10.7 Status report field <\/td>\n<\/tr>\n | ||||||
| 3821<\/td>\n | 94.3.10.7.1 Parity 94.3.10.7.2 Training frame countdown 94.3.10.7.3 Receiver ready <\/td>\n<\/tr>\n | ||||||
| 3822<\/td>\n | 94.3.10.7.4 Coefficient (k) status 94.3.10.7.5 Coefficient update process 94.3.10.8 Training pattern <\/td>\n<\/tr>\n | ||||||
| 3824<\/td>\n | 94.3.10.9 Transition from training to data 94.3.10.10 Frame lock state diagram 94.3.10.11 Training state diagram 94.3.10.12 Coefficient update state diagram <\/td>\n<\/tr>\n | ||||||
| 3825<\/td>\n | 94.3.11 PMD LPI function 94.3.11.1 Alert Signal 94.3.11.1.1 Frame marker 94.3.11.1.2 Coefficient update field 94.3.11.1.3 Status report field 94.3.11.1.4 Parity <\/td>\n<\/tr>\n | ||||||
| 3826<\/td>\n | 94.3.11.1.5 Mode 94.3.11.1.6 Alert frame countdown 94.3.11.1.7 PMA alignment offset 94.3.11.1.8 Receiver ready 94.3.11.1.9 Transition from alert to data <\/td>\n<\/tr>\n | ||||||
| 3827<\/td>\n | 94.3.12 PMD Transmitter electrical characteristics 94.3.12.1 Test fixture 94.3.12.1.1 Test fixture impedance <\/td>\n<\/tr>\n | ||||||
| 3828<\/td>\n | 94.3.12.1.2 Test fixture insertion loss <\/td>\n<\/tr>\n | ||||||
| 3829<\/td>\n | 94.3.12.2 Signaling rate and range <\/td>\n<\/tr>\n | ||||||
| 3830<\/td>\n | 94.3.12.3 Signal levels <\/td>\n<\/tr>\n | ||||||
| 3831<\/td>\n | 94.3.12.4 Transmitter output return loss <\/td>\n<\/tr>\n | ||||||
| 3832<\/td>\n | 94.3.12.5 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 3833<\/td>\n | 94.3.12.5.1 Transmitter linearity <\/td>\n<\/tr>\n | ||||||
| 3834<\/td>\n | 94.3.12.5.2 Linear fit to the measured waveform 94.3.12.5.3 Steady-state voltage and linear fit pulse peak 94.3.12.5.4 Coefficient initialization <\/td>\n<\/tr>\n | ||||||
| 3835<\/td>\n | 94.3.12.5.5 Coefficient step size 94.3.12.5.6 Coefficient range 94.3.12.6 Transmitter output jitter 94.3.12.6.1 Clock random jitter and clock deterministic jitter <\/td>\n<\/tr>\n | ||||||
| 3836<\/td>\n | 94.3.12.6.2 Even-odd jitter <\/td>\n<\/tr>\n | ||||||
| 3837<\/td>\n | 94.3.12.7 Transmitter signal-to-noise-and-distortion ratio (SNDR) 94.3.13 PMD Receiver electrical characteristics 94.3.13.1 Test fixture <\/td>\n<\/tr>\n | ||||||
| 3838<\/td>\n | 94.3.13.2 Receiver input return loss 94.3.13.3 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 3841<\/td>\n | 94.3.13.4 Receiver jitter tolerance 94.3.13.4.1 Test setup 94.3.13.4.2 Test method 94.4 Channel characteristics 94.4.1 Channel Operating Margin 94.4.2 Channel insertion loss <\/td>\n<\/tr>\n | ||||||
| 3843<\/td>\n | 94.4.3 Channel return loss <\/td>\n<\/tr>\n | ||||||
| 3844<\/td>\n | 94.4.4 Channel AC-coupling 94.5 Environmental specifications 94.5.1 General safety 94.5.2 Network safety <\/td>\n<\/tr>\n | ||||||
| 3845<\/td>\n | 94.5.3 Installation and maintenance guidelines 94.5.4 Electromagnetic compatibility 94.5.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 3846<\/td>\n | 94.6 Protocol implementation conformance statement (PICS) proforma for Clause 94, Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.6.1 Introduction 94.6.2 Identification 94.6.2.1 Implementation identification 94.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3847<\/td>\n | 94.6.3 Major capabilities\/options 94.6.4 PICS proforma tables for Physical Medium Attachment (PMA) sublayer, Physical Medium Dependent (PMD) sublayer, and baseband medium, type 100GBASE-KP4 94.6.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 3848<\/td>\n | 94.6.4.2 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3852<\/td>\n | 94.6.4.3 PMD transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 3853<\/td>\n | 94.6.4.4 PMD receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 3854<\/td>\n | 94.6.4.5 Channel characteristics 94.6.4.6 Environment specifications <\/td>\n<\/tr>\n | ||||||
| 3855<\/td>\n | 95. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3856<\/td>\n | 95.1.1 Bit error ratio 95.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 3857<\/td>\n | 95.3 Delay and Skew 95.3.1 Delay constraints 95.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 3858<\/td>\n | 95.4 PMD MDIO function mapping 95.5 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3859<\/td>\n | 95.5.1 PMD block diagram 95.5.2 PMD transmit function 95.5.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 3860<\/td>\n | 95.5.4 PMD global signal detect function 95.5.5 PMD lane-by-lane signal detect function 95.5.6 PMD reset function <\/td>\n<\/tr>\n | ||||||
| 3861<\/td>\n | 95.5.7 PMD global transmit disable function (optional) 95.5.8 PMD lane-by-lane transmit disable function (optional) 95.5.9 PMD fault function (optional) 95.5.10 PMD transmit fault function (optional) 95.5.11 PMD receive fault function (optional) 95.6 Lane assignments <\/td>\n<\/tr>\n | ||||||
| 3862<\/td>\n | 95.7 PMD to MDI optical specifications for 100GBASE-SR4 95.7.1 100GBASE-SR4 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 3863<\/td>\n | 95.7.2 100GBASE-SR4 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 3864<\/td>\n | 95.7.3 100GBASE-SR4 illustrative link power budget 95.8 Definition of optical parameters and measurement methods 95.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 3865<\/td>\n | 95.8.1.1 Multi-lane testing considerations 95.8.2 Center wavelength and spectral width 95.8.3 Average optical power <\/td>\n<\/tr>\n | ||||||
| 3866<\/td>\n | 95.8.4 Optical Modulation Amplitude (OMA) 95.8.5 Transmitter and dispersion eye closure (TDEC) 95.8.5.1 TDEC conformance test setup 95.8.5.2 TDEC measurement method <\/td>\n<\/tr>\n | ||||||
| 3869<\/td>\n | 95.8.6 Extinction ratio 95.8.7 Transmitter optical waveform (transmit eye) 95.8.8 Stressed receiver sensitivity 95.8.8.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 3870<\/td>\n | 95.8.8.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 3872<\/td>\n | 95.8.8.3 J2 and J4 Jitter 95.8.8.4 Stressed receiver conformance test signal verification 95.8.8.5 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 3873<\/td>\n | 95.9 Safety, installation, environment, and labeling 95.9.1 General safety 95.9.2 Laser safety 95.9.3 Installation 95.9.4 Environment 95.9.5 Electromagnetic emission 95.9.6 Temperature, humidity, and handling <\/td>\n<\/tr>\n | ||||||
| 3874<\/td>\n | 95.9.7 PMD labeling requirements 95.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 3875<\/td>\n | 95.11 Characteristics of the fiber optic cabling (channel) 95.11.1 Optical fiber cable 95.11.2 Optical fiber connection 95.11.2.1 Connection insertion loss 95.11.2.2 Maximum discrete reflectance 95.11.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 3876<\/td>\n | 95.11.3.1 Optical lane assignments 95.11.3.2 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 3877<\/td>\n | 95.12 Protocol implementation conformance statement (PICS) proforma for Clause 95, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.12.1 Introduction 95.12.2 Identification 95.12.2.1 Implementation identification 95.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3878<\/td>\n | 95.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 3879<\/td>\n | 95.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-SR4 95.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 3880<\/td>\n | 95.12.4.2 Management functions 95.12.4.3 PMD to MDI optical specifications for 100GBASE-SR4 <\/td>\n<\/tr>\n | ||||||
| 3881<\/td>\n | 95.12.4.4 Optical measurement methods 95.12.4.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 3882<\/td>\n | 95.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 3883<\/td>\n | 96. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T1 96.1 Overview <\/td>\n<\/tr>\n | ||||||
| 3884<\/td>\n | 96.1.1 100BASE-T1 architecture <\/td>\n<\/tr>\n | ||||||
| 3885<\/td>\n | 96.1.1.1 Physical Coding Sublayer (PCS) 96.1.1.2 Physical Medium Attachment (PMA) sublayer 96.1.1.3 Signaling 96.1.2 Conventions in this clause 96.1.2.1 State diagram notation 96.1.2.2 State diagram timer specifications 96.1.2.3 Service specifications <\/td>\n<\/tr>\n | ||||||
| 3886<\/td>\n | 96.2 100BASE-T1 service primitives and interfaces 96.2.1 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 3888<\/td>\n | 96.2.2 PMA_LINK.indication 96.2.2.1 Semantics of the primitive 96.2.2.2 When generated 96.2.2.3 Effect of receipt 96.2.3 PMA_TXMODE.indication 96.2.3.1 Semantics of the primitive 96.2.3.2 When generated 96.2.3.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3889<\/td>\n | 96.2.4 PMA_UNITDATA.request 96.2.4.1 Semantics of the primitive 96.2.4.2 When generated 96.2.4.3 Effect of receipt 96.2.5 PMA_UNITDATA.indication 96.2.5.1 Semantics of the primitive 96.2.5.2 When generated <\/td>\n<\/tr>\n | ||||||
| 3890<\/td>\n | 96.2.5.3 Effect of receipt 96.2.6 PMA_SCRSTATUS.request 96.2.6.1 Semantics of the primitive 96.2.6.2 When generated 96.2.6.3 Effect of receipt 96.2.7 PMA_RXSTATUS.indication 96.2.7.1 Semantics of the primitive 96.2.7.2 When generated 96.2.7.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3891<\/td>\n | 96.2.8 PMA_REMRXSTATUS.request 96.2.8.1 Semantics of the primitive 96.2.8.2 When generated 96.2.8.3 Effect of receipt 96.2.9 PMA_RESET.indication 96.2.9.1 When generated 96.2.9.2 Effect of receipt 96.2.10 PMA_TXEN.request 96.2.10.1 Semantic of the primitive <\/td>\n<\/tr>\n | ||||||
| 3892<\/td>\n | 96.2.10.2 When generated 96.2.10.3 Effect of receipt 96.3 100BASE-T1 Physical Coding Sublayer (PCS) functions <\/td>\n<\/tr>\n | ||||||
| 3893<\/td>\n | 96.3.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 3894<\/td>\n | 96.3.2 PCS data transmission enabling 96.3.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3895<\/td>\n | 96.3.3 PCS Transmit 96.3.3.1 4B\/3B conversion 96.3.3.1.1 Control signals in 4B\/3B conversion 96.3.3.1.2 4B\/3B conversion for MII data <\/td>\n<\/tr>\n | ||||||
| 3897<\/td>\n | 96.3.3.2 PCS Transmit state diagram <\/td>\n<\/tr>\n | ||||||
| 3898<\/td>\n | 96.3.3.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3899<\/td>\n | 96.3.3.2.2 Functions 96.3.3.2.3 Timers <\/td>\n<\/tr>\n | ||||||
| 3901<\/td>\n | 96.3.3.2.4 Messages 96.3.3.3 PCS transmit symbol generation 96.3.3.3.1 Side-stream scrambler polynomial 96.3.3.3.2 Generation of Syn[2:0] 96.3.3.3.3 Generation of Scn[2:0] <\/td>\n<\/tr>\n | ||||||
| 3902<\/td>\n | 96.3.3.3.4 Generation of scrambled bits Sdn[2:0] 96.3.3.3.5 Generation of ternary pair (TAn, TBn) 96.3.3.3.6 Generation of (TAn, TBn) when tx_mode = SEND_I 96.3.3.3.7 Generation of (TAn, TBn) when tx_mode = SEND_N, tx_enable = 1 <\/td>\n<\/tr>\n | ||||||
| 3903<\/td>\n | 96.3.3.3.8 Generation of (TAn, TBn) for idle sequence when tx_mode=SEND_N <\/td>\n<\/tr>\n | ||||||
| 3904<\/td>\n | 96.3.3.3.9 Generation of (TAn, TBn) when tx_mode=SEND_Z 96.3.3.3.10 Generation of symbol sequence 96.3.4 PCS Receive 96.3.4.1 PCS Receive overview <\/td>\n<\/tr>\n | ||||||
| 3907<\/td>\n | 96.3.4.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 3908<\/td>\n | 96.3.4.1.2 Functions 96.3.4.1.3 Timer <\/td>\n<\/tr>\n | ||||||
| 3909<\/td>\n | 96.3.4.2 PCS Receive symbol decoding 96.3.4.3 PCS Receive descrambler polynomial 96.3.4.4 PCS Receive automatic polarity detection (Optional) <\/td>\n<\/tr>\n | ||||||
| 3910<\/td>\n | 96.3.4.5 PCS Receive MII signal 3B\/4B conversion 96.3.5 PCS Loopback <\/td>\n<\/tr>\n | ||||||
| 3911<\/td>\n | 96.4 Physical Medium Attachment (PMA) Sublayer 96.4.1 PMA Reset function <\/td>\n<\/tr>\n | ||||||
| 3912<\/td>\n | 96.4.2 PMA Transmit function <\/td>\n<\/tr>\n | ||||||
| 3913<\/td>\n | 96.4.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 3914<\/td>\n | 96.4.4 PHY Control function 96.4.5 Link Monitor function 96.4.6 PMA clock recovery 96.4.7 State variables 96.4.7.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 3917<\/td>\n | 96.4.7.2 Timers 96.5 PMA electrical specifications 96.5.1 EMC tests 96.5.1.1 Immunity\u2014DPI test <\/td>\n<\/tr>\n | ||||||
| 3918<\/td>\n | 96.5.1.2 Emission\u2014Conducted emission test 96.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 3919<\/td>\n | 96.5.3 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 3920<\/td>\n | 96.5.4 Transmitter electrical specifications <\/td>\n<\/tr>\n | ||||||
| 3921<\/td>\n | 96.5.4.1 Transmitter output droop 96.5.4.2 Transmitter distortion <\/td>\n<\/tr>\n | ||||||
| 3923<\/td>\n | 96.5.4.3 Transmitter timing jitter 96.5.4.4 Transmitter power spectral density (PSD) <\/td>\n<\/tr>\n | ||||||
| 3924<\/td>\n | 96.5.4.5 Transmit clock frequency 96.5.5 Receiver electrical specifications <\/td>\n<\/tr>\n | ||||||
| 3925<\/td>\n | 96.5.5.1 Receiver differential input signals 96.5.5.2 Receiver frequency tolerance 96.5.5.3 Alien crosstalk noise rejection 96.5.6 Transmitter peak differential output 96.5.7 PMA Local Loopback <\/td>\n<\/tr>\n | ||||||
| 3926<\/td>\n | 96.6 Management interface 96.6.1 MASTER-SLAVE configuration 96.6.2 PHY-initialization 96.6.3 PMA and PCS MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 3927<\/td>\n | 96.7 Link segment characteristics 96.7.1 Cabling system characteristics 96.7.1.1 Characteristic impedance <\/td>\n<\/tr>\n | ||||||
| 3928<\/td>\n | 96.7.1.2 Insertion loss 96.7.1.3 Return loss 96.7.1.4 Mode conversion loss <\/td>\n<\/tr>\n | ||||||
| 3929<\/td>\n | 96.7.1.5 Power sum alien near-end crosstalk (PSANEXT) 96.7.1.6 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF) 96.7.2 Noise environment <\/td>\n<\/tr>\n | ||||||
| 3930<\/td>\n | 96.8 MDI specification 96.8.1 MDI connectors 96.8.2 MDI electrical specification 96.8.2.1 MDI return loss 96.8.2.2 MDI mode conversion loss <\/td>\n<\/tr>\n | ||||||
| 3931<\/td>\n | 96.8.3 MDI fault tolerance 96.9 Environmental specifications 96.9.1 General safety 96.9.2 Network safety 96.9.2.1 Environmental safety <\/td>\n<\/tr>\n | ||||||
| 3932<\/td>\n | 96.9.2.2 Electromagnetic compatibility 96.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3933<\/td>\n | 96.11 Protocol implementation conformance statement (PICS) proforma for Clause 96, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T1 96.11.1 Introduction 96.11.2 Identification 96.11.2.1 Implementation identification 96.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 3934<\/td>\n | 96.11.3 Major capabilities\/options 96.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 100BASE-T1 96.11.4.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 3935<\/td>\n | 96.11.4.2 PCS Receive functions <\/td>\n<\/tr>\n | ||||||
| 3936<\/td>\n | 96.11.4.3 PCS Loopback 96.11.4.4 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 3938<\/td>\n | 96.11.4.5 PMA electrical specifications <\/td>\n<\/tr>\n | ||||||
| 3940<\/td>\n | 96.11.4.6 Management interface <\/td>\n<\/tr>\n | ||||||
| 3941<\/td>\n | 96.11.4.7 Characteristics of the Link Segment 96.11.4.8 MDI Requirements <\/td>\n<\/tr>\n | ||||||
| 3943<\/td>\n | 96.11.4.9 Environmental specifications 96.11.4.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 3944<\/td>\n | 97. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 1000BASE-T1 97.1 Overview 97.1.1 Relationship of 1000BASE-T1 to other standards 97.1.2 Operation of 1000BASE-T1 <\/td>\n<\/tr>\n | ||||||
| 3946<\/td>\n | 97.1.2.1 Physical Coding Sublayer (PCS) 97.1.2.2 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 3947<\/td>\n | 97.1.2.3 EEE capability 97.1.2.4 Link Synchronization <\/td>\n<\/tr>\n | ||||||
| 3949<\/td>\n | 97.1.3 Signaling 97.1.4 Interfaces 97.1.5 Conventions in this clause 97.2 1000BASE-T1 Service Primitives and Interfaces <\/td>\n<\/tr>\n | ||||||
| 3950<\/td>\n | 97.2.1 Technology Dependent Interface 97.2.1.1 PMA_LINK.request 97.2.1.1.1 Semantics of the primitive 97.2.1.1.2 When generated 97.2.1.1.3 Effect of receipt 97.2.1.2 PMA_LINK.indication 97.2.1.2.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 3951<\/td>\n | 97.2.1.2.2 When generated 97.2.1.2.3 Effect of receipt 97.2.2 PMA service interface 97.2.2.1 PMA_TXMODE.indication 97.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 3952<\/td>\n | 97.2.2.1.2 When generated 97.2.2.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3953<\/td>\n | 97.2.2.2 PMA_CONFIG.indication 97.2.2.2.1 Semantics of the primitive 97.2.2.2.2 When generated 97.2.2.2.3 Effect of receipt 97.2.2.3 PMA_UNITDATA.request 97.2.2.3.1 Semantics of the primitive 97.2.2.3.2 When generated 97.2.2.3.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 3954<\/td>\n | 97.2.2.4 PMA_UNITDATA.indication 97.2.2.4.1 Semantics of the primitive 97.2.2.4.2 When generated 97.2.2.4.3 Effect of receipt 97.2.2.5 PMA_SCRSTATUS.request 97.2.2.5.1 Semantics of the primitive 97.2.2.5.2 When generated 97.2.2.5.3 Effect of receipt 97.2.2.6 PMA_PCSSTATUS.request 97.2.2.6.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 3955<\/td>\n | 97.2.2.6.2 When generated 97.2.2.6.3 Effect of receipt 97.2.2.7 PMA_RXSTATUS.indication 97.2.2.7.1 Semantics of the primitive 97.2.2.7.2 When generated 97.2.2.7.3 Effect of receipt 97.2.2.8 PMA_PHYREADY.indication 97.2.2.8.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 3956<\/td>\n | 97.2.2.8.2 When generated 97.2.2.8.3 Effect of receipt 97.2.2.9 PMA_REMRXSTATUS.request 97.2.2.9.1 Semantics of the primitive 97.2.2.9.2 When generated 97.2.2.9.3 Effect of receipt 97.2.2.10 PMA_REMPHYREADY.request 97.2.2.10.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 3957<\/td>\n | 97.2.2.10.2 When generated 97.2.2.10.3 Effect of receipt 97.2.2.11 PMA_PCS_RX_LPI_STATUS.request 97.2.2.11.1 Semantics of the primitive 97.2.2.11.2 When generated 97.2.2.11.3 Effect of receipt 97.2.2.12 PMA_PCS_TX_LPI_STATUS.request 97.2.2.12.1 Semantics of the primitive 97.2.2.12.2 When generated <\/td>\n<\/tr>\n | ||||||
| 3958<\/td>\n | 97.2.2.12.3 Effect of receipt 97.3 Physical Coding Sublayer (PCS) 97.3.1 PCS service interface (GMII) 97.3.2 PCS functions 97.3.2.1 PCS Reset function 97.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 3960<\/td>\n | 97.3.2.2.1 Use of blocks 97.3.2.2.2 81B-RS transmission code 97.3.2.2.3 Notation conventions 97.3.2.2.4 Transmission order 97.3.2.2.5 Block structure <\/td>\n<\/tr>\n | ||||||
| 3963<\/td>\n | 97.3.2.2.6 Control codes <\/td>\n<\/tr>\n | ||||||
| 3964<\/td>\n | 97.3.2.2.7 Idle 97.3.2.2.8 LP_IDLE 97.3.2.2.9 Error 97.3.2.2.10 Transmit process <\/td>\n<\/tr>\n | ||||||
| 3965<\/td>\n | 97.3.2.2.11 RS-FEC encoder <\/td>\n<\/tr>\n | ||||||
| 3966<\/td>\n | 97.3.2.2.12 PCS scrambler 97.3.2.2.13 3B2T to PAM3 <\/td>\n<\/tr>\n | ||||||
| 3967<\/td>\n | 97.3.2.2.14 81B-RS framer 97.3.2.2.15 EEE capability <\/td>\n<\/tr>\n | ||||||
| 3968<\/td>\n | 97.3.2.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 3969<\/td>\n | 97.3.2.3.1 Frame and block synchronization 97.3.2.3.2 PCS descrambler 97.3.2.3.3 Valid and invalid blocks 97.3.3 Test-pattern generators 97.3.4 PMA training side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 3970<\/td>\n | 97.3.4.1 Generation of Sn 97.3.4.2 Generation of symbol Tn 97.3.4.3 PMA training mode descrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 3971<\/td>\n | 97.3.5 LPI signaling 97.3.5.1 LPI Synchronization <\/td>\n<\/tr>\n | ||||||
| 3972<\/td>\n | 97.3.5.2 Quiet period signaling 97.3.5.3 Refresh period signaling 97.3.6 Detailed functions and state diagrams 97.3.6.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 3973<\/td>\n | 97.3.6.2 State diagram parameters 97.3.6.2.1 Constants 97.3.6.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 3975<\/td>\n | 97.3.6.2.3 Functions 97.3.6.2.4 Counters <\/td>\n<\/tr>\n | ||||||
| 3976<\/td>\n | 97.3.6.3 Messages 97.3.6.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3980<\/td>\n | 97.3.7 PCS management 97.3.7.1 Status 97.3.7.2 Counter 97.3.7.3 Loopback <\/td>\n<\/tr>\n | ||||||
| 3981<\/td>\n | 97.3.8 BASE-T1 Operations, Administration, and Maintenance (OAM) 97.3.8.1 Definitions 97.3.8.2 Functional specifications 97.3.8.2.1 1000BASE-T1 OAM Frame Structure <\/td>\n<\/tr>\n | ||||||
| 3982<\/td>\n | 97.3.8.2.2 1000BASE-T1 OAM Frame Data 97.3.8.2.3 Ping RX 97.3.8.2.4 Ping TX <\/td>\n<\/tr>\n | ||||||
| 3983<\/td>\n | 97.3.8.2.5 PHY Health 97.3.8.2.6 1000BASE-T1 OAM Message Valid 97.3.8.2.7 1000BASE-T1 OAM Message Toggle 97.3.8.2.8 1000BASE-T1 OAM Message Acknowledge 97.3.8.2.9 1000BASE-T1 OAM Message Toggle Acknowledge <\/td>\n<\/tr>\n | ||||||
| 3984<\/td>\n | 97.3.8.2.10 1000BASE-T1 OAM Message Number 97.3.8.2.11 1000BASE-T1 OAM Message Data 97.3.8.2.12 CRC16 97.3.8.2.13 1000BASE-T1 OAM Frame Acceptance Criteria <\/td>\n<\/tr>\n | ||||||
| 3985<\/td>\n | 97.3.8.2.14 PHY Health Indicator 97.3.8.2.15 Ping 97.3.8.2.16 1000BASE-T1 OAM Message Exchange <\/td>\n<\/tr>\n | ||||||
| 3986<\/td>\n | 97.3.8.3 State diagram variable to BASE-T1 OAM register mapping <\/td>\n<\/tr>\n | ||||||
| 3988<\/td>\n | 97.3.8.4 Detailed functions and state diagrams 97.3.8.4.1 State diagram conventions 97.3.8.4.2 State diagram parameters 97.3.8.4.3 Variables <\/td>\n<\/tr>\n | ||||||
| 3992<\/td>\n | 97.3.8.4.4 Counters <\/td>\n<\/tr>\n | ||||||
| 3993<\/td>\n | 97.3.8.4.5 Functions <\/td>\n<\/tr>\n | ||||||
| 3994<\/td>\n | 97.3.8.4.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 3996<\/td>\n | 97.4 Physical Medium Attachment (PMA) sublayer 97.4.1 PMA functional specifications 97.4.2 PMA functions <\/td>\n<\/tr>\n | ||||||
| 3997<\/td>\n | 97.4.2.1 PMA Reset function 97.4.2.2 PMA Transmit function 97.4.2.2.1 Global PMA transmit disable 97.4.2.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 3998<\/td>\n | 97.4.2.4 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 3999<\/td>\n | 97.4.2.4.1 InfoField notation 97.4.2.4.2 Start of Frame Delimiter 97.4.2.4.3 Partial PHY frame Count (PFC24) 97.4.2.4.4 Message Field <\/td>\n<\/tr>\n | ||||||
| 4000<\/td>\n | 97.4.2.4.5 PHY Capability Bits, User Configurable Register, and Data Mode Scrambler Seed 97.4.2.4.6 Data Switch partial PHY frame Count 97.4.2.4.7 Reserved Fields 97.4.2.4.8 CRC16 <\/td>\n<\/tr>\n | ||||||
| 4001<\/td>\n | 97.4.2.4.9 PMA MDIO function mapping 97.4.2.4.10 Startup sequence <\/td>\n<\/tr>\n | ||||||
| 4003<\/td>\n | 97.4.2.4.11 PHY Control Registers 97.4.2.5 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 4004<\/td>\n | 97.4.2.6 PHY Link Synchronization <\/td>\n<\/tr>\n | ||||||
| 4005<\/td>\n | 97.4.2.6.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 4006<\/td>\n | 97.4.2.6.2 State diagram timers 97.4.2.6.3 Messages <\/td>\n<\/tr>\n | ||||||
| 4007<\/td>\n | 97.4.2.6.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4008<\/td>\n | 97.4.2.7 Refresh Monitor function 97.4.2.8 Clock Recovery function 97.4.3 MDI 97.4.3.1 MDI signals transmitted by the PHY 97.4.3.2 Signals received at the MDI 97.4.4 State variables 97.4.4.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 4011<\/td>\n | 97.4.4.2 Timers <\/td>\n<\/tr>\n | ||||||
| 4012<\/td>\n | 97.4.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4013<\/td>\n | 97.5 PMA electrical specifications 97.5.1 EMC Requirements 97.5.1.1 Immunity\u2014DPI test 97.5.1.2 Emission\u2014150 W conducted emission test 97.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 4016<\/td>\n | 97.5.2.1 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 4017<\/td>\n | 97.5.3 Transmitter electrical specifications <\/td>\n<\/tr>\n | ||||||
| 4018<\/td>\n | 97.5.3.1 Maximum output droop 97.5.3.2 Transmitter distortion <\/td>\n<\/tr>\n | ||||||
| 4019<\/td>\n | 97.5.3.3 Transmitter timing jitter <\/td>\n<\/tr>\n | ||||||
| 4020<\/td>\n | 97.5.3.4 Transmitter Power Spectral Density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 4021<\/td>\n | 97.5.3.5 Transmitter peak differential output 97.5.3.6 Transmitter clock frequency 97.5.4 Receiver electrical specifications 97.5.4.1 Receiver differential input signals 97.5.4.2 Alien crosstalk noise rejection 97.6 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 4022<\/td>\n | 97.6.1 Link transmission parameters for link segment type A 97.6.1.1 Insertion loss <\/td>\n<\/tr>\n | ||||||
| 4023<\/td>\n | 97.6.1.2 Differential characteristic impedance 97.6.1.3 Return loss 97.6.1.4 Differential-to-common-mode conversion <\/td>\n<\/tr>\n | ||||||
| 4024<\/td>\n | 97.6.1.5 Maximum link delay <\/td>\n<\/tr>\n | ||||||
| 4025<\/td>\n | 97.6.2 Link transmission parameters for link segment type B 97.6.2.1 Insertion loss 97.6.2.2 Differential characteristic impedance 97.6.2.3 Return loss <\/td>\n<\/tr>\n | ||||||
| 4026<\/td>\n | 97.6.2.4 Maximum link delay 97.6.2.5 Coupling attenuation <\/td>\n<\/tr>\n | ||||||
| 4027<\/td>\n | 97.6.3 Coupling parameters between type A link segments 97.6.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss 97.6.3.2 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4028<\/td>\n | 97.6.3.3 Multiple disturber alien far-end crosstalk (MDAFEXT) loss 97.6.3.4 Multiple disturber power sum alien attenuation crosstalk ratio far-end (PSAACRF) <\/td>\n<\/tr>\n | ||||||
| 4029<\/td>\n | 97.6.4 Coupling parameters between type B link segments 97.6.4.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4030<\/td>\n | 97.6.4.2 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss 97.6.4.3 Multiple disturber alien far-end crosstalk (MDAFEXT) loss 97.6.4.4 Multiple disturber power sum alien attenuation crosstalk ratio far-end (PSAACRF) <\/td>\n<\/tr>\n | ||||||
| 4031<\/td>\n | 97.7 Media Dependent Interface (MDI) 97.7.1 MDI connectors 97.7.2 MDI electrical specification 97.7.2.1 MDI return loss <\/td>\n<\/tr>\n | ||||||
| 4032<\/td>\n | 97.7.2.2 MDI mode conversion loss 97.7.3 MDI fault tolerance 97.8 Management Interfaces 97.8.1 Optional Support for Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 4033<\/td>\n | 97.9 Environmental specifications 97.9.1 General safety 97.9.2 Network safety 97.9.2.1 Environmental safety 97.9.2.2 Electromagnetic compatibility 97.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4035<\/td>\n | 97.11 Protocol implementation conformance statement (PICS) proforma for Clause 97, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 1000BASE-T1 97.11.1 Introduction 97.11.2 Identification 97.11.2.1 Implementation identification 97.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4036<\/td>\n | 97.11.3 Major capabilities\/options 97.11.4 General <\/td>\n<\/tr>\n | ||||||
| 4037<\/td>\n | 97.11.5 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 4038<\/td>\n | 97.11.6 PCS Receive functions <\/td>\n<\/tr>\n | ||||||
| 4039<\/td>\n | 97.11.7 PCS loopback <\/td>\n<\/tr>\n | ||||||
| 4040<\/td>\n | 97.11.8 OAM <\/td>\n<\/tr>\n | ||||||
| 4041<\/td>\n | 97.11.9 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 4043<\/td>\n | 97.11.10 PMA electrical specifications <\/td>\n<\/tr>\n | ||||||
| 4046<\/td>\n | 97.11.11 MDI electrical requirements <\/td>\n<\/tr>\n | ||||||
| 4047<\/td>\n | 97.11.11.1 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 4048<\/td>\n | 97.11.12 MDI Requirements 97.11.13 EEE capability requirements <\/td>\n<\/tr>\n | ||||||
| 4049<\/td>\n | 97.11.14 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4050<\/td>\n | 98. Auto-Negotiation for single differential-pair media 98.1 Overview 98.1.1 Scope 98.1.2 Relationship to the ISO\/IEC Open Systems Interconnection (OSI) reference model 98.2 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 4051<\/td>\n | 98.2.1 Transmit function requirements 98.2.1.1 DME transmission <\/td>\n<\/tr>\n | ||||||
| 4052<\/td>\n | 98.2.1.1.1 DME page encoding <\/td>\n<\/tr>\n | ||||||
| 4054<\/td>\n | 98.2.1.1.2 DME page timing <\/td>\n<\/tr>\n | ||||||
| 4055<\/td>\n | 98.2.1.1.3 DME page Delimiters <\/td>\n<\/tr>\n | ||||||
| 4056<\/td>\n | 98.2.1.1.4 Transmitter peak differential output 98.2.1.2 Link codeword encoding 98.2.1.2.1 Selector Field <\/td>\n<\/tr>\n | ||||||
| 4057<\/td>\n | 98.2.1.2.2 Echoed Nonce Field 98.2.1.2.3 Transmitted Nonce Field 98.2.1.2.4 Technology Ability Field 98.2.1.2.5 Force MASTER-SLAVE 98.2.1.2.6 Pause Ability <\/td>\n<\/tr>\n | ||||||
| 4058<\/td>\n | 98.2.1.2.7 Remote Fault 98.2.1.2.8 Acknowledge <\/td>\n<\/tr>\n | ||||||
| 4059<\/td>\n | 98.2.1.2.9 Next Page 98.2.1.3 Transmit Switch function 98.2.2 Receive function requirements 98.2.2.1 DME page reception 98.2.2.2 Receive Switch function 98.2.2.3 Link codeword matching 98.2.3 AN half-duplex function requirements <\/td>\n<\/tr>\n | ||||||
| 4060<\/td>\n | 98.2.4 Arbitration function requirements 98.2.4.1 Renegotiation function 98.2.4.2 Priority Resolution function 98.2.4.3 Next Page function <\/td>\n<\/tr>\n | ||||||
| 4061<\/td>\n | 98.2.4.3.1 Next page encodings 98.2.4.3.2 Use of Next Pages <\/td>\n<\/tr>\n | ||||||
| 4062<\/td>\n | 98.3 State diagram variable to Auto-Negotiation register mapping 98.4 Technology-Dependent Interface <\/td>\n<\/tr>\n | ||||||
| 4063<\/td>\n | 98.4.1 PMA_LINK.indication 98.4.1.1 Semantics of the service primitive 98.4.1.2 When generated 98.4.1.3 Effect of receipt 98.4.2 PMA_LINK.request 98.4.2.1 Semantics of the service primitive 98.4.2.2 When generated 98.4.2.3 Effect of receipt 98.5 Detailed functions and state diagrams <\/td>\n<\/tr>\n | ||||||
| 4064<\/td>\n | 98.5.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 4070<\/td>\n | 98.5.2 State diagram timers <\/td>\n<\/tr>\n | ||||||
| 4073<\/td>\n | 98.5.3 State diagram counters <\/td>\n<\/tr>\n | ||||||
| 4074<\/td>\n | 98.5.4 Function 98.5.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4077<\/td>\n | 98.5.6 High-speed and low-speed Auto-Negotiation modes <\/td>\n<\/tr>\n | ||||||
| 4078<\/td>\n | 98.5.6.1 Variables <\/td>\n<\/tr>\n | ||||||
| 4079<\/td>\n | 98.5.6.2 Functions 98.5.6.3 Timers <\/td>\n<\/tr>\n | ||||||
| 4080<\/td>\n | 98.6 Protocol implementation conformance statement (PICS) proforma for Clause 98, Auto-Negotiation for Single Differential-Pair Media 98.6.1 Introduction 98.6.2 Identification 98.6.2.1 Implementation identification 98.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4081<\/td>\n | 98.6.3 Major capabilities\/options 98.6.4 General 98.6.5 DME transmission <\/td>\n<\/tr>\n | ||||||
| 4082<\/td>\n | 98.6.6 Link codeword encoding <\/td>\n<\/tr>\n | ||||||
| 4083<\/td>\n | 98.6.7 Arbitration function requirements <\/td>\n<\/tr>\n | ||||||
| 4084<\/td>\n | 98.6.8 Service primitives <\/td>\n<\/tr>\n | ||||||
| 4085<\/td>\n | 98.6.9 State diagram and variable definitions <\/td>\n<\/tr>\n | ||||||
| 4087<\/td>\n | 98.6.10 High-speed and low-speed Auto-Negotiation modes <\/td>\n<\/tr>\n | ||||||
| 4088<\/td>\n | 99. MAC Merge sublayer 99.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 4089<\/td>\n | 99.1.1 Relationship to other IEEE standards <\/td>\n<\/tr>\n | ||||||
| 4091<\/td>\n | 99.1.2 Functional Block Diagram 99.2 MAC Merge Service Interface (MMSI) 99.2.1 MM_CTL.request <\/td>\n<\/tr>\n | ||||||
| 4092<\/td>\n | 99.2.1.1 Semantics 99.2.1.2 When generated 99.2.1.3 Effect of receipt 99.3 MAC Merge Packet (mPacket) 99.3.1 mPacket format 99.3.2 Preamble <\/td>\n<\/tr>\n | ||||||
| 4093<\/td>\n | 99.3.3 Start mPacket Delimiter (SMD) 99.3.4 frag_count <\/td>\n<\/tr>\n | ||||||
| 4094<\/td>\n | 99.3.5 mData 99.3.6 CRC <\/td>\n<\/tr>\n | ||||||
| 4095<\/td>\n | 99.4 MAC Merge sublayer operation 99.4.1 MAC Merge sublayer transmit behavior when preemption is disabled 99.4.2 Determining that the link partner supports preemption 99.4.3 Verifying preemption operation <\/td>\n<\/tr>\n | ||||||
| 4096<\/td>\n | 99.4.4 Transmit processing 99.4.5 Receive processing <\/td>\n<\/tr>\n | ||||||
| 4097<\/td>\n | 99.4.6 Express filter <\/td>\n<\/tr>\n | ||||||
| 4098<\/td>\n | 99.4.7 Detailed functions and state diagrams 99.4.7.1 State diagram conventions 99.4.7.2 Constants 99.4.7.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4100<\/td>\n | 99.4.7.4 Functions <\/td>\n<\/tr>\n | ||||||
| 4102<\/td>\n | 99.4.7.5 Counters 99.4.7.6 Timers 99.4.7.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4105<\/td>\n | 99.4.8 Delay Constraints <\/td>\n<\/tr>\n | ||||||
| 4107<\/td>\n | 99.5 Protocol implementation conformance statement (PICS) proforma for Clause 99, MAC Merge sublayer 99.5.1 Introduction 99.5.2 Identification 99.5.2.1 Implementation identification 99.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4108<\/td>\n | 99.5.3 PICS proforma tables for MAC Merge sublayer 99.5.3.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 4109<\/td>\n | 99.5.3.2 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4110<\/td>\n | 100. Physical Medium Dependent (PMD) sublayer, and medium for coaxial distribution networks, type 10GPASS-XR 100.1 Overview 100.1.1 Terminology and conventions 100.1.2 Positioning of the PMD sublayer within the IEEE 802.3 architecture 100.1.3 PMD types 100.1.4 Mapping of PMD variables <\/td>\n<\/tr>\n | ||||||
| 4114<\/td>\n | 100.2 PMD functional specification 100.2.1 PMD service interface <\/td>\n<\/tr>\n | ||||||
| 4115<\/td>\n | 100.2.1.1 PMD_UNITDATA.request 100.2.1.2 PMD_UNITDATA.indication 100.2.1.3 PMD_SIGNAL.request 100.2.2 Delay constraints 100.2.3 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 4116<\/td>\n | 100.2.4 PMD receive function 100.2.5 PMD transmit enable function 100.3 PMD operational requirements 100.3.1 CLT and CNU modulation formats <\/td>\n<\/tr>\n | ||||||
| 4117<\/td>\n | 100.3.2 Data rates 100.3.2.1 Downstream PHY data rate <\/td>\n<\/tr>\n | ||||||
| 4118<\/td>\n | 100.3.2.2 Upstream PHY data rate 100.3.2.3 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4119<\/td>\n | 100.3.3 CLT transmitter requirements 100.3.3.1 OFDM channel power definitions <\/td>\n<\/tr>\n | ||||||
| 4120<\/td>\n | 100.3.3.2 CLT output electrical requirements <\/td>\n<\/tr>\n | ||||||
| 4123<\/td>\n | 100.3.3.2.1 PHY Link managed variables 100.3.3.3 Phase noise requirements 100.3.3.4 Power per OFDM channel for CLT <\/td>\n<\/tr>\n | ||||||
| 4124<\/td>\n | 100.3.3.5 Out-of-band noise and spurious requirements for the CLT <\/td>\n<\/tr>\n | ||||||
| 4127<\/td>\n | 100.3.3.6 CLT transmitter output requirements <\/td>\n<\/tr>\n | ||||||
| 4128<\/td>\n | 100.3.4 CNU transmitter requirements 100.3.4.1 Burst timing convention 100.3.4.2 Transmit power requirements <\/td>\n<\/tr>\n | ||||||
| 4129<\/td>\n | 100.3.4.3 OFDMA transmit power calculations 100.3.4.3.1 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4130<\/td>\n | 100.3.4.4 OFDMA fidelity requirements 100.3.4.4.1 Spurious emissions <\/td>\n<\/tr>\n | ||||||
| 4132<\/td>\n | 100.3.4.4.2 Spurious emissions in the upstream frequency range <\/td>\n<\/tr>\n | ||||||
| 4133<\/td>\n | 100.3.4.4.3 Adjacent channel spurious emissions <\/td>\n<\/tr>\n | ||||||
| 4135<\/td>\n | 100.3.4.4.4 Spurious emissions during burst on\/off transients 100.3.4.5 Transmit MER requirements <\/td>\n<\/tr>\n | ||||||
| 4136<\/td>\n | 100.3.4.5.1 Definitions <\/td>\n<\/tr>\n | ||||||
| 4137<\/td>\n | 100.3.4.5.2 Requirements 100.3.4.6 CNU Transmitter output requirements <\/td>\n<\/tr>\n | ||||||
| 4138<\/td>\n | 100.3.4.7 CNU RF power amplifier requirements <\/td>\n<\/tr>\n | ||||||
| 4139<\/td>\n | 100.3.5 CLT receiver requirements 100.3.5.1 CLT receiver input power requirements <\/td>\n<\/tr>\n | ||||||
| 4140<\/td>\n | 100.3.5.1.1 PHY Link managed variables 100.3.5.2 CLT receiver error performance in AWGN channel <\/td>\n<\/tr>\n | ||||||
| 4141<\/td>\n | 100.3.5.3 CLT upstream receive modulation error ratio requirements 100.3.5.3.1 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4142<\/td>\n | 100.3.6 CNU receiver requirements 100.3.6.1 Input signal characteristics at CNU receiver 100.3.6.2 CNU error performance in AWGN channel <\/td>\n<\/tr>\n | ||||||
| 4143<\/td>\n | 100.3.6.3 Receive modulation error ratio requirements <\/td>\n<\/tr>\n | ||||||
| 4145<\/td>\n | 100.3.7 Channel band rules 100.3.7.1 Downstream channel bandwidth rules 100.3.7.2 Downstream exclusion band rules <\/td>\n<\/tr>\n | ||||||
| 4146<\/td>\n | 100.3.7.3 Upstream channel bandwidth rules 100.3.7.4 Upstream exclusions and unused subcarriers rules 100.4 Test requirements and measurement methods 100.4.1 CLT RF output muting requirement <\/td>\n<\/tr>\n | ||||||
| 4147<\/td>\n | 100.4.2 CNU receive modulation error ratio testing 100.4.3 Upstream channel power <\/td>\n<\/tr>\n | ||||||
| 4148<\/td>\n | 100.4.3.1 PHY Link managed variables 100.4.4 Guidelines for verifying compliance with downstream phase noise requirements <\/td>\n<\/tr>\n | ||||||
| 4149<\/td>\n | 100.4.4.1 Test mode 1 100.4.4.2 Test mode 2 <\/td>\n<\/tr>\n | ||||||
| 4150<\/td>\n | 100.5 Environmental, safety, and labeling 100.5.1 General safety 100.5.2 Installation 100.5.3 Environment 100.5.4 PMD labeling 100.5.4.1 Frequency plan 100.5.4.1.1 Downstream frequency plan 100.5.4.1.2 Upstream frequency plan 100.6 EEE capability <\/td>\n<\/tr>\n | ||||||
| 4151<\/td>\n | 100.7 Protocol implementation conformance statement (PICS) proforma for Clause 100, Physical Medium Dependent (PMD) sublayer and medium for coaxial cable distribution networks, type 10GPASS-XR 100.7.1 Identification 100.7.1.1 Implementation identification 100.7.1.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4152<\/td>\n | 100.7.2 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4153<\/td>\n | 100.7.3 PICS proforma tables for Physical Medium Dependent (PMD) sublayer for coax cable distribution networks, type 10GPASS-XR 100.7.3.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4156<\/td>\n | 100.7.3.2 Definition of parameters and measurement methods 100.7.3.3 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4157<\/td>\n | 101. Reconciliation Sublayer, Physical Coding Sublayer, and Physical Media Attachment for EPoC 101.1 Overview 101.1.1 Conventions 101.1.2 Constraints for delay through RS, PCS, and PMA 101.1.3 Mapping of PCS, and PMA variables 101.1.4 Functional blocks supporting 10GPASS-XR PCS, PMA, and PMD sublayers <\/td>\n<\/tr>\n | ||||||
| 4165<\/td>\n | 101.2 Reconciliation Sublayer (RS) for EPoC 101.3 Physical Coding Sublayer (PCS) for EPoC 101.3.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4167<\/td>\n | 101.3.2 PCS transmit function 101.3.2.1 Idle deletion process 101.3.2.1.1 Constants <\/td>\n<\/tr>\n | ||||||
| 4168<\/td>\n | 101.3.2.1.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4169<\/td>\n | 101.3.2.1.3 Counters 101.3.2.1.4 Functions 101.3.2.1.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4171<\/td>\n | 101.3.2.2 64B\/66B Encoder <\/td>\n<\/tr>\n | ||||||
| 4172<\/td>\n | 101.3.2.3 CRC40 101.3.2.4 Low Density Parity Check (LDPC) forward error correction (FEC) codes <\/td>\n<\/tr>\n | ||||||
| 4173<\/td>\n | 101.3.2.4.1 LDPC matrix definition <\/td>\n<\/tr>\n | ||||||
| 4176<\/td>\n | 101.3.2.5 FEC Encoder and Data Detector processes 101.3.2.5.1 Data Detector process 101.3.2.5.2 LDPC encode process 101.3.2.5.3 LDPC codeword transmission order <\/td>\n<\/tr>\n | ||||||
| 4179<\/td>\n | 101.3.2.5.4 Upstream FEC encoding 101.3.2.5.5 Constants 101.3.2.5.6 Variables <\/td>\n<\/tr>\n | ||||||
| 4181<\/td>\n | 101.3.2.5.7 Functions <\/td>\n<\/tr>\n | ||||||
| 4184<\/td>\n | 101.3.2.5.8 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4186<\/td>\n | 101.3.3 PCS receive function <\/td>\n<\/tr>\n | ||||||
| 4187<\/td>\n | 101.3.3.1 FEC Decoder 101.3.3.1.1 Upstream FEC decoding 101.3.3.1.2 LDPC decoding process within CNU (downstream) <\/td>\n<\/tr>\n | ||||||
| 4189<\/td>\n | 101.3.3.1.3 LDPC decoding process within CLT upstream 101.3.3.1.4 Codeword error monitor 101.3.3.1.5 Constants <\/td>\n<\/tr>\n | ||||||
| 4190<\/td>\n | 101.3.3.1.6 Variables <\/td>\n<\/tr>\n | ||||||
| 4191<\/td>\n | 101.3.3.1.7 Functions <\/td>\n<\/tr>\n | ||||||
| 4192<\/td>\n | 101.3.3.1.8 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4194<\/td>\n | 101.3.3.2 64B\/66B Decoder 101.3.3.3 Idle control character insertion process <\/td>\n<\/tr>\n | ||||||
| 4195<\/td>\n | 101.3.3.3.1 Constants 101.3.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4196<\/td>\n | 101.3.3.3.3 Functions 101.3.3.3.4 Messages 101.3.3.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4197<\/td>\n | 101.4 10GPASS-XR PMA 101.4.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4198<\/td>\n | 101.4.2 PMA Service Interface 101.4.2.1 PMA_UNITDATA.request 101.4.2.1.1 Semantics of the service primitive 101.4.2.1.2 When generated <\/td>\n<\/tr>\n | ||||||
| 4199<\/td>\n | 101.4.2.1.3 Effect of receipt 101.4.2.2 PMA_UNITDATA.indication 101.4.2.2.1 Semantics of the service primitive 101.4.2.2.2 When generated 101.4.2.2.3 Effect of receipt 101.4.3 Downstream PMA transmit function 101.4.3.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4200<\/td>\n | 101.4.3.2 Time and frequency synchronization <\/td>\n<\/tr>\n | ||||||
| 4201<\/td>\n | 101.4.3.3 Subcarrier clocking <\/td>\n<\/tr>\n | ||||||
| 4202<\/td>\n | 101.4.3.4 Subcarrier configuration and bit loading 101.4.3.4.1 Nulled subcarriers 101.4.3.4.2 Continuous pilots 101.4.3.4.3 Bit loaded subcarriers <\/td>\n<\/tr>\n | ||||||
| 4203<\/td>\n | 101.4.3.4.4 Excluded subcarriers 101.4.3.4.5 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4204<\/td>\n | 101.4.3.5 Framing 101.4.3.6 Pilot map <\/td>\n<\/tr>\n | ||||||
| 4205<\/td>\n | 101.4.3.6.1 Scattered pilots <\/td>\n<\/tr>\n | ||||||
| 4207<\/td>\n | 101.4.3.6.2 Continuous pilots 101.4.3.6.3 Predefined continuous pilots around the PHY Link 101.4.3.6.4 Continuous pilot placement defined by PHY Link message <\/td>\n<\/tr>\n | ||||||
| 4209<\/td>\n | 101.4.3.6.5 PHY Link managed variables 101.4.3.7 Scrambler <\/td>\n<\/tr>\n | ||||||
| 4210<\/td>\n | 101.4.3.8 Symbol mapper 101.4.3.8.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 4211<\/td>\n | 101.4.3.8.2 Transmitter bit loading for symbol mapping <\/td>\n<\/tr>\n | ||||||
| 4212<\/td>\n | 101.4.3.8.3 Bit loading <\/td>\n<\/tr>\n | ||||||
| 4213<\/td>\n | 101.4.3.8.4 FCP calculation <\/td>\n<\/tr>\n | ||||||
| 4214<\/td>\n | 101.4.3.9 Time and frequency interleaver 101.4.3.9.1 Overview 101.4.3.9.2 Time interleaving <\/td>\n<\/tr>\n | ||||||
| 4215<\/td>\n | 101.4.3.9.3 Frequency interleaving <\/td>\n<\/tr>\n | ||||||
| 4218<\/td>\n | 101.4.3.9.4 Interleaving impact on continuous pilots, scattered pilots, PHY Link and excluded spectral region <\/td>\n<\/tr>\n | ||||||
| 4219<\/td>\n | 101.4.3.9.5 PHY Link managed variables 101.4.3.10 Pilot insertion <\/td>\n<\/tr>\n | ||||||
| 4220<\/td>\n | 101.4.3.10.1 Pilot boosting 101.4.3.11 Inverse Discrete Fourier Transform (IDFT) 101.4.3.11.1 PHY Link managed variables 101.4.3.12 Cyclic prefix and windowing <\/td>\n<\/tr>\n | ||||||
| 4224<\/td>\n | 101.4.3.12.1 PHY Link managed variables 101.4.3.13 OFDM channel requirements <\/td>\n<\/tr>\n | ||||||
| 4225<\/td>\n | 101.4.4 Upstream PMA transmit function 101.4.4.1 Overview 101.4.4.2 Time and frequency synchronization 101.4.4.2.1 OFDM channel frequency accuracy 101.4.4.2.2 OFDM channel timing accuracy 101.4.4.2.3 Modulation timing jitter <\/td>\n<\/tr>\n | ||||||
| 4226<\/td>\n | 101.4.4.3 Frame timing 101.4.4.3.1 RB Superframe configuration and burst transmission 101.4.4.3.2 OFDMA transmission burst start <\/td>\n<\/tr>\n | ||||||
| 4227<\/td>\n | 101.4.4.3.3 OFDMA transmission internal to a burst 101.4.4.3.4 OFDMA transmission burst end 101.4.4.3.5 Variables <\/td>\n<\/tr>\n | ||||||
| 4228<\/td>\n | 101.4.4.3.6 State diagram <\/td>\n<\/tr>\n | ||||||
| 4229<\/td>\n | 101.4.4.4 Subcarrier configuration and bit loading 101.4.4.4.1 Nulled subcarriers 101.4.4.4.2 Bit loaded subcarriers 101.4.4.4.3 Excluded subcarriers 101.4.4.4.4 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4230<\/td>\n | 101.4.4.5 Upstream symbol mapper 101.4.4.5.1 Variables <\/td>\n<\/tr>\n | ||||||
| 4233<\/td>\n | 101.4.4.5.2 Functions <\/td>\n<\/tr>\n | ||||||
| 4234<\/td>\n | 101.4.4.5.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4237<\/td>\n | 101.4.4.5.4 Minimum gap time and burst marker overhead 101.4.4.6 Pilot patterns <\/td>\n<\/tr>\n | ||||||
| 4238<\/td>\n | 101.4.4.6.1 variables 101.4.4.7 Staging and pilot insertion 101.4.4.7.1 Staging <\/td>\n<\/tr>\n | ||||||
| 4239<\/td>\n | 101.4.4.7.2 Pilot insertion 101.4.4.8 Burst markers 101.4.4.8.1 Introduction 101.4.4.8.2 Burst marker start and stop sequences <\/td>\n<\/tr>\n | ||||||
| 4241<\/td>\n | 101.4.4.8.3 Burst marker B element encoding <\/td>\n<\/tr>\n | ||||||
| 4244<\/td>\n | 101.4.4.9 Pre-equalization and Inverse Discrete Fourier Transform (IDFT) 101.4.4.9.1 Pre-equalization coefficients <\/td>\n<\/tr>\n | ||||||
| 4245<\/td>\n | 101.4.4.9.2 PHY Link managed variables 101.4.4.10 Cyclic prefix and windowing <\/td>\n<\/tr>\n | ||||||
| 4246<\/td>\n | 101.4.4.10.1 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4247<\/td>\n | 101.4.5 Constellation structure and mapping 101.4.5.1 One dimensional Gray mapping for m-tuple binary bits 101.4.5.2 Constellation structure and mapping of BPSK <\/td>\n<\/tr>\n | ||||||
| 4248<\/td>\n | 101.4.5.3 Constellation structure and mapping of 22n\u2013QAM <\/td>\n<\/tr>\n | ||||||
| 4249<\/td>\n | 101.4.5.4 Constellation structure and mapping of 22n+1\u2013QAM (n>0) 101.4.5.4.1 Constellation structure and mapping of 8\u2013QAM <\/td>\n<\/tr>\n | ||||||
| 4250<\/td>\n | 101.4.5.4.2 Constellation structure and mapping of 22n+1\u2013QAM with n > 1 <\/td>\n<\/tr>\n | ||||||
| 4251<\/td>\n | 101.4.5.5 QAM constellation scaling <\/td>\n<\/tr>\n | ||||||
| 4252<\/td>\n | 101.4.6 PMA testing 101.4.6.1 Pre-equalization testing <\/td>\n<\/tr>\n | ||||||
| 4253<\/td>\n | 101.4.6.2 OFDM channel frequency accuracy test 101.5 Applicability of Clause 90 and IEEE Std 802.1AS, Clause 13 for EPoC time transport 101.5.1 CLT PHY asymmetry correction of future time transmitted by the CLT to CNUi 101.5.2 CNU PHY asymmetry correction of future time received by CNUi <\/td>\n<\/tr>\n | ||||||
| 4255<\/td>\n | 101.6 Protocol implementation conformance statement (PICS) proforma for Clause 101, Reconciliation Sublayer, Physical Coding Sublayer, and Physical Media Attachment for EPoC 101.6.1 Introduction 101.6.2 Identification 101.6.2.1 Implementation identification 101.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4256<\/td>\n | 101.6.3 Major capabilities\/options 101.6.4 PICS proforma tables for Reconciliation Sublayer, Physical Coding Sublayer, and Physical Media Attachment for EPoC 101.6.4.1 General specifications <\/td>\n<\/tr>\n | ||||||
| 4257<\/td>\n | 101.6.4.2 Transmission functions 101.6.4.3 OFDM Configuration functions <\/td>\n<\/tr>\n | ||||||
| 4258<\/td>\n | 101.6.4.4 OFDM Timing <\/td>\n<\/tr>\n | ||||||
| 4259<\/td>\n | 101.6.4.5 Data Detector functions 101.6.4.6 IDLE insertion and deletion functions <\/td>\n<\/tr>\n | ||||||
| 4260<\/td>\n | 101.6.4.7 FEC functions 101.6.4.8 Encoding functions <\/td>\n<\/tr>\n | ||||||
| 4261<\/td>\n | 101.6.4.9 Pilots <\/td>\n<\/tr>\n | ||||||
| 4262<\/td>\n | 101.6.4.10 Equalization <\/td>\n<\/tr>\n | ||||||
| 4263<\/td>\n | 102. EPoC PHY Link 102.1 PHY Link overview and architecture 102.1.1 PHY Link frame structure and protocol <\/td>\n<\/tr>\n | ||||||
| 4265<\/td>\n | 102.1.2 PHY Link block diagram <\/td>\n<\/tr>\n | ||||||
| 4266<\/td>\n | 102.1.3 PHY Link Message Engine <\/td>\n<\/tr>\n | ||||||
| 4267<\/td>\n | 102.1.4 PHY Link FEC encoder 102.1.4.1 LDPC (480, 288) mother code 102.1.4.2 LDPC (160, 80) mother code 102.1.4.3 Shortening and puncturing encoders <\/td>\n<\/tr>\n | ||||||
| 4268<\/td>\n | 102.1.4.3.1 LDPC (384, 288) puncturing encoder 102.1.4.3.2 LDPC (128, 80) puncturing encoder <\/td>\n<\/tr>\n | ||||||
| 4269<\/td>\n | 102.1.5 PHY Link scrambler 102.1.6 PHY Link symbol map and constellation mapping <\/td>\n<\/tr>\n | ||||||
| 4270<\/td>\n | 102.1.7 Interleaving 102.1.8 Mapping of PHY Link variables <\/td>\n<\/tr>\n | ||||||
| 4274<\/td>\n | 102.2 Downstream PHY Link 102.2.1 Downstream PHY Link Physical Layer 102.2.1.1 Resource allocation <\/td>\n<\/tr>\n | ||||||
| 4275<\/td>\n | 102.2.1.2 Downstream PHY Link modulation 102.2.1.3 Downstream PHY Link subcarrier block interleaving <\/td>\n<\/tr>\n | ||||||
| 4277<\/td>\n | 102.2.2 Downstream preamble <\/td>\n<\/tr>\n | ||||||
| 4278<\/td>\n | 102.2.3 Downstream frame <\/td>\n<\/tr>\n | ||||||
| 4279<\/td>\n | 102.2.3.1 Downstream EPoC PHY Frame Header 102.2.3.1.1 Configuration ID and profile activation 102.2.3.1.2 Response Frame ID <\/td>\n<\/tr>\n | ||||||
| 4280<\/td>\n | 102.2.3.1.3 PHY Link DA <\/td>\n<\/tr>\n | ||||||
| 4281<\/td>\n | 102.2.3.1.4 PHY Timestamp 102.2.3.2 EPoC Probe Control Header message block <\/td>\n<\/tr>\n | ||||||
| 4282<\/td>\n | 102.2.3.2.1 Probe Scheduling type Probe Control fields 102.2.3.2.2 Broadcast PHY Discovery type Probe Control fields 102.2.3.2.3 Unicast PHY Discovery type Probe Control fields <\/td>\n<\/tr>\n | ||||||
| 4283<\/td>\n | 102.2.3.2.4 PHY Link managed variables 102.2.3.3 Downstream EPoC message block <\/td>\n<\/tr>\n | ||||||
| 4284<\/td>\n | 102.2.3.4 Downstream padding 102.2.3.5 Downstream FEC Parity message block 102.2.4 Downstream PHY Link FEC 102.2.5 Downstream PHY Link response time. 102.2.6 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4285<\/td>\n | 102.2.7 Downstream state diagrams 102.2.7.1 Constants 102.2.7.2 Counters <\/td>\n<\/tr>\n | ||||||
| 4286<\/td>\n | 102.2.7.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4288<\/td>\n | 102.2.7.4 Functions 102.2.7.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4290<\/td>\n | 102.3 Upstream PHY Link 102.3.1 Upstream PHY Link Physical Layer 102.3.1.1 Upstream resource allocation 102.3.1.2 Upstream PHY Link modulation 102.3.1.3 Upstream PHY Link transmission 102.3.2 Upstream PHY Link frame 102.3.2.1 Upstream EPoC PHY Frame Header 102.3.2.2 Upstream EPoC message block <\/td>\n<\/tr>\n | ||||||
| 4292<\/td>\n | 102.3.2.2.1 Padding 102.3.3 Upstream PHY Link FEC 102.3.4 Upstream PHY Link pilot pattern 102.3.5 Upstream state diagrams 102.3.5.1 Constants <\/td>\n<\/tr>\n | ||||||
| 4293<\/td>\n | 102.3.5.2 Counters 102.3.5.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4294<\/td>\n | 102.3.5.4 Functions 102.3.5.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4295<\/td>\n | 102.4 PHY Link applications <\/td>\n<\/tr>\n | ||||||
| 4296<\/td>\n | 102.4.1 PHY Discovery 102.4.1.1 Overview of PHY Discovery 102.4.1.2 PHY Link acquisition <\/td>\n<\/tr>\n | ||||||
| 4297<\/td>\n | 102.4.1.3 PHY Discovery window opening 102.4.1.4 PHY Link Discovery Response <\/td>\n<\/tr>\n | ||||||
| 4299<\/td>\n | 102.4.1.5 PHY Discovery preamble <\/td>\n<\/tr>\n | ||||||
| 4300<\/td>\n | 102.4.1.6 CNU_ID allocation <\/td>\n<\/tr>\n | ||||||
| 4301<\/td>\n | 102.4.1.7 PHY Discovery completion 102.4.1.8 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4302<\/td>\n | 102.4.1.9 PHY Discovery state diagrams 102.4.1.9.1 Constants 102.4.1.9.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4303<\/td>\n | 102.4.1.9.3 Counters 102.4.1.9.4 Functions <\/td>\n<\/tr>\n | ||||||
| 4304<\/td>\n | 102.4.1.9.5 State diagrams 102.4.2 Upstream Wideband Probing 102.4.2.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 4305<\/td>\n | 102.4.2.2 Probing symbol pilots 102.4.2.3 Probing symbol scheduling <\/td>\n<\/tr>\n | ||||||
| 4307<\/td>\n | 102.4.2.4 Probing sequence <\/td>\n<\/tr>\n | ||||||
| 4308<\/td>\n | 102.4.2.5 Probe symbol repetition 102.4.2.6 Wide Band Probing state diagrams 102.4.2.6.1 Constants 102.4.2.6.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4309<\/td>\n | 102.4.2.7 Counters 102.4.2.8 Functions <\/td>\n<\/tr>\n | ||||||
| 4310<\/td>\n | 102.4.2.9 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4311<\/td>\n | 102.4.3 Link-up declaration <\/td>\n<\/tr>\n | ||||||
| 4312<\/td>\n | 102.4.4 Link-down declaration <\/td>\n<\/tr>\n | ||||||
| 4313<\/td>\n | 102.4.4.1 CNU PHY self declared link-down 102.4.4.2 CLT declared link-down 102.4.4.3 Upper layer declared link-down 102.4.5 OFDM Profile descriptors <\/td>\n<\/tr>\n | ||||||
| 4314<\/td>\n | 102.4.5.1 PHY Link managed variables <\/td>\n<\/tr>\n | ||||||
| 4315<\/td>\n | 102.5 Protocol implementation conformance statement (PICS) proforma for Clause 102, EPoC PHY Link 102.5.1 Introduction 102.5.2 Identification 102.5.2.1 Implementation identification 102.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4316<\/td>\n | 102.5.3 Major capabilities\/options 102.5.4 PICS proforma tables for EPoC PHY Link 102.5.4.1 PHY Link general specifications <\/td>\n<\/tr>\n | ||||||
| 4318<\/td>\n | 102.5.4.2 PHY Link timing 102.5.4.3 Downstream framing <\/td>\n<\/tr>\n | ||||||
| 4319<\/td>\n | 102.5.4.4 DS Encoding and transmission 102.5.4.5 Downstream OFDM <\/td>\n<\/tr>\n | ||||||
| 4320<\/td>\n | 102.5.4.6 Upstream encoding and transmission 102.5.4.7 Upstream framing 102.5.4.8 Upstream OFDM <\/td>\n<\/tr>\n | ||||||
| 4321<\/td>\n | 102.5.4.9 Communication Protocol 102.5.4.10 PHY Discovery <\/td>\n<\/tr>\n | ||||||
| 4322<\/td>\n | 102.5.4.11 Probes <\/td>\n<\/tr>\n | ||||||
| 4323<\/td>\n | 103. Multipoint MAC Control for EPoC 103.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4325<\/td>\n | 103.1.1 Position of Multipoint MAC Control within the IEEE 802.3 hierarchy <\/td>\n<\/tr>\n | ||||||
| 4327<\/td>\n | 103.1.2 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 4328<\/td>\n | 103.1.3 Service interfaces 103.1.4 State diagram conventions 103.1.5 Other conventions 103.2 Multipoint MAC Control operation 103.2.1 Principles of Multipoint MAC Control 103.2.1.1 Ranging and timing process <\/td>\n<\/tr>\n | ||||||
| 4329<\/td>\n | 103.2.2 Multipoint transmission control, Control Parser, and Control Multiplexer <\/td>\n<\/tr>\n | ||||||
| 4331<\/td>\n | 103.2.2.1 Constants <\/td>\n<\/tr>\n | ||||||
| 4332<\/td>\n | 103.2.2.2 Counters 103.2.2.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4334<\/td>\n | 103.2.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 4336<\/td>\n | 103.2.2.5 Timers 103.2.2.6 Messages 103.2.2.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4343<\/td>\n | 103.3 Multipoint Control Protocol (MPCP) 103.3.1 Principles of Multipoint Control Protocol 103.3.2 Compatibility considerations 103.3.2.1 PAUSE operation 103.3.2.2 Optional Shared LAN emulation 103.3.2.3 Multicast and single copy broadcast support 103.3.2.4 Delay requirements 103.3.3 Discovery processing <\/td>\n<\/tr>\n | ||||||
| 4345<\/td>\n | 103.3.3.1 Constants 103.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4346<\/td>\n | 103.3.3.3 Timers 103.3.3.4 Messages <\/td>\n<\/tr>\n | ||||||
| 4349<\/td>\n | 103.3.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4354<\/td>\n | 103.3.4 Report Processing 103.3.5 Gate Processing 103.3.5.1 Constants 103.3.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4356<\/td>\n | 103.3.5.3 Functions <\/td>\n<\/tr>\n | ||||||
| 4357<\/td>\n | 103.3.5.4 Timers 103.3.5.5 Messages <\/td>\n<\/tr>\n | ||||||
| 4358<\/td>\n | 103.3.5.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4362<\/td>\n | 103.3.6 MPCPDU structure and encoding 103.3.6.1 GATE description 103.3.6.2 REPORT description 103.3.6.3 REGISTER_REQ description <\/td>\n<\/tr>\n | ||||||
| 4363<\/td>\n | 103.3.6.4 REGISTER description <\/td>\n<\/tr>\n | ||||||
| 4364<\/td>\n | 103.3.6.5 REGISTER_ACK description <\/td>\n<\/tr>\n | ||||||
| 4365<\/td>\n | 103.4 Protocol implementation conformance statement (PICS) proforma for Clause 103, Multipoint MAC Control for EPoC 103.4.1 Introduction 103.4.2 Identification 103.4.2.1 Implementation identification 103.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4366<\/td>\n | 103.4.3 Major capabilities\/options 103.4.4 PICS proforma tables for Multipoint MAC Control 103.4.4.1 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 4367<\/td>\n | 103.4.4.2 Multipoint MAC Control <\/td>\n<\/tr>\n | ||||||
| 4368<\/td>\n | 103.4.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4369<\/td>\n | 103.4.4.4 MPCP <\/td>\n<\/tr>\n | ||||||
| 4371<\/td>\n | 104. Power over Data Lines (PoDL) of Single-Pair Ethernet 104.1 Overview 104.1.1 Compatibility considerations 104.1.2 Relationship of PoDL to the IEEE 802.3 architecture <\/td>\n<\/tr>\n | ||||||
| 4372<\/td>\n | 104.1.3 PoDL system types <\/td>\n<\/tr>\n | ||||||
| 4373<\/td>\n | 104.2 Link segment 104.3 Class power requirements <\/td>\n<\/tr>\n | ||||||
| 4374<\/td>\n | 104.4 Power Sourcing Equipment (PSE) <\/td>\n<\/tr>\n | ||||||
| 4375<\/td>\n | 104.4.1 PSE types 104.4.2 PI pin assignments 104.4.3 PSE classes 104.4.4 PSE state diagram 104.4.4.1 Overview 104.4.4.2 Conventions 104.4.4.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4379<\/td>\n | 104.4.4.4 Timers 104.4.4.5 Functions <\/td>\n<\/tr>\n | ||||||
| 4380<\/td>\n | 104.4.4.6 State diagram <\/td>\n<\/tr>\n | ||||||
| 4382<\/td>\n | 104.4.5 PSE detection of a PD 104.4.5.1 Detection probe requirements 104.4.5.2 Detection criteria 104.4.5.3 Rejection criteria <\/td>\n<\/tr>\n | ||||||
| 4383<\/td>\n | 104.4.6 PSE classification of a PD 104.4.7 PSE output requirements <\/td>\n<\/tr>\n | ||||||
| 4385<\/td>\n | 104.4.7.1 Output voltage 104.4.7.2 Output current <\/td>\n<\/tr>\n | ||||||
| 4386<\/td>\n | 104.4.7.2.1 Output current\u2014at overload condition 104.4.7.2.2 Wakeup current signature detection 104.4.7.2.3 Output current requirement during idle 104.4.7.3 Power feeding ripple and transients <\/td>\n<\/tr>\n | ||||||
| 4387<\/td>\n | 104.4.7.4 Inrush time 104.4.7.5 Turn off time <\/td>\n<\/tr>\n | ||||||
| 4388<\/td>\n | 104.4.7.6 Disable time 104.4.7.7 Continuous output power in POWER_ON state 104.4.8 PSE power removal 104.4.8.1 PSE MFVS requirements 104.5 Powered Device (PD) 104.5.1 PD types 104.5.2 PD PI <\/td>\n<\/tr>\n | ||||||
| 4389<\/td>\n | 104.5.3 PD classes 104.5.4 PD state diagram 104.5.4.1 Overview 104.5.4.2 Conventions 104.5.4.3 Variables <\/td>\n<\/tr>\n | ||||||
| 4391<\/td>\n | 104.5.4.4 Timers 104.5.4.5 Functions <\/td>\n<\/tr>\n | ||||||
| 4392<\/td>\n | 104.5.4.6 State diagram 104.5.5 PD signature <\/td>\n<\/tr>\n | ||||||
| 4393<\/td>\n | 104.5.6 PD classification and mutual identification between the PSE and PD 104.5.7 PD power <\/td>\n<\/tr>\n | ||||||
| 4395<\/td>\n | 104.5.7.1 PD discharge 104.5.7.2 PD input voltage <\/td>\n<\/tr>\n | ||||||
| 4396<\/td>\n | 104.5.7.3 Input current 104.5.7.4 PD ripple and transients <\/td>\n<\/tr>\n | ||||||
| 4397<\/td>\n | 104.5.7.5 Input average power 104.5.7.6 PD stability 104.5.8 PD Maintain full voltage 104.6 Additional electrical specifications 104.6.1 Isolation <\/td>\n<\/tr>\n | ||||||
| 4398<\/td>\n | 104.6.2 Fault tolerance 104.7 Serial communication classification protocol (SCCP) 104.7.1 SCCP signaling 104.7.1.1 Initialization procedure\u2014reset and presence pulses <\/td>\n<\/tr>\n | ||||||
| 4399<\/td>\n | 104.7.1.2 Write time slots <\/td>\n<\/tr>\n | ||||||
| 4400<\/td>\n | 104.7.1.3 Read time slots <\/td>\n<\/tr>\n | ||||||
| 4402<\/td>\n | 104.7.1.4 Calculations for cable resistance <\/td>\n<\/tr>\n | ||||||
| 4403<\/td>\n | 104.7.1.5 Calculations for power allocation <\/td>\n<\/tr>\n | ||||||
| 4404<\/td>\n | 104.7.2 Serial communication classification protocols 104.7.2.1 SCCP transaction sequence 104.7.2.2 Initialization <\/td>\n<\/tr>\n | ||||||
| 4405<\/td>\n | 104.7.2.3 Address commands 104.7.2.3.1 Broadcast address [0xCC] 104.7.2.4 Read_Scratchpad function command [0xAA] <\/td>\n<\/tr>\n | ||||||
| 4406<\/td>\n | 104.7.2.5 CRC8 field 104.7.2.6 Read_VOLT_INFO command [0xBB] <\/td>\n<\/tr>\n | ||||||
| 4407<\/td>\n | 104.7.2.7 Read_POWER_INFO command [0x77] 104.7.2.8 Write_POWER_ASSIGN command [0x99] 104.7.2.9 Read_POWER_ASSIGN command [0x81] <\/td>\n<\/tr>\n | ||||||
| 4408<\/td>\n | 104.8 Environmental 104.8.1 General safety 104.8.2 Network safety 104.8.3 Installation and maintenance guidelines <\/td>\n<\/tr>\n | ||||||
| 4409<\/td>\n | 104.8.4 Patch panel considerations 104.8.5 Telephony voltages 104.8.6 Electromagnetic emissions 104.8.7 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 4410<\/td>\n | 104.9 Protocol implementation conformance statement (PICS) proforma for Clause 104, Power over Data Lines (PoDL) of Single-Pair Ethernet 104.9.1 Introduction 104.9.2 Identification 104.9.2.1 Implementation identification 104.9.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4411<\/td>\n | 104.9.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4412<\/td>\n | 104.9.4 PICS proforma tables for Clause 104, Power over Data Lines (PoDL) of Single-Pair Ethernet 104.9.4.1 Link Segment 104.9.4.2 Power Sourcing Equipment (PSE) <\/td>\n<\/tr>\n | ||||||
| 4415<\/td>\n | 104.9.4.3 Powered Device (PD) <\/td>\n<\/tr>\n | ||||||
| 4417<\/td>\n | 104.9.4.4 Common Electrical 104.9.4.5 PSE Electrical <\/td>\n<\/tr>\n | ||||||
| 4418<\/td>\n | 104.9.4.6 PD Electrical 104.9.4.7 SCCP <\/td>\n<\/tr>\n | ||||||
| 4420<\/td>\n | 104.9.4.8 Environmental <\/td>\n<\/tr>\n | ||||||
| 4422<\/td>\n | 105. Introduction to 25 Gb\/s networks 105.1 Overview 105.1.1 Scope 105.1.2 Relationship of 25 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 4423<\/td>\n | 105.1.3 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 4424<\/td>\n | 105.2 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 4425<\/td>\n | 105.3 Summary of 25 Gigabit Ethernet sublayers 105.3.1 Reconciliation Sublayer (RS) and 25 Gigabit Media Independent Interface (25GMII) <\/td>\n<\/tr>\n | ||||||
| 4426<\/td>\n | 105.3.2 Physical Coding Sublayer (PCS) 105.3.3 Forward error correction (FEC) sublayer 105.3.4 Physical Medium Attachment (PMA) sublayer 105.3.5 Physical Medium Dependent (PMD) sublayer 105.3.6 Auto-Negotiation (AN) 105.3.7 Management interface (MDIO\/MDC) <\/td>\n<\/tr>\n | ||||||
| 4427<\/td>\n | 105.3.8 Management 105.4 Service interface specification method and notation 105.4.1 Inter-sublayer service interface <\/td>\n<\/tr>\n | ||||||
| 4428<\/td>\n | 105.4.2 Instances of the Inter-sublayer service interface 105.4.3 Semantics of inter-sublayer service interface primitives 105.4.3.1 IS_UNITDATA.request 105.4.3.1.1 Semantics of the service primitive 105.4.3.1.2 When generated 105.4.3.1.3 Effect of receipt 105.4.3.2 IS_UNITDATA.indication <\/td>\n<\/tr>\n | ||||||
| 4429<\/td>\n | 105.4.3.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 4430<\/td>\n | 105.4.3.2.2 When generated 105.4.3.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 4431<\/td>\n | 105.4.3.3 IS_SIGNAL.indication 105.4.3.3.1 Semantics of the service primitive 105.4.3.3.2 When generated 105.4.3.3.3 Effect of receipt 105.4.3.4 IS_TX_MODE.request 105.4.3.4.1 Semantics of the service primitive 105.4.3.4.2 When generated 105.4.3.4.3 Effect of receipt 105.4.3.5 IS_RX_MODE.request <\/td>\n<\/tr>\n | ||||||
| 4432<\/td>\n | 105.4.3.5.1 Semantics of the service primitive 105.4.3.5.2 When generated 105.4.3.5.3 Effect of receipt 105.4.3.6 IS_RX_LPI_ACTIVE.request 105.4.3.6.1 Semantics of the service primitive 105.4.3.6.2 When generated 105.4.3.6.3 Effect of receipt 105.4.3.7 IS_ENERGY_DETECT.indication 105.4.3.7.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 4433<\/td>\n | 105.4.3.7.2 When generated 105.4.3.7.3 Effect of receipt 105.4.3.8 IS_RX_TX_MODE.indication 105.4.3.8.1 Semantics of the service primitive 105.4.3.8.2 When generated 105.4.3.8.3 Effect of receipt 105.5 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4434<\/td>\n | 105.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4435<\/td>\n | 105.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 4436<\/td>\n | 106. Reconciliation Sublayer (RS) and Media Independent Interface (25GMII) for 25 Gb\/s operation 106.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4437<\/td>\n | 106.1.1 Summary of major concepts 106.1.2 Application 106.1.3 Rate of operation 106.1.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4438<\/td>\n | 106.1.5 Allocation of functions 106.1.6 25GMII structure 106.1.7 Mapping of 25GMII signals to PLS service primitives 106.1.7.1 Mapping of PLS_DATA.request 106.1.7.2 Mapping of PLS_DATA.indication 106.1.7.3 Mapping of PLS_CARRIER.indication 106.1.7.4 Mapping of PLS_SIGNAL.indication <\/td>\n<\/tr>\n | ||||||
| 4439<\/td>\n | 106.1.7.5 Mapping of PLS_DATA_VALID.indication 106.2 25GMII data stream 106.3 25GMII functional specifications 106.4 LPI Assertion and Detection <\/td>\n<\/tr>\n | ||||||
| 4440<\/td>\n | 106.5 Protocol implementation conformance statement (PICS) proforma for Clause 106 Reconciliation Sublayer (RS) and Media Independent Interface (25GMII) for 25 Gb\/s operation 106.5.1 Introduction 106.5.2 Identification 106.5.2.1 Implementation identification 106.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4441<\/td>\n | 106.5.2.3 Major capabilities\/options 106.5.3 PICS proforma Tables for Reconciliation Sublayer and 25 Gigabit Media Independent Interface 106.5.3.1 General 106.5.3.2 Mapping of PLS service primitives 106.5.3.3 25GMII signal functional specifications. <\/td>\n<\/tr>\n | ||||||
| 4442<\/td>\n | 107. Physical Coding Sublayer (PCS) for 64B\/66B, type 25GBASE-R 107.1 Overview 107.1.1 Scope 107.1.2 Relationship of 25GBASE-R to other standards 107.1.3 Summary of 25GBASE-R sublayers 107.1.3.1 Physical Coding Sublayer (PCS) 107.1.4 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 4443<\/td>\n | 107.1.4.1 PCS service interface (25GMII) 107.1.4.2 Physical Medium Attachment (PMA) service interface 107.2 Functions within the PCS <\/td>\n<\/tr>\n | ||||||
| 4444<\/td>\n | 107.2.1 Notation conventions 107.2.2 Transmission order <\/td>\n<\/tr>\n | ||||||
| 4445<\/td>\n | 107.2.3 Test-pattern generator 107.3 LPI <\/td>\n<\/tr>\n | ||||||
| 4446<\/td>\n | 107.4 Delay constraints 107.5 Support for Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 4447<\/td>\n | 107.6 Protocol implementation conformance statement (PICS) proforma for Clause 107, Physical Coding Sublayer (PCS) for 64B\/66B, type 25GBASE-R 107.6.1 Introduction 107.6.2 Identification 107.6.2.1 Implementation identification 107.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4448<\/td>\n | 107.6.3 Major capabilities\/options 107.6.4 25G PCS 107.6.4.1 Clause 49 functionality 107.6.4.2 Test-pattern generator 107.6.4.3 LPI <\/td>\n<\/tr>\n | ||||||
| 4449<\/td>\n | 107.6.4.4 Delay Constraints <\/td>\n<\/tr>\n | ||||||
| 4450<\/td>\n | 108. Reed-Solomon forward error correction (RS-FEC) sublayer for 10GBASE-R and 25GBASE-R PHYs 108.1 Overview 108.1.1 Scope 108.1.2 Position of RS-FEC in the 10GBASE-R and 25GBASE-R PHY sublayers <\/td>\n<\/tr>\n | ||||||
| 4451<\/td>\n | 108.1.3 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 4452<\/td>\n | 108.1.3.1 Functional block diagram for 10GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 4453<\/td>\n | 108.1.3.2 Functional block diagram for 25GBASE-R PHYs 108.2 FEC service interface <\/td>\n<\/tr>\n | ||||||
| 4454<\/td>\n | 108.2.1 10GBASE-R service primitives 108.2.1.1 FEC_UNITDATA.request 108.2.1.1.1 Semantics of the service primitive 108.2.1.1.2 When generated 108.2.1.1.3 Effect of receipt 108.2.1.2 FEC_UNITDATA.indication 108.2.1.2.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 4455<\/td>\n | 108.2.1.2.2 When generated 108.2.1.2.3 Effect of receipt 108.2.1.3 FEC_SIGNAL.indication 108.2.1.3.1 Semantics of the service primitive 108.2.1.3.2 When generated 108.2.1.3.3 Effect of receipt 108.2.2 25GBASE-R service primitives <\/td>\n<\/tr>\n | ||||||
| 4456<\/td>\n | 108.3 PMA compatibility 108.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4457<\/td>\n | 108.5 Functions within the RS-FEC sublayer 108.5.1 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 4458<\/td>\n | 108.5.1.1 Reverse gearbox and gearbox functions for 10GBASE-R 108.5.2 Transmit function 108.5.2.1 Block synchronization <\/td>\n<\/tr>\n | ||||||
| 4459<\/td>\n | 108.5.2.2 Rate compensation for codeword markers in the transmit direction 108.5.2.3 64B\/66B to 256B\/257B transcoder 108.5.2.4 Codeword marker insertion <\/td>\n<\/tr>\n | ||||||
| 4460<\/td>\n | 108.5.2.5 Reed-Solomon encoder 108.5.2.6 Codeword serialization 108.5.2.7 RS-FEC encoding for rapid codeword lock (EEE deep sleep) <\/td>\n<\/tr>\n | ||||||
| 4462<\/td>\n | 108.5.3 Receive function 108.5.3.1 Codeword marker lock 108.5.3.2 Reed-Solomon decoder <\/td>\n<\/tr>\n | ||||||
| 4463<\/td>\n | 108.5.3.3 Codeword monitor <\/td>\n<\/tr>\n | ||||||
| 4464<\/td>\n | 108.5.3.4 Codeword marker removal 108.5.3.5 256B\/257B to 64B\/66B transcoder 108.5.3.6 Rate compensation for codeword markers in the receive direction 108.5.3.7 Rapid codeword lock for EEE deep sleep <\/td>\n<\/tr>\n | ||||||
| 4465<\/td>\n | 108.5.3.8 Receive bit ordering 108.5.4 Detailed functions and state diagrams 108.5.4.1 State diagram conventions 108.5.4.2 State variables <\/td>\n<\/tr>\n | ||||||
| 4467<\/td>\n | 108.5.4.3 Functions 108.5.4.4 Counters <\/td>\n<\/tr>\n | ||||||
| 4468<\/td>\n | 108.5.4.5 Timers <\/td>\n<\/tr>\n | ||||||
| 4469<\/td>\n | 108.5.4.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4470<\/td>\n | 108.6 RS-FEC MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4471<\/td>\n | 108.6.1 FEC_bypass_correction_enable 108.6.2 FEC_bypass_indication_enable <\/td>\n<\/tr>\n | ||||||
| 4472<\/td>\n | 108.6.3 RS-FEC Enable 108.6.4 FEC_bypass_correction_ability 108.6.5 FEC_bypass_indication_ability 108.6.6 FEC_high_ser 108.6.7 FEC_corrected_cw_counter 108.6.8 FEC_uncorrected_cw_counter <\/td>\n<\/tr>\n | ||||||
| 4473<\/td>\n | 108.6.9 FEC_symbol_error_counter_0 108.6.10 align_status <\/td>\n<\/tr>\n | ||||||
| 4474<\/td>\n | 108.7 Protocol implementation conformance statement (PICS) proforma for Clause 108, Reed-Solomon forward error correction (RS-FEC) sublayer for 10GBASE-R and 25GBASE-R PHYs 108.7.1 Introduction 108.7.2 Identification 108.7.2.1 Implementation identification 108.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4475<\/td>\n | 108.7.3 Major capabilities\/options 108.7.4 PICS proforma tables for Reed-Solomon forward error correction (RS-FEC) sublayer for 10GBASE-R and 25GBASE-R PHYs 108.7.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 4476<\/td>\n | 108.7.4.2 Receive function <\/td>\n<\/tr>\n | ||||||
| 4477<\/td>\n | 108.7.4.3 State diagrams 108.7.4.4 MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4478<\/td>\n | 109. Physical Medium Attachment (PMA) sublayer, type 25GBASE-R 109.1 Overview 109.1.1 Scope 109.1.2 Position of the PMA in the 25GBASE-R sublayers <\/td>\n<\/tr>\n | ||||||
| 4479<\/td>\n | 109.1.3 Summary of functions <\/td>\n<\/tr>\n | ||||||
| 4480<\/td>\n | 109.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n | ||||||
| 4481<\/td>\n | 109.2 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 4482<\/td>\n | 109.3 Service interface below PMA <\/td>\n<\/tr>\n | ||||||
| 4483<\/td>\n | 109.4 Functions within the PMA 109.4.1 Signal drivers 109.4.2 PMA local loopback mode 109.4.3 PMA remote loopback mode 109.4.4 PMA test patterns <\/td>\n<\/tr>\n | ||||||
| 4484<\/td>\n | 109.4.4.1 Transmit PRBS31 test-pattern generation 109.4.4.2 Receive PRBS31 test-pattern generation 109.4.4.3 Transmit PRBS31 test-pattern checking <\/td>\n<\/tr>\n | ||||||
| 4485<\/td>\n | 109.4.4.4 Receive PRBS31 test-pattern checking 109.4.4.5 Transmit PRBS9 test-pattern generation 109.4.4.6 Receive PRBS9 test-pattern generation 109.4.4.7 Transmit square wave test-pattern generation <\/td>\n<\/tr>\n | ||||||
| 4486<\/td>\n | 109.4.5 Energy Efficient Ethernet for 25GAUI 109.5 Delay constraints 109.6 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4489<\/td>\n | 109.7 Protocol implementation conformance statement (PICS) proforma for Clause 109, Physical Medium Attachment (PMA) sublayer, type 25GBASE-R 109.7.1 Introduction 109.7.2 Identification 109.7.2.1 Implementation identification 109.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4490<\/td>\n | 109.7.3 PICS proforma tables for the 25GBASE-R PMA Sublayer 109.7.4 Major capabilities\/options 109.7.4.1 PMA functions <\/td>\n<\/tr>\n | ||||||
| 4491<\/td>\n | 109.7.4.2 PMA characteristics <\/td>\n<\/tr>\n | ||||||
| 4492<\/td>\n | 110. Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-CR and 25GBASE-CR-S 110.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4493<\/td>\n | 110.2 PMD service interface <\/td>\n<\/tr>\n | ||||||
| 4494<\/td>\n | 110.3 PCS requirements for Auto-Negotiation (AN) service interface 110.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4495<\/td>\n | 110.5 PMD MDIO function mapping 110.6 FEC modes <\/td>\n<\/tr>\n | ||||||
| 4496<\/td>\n | 110.7 PMD functional specifications 110.7.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 4497<\/td>\n | 110.7.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 4498<\/td>\n | 110.7.3 PMD receive function 110.7.4 Global PMD signal detect function 110.7.5 Global PMD transmit disable function <\/td>\n<\/tr>\n | ||||||
| 4499<\/td>\n | 110.7.6 Loopback mode 110.7.7 PMD fault function 110.7.8 PMD transmit fault function 110.7.9 PMD receive fault function 110.7.10 PMD control function 110.8 Electrical characteristics 110.8.1 Signal levels <\/td>\n<\/tr>\n | ||||||
| 4500<\/td>\n | 110.8.2 Signal paths 110.8.3 Transmitter characteristics 110.8.4 Receiver characteristics 110.8.4.1 Receiver input amplitude tolerance 110.8.4.2 Receiver interference tolerance test <\/td>\n<\/tr>\n | ||||||
| 4502<\/td>\n | 110.8.4.2.1 Test setup 110.8.4.2.2 Test channel 110.8.4.2.3 Test channel calibration <\/td>\n<\/tr>\n | ||||||
| 4504<\/td>\n | 110.8.4.2.4 Pattern generator and noise injection 110.8.4.2.5 Test procedure 110.8.4.3 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 4505<\/td>\n | 110.8.4.4 Signaling rate range 110.9 Channel characteristics 110.10 Cable assembly characteristics <\/td>\n<\/tr>\n | ||||||
| 4506<\/td>\n | 110.10.1 Characteristic impedance and reference impedance 110.10.2 Cable assembly insertion loss 110.10.3 Cable assembly differential return loss <\/td>\n<\/tr>\n | ||||||
| 4507<\/td>\n | 110.10.4 Differential to common-mode return loss 110.10.5 Differential to common-mode conversion loss 110.10.6 Common-mode to common-mode return loss 110.10.7 Cable assembly Channel Operating Margin <\/td>\n<\/tr>\n | ||||||
| 4508<\/td>\n | 110.10.7.1 Channel signal and crosstalk path calculations <\/td>\n<\/tr>\n | ||||||
| 4509<\/td>\n | 110.10.7.1.1 Channel signal path 110.10.7.1.2 Channel crosstalk paths <\/td>\n<\/tr>\n | ||||||
| 4510<\/td>\n | 110.10.7.2 Signal and crosstalk paths used in calculation of COM 110.10.7.2.1 SFP28 to SFP28 110.10.7.2.2 QSFP28 to SFP28 110.10.7.2.3 SFP28 to QSFP28 <\/td>\n<\/tr>\n | ||||||
| 4511<\/td>\n | 110.10.7.2.4 QSFP28 to QSFP28 110.11 MDI specification 110.11.1 Single-lane MDI connectors <\/td>\n<\/tr>\n | ||||||
| 4512<\/td>\n | 110.12 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4513<\/td>\n | 110.13 Protocol implementation conformance statement (PICS) proforma for Clause 110, Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-CR and 25GBASE-CR-S 110.13.1 Introduction 110.13.2 Identification 110.13.2.1 Implementation identification 110.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4514<\/td>\n | 110.13.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4515<\/td>\n | 110.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-CR and 25GBASE-CR-S 110.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4516<\/td>\n | 110.13.4.2 Management functions 110.13.4.3 Transmitter specifications <\/td>\n<\/tr>\n | ||||||
| 4518<\/td>\n | 110.13.4.4 Receiver specifications <\/td>\n<\/tr>\n | ||||||
| 4519<\/td>\n | 110.13.4.5 Cable assembly specifications 110.13.4.6 MDI connector specifications <\/td>\n<\/tr>\n | ||||||
| 4520<\/td>\n | 110.13.4.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4521<\/td>\n | 111. Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-KR and 25GBASE-KR-S 111.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4522<\/td>\n | 111.2 PMD service interface <\/td>\n<\/tr>\n | ||||||
| 4523<\/td>\n | 111.3 PCS requirements for Auto-Negotiation (AN) service interface 111.4 Delay constraints 111.5 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4524<\/td>\n | 111.6 FEC modes <\/td>\n<\/tr>\n | ||||||
| 4525<\/td>\n | 111.7 PMD functional specifications 111.7.1 Link block diagram 111.7.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 4526<\/td>\n | 111.7.3 PMD receive function 111.7.4 Global PMD signal detect function 111.7.5 Global PMD transmit disable function 111.7.6 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 4527<\/td>\n | 111.7.7 PMD fault function 111.7.8 PMD transmit fault function 111.7.9 PMD receive fault function 111.7.10 PMD control function 111.8 Electrical characteristics 111.8.1 MDI <\/td>\n<\/tr>\n | ||||||
| 4528<\/td>\n | 111.8.2 Transmitter characteristics 111.8.3 Receiver characteristics 111.8.3.1 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 4530<\/td>\n | 111.8.3.2 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 4531<\/td>\n | 111.9 Channel characteristics 111.9.1 25GBASE-KR channel 111.9.2 25GBASE-KR-S channel <\/td>\n<\/tr>\n | ||||||
| 4532<\/td>\n | 111.10 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4533<\/td>\n | 111.11 Protocol implementation conformance statement (PICS) proforma for Clause 111, Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-KR and 25GBASE-KR-S 111.11.1 Introduction 111.11.2 Identification 111.11.2.1 Implementation identification 111.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4534<\/td>\n | 111.11.3 Major capabilities\/options 111.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 25GBASE-KR and 25GBASE-KR-S 111.11.4.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 4536<\/td>\n | 111.11.4.2 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 4538<\/td>\n | 111.11.4.3 Receiver characteristics 111.11.4.4 Channel characteristics <\/td>\n<\/tr>\n | ||||||
| 4539<\/td>\n | 111.11.4.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4540<\/td>\n | 112. Physical Medium Dependent (PMD) sublayer and medium, type 25GBASE-SR 112.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4541<\/td>\n | 112.1.1 Bit error ratio 112.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 4542<\/td>\n | 112.3 Delay constraints 112.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4543<\/td>\n | 112.5 PMD functional specifications 112.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4544<\/td>\n | 112.5.2 PMD transmit function 112.5.3 PMD receive function 112.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 4545<\/td>\n | 112.5.5 PMD reset function 112.5.6 PMD global transmit disable function (optional) 112.5.7 PMD fault function (optional) 112.5.8 PMD transmit fault function (optional) 112.5.9 PMD receive fault function (optional) 112.6 PMD to MDI optical specifications for 25GBASE-SR <\/td>\n<\/tr>\n | ||||||
| 4546<\/td>\n | 112.6.1 25GBASE-SR transmitter optical specifications 112.6.2 25GBASE-SR receive optical specifications 112.6.3 25GBASE-SR illustrative link power budget 112.7 Definition of optical parameters and measurement methods 112.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 4547<\/td>\n | 112.7.2 Center wavelength and spectral width 112.7.3 Average optical power 112.7.4 Optical Modulation Amplitude (OMA) 112.7.5 Transmitter and dispersion eye closure (TDEC) 112.7.6 Extinction ratio 112.7.7 Transmitter optical waveform (transmit eye) 112.7.8 Stressed receiver sensitivity 112.8 Safety, installation, environment, and labeling 112.8.1 General safety <\/td>\n<\/tr>\n | ||||||
| 4548<\/td>\n | 112.8.2 Laser safety 112.8.3 Installation 112.8.4 Environment 112.8.5 Electromagnetic emission 112.8.6 Temperature, humidity, and handling 112.8.7 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 4549<\/td>\n | 112.9 Fiber optic cabling model 112.10 Characteristics of the fiber optic cabling (channel) 112.10.1 Optical fiber cable 112.10.2 Optical fiber connection <\/td>\n<\/tr>\n | ||||||
| 4550<\/td>\n | 112.10.2.1 Connection insertion loss 112.10.2.2 Maximum discrete reflectance 112.10.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 4551<\/td>\n | 112.11 Protocol implementation conformance statement (PICS) proforma for Clause 112, Physical Medium Dependent (PMD) sublayer and medium, type 25GBASE-SR 112.11.1 Introduction 112.11.2 Identification 112.11.2.1 Implementation identification 112.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4552<\/td>\n | 112.11.3 Major capabilities\/options 112.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 25GBASE-SR 112.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4553<\/td>\n | 112.11.4.2 Management functions 112.11.4.3 PMD to MDI optical specifications for 25GBASE-SR <\/td>\n<\/tr>\n | ||||||
| 4554<\/td>\n | 112.11.4.4 Optical measurement methods 112.11.4.5 Environmental specifications 112.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 4555<\/td>\n | 113. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T 113.1 Overview 113.1.1 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 4556<\/td>\n | 113.1.2 Relationship of 25GBASE-T and 40GBASE-T to other standards 113.1.3 Operation of 25GBASE-T and 40GBASE-T <\/td>\n<\/tr>\n | ||||||
| 4560<\/td>\n | 113.1.3.1 Summary of Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 4561<\/td>\n | 113.1.3.2 Summary of Physical Medium Attachment (PMA) sublayer 113.1.3.3 Summary of EEE capability <\/td>\n<\/tr>\n | ||||||
| 4562<\/td>\n | 113.1.4 Signaling <\/td>\n<\/tr>\n | ||||||
| 4563<\/td>\n | 113.1.5 Interfaces 113.1.6 Conventions in this clause 113.2 25GBASE-T and 40GBASE-T service primitives and interfaces <\/td>\n<\/tr>\n | ||||||
| 4564<\/td>\n | 113.2.1 Technology Dependent Interface 113.2.1.1 PMA_LINK.request 113.2.1.1.1 Semantics of the primitive 113.2.1.1.2 When generated 113.2.1.1.3 Effect of receipt 113.2.1.2 PMA_LINK.indication 113.2.1.2.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 4565<\/td>\n | 113.2.1.2.2 When generated 113.2.1.2.3 Effect of receipt 113.2.2 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 4566<\/td>\n | 113.2.2.1 PMA_TXMODE.indication 113.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 4567<\/td>\n | 113.2.2.1.2 When generated 113.2.2.1.3 Effect of receipt 113.2.2.2 PMA_CONFIG.indication 113.2.2.2.1 Semantics of the primitive 113.2.2.2.2 When generated 113.2.2.2.3 Effect of receipt 113.2.2.3 PMA_UNITDATA.request <\/td>\n<\/tr>\n | ||||||
| 4568<\/td>\n | 113.2.2.3.1 Semantics of the primitive 113.2.2.3.2 When generated 113.2.2.3.3 Effect of receipt 113.2.2.4 PMA_UNITDATA.indication 113.2.2.4.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 4569<\/td>\n | 113.2.2.4.2 When generated 113.2.2.4.3 Effect of receipt 113.2.2.5 PMA_SCRSTATUS.request 113.2.2.5.1 Semantics of the primitive 113.2.2.5.2 When generated 113.2.2.5.3 Effect of receipt 113.2.2.6 PMA_PCSSTATUS.request 113.2.2.6.1 Semantics of the primitive 113.2.2.6.2 When generated <\/td>\n<\/tr>\n | ||||||
| 4570<\/td>\n | 113.2.2.6.3 Effect of receipt 113.2.2.7 PMA_RXSTATUS.indication 113.2.2.7.1 Semantics of the primitive 113.2.2.7.2 When generated 113.2.2.7.3 Effect of receipt 113.2.2.8 PMA_REMRXSTATUS.request 113.2.2.8.1 Semantics of the primitive 113.2.2.8.2 When generated <\/td>\n<\/tr>\n | ||||||
| 4571<\/td>\n | 113.2.2.8.3 Effect of receipt 113.2.2.9 PMA_ALERTDETECT.indication 113.2.2.9.1 Semantics of the primitive 113.2.2.9.2 When generated 113.2.2.9.3 Effect of receipt 113.2.2.10 PCS_RX_LPI_STATUS.request 113.2.2.10.1 Semantics of the primitive 113.2.2.10.2 When generated 113.2.2.10.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 4572<\/td>\n | 113.2.2.11 PMA_PCSDATAMODE.indication 113.2.2.11.1 Semantics of the primitive 113.2.2.11.2 When generated 113.2.2.11.3 Effect of receipt 113.2.2.12 PMA_FR_ACTIVE.indication 113.2.2.12.1 Semantics of the primitive 113.2.2.12.2 When generated 113.2.2.12.3 Effect of receipt 113.3 Physical Coding Sublayer (PCS) 113.3.1 PCS service interface (25GMII\/XLGMII) <\/td>\n<\/tr>\n | ||||||
| 4573<\/td>\n | 113.3.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 4574<\/td>\n | 113.3.2.1 PCS Reset function 113.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 4575<\/td>\n | 113.3.2.2.1 Use of blocks 113.3.2.2.2 65B-LDPC transmission code 113.3.2.2.3 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 4578<\/td>\n | 113.3.2.2.4 Transmission order 113.3.2.2.5 Block structure 113.3.2.2.6 Control codes <\/td>\n<\/tr>\n | ||||||
| 4583<\/td>\n | 113.3.2.2.7 Ordered sets 113.3.2.2.8 Idle (\/I\/) 113.3.2.2.9 LPI (\/LI\/) 113.3.2.2.10 Start (\/S\/) <\/td>\n<\/tr>\n | ||||||
| 4584<\/td>\n | 113.3.2.2.11 Terminate (\/T\/) 113.3.2.2.12 ordered set (\/O\/) 113.3.2.2.13 Error (\/E\/) 113.3.2.2.14 Transmit process 113.3.2.2.15 64B\/65B to 512B\/513B Transcoder <\/td>\n<\/tr>\n | ||||||
| 4587<\/td>\n | 113.3.2.2.16 Aggregation 113.3.2.2.17 PCS Scrambler <\/td>\n<\/tr>\n | ||||||
| 4589<\/td>\n | 113.3.2.2.18 LDPC framing and LDPC encoder 113.3.2.2.19 Reed Solomon encoder <\/td>\n<\/tr>\n | ||||||
| 4590<\/td>\n | 113.3.2.2.20 DSQ128 bit mapping <\/td>\n<\/tr>\n | ||||||
| 4592<\/td>\n | 113.3.2.2.21 DSQ128 to 4D-PAM16 113.3.2.2.22 Block-LDPC framer 113.3.2.2.23 EEE capability <\/td>\n<\/tr>\n | ||||||
| 4593<\/td>\n | 113.3.2.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 4594<\/td>\n | 113.3.2.3.1 Frame and block synchronization <\/td>\n<\/tr>\n | ||||||
| 4595<\/td>\n | 113.3.2.3.2 PCS descrambler 113.3.2.3.3 Invalid blocks 113.3.3 Test-pattern generators <\/td>\n<\/tr>\n | ||||||
| 4596<\/td>\n | 113.3.4 PMA training side-stream scrambler polynomials 113.3.4.1 Generation of bits San, Sbn, Scn, Sdn 113.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn 113.3.4.3 PMA training mode descrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 4597<\/td>\n | 113.3.5 LPI signaling <\/td>\n<\/tr>\n | ||||||
| 4598<\/td>\n | 113.3.5.1 LPI Synchronization <\/td>\n<\/tr>\n | ||||||
| 4599<\/td>\n | 113.3.5.2 Quiet period signaling 113.3.5.3 Refresh period signaling <\/td>\n<\/tr>\n | ||||||
| 4600<\/td>\n | 113.3.6 Detailed functions and state diagrams 113.3.6.1 State diagram conventions 113.3.6.2 State diagram parameters 113.3.6.2.1 Constants <\/td>\n<\/tr>\n | ||||||
| 4601<\/td>\n | 113.3.6.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4603<\/td>\n | 113.3.6.2.3 Timers 113.3.6.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 4605<\/td>\n | 113.3.6.2.5 Counters <\/td>\n<\/tr>\n | ||||||
| 4606<\/td>\n | 113.3.6.3 State diagrams 113.3.7 PCS management 113.3.7.1 Status <\/td>\n<\/tr>\n | ||||||
| 4607<\/td>\n | 113.3.7.2 Counters <\/td>\n<\/tr>\n | ||||||
| 4613<\/td>\n | 113.3.7.3 Loopback 113.4 Physical Medium Attachment (PMA) sublayer 113.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 4614<\/td>\n | 113.4.2 PMA functions 113.4.2.1 PMA Reset function 113.4.2.2 PMA Transmit function 113.4.2.2.1 Alert signal <\/td>\n<\/tr>\n | ||||||
| 4616<\/td>\n | 113.4.2.2.2 Link failure signal 113.4.2.3 PMA transmit disable function 113.4.2.3.1 Global PMA transmit disable function 113.4.2.3.2 PMA pair by pair transmit disable function 113.4.2.3.3 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4617<\/td>\n | 113.4.2.4 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 4618<\/td>\n | 113.4.2.5 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 4619<\/td>\n | 113.4.2.5.1 Infofield notation 113.4.2.5.2 Start of Frame Delimiter 113.4.2.5.3 Current transmitter settings <\/td>\n<\/tr>\n | ||||||
| 4620<\/td>\n | 113.4.2.5.4 Next transmitter settings 113.4.2.5.5 Requested transmitter settings 113.4.2.5.6 Message Field <\/td>\n<\/tr>\n | ||||||
| 4621<\/td>\n | 113.4.2.5.7 SNR_margin <\/td>\n<\/tr>\n | ||||||
| 4622<\/td>\n | 113.4.2.5.8 Transition counter 113.4.2.5.9 Coefficient exchange handshake 113.4.2.5.10 Ability Fields 113.4.2.5.11 Reserved fields 113.4.2.5.12 Vendor-specific field <\/td>\n<\/tr>\n | ||||||
| 4623<\/td>\n | 113.4.2.5.13 Coefficient Field 113.4.2.5.14 CRC16 113.4.2.5.15 Startup sequence <\/td>\n<\/tr>\n | ||||||
| 4626<\/td>\n | 113.4.2.5.16 Fast retrain function <\/td>\n<\/tr>\n | ||||||
| 4627<\/td>\n | 113.4.2.6 Link Monitor function 113.4.2.7 Refresh Monitor function 113.4.2.8 Clock Recovery function 113.4.3 MDI 113.4.3.1 MDI signals transmitted by the PHY <\/td>\n<\/tr>\n | ||||||
| 4628<\/td>\n | 113.4.3.2 Signals received at the MDI <\/td>\n<\/tr>\n | ||||||
| 4629<\/td>\n | 113.4.4 Automatic MDI\/MDI-X configuration 113.4.5 State variables 113.4.5.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 4632<\/td>\n | 113.4.5.2 Timers <\/td>\n<\/tr>\n | ||||||
| 4633<\/td>\n | 113.4.5.3 Functions 113.4.5.4 Counters <\/td>\n<\/tr>\n | ||||||
| 4634<\/td>\n | 113.4.6 State diagrams 113.4.6.1 PHY Control state diagram <\/td>\n<\/tr>\n | ||||||
| 4635<\/td>\n | 113.4.6.2 Transition counter state diagrams <\/td>\n<\/tr>\n | ||||||
| 4637<\/td>\n | 113.4.6.3 Link Monitor state diagram 113.4.6.4 EEE Refresh monitor state diagram 113.4.6.5 Fast retrain state diagram 113.5 PMA electrical specifications 113.5.1 Electrical isolation 113.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 4641<\/td>\n | 113.5.2.1 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 4642<\/td>\n | 113.5.3 Transmitter electrical specifications 113.5.3.1 Maximum output droop 113.5.3.2 Transmitter nonlinear distortion <\/td>\n<\/tr>\n | ||||||
| 4643<\/td>\n | 113.5.3.3 Transmitter timing jitter 113.5.3.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 4644<\/td>\n | 113.5.3.5 Transmit clock frequency 113.5.4 Receiver electrical specifications 113.5.4.1 Receiver differential input signals <\/td>\n<\/tr>\n | ||||||
| 4645<\/td>\n | 113.5.4.2 Receiver frequency tolerance 113.5.4.3 Rejection of External EM Fields 113.5.4.4 Alien crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 4646<\/td>\n | 113.5.4.5 Short reach mode 113.6 Management interfaces 113.6.1 Support for Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 4647<\/td>\n | 113.6.1.1 25G\/40GBASE-T use of registers during Auto-Negotiation 113.6.1.2 25G\/40GBASE-T Auto-Negotiation page use 113.6.1.3 Sending Next Pages <\/td>\n<\/tr>\n | ||||||
| 4649<\/td>\n | 113.6.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n | ||||||
| 4651<\/td>\n | 113.7 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 4652<\/td>\n | 113.7.1 Cabling system characteristics 113.7.2 Link segment transmission parameters 113.7.2.1 Insertion loss <\/td>\n<\/tr>\n | ||||||
| 4653<\/td>\n | 113.7.2.2 Differential characteristic impedance 113.7.2.3 Return loss 113.7.2.4 Coupling parameters between duplex channels comprising one link segment 113.7.2.4.1 Differential near-end crosstalk <\/td>\n<\/tr>\n | ||||||
| 4654<\/td>\n | 113.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4655<\/td>\n | 113.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4656<\/td>\n | 113.7.2.4.4 Attenuation to crosstalk ratio, far end (ACRF) 113.7.2.4.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF) <\/td>\n<\/tr>\n | ||||||
| 4657<\/td>\n | 113.7.2.4.6 Multiple disturber power sum attenuation to crosstalk ratio, far-end (PS-ACRF) 113.7.2.5 Maximum link delay 113.7.2.6 Link delay skew 113.7.3 Coupling parameters between link segments <\/td>\n<\/tr>\n | ||||||
| 4658<\/td>\n | 113.7.3.1 Multiple disturber alien near-end crosstalk (MDANEXT) loss 113.7.3.1.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss 113.7.3.2 Multiple disturber alien far-end crosstalk (MDAFEXT) loss 113.7.3.2.1 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF) <\/td>\n<\/tr>\n | ||||||
| 4659<\/td>\n | 113.7.4 Direct attach cable assembly\u2014Short Reach Mode 113.7.4.1 Insertion loss 113.7.4.2 Return loss <\/td>\n<\/tr>\n | ||||||
| 4660<\/td>\n | 113.7.4.3 Coupling parameters between direct attach cable assembly duplex channels comprising one link segment 113.7.4.3.1 Differential near-end crosstalk 113.7.4.3.2 Multiple disturber near-end crosstalk (MDNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4661<\/td>\n | 113.7.4.3.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss 113.7.4.3.4 Attenuation to crosstalk ratio, far end (ACRF) 113.7.4.3.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF) <\/td>\n<\/tr>\n | ||||||
| 4662<\/td>\n | 113.7.4.3.6 Maximum link delay 113.7.4.3.7 Link delay skew 113.7.4.3.8 Multiple disturber alien near-end crosstalk (MDANEXT) loss 113.7.4.3.9 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss <\/td>\n<\/tr>\n | ||||||
| 4663<\/td>\n | 113.7.4.3.10 Multiple disturber power sum alien attenuation to crosstalk, far end crosstalk (PSAACRF) 113.7.5 Noise environment <\/td>\n<\/tr>\n | ||||||
| 4664<\/td>\n | 113.8 MDI specification 113.8.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 4665<\/td>\n | 113.8.2 MDI electrical specifications 113.8.2.1 MDI return loss <\/td>\n<\/tr>\n | ||||||
| 4666<\/td>\n | 113.8.2.2 MDI impedance balance <\/td>\n<\/tr>\n | ||||||
| 4667<\/td>\n | 113.8.2.3 MDI fault tolerance 113.9 Environmental specifications 113.9.1 General safety 113.9.2 Network safety 113.9.3 Installation and maintenance guidelines <\/td>\n<\/tr>\n | ||||||
| 4668<\/td>\n | 113.9.4 Telephone voltages 113.9.5 Electromagnetic compatibility 113.9.6 Temperature and humidity 113.10 PHY labeling 113.11 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4670<\/td>\n | 113.12 Protocol implementation conformance statement (PICS) proforma for Clause 113, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 25GBASE-T and 40GBASE-T 113.12.1 Identification 113.12.1.1 Implementation identification 113.12.1.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4671<\/td>\n | 113.12.2 Major capabilities\/options 113.12.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 4673<\/td>\n | 113.12.3.1 PCS Receive functions 113.12.3.2 Other PCS functions 113.12.4 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 4676<\/td>\n | 113.12.5 Management interface <\/td>\n<\/tr>\n | ||||||
| 4677<\/td>\n | 113.12.6 PMA Electrical Specifications <\/td>\n<\/tr>\n | ||||||
| 4678<\/td>\n | 113.12.7 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 4679<\/td>\n | 113.12.8 Characteristics of the direct attach cable assembly 113.12.9 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 4680<\/td>\n | 113.12.10 General safety and environmental requirements 113.12.11 Timing requirements <\/td>\n<\/tr>\n | ||||||
| 4681<\/td>\n | 114. Physical Medium Dependent (PMD) sublayer and medium, types 25GBASE-LR and 25GBASE-ER 114.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4682<\/td>\n | 114.1.1 Bit error ratio 114.2 Physical Medium Dependent (PMD) service interface 114.3 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4683<\/td>\n | 114.4 PMD MDIO function mapping 114.5 PMD functional specifications 114.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4684<\/td>\n | 114.5.2 PMD transmit function 114.5.3 PMD receive function 114.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 4685<\/td>\n | 114.5.5 PMD reset function 114.5.6 PMD global transmit disable function (optional) 114.5.7 PMD fault function (optional) 114.5.8 PMD transmit fault function (optional) 114.5.9 PMD receive fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 4686<\/td>\n | 114.6 PMD to MDI optical specifications for 25GBASE-LR and 25GBASE-ER <\/td>\n<\/tr>\n | ||||||
| 4687<\/td>\n | 114.6.1 25GBASE-LR and 25GBASE-ER transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 4688<\/td>\n | 114.6.2 25GBASE-LR and 25GBASE-ER receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 4689<\/td>\n | 114.6.3 25GBASE-LR and 25GBASE-ER illustrative link power budgets 114.7 Definition of optical parameters and measurement methods 114.7.1 Test patterns for optical parameters 114.7.2 Wavelength and side mode suppression ratio (SMSR) <\/td>\n<\/tr>\n | ||||||
| 4690<\/td>\n | 114.7.3 Average optical power 114.7.4 Optical Modulation Amplitude (OMA) 114.7.5 Transmitter and dispersion penalty (TDP) 114.7.5.1 Reference transmitter requirements <\/td>\n<\/tr>\n | ||||||
| 4691<\/td>\n | 114.7.5.2 Channel requirements 114.7.5.3 Reference receiver requirements 114.7.5.4 Test procedure 114.7.6 Extinction ratio 114.7.7 Relative Intensity Noise (RIN20OMA) 114.7.8 Transmitter optical waveform (transmit eye) <\/td>\n<\/tr>\n | ||||||
| 4692<\/td>\n | 114.7.9 Receiver sensitivity 114.7.10 Stressed receiver sensitivity 114.8 Safety, installation, environment, and labeling 114.9 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 4693<\/td>\n | 114.10 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 4694<\/td>\n | 114.11 Requirements for interoperation between 25GBASE-LR and 25GBASE-ER <\/td>\n<\/tr>\n | ||||||
| 4695<\/td>\n | 114.12 Protocol implementation conformance statement (PICS) proforma for Clause 114, Physical Medium Dependent (PMD) sublayer and medium, types 25GBASE-LR and 25GBASE-ER 114.12.1 Introduction 114.12.2 Identification 114.12.2.1 Implementation identification 114.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4696<\/td>\n | 114.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4697<\/td>\n | 114.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, types 25GBASE-LR and 25GBASE-ER 114.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4698<\/td>\n | 114.12.4.2 Management functions 114.12.4.3 PMD to MDI optical specifications for 25GBASE-LR 114.12.4.4 PMD to MDI optical specifications for 25GBASE-ER <\/td>\n<\/tr>\n | ||||||
| 4699<\/td>\n | 114.12.4.5 Optical measurement methods 114.12.4.6 Environmental specifications 114.12.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 4700<\/td>\n | 115. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and Physical Medium Dependent (PMD) sublayer, types 1000BASE-RHA, 1000BASE-RHB, and 1000BASE-RHC 115.1 Overview 115.1.1 Features 115.1.2 Conventions 115.1.3 Relationship of 1000BASE-RHx to other standards <\/td>\n<\/tr>\n | ||||||
| 4701<\/td>\n | 115.1.4 Relationship to other Gigabit Ethernet PHY types 115.1.5 Operation of 1000BASE-RHx <\/td>\n<\/tr>\n | ||||||
| 4703<\/td>\n | 115.1.6 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 4704<\/td>\n | 115.2 Physical Coding Sublayer (PCS) 115.2.1 Transmit Block <\/td>\n<\/tr>\n | ||||||
| 4706<\/td>\n | 115.2.2 Pilots data path 115.2.2.1 Pilot S1 generator <\/td>\n<\/tr>\n | ||||||
| 4707<\/td>\n | 115.2.2.2 Pilot S2 generator <\/td>\n<\/tr>\n | ||||||
| 4708<\/td>\n | 115.2.3 Physical header encoding and scrambling 115.2.3.1 Physical header CRC16 <\/td>\n<\/tr>\n | ||||||
| 4709<\/td>\n | 115.2.3.2 Physical header binary scrambler 115.2.3.3 Physical header BCH encoder 115.2.3.4 Physical header modulation <\/td>\n<\/tr>\n | ||||||
| 4710<\/td>\n | 115.2.3.5 Physical header ordering 115.2.4 Payload data encoding and scrambling 115.2.4.1 GMII data stream encoding 115.2.4.1.1 64B\/65B encoding <\/td>\n<\/tr>\n | ||||||
| 4713<\/td>\n | 115.2.4.1.2 64B\/65B encoding formal definition <\/td>\n<\/tr>\n | ||||||
| 4714<\/td>\n | 115.2.4.1.3 PDB alignment with Transmit Block <\/td>\n<\/tr>\n | ||||||
| 4715<\/td>\n | 115.2.4.2 Payload data binary scrambler 115.2.4.3 PAM16 encoder 115.2.4.3.1 MLCC demultiplexer <\/td>\n<\/tr>\n | ||||||
| 4716<\/td>\n | 115.2.4.3.2 Payload BCH encoder <\/td>\n<\/tr>\n | ||||||
| 4717<\/td>\n | 115.2.4.3.3 QAM16 mapper <\/td>\n<\/tr>\n | ||||||
| 4718<\/td>\n | 115.2.4.3.4 QAM8 mapper 115.2.4.3.5 First lattice transformation 115.2.4.3.6 Lattice addition <\/td>\n<\/tr>\n | ||||||
| 4719<\/td>\n | 115.2.4.3.7 Second lattice transformation 115.2.4.3.8 QAM to PAM multiplexer 115.2.4.4 Payload data symbol scrambler <\/td>\n<\/tr>\n | ||||||
| 4720<\/td>\n | 115.2.5 PCS receive function <\/td>\n<\/tr>\n | ||||||
| 4722<\/td>\n | 115.3 Physical Medium Attachment (PMA) sublayer 115.3.1 PMA transmit function 115.3.1.1 Payload data Tomlinson-Harashima precoding <\/td>\n<\/tr>\n | ||||||
| 4723<\/td>\n | 115.3.1.2 Transmit power scaling 115.3.2 PMA receive function <\/td>\n<\/tr>\n | ||||||
| 4724<\/td>\n | 115.3.3 Interface to the PMD 115.3.3.1 Signals transmitted to the PMD 115.3.3.2 Signals received from PMD <\/td>\n<\/tr>\n | ||||||
| 4725<\/td>\n | 115.3.4 Physical Header Data (PHD) <\/td>\n<\/tr>\n | ||||||
| 4728<\/td>\n | 115.3.5 PHY control 115.3.5.1 PHY control state variables <\/td>\n<\/tr>\n | ||||||
| 4730<\/td>\n | 115.3.5.2 PHY TX control state diagram 115.3.5.3 PHY RX control state diagram <\/td>\n<\/tr>\n | ||||||
| 4733<\/td>\n | 115.3.5.4 Link monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 4734<\/td>\n | 115.3.5.5 PHD monitor state diagrams <\/td>\n<\/tr>\n | ||||||
| 4735<\/td>\n | 115.3.6 Adaptive THP protocol <\/td>\n<\/tr>\n | ||||||
| 4737<\/td>\n | 115.3.6.1 Adaptive THP state variables 115.3.6.2 Adaptive THP TX state diagram <\/td>\n<\/tr>\n | ||||||
| 4739<\/td>\n | 115.3.6.3 Adaptive THP REQ state diagram 115.3.7 PHY quality monitor 115.3.7.1 PHY quality criterion <\/td>\n<\/tr>\n | ||||||
| 4740<\/td>\n | 115.3.7.2 PHY quality assessment <\/td>\n<\/tr>\n | ||||||
| 4741<\/td>\n | 115.3.7.3 PHY quality monitor state variables 115.3.7.4 PHY quality monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 4743<\/td>\n | 115.3.8 Fixed-point format formal definition 115.3.8.1 Fixed-point encoding 115.3.8.2 Fixed-point decoding 115.4 Energy-Efficient Ethernet (EEE) <\/td>\n<\/tr>\n | ||||||
| 4745<\/td>\n | 115.4.1 LPI mode transmit operation 115.4.2 LPI mode receive operation <\/td>\n<\/tr>\n | ||||||
| 4746<\/td>\n | 115.4.3 PMD power control state variables 115.4.4 PMD power control state diagrams <\/td>\n<\/tr>\n | ||||||
| 4748<\/td>\n | 115.5 Test modes <\/td>\n<\/tr>\n | ||||||
| 4749<\/td>\n | 115.5.1 Test mode 1 115.5.2 Test mode 2 115.5.3 Test mode 3 115.5.4 Test mode 4 115.5.5 Test mode 5 115.5.6 Test mode 6 <\/td>\n<\/tr>\n | ||||||
| 4751<\/td>\n | 115.6 Physical Medium Dependent (PMD) sublayer 115.6.1 PMD service interface 115.6.1.1 PMD_COMSIGNAL.request 115.6.1.1.1 Semantics of the primitive 115.6.1.1.2 When generated 115.6.1.1.3 Effect of receipt 115.6.1.2 PMD_COMSIGNAL.indication 115.6.1.2.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 4752<\/td>\n | 115.6.1.2.2 When generated 115.6.1.2.3 Effect of receipt 115.6.1.3 PMD_TXPWR.request 115.6.1.3.1 Semantics of the primitive 115.6.1.3.2 When generated 115.6.1.3.3 Effect of receipt 115.6.1.4 PMD_RXPWR.request 115.6.1.4.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 4753<\/td>\n | 115.6.1.4.2 When generated 115.6.1.4.3 Effect of receipt 115.6.1.5 PMD_RXDETECT.indication 115.6.1.5.1 Semantics of the primitive 115.6.1.5.2 When generated 115.6.1.5.3 Effect of receipt 115.6.1.6 PMD_SDINH.request <\/td>\n<\/tr>\n | ||||||
| 4754<\/td>\n | 115.6.1.6.1 Semantics of the primitive 115.6.1.6.2 When generated 115.6.1.6.3 Effect of receipt 115.6.2 PMD functional specifications 115.6.2.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4755<\/td>\n | 115.6.2.2 PMD transmit function 115.6.2.3 PMD receive function 115.6.2.4 PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 4756<\/td>\n | 115.6.3 PMD to MDI optical specifications 115.6.3.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 4758<\/td>\n | 115.6.3.2 Transmit clock frequency 115.6.3.3 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 4759<\/td>\n | 115.6.3.4 Receiver boundary condition tests 115.6.3.4.1 Receiver minimum AOP test 115.6.3.4.2 Receiver maximum AOP test <\/td>\n<\/tr>\n | ||||||
| 4760<\/td>\n | 115.6.4 Optical measurement requirements 115.6.4.1 Center wavelength measurement 115.6.4.2 Spectral width measurement <\/td>\n<\/tr>\n | ||||||
| 4761<\/td>\n | 115.6.4.3 Average Optical Power (AOP) measurement 115.6.4.4 Transmitter rise and fall time measurements 115.6.4.5 Transmitter extinction ratio (ER) measurement 115.6.4.6 Transmitter overshoot measurements <\/td>\n<\/tr>\n | ||||||
| 4762<\/td>\n | 115.6.4.7 Transmitter output droop measurements 115.6.4.8 Transmitter distortion measurement <\/td>\n<\/tr>\n | ||||||
| 4765<\/td>\n | 115.6.4.9 Transmitter timing jitter measurement <\/td>\n<\/tr>\n | ||||||
| 4766<\/td>\n | 115.6.4.10 Transmitter relative intensity noise (RIN) measurement 115.6.4.11 Transmitter modal power distribution measurement 115.7 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 4768<\/td>\n | 115.7.1 Transfer function of fiber optic channel type I <\/td>\n<\/tr>\n | ||||||
| 4769<\/td>\n | 115.7.2 Transfer function of fiber optic channel type II <\/td>\n<\/tr>\n | ||||||
| 4770<\/td>\n | 115.7.3 Transfer function of fiber optic channel type III <\/td>\n<\/tr>\n | ||||||
| 4771<\/td>\n | 115.7.4 Fiber optic channel insertion loss measurement 115.7.5 Fiber optic channel transfer function measurement 115.7.6 Worst-case 1000BASE-RHx link power budget 115.8 Medium Dependent Interface (MDI) 115.8.1 MDI mechanical interface for 1000BASE-RHA <\/td>\n<\/tr>\n | ||||||
| 4773<\/td>\n | 115.9 1000BASE-H Operations, Administration, and Maintenance (1000BASE-H OAM) channel 115.9.1 1000BASE-H OAM message transmission protocol <\/td>\n<\/tr>\n | ||||||
| 4774<\/td>\n | 115.9.2 1000BASE-H OAM channel status <\/td>\n<\/tr>\n | ||||||
| 4775<\/td>\n | 115.9.3 1000BASE-H OAM message reception protocol <\/td>\n<\/tr>\n | ||||||
| 4776<\/td>\n | 115.9.4 1000BASE-H OAM channel state diagrams descriptions 115.9.4.1 1000BASE-H OAM control state variables <\/td>\n<\/tr>\n | ||||||
| 4778<\/td>\n | 115.9.4.2 1000BASE-H OAM transmit control state diagram 115.9.4.3 1000BASE-H OAM receive control state diagram <\/td>\n<\/tr>\n | ||||||
| 4781<\/td>\n | 115.10 Loopback modes 115.11 Management interface 115.12 Environmental specifications 115.12.1 Temperature classes <\/td>\n<\/tr>\n | ||||||
| 4782<\/td>\n | 115.12.2 General safety 115.12.3 Environmental safety <\/td>\n<\/tr>\n | ||||||
| 4783<\/td>\n | 115.12.4 Electromagnetic compatibility 115.12.5 Optical safety 115.13 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4784<\/td>\n | 115.14 Protocol implementation conformance statement (PICS) proforma for Clause 115, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and Physical Medium Dependent (PMD) sublayer, types 1000BASE-RHA, 1000BASE-RHB, and 1000BA… 115.14.1 Introduction 115.14.2 Identification 115.14.2.1 Implementation identification 115.14.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4785<\/td>\n | 115.14.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4786<\/td>\n | 115.14.4 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 4788<\/td>\n | 115.14.5 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 4790<\/td>\n | 115.14.6 Energy-Efficient Ethernet (EEE) <\/td>\n<\/tr>\n | ||||||
| 4791<\/td>\n | 115.14.7 Test modes <\/td>\n<\/tr>\n | ||||||
| 4792<\/td>\n | 115.14.8 Physical Medium Dependent (PMD) <\/td>\n<\/tr>\n | ||||||
| 4793<\/td>\n | 115.14.9 PMD to MDI optical specifications <\/td>\n<\/tr>\n | ||||||
| 4794<\/td>\n | 115.14.10 Optical measurement requirements <\/td>\n<\/tr>\n | ||||||
| 4795<\/td>\n | 115.14.11 Characteristics of the fiber optic cabling (channel) 115.14.12 Medium dependent interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 4796<\/td>\n | 115.14.13 1000BASE-H Operations, Administration, and Maintenance (1000BASE-H OAM) channel <\/td>\n<\/tr>\n | ||||||
| 4797<\/td>\n | 115.14.14 Loopback modes 115.14.15 Management Interface 115.14.16 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 4798<\/td>\n | 115.14.17 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4799<\/td>\n | 116. Introduction to 200 Gb\/s and 400 Gb\/s networks 116.1 Overview 116.1.1 Scope 116.1.2 Relationship of 200 Gigabit and 400 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 4800<\/td>\n | 116.1.3 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 4802<\/td>\n | 116.1.4 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 4803<\/td>\n | 116.2 Summary of 200 Gigabit and 400 Gigabit Ethernet sublayers 116.2.1 Reconciliation Sublayer (RS) and Media Independent Interface 116.2.2 200GMII and 400GMII Extender Sublayers (200GXS and 400GXS) <\/td>\n<\/tr>\n | ||||||
| 4804<\/td>\n | 116.2.3 Physical Coding Sublayer (PCS) 116.2.4 Physical Medium Attachment (PMA) sublayer 116.2.5 Physical Medium Dependent (PMD) sublayer 116.2.6 Management interface (MDIO\/MDC) 116.2.7 Management 116.3 Service interface specification method and notation <\/td>\n<\/tr>\n | ||||||
| 4805<\/td>\n | 116.3.1 Inter-sublayer service interface 116.3.2 Instances of the Inter-sublayer service interface 116.3.3 Semantics of inter-sublayer service interface primitives 116.3.3.1 IS_UNITDATA_i.request <\/td>\n<\/tr>\n | ||||||
| 4806<\/td>\n | 116.3.3.1.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 4807<\/td>\n | 116.3.3.1.2 When generated 116.3.3.1.3 Effect of receipt 116.3.3.2 IS_UNITDATA_i.indication <\/td>\n<\/tr>\n | ||||||
| 4808<\/td>\n | 116.3.3.2.1 Semantics of the service primitive 116.3.3.2.2 When generated 116.3.3.2.3 Effect of receipt 116.3.3.3 IS_SIGNAL.indication 116.3.3.3.1 Semantics of the service primitive 116.3.3.3.2 When generated 116.3.3.3.3 Effect of receipt 116.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4810<\/td>\n | 116.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 4814<\/td>\n | 116.6 FEC Degrade <\/td>\n<\/tr>\n | ||||||
| 4815<\/td>\n | 116.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4816<\/td>\n | 116.8 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 4817<\/td>\n | 117. Reconciliation Sublayer (RS) and Media Independent Interface for 200 Gb\/s and 400 Gb\/s operation (200GMII and 400GMII) 117.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4818<\/td>\n | 117.1.1 Summary of major concepts 117.1.2 Application 117.1.3 Rate of operation 117.1.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4819<\/td>\n | 117.1.5 Allocation of functions 117.1.6 200GMII\/400GMII structure 117.1.7 Mapping of 200GMII\/400GMII signals to PLS service primitives 117.2 200GMII\/400GMII data stream 117.3 200GMII\/400GMII functional specifications 117.4 LPI Assertion and Detection <\/td>\n<\/tr>\n | ||||||
| 4820<\/td>\n | 117.5 Protocol implementation conformance statement (PICS) proforma for Clause 117, Reconciliation Sublayer (RS) and Media Independent Interface for 200 Gb\/s and 400 Gb\/s operation (200GMII and 400GMII) 117.5.1 Introduction 117.5.2 Identification 117.5.2.1 Implementation identification 117.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4821<\/td>\n | 117.5.3 Major capabilities\/options 117.5.4 PICS proforma tables for Reconciliation Sublayer (RS) and Media Independent Interface for 200 Gb\/s and 400 Gb\/s operation (200GMII and 400GMII) 117.5.4.1 General 117.5.4.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 4822<\/td>\n | 117.5.4.3 Data stream structure 117.5.4.4 200GMII\/400GMII signal functional specifications <\/td>\n<\/tr>\n | ||||||
| 4823<\/td>\n | 117.5.4.5 Link fault signaling state diagram 117.5.4.6 LPI functions <\/td>\n<\/tr>\n | ||||||
| 4824<\/td>\n | 118. 200GMII Extender, 400GMII Extender, 200GMII Extender Sublayer (200GXS), and 400GMII Extender Sublayer (400GXS) 118.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4825<\/td>\n | 118.1.1 Summary of major concepts 118.1.2 200GXS\/400GXS Sublayer 118.1.3 200GAUI-n\/400GAUI-n 118.2 FEC Degrade 118.2.1 DTE XS FEC Degrade signaling <\/td>\n<\/tr>\n | ||||||
| 4826<\/td>\n | 118.2.2 PHY XS FEC Degrade signaling 118.3 200GXS and 400GXS partitioning example 118.4 200GXS and 400GXS MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4830<\/td>\n | 118.5 Protocol implementation conformance statement (PICS) proforma for Clause 118, 200GMII Extender, 400GMII Extender, 200GMII Extender Sublayer (200GXS), and 400GMII Extender Sublayer (400GXS) 118.5.1 Introduction 118.5.2 Identification 118.5.2.1 Implementation identification 118.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4831<\/td>\n | 118.5.3 Major capabilities\/options 118.5.4 PICS proforma tables for 200GMII Extender, 400GMII Extender, 200GMII Extender Sublayer (200GXS), and 400GMII Extender Sublayer (400GXS) 118.5.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 4832<\/td>\n | 118.5.4.2 Receive function 118.5.4.3 64B\/66B coding rules <\/td>\n<\/tr>\n | ||||||
| 4833<\/td>\n | 118.5.4.4 Scrambler and descrambler 118.5.4.5 Alignment markers 118.5.5 Test-pattern modes 118.5.6 Bit order <\/td>\n<\/tr>\n | ||||||
| 4834<\/td>\n | 118.5.7 Management 118.5.7.1 State diagrams 118.5.7.2 Loopback <\/td>\n<\/tr>\n | ||||||
| 4835<\/td>\n | 118.5.7.3 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4836<\/td>\n | 119. Physical Coding Sublayer (PCS) for 64B\/66B, type 200GBASE-R and 400GBASE-R 119.1 Overview 119.1.1 Scope 119.1.2 Relationship of 200GBASE-R and 400GBASE-R to other standards 119.1.3 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 4837<\/td>\n | 119.1.4 Inter-sublayer interfaces 119.1.4.1 PCS service interface (200GMII\/400GMII) 119.1.4.2 Physical Medium Attachment (PMA) service interface <\/td>\n<\/tr>\n | ||||||
| 4838<\/td>\n | 119.1.5 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 4839<\/td>\n | 119.2 Physical Coding Sublayer (PCS) 119.2.1 Functions within the PCS 119.2.2 Use of blocks <\/td>\n<\/tr>\n | ||||||
| 4840<\/td>\n | 119.2.3 64B\/66B code 119.2.3.1 Notation conventions 119.2.3.2 64B\/66B block structure 119.2.3.3 Control codes <\/td>\n<\/tr>\n | ||||||
| 4841<\/td>\n | 119.2.3.4 Valid and invalid blocks 119.2.3.5 Idle (\/I\/) 119.2.3.6 Start (\/S\/) 119.2.3.7 Terminate (\/T\/) 119.2.3.8 Ordered set (\/O\/) 119.2.3.9 Error (\/E\/) 119.2.4 Transmit 119.2.4.1 Encode and rate matching <\/td>\n<\/tr>\n | ||||||
| 4842<\/td>\n | 119.2.4.2 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n | ||||||
| 4844<\/td>\n | 119.2.4.3 Scrambler 119.2.4.4 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 4845<\/td>\n | 119.2.4.4.1 AM creation for the 200GBASE-R PCS <\/td>\n<\/tr>\n | ||||||
| 4847<\/td>\n | 119.2.4.4.2 AM creation for the 400GBASE-R PCS <\/td>\n<\/tr>\n | ||||||
| 4849<\/td>\n | 119.2.4.5 Pre-FEC distribution 119.2.4.6 Reed-Solomon encoder <\/td>\n<\/tr>\n | ||||||
| 4851<\/td>\n | 119.2.4.7 Symbol distribution <\/td>\n<\/tr>\n | ||||||
| 4852<\/td>\n | 119.2.4.8 Transmit bit ordering and distribution <\/td>\n<\/tr>\n | ||||||
| 4854<\/td>\n | 119.2.4.9 Test-pattern generators 119.2.5 Receive function 119.2.5.1 Alignment lock and deskew 119.2.5.2 Lane reorder and de-interleave 119.2.5.3 Reed-Solomon decoder <\/td>\n<\/tr>\n | ||||||
| 4855<\/td>\n | 119.2.5.4 Post FEC interleave 119.2.5.5 Alignment marker removal 119.2.5.6 Descrambler <\/td>\n<\/tr>\n | ||||||
| 4856<\/td>\n | 119.2.5.7 256B\/257B to 64B\/66B transcoder 119.2.5.8 Decode and rate matching <\/td>\n<\/tr>\n | ||||||
| 4857<\/td>\n | 119.2.6 Detailed functions and state diagrams 119.2.6.1 State diagram conventions 119.2.6.2 State variables 119.2.6.2.1 Constants 119.2.6.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 4859<\/td>\n | 119.2.6.2.3 Functions <\/td>\n<\/tr>\n | ||||||
| 4861<\/td>\n | 119.2.6.2.4 Counters 119.2.6.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4866<\/td>\n | 119.3 PCS management 119.3.1 PCS MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4867<\/td>\n | 119.3.2 FEC_corrected_cw_counter 119.3.3 FEC_uncorrected_cw_counter 119.3.4 FEC_symbol_error_counter_i 119.4 Loopback <\/td>\n<\/tr>\n | ||||||
| 4868<\/td>\n | 119.5 Delay constraints 119.6 Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 4869<\/td>\n | 119.7 Protocol implementation conformance statement (PICS) proforma for Clause 119, Physical Coding Sublayer (PCS) for 64B\/66B, type 200GBASE-R and 400GBASE-R 119.7.1 Introduction 119.7.2 Identification 119.7.2.1 Implementation identification 119.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4870<\/td>\n | 119.7.3 Major capabilities\/options 119.7.4 PICS proforma tables for Physical Coding Sublayer (PCS) 64B\/66B, type 200GBASE-R and 400GBASE-R 119.7.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 4871<\/td>\n | 119.7.4.2 Receive function 119.7.4.3 64B\/66B coding rules <\/td>\n<\/tr>\n | ||||||
| 4872<\/td>\n | 119.7.4.4 Scrambler and descrambler 119.7.4.5 Alignment markers 119.7.4.6 Test-pattern modes <\/td>\n<\/tr>\n | ||||||
| 4873<\/td>\n | 119.7.4.7 Bit order 119.7.4.8 Management 119.7.4.9 State diagrams <\/td>\n<\/tr>\n | ||||||
| 4874<\/td>\n | 119.7.4.10 Loopback 119.7.4.11 Delay constraints 119.7.4.12 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n | ||||||
| 4875<\/td>\n | 120. Physical Medium Attachment (PMA) sublayer, type 200GBASE-R and 400GBASE-R 120.1 Overview 120.1.1 Scope 120.1.2 Position of the PMA in the 200GBASE-R and 400GBASE-R sublayers 120.1.3 Summary of functions <\/td>\n<\/tr>\n | ||||||
| 4876<\/td>\n | 120.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n | ||||||
| 4878<\/td>\n | 120.2 PMA interfaces 120.3 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 4881<\/td>\n | 120.4 Service interface below PMA <\/td>\n<\/tr>\n | ||||||
| 4882<\/td>\n | 120.5 Functions within the PMA 120.5.1 Per input-lane clock and data recovery 120.5.2 Bit-level multiplexing <\/td>\n<\/tr>\n | ||||||
| 4883<\/td>\n | 120.5.3 Skew and Skew Variation 120.5.3.1 Skew generation toward SP1 120.5.3.2 Skew tolerance at SP1 120.5.3.3 Skew generation toward SP2 <\/td>\n<\/tr>\n | ||||||
| 4885<\/td>\n | 120.5.3.4 Skew tolerance at SP5 120.5.3.5 Skew generation at SP6 120.5.3.6 Skew tolerance at SP6 120.5.4 Delay constraints 120.5.5 Clocking architecture <\/td>\n<\/tr>\n | ||||||
| 4886<\/td>\n | 120.5.6 Signal drivers 120.5.7 PAM4 Encoding 120.5.7.1 Gray mapping for PAM4 encoded lanes <\/td>\n<\/tr>\n | ||||||
| 4887<\/td>\n | 120.5.7.2 Precoding for PAM4 encoded lanes 120.5.8 Link status 120.5.9 PMA local loopback mode (optional) <\/td>\n<\/tr>\n | ||||||
| 4888<\/td>\n | 120.5.10 PMA remote loopback mode (optional) 120.5.11 PMA test patterns (optional) 120.5.11.1 Test patterns for NRZ encoded signals 120.5.11.1.1 PRBS31 test pattern <\/td>\n<\/tr>\n | ||||||
| 4889<\/td>\n | 120.5.11.1.2 PRBS9 test pattern <\/td>\n<\/tr>\n | ||||||
| 4890<\/td>\n | 120.5.11.1.3 Square wave test pattern 120.5.11.2 Test patterns for PAM4 encoded signals 120.5.11.2.1 PRBS13Q test pattern <\/td>\n<\/tr>\n | ||||||
| 4891<\/td>\n | 120.5.11.2.2 PRBS31Q test pattern <\/td>\n<\/tr>\n | ||||||
| 4892<\/td>\n | 120.5.11.2.3 SSPRQ test pattern <\/td>\n<\/tr>\n | ||||||
| 4893<\/td>\n | 120.5.11.2.4 Square wave (quaternary) test pattern <\/td>\n<\/tr>\n | ||||||
| 4894<\/td>\n | 120.6 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4899<\/td>\n | 120.7 Protocol implementation conformance statement (PICS) proforma for Clause 120, Physical Medium Attachment (PMA) sublayer, type 200GBASE-R and 400GBASE-R 120.7.1 Introduction 120.7.2 Identification 120.7.2.1 Implementation identification 120.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4900<\/td>\n | 120.7.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4902<\/td>\n | 120.7.4 Skew generation and tolerance 120.7.5 Test patterns <\/td>\n<\/tr>\n | ||||||
| 4903<\/td>\n | 120.7.6 Loopback modes <\/td>\n<\/tr>\n | ||||||
| 4904<\/td>\n | 120.7.7 Encoding <\/td>\n<\/tr>\n | ||||||
| 4905<\/td>\n | 121. Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-DR4 121.1 Overview 121.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 4906<\/td>\n | 121.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 4907<\/td>\n | 121.3 Delay and Skew 121.3.1 Delay constraints 121.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 4908<\/td>\n | 121.4 PMD MDIO function mapping 121.5 PMD functional specifications 121.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4909<\/td>\n | 121.5.2 PMD transmit function 121.5.3 PMD receive function 121.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 4910<\/td>\n | 121.5.5 PMD lane-by-lane signal detect function 121.5.6 PMD reset function 121.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 4911<\/td>\n | 121.5.8 PMD lane-by-lane transmit disable function (optional) 121.5.9 PMD fault function (optional) 121.5.10 PMD transmit fault function (optional) 121.5.11 PMD receive fault function (optional) 121.6 Lane assignments 121.7 PMD to MDI optical specifications for 200GBASE-DR4 <\/td>\n<\/tr>\n | ||||||
| 4912<\/td>\n | 121.7.1 200GBASE-DR4 transmitter optical specifications 121.7.2 200GBASE-DR4 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 4913<\/td>\n | 121.7.3 200GBASE-DR4 illustrative link power budget <\/td>\n<\/tr>\n | ||||||
| 4914<\/td>\n | 121.8 Definition of optical parameters and measurement methods 121.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 4915<\/td>\n | 121.8.2 Wavelength and side mode suppression ratio (SMSR) 121.8.3 Average optical power 121.8.4 Outer Optical Modulation Amplitude (OMAouter) 121.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 121.8.5.1 TDECQ conformance test setup <\/td>\n<\/tr>\n | ||||||
| 4916<\/td>\n | 121.8.5.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 4917<\/td>\n | 121.8.5.3 TDECQ measurement method <\/td>\n<\/tr>\n | ||||||
| 4921<\/td>\n | 121.8.5.4 TDECQ reference equalizer 121.8.6 Extinction ratio 121.8.7 Transmitter transition time 121.8.8 Relative intensity noise (RIN21.4OMA) <\/td>\n<\/tr>\n | ||||||
| 4922<\/td>\n | 121.8.9 Receiver sensitivity 121.8.10 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 4923<\/td>\n | 121.8.10.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 4924<\/td>\n | 121.8.10.2 Stressed receiver conformance test signal characteristics and calibration 121.8.10.3 Stressed receiver conformance test signal verification <\/td>\n<\/tr>\n | ||||||
| 4925<\/td>\n | 121.8.10.4 Sinusoidal jitter for receiver conformance test <\/td>\n<\/tr>\n | ||||||
| 4926<\/td>\n | 121.9 Safety, installation, environment, and labeling 121.9.1 General safety 121.9.2 Laser safety 121.9.3 Installation 121.9.4 Environment 121.9.5 Electromagnetic emission 121.9.6 Temperature, humidity, and handling <\/td>\n<\/tr>\n | ||||||
| 4927<\/td>\n | 121.9.7 PMD labeling requirements 121.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 4928<\/td>\n | 121.11 Characteristics of the fiber optic cabling (channel) 121.11.1 Optical fiber cable 121.11.2 Optical fiber connection 121.11.2.1 Connection insertion loss 121.11.2.2 Maximum discrete reflectance 121.11.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 4929<\/td>\n | 121.11.3.1 Optical lane assignments 121.11.3.2 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 4931<\/td>\n | 121.12 Protocol implementation conformance statement (PICS) proforma for Clause 121, Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-DR4 121.12.1 Introduction 121.12.2 Identification 121.12.2.1 Implementation identification 121.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4932<\/td>\n | 121.12.3 Major capabilities\/options 121.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-DR4 121.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4933<\/td>\n | 121.12.4.2 Management functions 121.12.4.3 PMD to MDI optical specifications for 200GBASE-DR4 <\/td>\n<\/tr>\n | ||||||
| 4934<\/td>\n | 121.12.4.4 Optical measurement methods 121.12.4.5 Environmental specifications 121.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 4935<\/td>\n | 122. Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 122.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4936<\/td>\n | 122.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 4937<\/td>\n | 122.2 Physical Medium Dependent (PMD) service interface 122.3 Delay and Skew 122.3.1 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 4938<\/td>\n | 122.3.2 Skew constraints 122.4 PMD MDIO function mapping 122.5 PMD functional specifications 122.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4940<\/td>\n | 122.5.2 PMD transmit function 122.5.3 PMD receive function 122.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 4941<\/td>\n | 122.5.5 PMD lane-by-lane signal detect function 122.5.6 PMD reset function 122.5.7 PMD global transmit disable function (optional) 122.5.8 PMD lane-by-lane transmit disable function 122.5.9 PMD fault function (optional) 122.5.10 PMD transmit fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 4942<\/td>\n | 122.5.11 PMD receive fault function (optional) 122.6 Wavelength-division-multiplexed lane assignments <\/td>\n<\/tr>\n | ||||||
| 4943<\/td>\n | 122.7 PMD to MDI optical specifications for 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 <\/td>\n<\/tr>\n | ||||||
| 4944<\/td>\n | 122.7.1 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 4947<\/td>\n | 122.7.2 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 4949<\/td>\n | 122.7.3 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 illustrative link power budgets 122.8 Definition of optical parameters and measurement methods 122.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 4950<\/td>\n | 122.8.2 Wavelength and side mode suppression ratio (SMSR) 122.8.3 Average optical power <\/td>\n<\/tr>\n | ||||||
| 4951<\/td>\n | 122.8.4 Outer Optical Modulation Amplitude (OMAouter) 122.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 122.8.5.1 TDECQ conformance test setup <\/td>\n<\/tr>\n | ||||||
| 4952<\/td>\n | 122.8.5.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 4953<\/td>\n | 122.8.5.3 TDECQ measurement method 122.8.5.4 TDECQ reference equalizer 122.8.6 Extinction ratio <\/td>\n<\/tr>\n | ||||||
| 4954<\/td>\n | 122.8.7 Transmitter transition time 122.8.8 Relative intensity noise (RIN17.1OMA, RIN15.6OMA, and RIN15OMA) 122.8.9 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 4956<\/td>\n | 122.8.10 Stressed receiver sensitivity 122.8.10.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 4957<\/td>\n | 122.8.10.2 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 4958<\/td>\n | 122.8.10.3 Stressed receiver conformance test signal verification 122.9 Safety, installation, environment, and labeling 122.9.1 General safety 122.9.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 4959<\/td>\n | 122.9.3 Installation 122.9.4 Environment 122.9.5 Electromagnetic emission 122.9.6 Temperature, humidity, and handling 122.9.7 PMD labeling requirements 122.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 4960<\/td>\n | 122.11 Characteristics of the fiber optic cabling (channel) 122.11.1 Optical fiber cable 122.11.2 Optical fiber connection <\/td>\n<\/tr>\n | ||||||
| 4961<\/td>\n | 122.11.2.1 Connection insertion loss 122.11.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 4962<\/td>\n | 122.11.3 Medium Dependent Interface (MDI) requirements 122.12 Requirements for interoperation between 200GBASE-ER4 and 200GBASE-LR4 122.13 Requirements for interoperation between 400GBASE-ER8 and 400GBASE-FR8 <\/td>\n<\/tr>\n | ||||||
| 4963<\/td>\n | 122.14 Requirements for interoperation between 400GBASE-ER8 and 400GBASE-LR8 <\/td>\n<\/tr>\n | ||||||
| 4964<\/td>\n | 122.15 Protocol implementation conformance statement (PICS) proforma for Clause 122, Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 122.15.1 Introduction 122.15.2 Identification 122.15.2.1 Implementation identification 122.15.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4965<\/td>\n | 122.15.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 4966<\/td>\n | 122.15.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 200GBASE-FR4, 200GBASE-LR4, 200GBASE-ER4, 400GBASE-FR8, 400GBASE-LR8, and 400GBASE-ER8 122.15.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4967<\/td>\n | 122.15.4.2 Management functions 122.15.4.3 PMD to MDI optical specifications for 200GBASE-FR4 122.15.4.4 PMD to MDI optical specifications for 200GBASE-LR4 <\/td>\n<\/tr>\n | ||||||
| 4968<\/td>\n | 122.15.4.5 PMD to MDI optical specifications for 200GBASE-ER4 122.15.4.6 PMD to MDI optical specifications for 400GBASE-FR8 122.15.4.7 PMD to MDI optical specifications for 400GBASE-LR8 122.15.4.8 PMD to MDI optical specifications for 400GBASE-ER8 <\/td>\n<\/tr>\n | ||||||
| 4969<\/td>\n | 122.15.4.9 Optical measurement methods 122.15.4.10 Environmental specifications 122.15.4.11 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 4970<\/td>\n | 123. Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR16 123.1 Overview <\/td>\n<\/tr>\n | ||||||
| 4971<\/td>\n | 123.1.1 Bit error ratio 123.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 4972<\/td>\n | 123.3 Delay and Skew 123.3.1 Delay constraints 123.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 4973<\/td>\n | 123.4 PMD MDIO function mapping 123.5 PMD functional specifications 123.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4974<\/td>\n | 123.5.2 PMD transmit function 123.5.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 4975<\/td>\n | 123.5.4 PMD global signal detect function 123.5.5 PMD lane-by-lane signal detect function 123.5.6 PMD reset function <\/td>\n<\/tr>\n | ||||||
| 4976<\/td>\n | 123.5.7 PMD global transmit disable function (optional) 123.5.8 PMD lane-by-lane transmit disable function (optional) 123.5.9 PMD fault function (optional) 123.5.10 PMD transmit fault function (optional) 123.5.11 PMD receive fault function (optional) 123.6 Lane assignments <\/td>\n<\/tr>\n | ||||||
| 4977<\/td>\n | 123.7 PMD to MDI optical specifications for 400GBASE-SR16 123.7.1 400GBASE-SR16 transmitter optical specifications 123.7.2 400GBASE-SR16 receive optical specifications 123.7.3 400GBASE-SR16 illustrative link power budget 123.8 Definition of optical parameters and measurement methods 123.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 4978<\/td>\n | 123.8.2 Center wavelength and spectral width 123.8.3 Average optical power 123.8.4 Optical Modulation Amplitude (OMA) 123.8.5 Transmitter and dispersion eye closure (TDEC) 123.8.6 Extinction ratio 123.8.7 Transmitter optical waveform (transmit eye) 123.8.8 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 4979<\/td>\n | 123.9 Safety, installation, environment, and labeling 123.9.1 General safety 123.9.2 Laser safety 123.9.3 Installation 123.9.4 Environment 123.9.5 Electromagnetic emission 123.9.6 Temperature, humidity, and handling <\/td>\n<\/tr>\n | ||||||
| 4980<\/td>\n | 123.9.7 PMD labeling requirements 123.10 Fiber optic cabling model 123.11 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 4981<\/td>\n | 123.11.1 Optical fiber cable 123.11.2 Optical fiber connection 123.11.2.1 Connection insertion loss 123.11.2.2 Maximum discrete reflectance 123.11.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 4982<\/td>\n | 123.11.3.1 Optical lane assignments 123.11.3.2 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 4983<\/td>\n | 123.12 Protocol implementation conformance statement (PICS) proforma for Clause 123, Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR16 123.12.1 Introduction 123.12.2 Identification 123.12.2.1 Implementation identification 123.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 4984<\/td>\n | 123.12.3 Major capabilities\/options 123.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR16 123.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 4985<\/td>\n | 123.12.4.2 Management functions 123.12.4.3 PMD to MDI optical specifications for 400GBASE-SR16 <\/td>\n<\/tr>\n | ||||||
| 4986<\/td>\n | 123.12.4.4 Optical measurement methods 123.12.4.5 Environmental specifications 123.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 4988<\/td>\n | 124. Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-DR4 124.1 Overview 124.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 4989<\/td>\n | 124.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 4990<\/td>\n | 124.3 Delay and Skew 124.3.1 Delay constraints 124.3.2 Skew constraints 124.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 4991<\/td>\n | 124.5 PMD functional specifications 124.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 4992<\/td>\n | 124.5.2 PMD transmit function 124.5.3 PMD receive function 124.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 4993<\/td>\n | 124.5.5 PMD lane-by-lane signal detect function 124.5.6 PMD reset function 124.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 4994<\/td>\n | 124.5.8 PMD lane-by-lane transmit disable function (optional) 124.5.9 PMD fault function (optional) 124.5.10 PMD transmit fault function (optional) 124.5.11 PMD receive fault function (optional) 124.6 Lane assignments 124.7 PMD to MDI optical specifications for 400GBASE-DR4 <\/td>\n<\/tr>\n | ||||||
| 4995<\/td>\n | 124.7.1 400GBASE-DR4 transmitter optical specifications 124.7.2 400GBASE-DR4 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 4996<\/td>\n | 124.7.3 400GBASE-DR4 illustrative link power budget <\/td>\n<\/tr>\n | ||||||
| 4997<\/td>\n | 124.8 Definition of optical parameters and measurement methods 124.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 4998<\/td>\n | 124.8.2 Wavelength and side mode suppression ratio (SMSR) 124.8.3 Average optical power 124.8.4 Outer Optical Modulation Amplitude (OMAouter) 124.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 124.8.6 Extinction ratio <\/td>\n<\/tr>\n | ||||||
| 4999<\/td>\n | 124.8.7 Transmitter transition time 124.8.8 Relative intensity noise (RIN21.4OMA) 124.8.9 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 5000<\/td>\n | 124.8.10 Stressed receiver sensitivity 124.9 Safety, installation, environment, and labeling 124.9.1 General safety <\/td>\n<\/tr>\n | ||||||
| 5001<\/td>\n | 124.9.2 Laser safety 124.9.3 Installation 124.9.4 Environment <\/td>\n<\/tr>\n | ||||||
| 5002<\/td>\n | 124.9.5 Electromagnetic emission 124.9.6 Temperature, humidity, and handling 124.9.7 PMD labeling requirements 124.10 Fiber optic cabling model 124.11 Characteristics of the fiber optic cabling (channel) 124.11.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 5003<\/td>\n | 124.11.2 Optical fiber connection 124.11.2.1 Connection insertion loss 124.11.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 5004<\/td>\n | 124.11.3 Medium Dependent Interface (MDI) 124.11.3.1 Optical lane assignments 124.11.3.2 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 5006<\/td>\n | 124.12 Protocol implementation conformance statement (PICS) proforma for Clause 124, Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-DR4 124.12.1 Introduction 124.12.2 Identification 124.12.2.1 Implementation identification 124.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5007<\/td>\n | 124.12.3 Major capabilities\/options 124.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-DR4 124.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5008<\/td>\n | 124.12.4.2 Management functions 124.12.4.3 PMD to MDI optical specifications for 400GBASE-DR4 <\/td>\n<\/tr>\n | ||||||
| 5009<\/td>\n | 124.12.4.4 Optical measurement methods 124.12.4.5 Environmental specifications 124.12.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 5010<\/td>\n | 125. Introduction to 2.5 Gb\/s and 5 Gb\/s networks 125.1 Overview 125.1.1 Scope 125.1.2 Relationship of 2.5 Gigabit and 5 Gigabit Ethernet to the ISO OSI reference model 125.1.3 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 5012<\/td>\n | 125.1.4 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 5013<\/td>\n | 125.2 Summary of 2.5 Gigabit and 5 Gigabit Ethernet sublayers 125.2.1 Reconciliation Sublayer (RS) and Media Independent Interface 125.2.2 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 5014<\/td>\n | 125.2.3 Physical Medium Attachment sublayer (PMA) 125.2.4 Auto-Negotiation 125.2.4.1 Auto-Negotiation, type BASE-T 125.2.4.2 Auto-Negotiation, type Backplane 125.2.4.3 Auto-Negotiation, type single differential-pair media 125.2.5 Management interface (MDIO\/MDC) 125.2.6 Management <\/td>\n<\/tr>\n | ||||||
| 5015<\/td>\n | 125.3 Delay Constraints <\/td>\n<\/tr>\n | ||||||
| 5016<\/td>\n | 126. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T 126.1 Overview 126.1.1 Nomenclature 126.1.2 Relationship of 2.5GBASE-T and 5GBASE-T to other standards <\/td>\n<\/tr>\n | ||||||
| 5017<\/td>\n | 126.1.3 Operation of 2.5GBASE-T and 5GBASE-T <\/td>\n<\/tr>\n | ||||||
| 5021<\/td>\n | 126.1.3.1 Summary of Physical Coding Sublayer (PCS) 126.1.3.2 Summary of Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 5022<\/td>\n | 126.1.3.3 Summary of EEE capability <\/td>\n<\/tr>\n | ||||||
| 5023<\/td>\n | 126.1.4 Signaling 126.1.5 Interfaces <\/td>\n<\/tr>\n | ||||||
| 5024<\/td>\n | 126.1.6 Conventions in this clause 126.2 2.5GBASE-T and 5GBASE-T service primitives and interfaces 126.2.1 Technology Dependent Interface 126.2.1.1 PMA_LINK.request 126.2.1.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5025<\/td>\n | 126.2.1.1.2 When generated 126.2.1.1.3 Effect of receipt 126.2.1.2 PMA_LINK.indication 126.2.1.2.1 Semantics of the primitive 126.2.1.2.2 When generated 126.2.1.2.3 Effect of receipt 126.2.2 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 5027<\/td>\n | 126.2.2.1 PMA_TXMODE.indication 126.2.2.1.1 Semantics of the primitive 126.2.2.1.2 When generated 126.2.2.1.3 Effect of receipt 126.2.2.2 PMA_CONFIG.indication 126.2.2.2.1 Semantics of the primitive 126.2.2.2.2 When generated <\/td>\n<\/tr>\n | ||||||
| 5028<\/td>\n | 126.2.2.2.3 Effect of receipt 126.2.2.3 PMA_UNITDATA.request 126.2.2.3.1 Semantics of the primitive 126.2.2.3.2 When generated 126.2.2.3.3 Effect of receipt 126.2.2.4 PMA_UNITDATA.indication <\/td>\n<\/tr>\n | ||||||
| 5029<\/td>\n | 126.2.2.4.1 Semantics of the primitive 126.2.2.4.2 When generated 126.2.2.4.3 Effect of receipt 126.2.2.5 PMA_SCRSTATUS.request 126.2.2.5.1 Semantics of the primitive 126.2.2.5.2 When generated 126.2.2.5.3 Effect of receipt 126.2.2.6 PMA_PCSSTATUS.request 126.2.2.6.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5030<\/td>\n | 126.2.2.6.2 When generated 126.2.2.6.3 Effect of receipt 126.2.2.7 PMA_RXSTATUS.indication 126.2.2.7.1 Semantics of the primitive 126.2.2.7.2 When generated 126.2.2.7.3 Effect of receipt 126.2.2.8 PMA_REMRXSTATUS.request 126.2.2.8.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5031<\/td>\n | 126.2.2.8.2 When generated 126.2.2.8.3 Effect of receipt 126.2.2.9 PMA_ALERTDETECT.indication 126.2.2.9.1 Semantics of the primitive 126.2.2.9.2 When generated 126.2.2.9.3 Effect of receipt 126.2.2.10 PCS_RX_LPI_STATUS.request 126.2.2.10.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5032<\/td>\n | 126.2.2.10.2 When generated 126.2.2.10.3 Effect of receipt 126.2.2.11 PMA_PCSDATAMODE.indication 126.2.2.11.1 Semantics of the primitive 126.2.2.11.2 When generated 126.2.2.11.3 Effect of receipt 126.2.2.12 PMA_FR_ACTIVE.indication 126.2.2.12.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5033<\/td>\n | 126.2.2.12.2 When generated 126.2.2.12.3 Effect of receipt 126.3 Physical Coding Sublayer (PCS) 126.3.1 PCS service interface (XGMII) 126.3.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 5034<\/td>\n | 126.3.2.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 5035<\/td>\n | 126.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 5036<\/td>\n | 126.3.2.2.1 Use of blocks 126.3.2.2.2 65B-LDPC transmission code 126.3.2.2.3 Notation conventions 126.3.2.2.4 Transmission order 126.3.2.2.5 Block structure <\/td>\n<\/tr>\n | ||||||
| 5039<\/td>\n | 126.3.2.2.6 Control codes 126.3.2.2.7 Ordered sets 126.3.2.2.8 Idle (\/I\/) <\/td>\n<\/tr>\n | ||||||
| 5041<\/td>\n | 126.3.2.2.9 LPI (\/LI\/) 126.3.2.2.10 Start (\/S\/) 126.3.2.2.11 Terminate (\/T\/) 126.3.2.2.12 ordered set (\/O\/) <\/td>\n<\/tr>\n | ||||||
| 5042<\/td>\n | 126.3.2.2.13 Error (\/E\/) 126.3.2.2.14 Transmit process 126.3.2.2.15 PCS Scrambler 126.3.2.2.16 LDPC framing and LDPC encoder <\/td>\n<\/tr>\n | ||||||
| 5043<\/td>\n | 126.3.2.2.17 Substitution for zero-bit fill 126.3.2.2.18 PAM16 bit mapping <\/td>\n<\/tr>\n | ||||||
| 5044<\/td>\n | 126.3.2.2.19 EEE capability <\/td>\n<\/tr>\n | ||||||
| 5045<\/td>\n | 126.3.2.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 5046<\/td>\n | 126.3.2.3.1 Frame and block synchronization <\/td>\n<\/tr>\n | ||||||
| 5047<\/td>\n | 126.3.2.3.2 PCS descrambler 126.3.2.3.3 Invalid blocks <\/td>\n<\/tr>\n | ||||||
| 5048<\/td>\n | 126.3.3 Test-pattern generators 126.3.4 PMA training side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 5049<\/td>\n | 126.3.4.1 Generation of bits San, Sbn, Scn, Sdn 126.3.4.2 Generation of 4D symbols TAn, TBn, TCn, TDn <\/td>\n<\/tr>\n | ||||||
| 5050<\/td>\n | 126.3.4.3 PMA training mode descrambler polynomials 126.3.5 LPI signaling <\/td>\n<\/tr>\n | ||||||
| 5051<\/td>\n | 126.3.5.1 LPI Synchronization <\/td>\n<\/tr>\n | ||||||
| 5052<\/td>\n | 126.3.5.2 Quiet period signaling 126.3.5.3 Refresh period signaling 126.3.6 Detailed functions and state diagrams 126.3.6.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 5053<\/td>\n | 126.3.6.2 State diagram parameters 126.3.6.2.1 Constants 126.3.6.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5055<\/td>\n | 126.3.6.2.3 Timers <\/td>\n<\/tr>\n | ||||||
| 5056<\/td>\n | 126.3.6.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5057<\/td>\n | 126.3.6.2.5 Counters <\/td>\n<\/tr>\n | ||||||
| 5058<\/td>\n | 126.3.6.3 State diagrams 126.3.7 PCS management 126.3.7.1 Status <\/td>\n<\/tr>\n | ||||||
| 5059<\/td>\n | 126.3.7.2 Counters <\/td>\n<\/tr>\n | ||||||
| 5066<\/td>\n | 126.3.7.3 Loopback 126.4 Physical Medium Attachment (PMA) sublayer 126.4.1 PMA functional specifications <\/td>\n<\/tr>\n | ||||||
| 5067<\/td>\n | 126.4.2 PMA functions 126.4.2.1 PMA Reset function 126.4.2.2 PMA Transmit function 126.4.2.2.1 Alert signal <\/td>\n<\/tr>\n | ||||||
| 5069<\/td>\n | 126.4.2.2.2 Link failure signal 126.4.2.3 PMA transmit disable function 126.4.2.3.1 Global PMA transmit disable function 126.4.2.3.2 PMA pair by pair transmit disable function 126.4.2.3.3 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5070<\/td>\n | 126.4.2.4 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 5071<\/td>\n | 126.4.2.5 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 5072<\/td>\n | 126.4.2.5.1 Infofield notation 126.4.2.5.2 Start of Frame Delimiter 126.4.2.5.3 Current transmitter settings <\/td>\n<\/tr>\n | ||||||
| 5073<\/td>\n | 126.4.2.5.4 Next transmitter settings 126.4.2.5.5 Requested transmitter settings 126.4.2.5.6 Message field <\/td>\n<\/tr>\n | ||||||
| 5074<\/td>\n | 126.4.2.5.7 SNR_margin <\/td>\n<\/tr>\n | ||||||
| 5075<\/td>\n | 126.4.2.5.8 Transition counter 126.4.2.5.9 Coefficient exchange handshake 126.4.2.5.10 Ability fields 126.4.2.5.11 Reserved fields 126.4.2.5.12 Vendor-specific field <\/td>\n<\/tr>\n | ||||||
| 5076<\/td>\n | 126.4.2.5.13 Coefficient field 126.4.2.5.14 CRC16 126.4.2.5.15 Startup sequence <\/td>\n<\/tr>\n | ||||||
| 5079<\/td>\n | 126.4.2.5.16 Fast retrain function <\/td>\n<\/tr>\n | ||||||
| 5080<\/td>\n | 126.4.2.6 Link Monitor function 126.4.2.7 Refresh Monitor function 126.4.2.8 Clock Recovery function 126.4.3 MDI 126.4.3.1 MDI signals transmitted by the PHY <\/td>\n<\/tr>\n | ||||||
| 5082<\/td>\n | 126.4.3.2 Signals received at the MDI 126.4.4 Automatic MDI\/MDI-X configuration <\/td>\n<\/tr>\n | ||||||
| 5083<\/td>\n | 126.4.5 State variables 126.4.5.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 5086<\/td>\n | 126.4.5.2 Timers <\/td>\n<\/tr>\n | ||||||
| 5087<\/td>\n | 126.4.5.3 Functions 126.4.5.4 Counters <\/td>\n<\/tr>\n | ||||||
| 5088<\/td>\n | 126.4.6 State diagrams 126.4.6.1 PHY Control state diagram <\/td>\n<\/tr>\n | ||||||
| 5089<\/td>\n | 126.4.6.2 Transition counter state diagrams <\/td>\n<\/tr>\n | ||||||
| 5091<\/td>\n | 126.4.6.3 Link Monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 5092<\/td>\n | 126.4.6.4 EEE Refresh monitor state diagram <\/td>\n<\/tr>\n | ||||||
| 5093<\/td>\n | 126.4.6.5 Fast retrain state diagram 126.5 PMA electrical specifications 126.5.1 Electrical isolation 126.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 5096<\/td>\n | 126.5.2.1 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 5097<\/td>\n | 126.5.3 Transmitter electrical specifications 126.5.3.1 Maximum output droop <\/td>\n<\/tr>\n | ||||||
| 5098<\/td>\n | 126.5.3.2 Transmitter nonlinear distortion 126.5.3.3 Transmitter timing jitter <\/td>\n<\/tr>\n | ||||||
| 5099<\/td>\n | 126.5.3.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 5100<\/td>\n | 126.5.3.5 Transmit clock frequency 126.5.4 Receiver electrical specifications 126.5.4.1 Receiver differential input signals 126.5.4.2 Receiver frequency tolerance <\/td>\n<\/tr>\n | ||||||
| 5101<\/td>\n | 126.5.4.3 Rejection of External EM Fields 126.5.4.4 Alien crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 5102<\/td>\n | 126.6 Management interfaces 126.6.1 Support for Auto-Negotiation 126.6.1.1 2.5GBASE-T and 5GBASE-T use of registers during Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 5103<\/td>\n | 126.6.1.2 2.5GBASE-T and 5GBASE-T Auto-Negotiation page use <\/td>\n<\/tr>\n | ||||||
| 5105<\/td>\n | 126.6.1.3 Sending Next Pages 126.6.2 MASTER-SLAVE configuration resolution <\/td>\n<\/tr>\n | ||||||
| 5107<\/td>\n | 126.7 Link segment characteristics <\/td>\n<\/tr>\n | ||||||
| 5108<\/td>\n | 126.7.1 Cabling system characteristics 126.7.2 Link segment transmission parameters <\/td>\n<\/tr>\n | ||||||
| 5109<\/td>\n | 126.7.2.1 Insertion loss 126.7.2.2 Differential characteristic impedance 126.7.2.3 Return loss <\/td>\n<\/tr>\n | ||||||
| 5110<\/td>\n | 126.7.2.4 Coupling parameters between duplex channels comprising one link segment 126.7.2.4.1 Differential near-end crosstalk 126.7.2.4.2 Multiple disturber near-end crosstalk (MDNEXT) loss <\/td>\n<\/tr>\n | ||||||
| 5111<\/td>\n | 126.7.2.4.3 Multiple disturber power sum near-end crosstalk (PSNEXT) loss 126.7.2.4.4 Attenuation to crosstalk ratio, far-end (ACRF) <\/td>\n<\/tr>\n | ||||||
| 5112<\/td>\n | 126.7.2.4.5 Multiple disturber attenuation to crosstalk ratio, far-end (MDACRF) <\/td>\n<\/tr>\n | ||||||
| 5113<\/td>\n | 126.7.2.4.6 Multiple disturber power sum attenuation to crosstalk ratio, far-end (PS ACRF) 126.7.2.5 Maximum link delay 126.7.2.6 Link delay skew 126.7.3 Coupling parameters between link segments 126.7.3.1 Alien crosstalk limited signal-to-noise ratio criteria <\/td>\n<\/tr>\n | ||||||
| 5119<\/td>\n | 126.8 MDI specification 126.8.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 5120<\/td>\n | 126.8.2 MDI electrical specifications 126.8.2.1 MDI FEXT 126.8.2.2 MDI return loss 126.8.2.3 MDI impedance balance <\/td>\n<\/tr>\n | ||||||
| 5121<\/td>\n | 126.8.2.4 MDI fault tolerance 126.9 Environmental specifications 126.9.1 General safety <\/td>\n<\/tr>\n | ||||||
| 5122<\/td>\n | 126.9.2 Network safety 126.9.3 Installation and maintenance guidelines 126.9.4 Telephone voltages 126.9.5 Electromagnetic compatibility <\/td>\n<\/tr>\n | ||||||
| 5123<\/td>\n | 126.9.6 Temperature and humidity 126.10 PHY labeling 126.11 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5124<\/td>\n | 126.12 Protocol implementation conformance statement (PICS) proforma for Clause 126\u2014Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, types 2.5GBASE-T and 5GBASE-T 126.12.1 Identification 126.12.1.1 Implementation identification 126.12.1.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5125<\/td>\n | 126.12.2 Major capabilities\/options 126.12.3 Physical Coding Sublayer (PCS) 126.12.3.1 PCS Transmit functions <\/td>\n<\/tr>\n | ||||||
| 5128<\/td>\n | 126.12.3.2 PCS Receive functions 126.12.3.3 Other PCS functions 126.12.4 Physical Medium Attachment (PMA) <\/td>\n<\/tr>\n | ||||||
| 5130<\/td>\n | 126.12.5 PMA Electrical Specifications <\/td>\n<\/tr>\n | ||||||
| 5131<\/td>\n | 126.12.6 PMA Management Interface <\/td>\n<\/tr>\n | ||||||
| 5132<\/td>\n | 126.12.7 Characteristics of the link segment <\/td>\n<\/tr>\n | ||||||
| 5133<\/td>\n | 126.12.8 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 5134<\/td>\n | 126.12.9 General safety and environmental requirements 126.12.10 Timing requirements <\/td>\n<\/tr>\n | ||||||
| 5135<\/td>\n | 127. Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer for 2.5 Gb\/s 8B\/10B 2.5GBASE-X 127.1 Overview 127.1.1 Scope 127.1.2 Relationship of 2.5GBASE-X to other standards 127.1.3 Summary of 2.5GBASE-X sublayers 127.1.3.1 Physical Coding Sublayer (PCS) 127.1.3.2 Physical Medium Attachment (PMA) sublayer 127.1.3.3 Physical Medium Attachment (PMA) service interface rates <\/td>\n<\/tr>\n | ||||||
| 5136<\/td>\n | 127.1.4 Inter-sublayer interfaces <\/td>\n<\/tr>\n | ||||||
| 5137<\/td>\n | 127.1.5 Functional block diagram 127.2 Physical Coding Sublayer (PCS) 127.2.1 PCS Interface (XGMII) <\/td>\n<\/tr>\n | ||||||
| 5138<\/td>\n | 127.2.2 Functions within the PCS 127.2.3 PCS used with 2.5GBASE-KX PMD <\/td>\n<\/tr>\n | ||||||
| 5139<\/td>\n | 127.2.4 Use of code-groups 127.2.5 XGMII to 2.5GPII mapping 127.2.5.1 2.5 Gb\/s PCS Internal Interface (2.5GPII) <\/td>\n<\/tr>\n | ||||||
| 5140<\/td>\n | 127.2.5.2 Word Encode <\/td>\n<\/tr>\n | ||||||
| 5142<\/td>\n | 127.2.5.3 Word-to-Octets 127.2.5.4 Octets-to-Word <\/td>\n<\/tr>\n | ||||||
| 5143<\/td>\n | 127.2.5.5 Word Decode 127.2.6 8B\/10B transmission code 127.2.6.1 Notation conventions 127.2.6.2 Transmission order <\/td>\n<\/tr>\n | ||||||
| 5145<\/td>\n | 127.2.6.3 Generating code-groups and checking the validity of received code 127.2.6.4 Ordered sets <\/td>\n<\/tr>\n | ||||||
| 5146<\/td>\n | 127.2.6.5 Comma considerations 127.2.6.6 Sequence (\/Q\/) 127.2.6.7 Data (\/D\/) 127.2.6.8 IDLE (\/I\/) 127.2.6.9 Low Power Idle (\/LI\/) 127.2.6.10 Start_of_Packet delimiter (SPD) <\/td>\n<\/tr>\n | ||||||
| 5147<\/td>\n | 127.2.6.11 End_of_Packet delimiter (EPD) 127.2.6.12 Error_Propagation (\/V\/) 127.2.7 Detailed functions and state diagrams 127.2.7.1 State variables 127.2.7.1.1 Notation conventions 127.2.7.1.2 Constants <\/td>\n<\/tr>\n | ||||||
| 5148<\/td>\n | 127.2.7.1.3 Variables <\/td>\n<\/tr>\n | ||||||
| 5153<\/td>\n | 127.2.7.1.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5154<\/td>\n | 127.2.7.1.5 Counters <\/td>\n<\/tr>\n | ||||||
| 5155<\/td>\n | 127.2.7.1.6 Messages <\/td>\n<\/tr>\n | ||||||
| 5156<\/td>\n | 127.2.7.1.7 Timers <\/td>\n<\/tr>\n | ||||||
| 5157<\/td>\n | 127.2.7.2 State diagrams 127.2.7.2.1 Word Encode and Word-to-Octets 127.2.7.2.2 Transmit <\/td>\n<\/tr>\n | ||||||
| 5161<\/td>\n | 127.2.7.2.3 Synchronization 127.2.7.2.4 Receive 127.2.7.2.5 Octets-to-Word and Decode <\/td>\n<\/tr>\n | ||||||
| 5167<\/td>\n | 127.2.7.2.6 LPI state diagram <\/td>\n<\/tr>\n | ||||||
| 5168<\/td>\n | 127.2.7.2.7 LPI status and management 127.3 Physical Medium Attachment (PMA) sublayer 127.3.1 Service Interface 127.3.1.1 PMA_UNITDATA.request 127.3.1.1.1 Semantics of the service primitive 127.3.1.1.2 When generated 127.3.1.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5169<\/td>\n | 127.3.1.2 PMA_UNITDATA.indication 127.3.1.2.1 Semantics of the service primitive 127.3.1.2.2 When generated 127.3.1.2.3 Effect of receipt 127.3.2 Functions within the PMA 127.3.2.1 Data delay 127.3.2.2 PMA transmit function <\/td>\n<\/tr>\n | ||||||
| 5170<\/td>\n | 127.3.2.3 PMA receive function 127.3.2.4 Code-group alignment 127.3.3 Loopback mode 127.3.3.1 Receiver considerations 127.3.3.2 Transmitter considerations 127.3.4 Test functions <\/td>\n<\/tr>\n | ||||||
| 5171<\/td>\n | 127.3.4.1 PMA PRBS9 test pattern (optional) 127.4 Compatibility considerations 127.5 Delay constraints 127.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5172<\/td>\n | 127.7 Protocol implementation conformance statement (PICS) proforma for Clause 127, Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer for 2.5 Gb\/s 8B\/10B 2.5GBASE-X 127.7.1 Introduction 127.7.2 Identification 127.7.2.1 Implementation identification 127.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5173<\/td>\n | 127.7.3 Major capabilities\/options 127.7.4 PICS proforma tables for the PCS and PMA sublayer, type 2.5GBASE-X 127.7.4.1 PCS <\/td>\n<\/tr>\n | ||||||
| 5174<\/td>\n | 127.7.4.2 Code-group functions 127.7.4.3 EEE <\/td>\n<\/tr>\n | ||||||
| 5175<\/td>\n | 127.7.4.4 PMA functions 127.7.4.5 Compatibility considerations <\/td>\n<\/tr>\n | ||||||
| 5176<\/td>\n | 128. Physical Medium Dependent sublayer and baseband medium, type 2.5GBASE-KX 128.1 Overview 128.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 5177<\/td>\n | 128.2.1 PMD_UNITDATA.request 128.2.1.1 Semantics of the service primitive 128.2.1.2 When generated 128.2.1.3 Effect of receipt 128.2.2 PMD_UNITDATA.indication 128.2.2.1 Semantics of the service primitive 128.2.2.2 When generated 128.2.2.3 Effect of receipt 128.2.3 PMD_SIGNAL.indication 128.2.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 5178<\/td>\n | 128.2.3.2 When generated 128.2.3.3 Effect of receipt 128.2.4 PMD_RXQUIET.request 128.2.4.1 Semantics of the service primitive 128.2.4.2 When generated 128.2.4.3 Effect of receipt 128.2.5 PMD_TXQUIET.request 128.2.5.1 Semantics of the service primitive 128.2.5.2 When generated <\/td>\n<\/tr>\n | ||||||
| 5179<\/td>\n | 128.2.5.3 Effect of receipt 128.3 PCS requirements for Auto-Negotiation (AN) service interface 128.4 Delay constraints 128.5 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5180<\/td>\n | 128.6 PMD functional specifications 128.6.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 5181<\/td>\n | 128.6.2 PMD transmit function 128.6.3 PMD receive function 128.6.4 PMD signal detect function 128.6.5 PMD transmit disable function 128.6.6 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 5182<\/td>\n | 128.6.7 PMD fault function 128.6.8 PMD transmit fault function 128.6.9 PMD receive fault function 128.6.10 PMD LPI function <\/td>\n<\/tr>\n | ||||||
| 5183<\/td>\n | 128.7 2.5GBASE-KX electrical characteristics 128.7.1 Transmitter characteristics 128.7.1.1 Test fixtures 128.7.1.2 Test fixture characteristics <\/td>\n<\/tr>\n | ||||||
| 5184<\/td>\n | 128.7.1.3 Signaling speed 128.7.1.4 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 5185<\/td>\n | 128.7.1.5 Differential output return loss 128.7.1.6 Common-mode output return loss <\/td>\n<\/tr>\n | ||||||
| 5186<\/td>\n | 128.7.1.7 Transition time 128.7.1.8 Transmit jitter test requirements 128.7.1.9 Transmit jitter <\/td>\n<\/tr>\n | ||||||
| 5187<\/td>\n | 128.7.2 Receiver characteristics 128.7.2.1 Receiver interference tolerance 128.7.2.2 Signaling speed range 128.7.2.3 AC-coupling <\/td>\n<\/tr>\n | ||||||
| 5188<\/td>\n | 128.7.2.4 Input signal amplitude 128.7.2.5 Differential input return loss 128.8 Interconnect characteristics 128.9 Environmental specifications 128.9.1 General safety 128.9.2 Network safety 128.9.3 Installation and maintenance guidelines 128.9.4 Electromagnetic compatibility 128.9.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 5189<\/td>\n | 128.10 Protocol implementation conformance statement (PICS) proforma for Clause 128, Physical Medium Dependent sublayer and baseband medium, type 2.5GBASE-KX 128.10.1 Introduction 128.10.2 Identification 128.10.2.1 Implementation identification 128.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5190<\/td>\n | 128.10.3 Major capabilities\/options 128.10.4 PICS proforma tables for Clause 128, Physical Medium Dependent (PMD) sublayer and baseband medium, type 2.5GBASE-KX. 128.10.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5191<\/td>\n | 128.10.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 5192<\/td>\n | 128.10.4.3 Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 5193<\/td>\n | 128.10.4.4 Receiver electrical characteristics 128.10.4.5 Environmental and safety specifications <\/td>\n<\/tr>\n | ||||||
| 5194<\/td>\n | 129. Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer for 5 Gb\/s 64B\/66B, type 5GBASE-R 129.1 Overview 129.1.1 Scope 129.1.2 Relationship of 5GBASE-R to other standards <\/td>\n<\/tr>\n | ||||||
| 5195<\/td>\n | 129.1.3 Summary of 5GBASE-R sublayers 129.1.3.1 Physical Coding Sublayer (PCS) 129.1.3.2 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 5196<\/td>\n | 129.1.4 Inter-sublayer interfaces 129.2 Physical Coding Sublayer (PCS) 129.2.1 Functions within the PCS <\/td>\n<\/tr>\n | ||||||
| 5197<\/td>\n | 129.2.2 Notation conventions 129.2.3 Transmission order <\/td>\n<\/tr>\n | ||||||
| 5198<\/td>\n | 129.2.4 Low Power Idle <\/td>\n<\/tr>\n | ||||||
| 5199<\/td>\n | 129.2.5 PCS used with 5GBASE-KR PMD 129.3 Physical Medium Attachment (PMA) sublayer 129.3.1 Service Interface 129.3.2 Functions within the PMA <\/td>\n<\/tr>\n | ||||||
| 5200<\/td>\n | 129.3.2.1 PMA transmit function 129.3.2.2 PMA receive function 129.3.3 PMA loopback mode (optional) 129.4 Compatibility considerations 129.5 Delay constraints 129.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5201<\/td>\n | 129.7 Protocol implementation conformance statement (PICS) proforma for Clause 129, Physical Coding Sublayer (PCS) and Physical Medium Attachment (PMA) sublayer for 5 Gb\/s 64B\/66B, type 5GBASE-R 129.7.1 Introduction 129.7.2 Identification 129.7.2.1 Implementation identification 129.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5202<\/td>\n | 129.7.3 Major capabilities\/options 129.7.4 PICS Proforma Tables for PCS, type 5GBASE-R 129.7.4.1 Coding rules 129.7.4.2 Scrambler and Descrambler <\/td>\n<\/tr>\n | ||||||
| 5203<\/td>\n | 129.7.5 Test-pattern modes 129.7.5.1 Bit order 129.7.6 Management <\/td>\n<\/tr>\n | ||||||
| 5204<\/td>\n | 129.7.6.1 State diagrams 129.7.6.2 Loopback 129.7.6.3 Delay Constraints 129.7.6.4 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n | ||||||
| 5205<\/td>\n | 129.7.6.5 LPI functions <\/td>\n<\/tr>\n | ||||||
| 5206<\/td>\n | 130. Physical Medium Dependent sublayer and baseband medium, type 5GBASE-KR 130.1 Overview 130.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 5207<\/td>\n | 130.2.1 PMD_UNITDATA.request 130.2.1.1 Semantics of the service primitive 130.2.1.2 When generated 130.2.1.3 Effect of receipt 130.2.2 PMD_UNITDATA.indication 130.2.2.1 Semantics of the service primitive 130.2.2.2 When generated 130.2.2.3 Effect of receipt 130.2.3 PMD_SIGNAL.indication 130.2.3.1 Semantics of the service primitive <\/td>\n<\/tr>\n | ||||||
| 5208<\/td>\n | 130.2.3.2 When generated 130.2.3.3 Effect of receipt 130.2.4 PMD_RX_MODE.request 130.2.4.1 Semantics of the service primitive 130.2.4.2 When generated 130.2.4.3 Effect of receipt 130.2.5 PMD_TX_MODE.request 130.2.5.1 Semantics of the service primitive 130.2.5.2 When generated <\/td>\n<\/tr>\n | ||||||
| 5209<\/td>\n | 130.2.5.3 Effect of receipt 130.3 PCS requirements for Auto-Negotiation (AN) service interface 130.4 Delay constraints 130.5 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5210<\/td>\n | 130.6 PMD functional specifications 130.6.1 Link block diagram 130.6.2 PMD transmit function 130.6.3 PMD receive function 130.6.4 PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 5211<\/td>\n | 130.6.5 PMD transmit disable function 130.6.6 Loopback mode <\/td>\n<\/tr>\n | ||||||
| 5212<\/td>\n | 130.6.7 PMD_fault function 130.6.8 PMD transmit fault function 130.6.9 PMD receive fault function 130.6.10 PMD LPI function <\/td>\n<\/tr>\n | ||||||
| 5213<\/td>\n | 130.7 5GBASE-KR electrical characteristics 130.7.1 Transmitter characteristics 130.7.1.1 Test fixture <\/td>\n<\/tr>\n | ||||||
| 5214<\/td>\n | 130.7.1.2 Test fixture characteristics 130.7.1.3 Signaling speed 130.7.1.4 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 5215<\/td>\n | 130.7.1.5 Differential output return loss <\/td>\n<\/tr>\n | ||||||
| 5216<\/td>\n | 130.7.1.6 Common-mode output return loss 130.7.1.7 Transition time 130.7.1.8 Transmit jitter test requirements <\/td>\n<\/tr>\n | ||||||
| 5217<\/td>\n | 130.7.1.9 Transmit jitter 130.7.1.10 Transmitter output waveform <\/td>\n<\/tr>\n | ||||||
| 5218<\/td>\n | 130.7.2 Receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 5219<\/td>\n | 130.7.2.1 Receiver interference tolerance 130.7.2.2 Signaling speed range 130.7.2.3 AC-coupling 130.7.2.4 Input signal amplitude 130.7.2.5 Differential input return loss <\/td>\n<\/tr>\n | ||||||
| 5220<\/td>\n | 130.8 Interconnect characteristics 130.9 Environmental specifications 130.9.1 General safety 130.9.2 Network safety 130.9.3 Installation and maintenance guidelines 130.9.4 Electromagnetic compatibility 130.9.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 5221<\/td>\n | 130.10 Protocol implementation conformance statement (PICS) proforma for Clause 130, Physical Medium Dependent (PMD) sublayer and baseband medium, type 5GBASE-KR 130.10.1 Introduction 130.10.2 Identification 130.10.2.1 Implementation identification 130.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5222<\/td>\n | 130.10.3 Major capabilities\/options 130.10.4 PICS proforma tables for Clause 130, Physical Medium Dependent (PMD) sublayer and baseband medium, type 5GBASE-KR 130.10.4.1 PCS requirements for AN service interface <\/td>\n<\/tr>\n | ||||||
| 5223<\/td>\n | 130.10.4.2 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5224<\/td>\n | 130.10.4.3 Management functions 130.10.4.4 PMD Transmitter electrical characteristics <\/td>\n<\/tr>\n | ||||||
| 5225<\/td>\n | 130.10.4.5 Receiver electrical characteristics 130.10.4.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5226<\/td>\n | 131. Introduction to 50 Gb\/s networks 131.1 Overview 131.1.1 Scope 131.1.2 Relationship of 50 Gigabit Ethernet to the ISO OSI reference model <\/td>\n<\/tr>\n | ||||||
| 5227<\/td>\n | 131.1.3 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 5228<\/td>\n | 131.1.4 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 5229<\/td>\n | 131.2 Summary of 50 Gigabit Ethernet sublayers 131.2.1 Reconciliation Sublayer (RS) and Media Independent Interface (50GMII) 131.2.2 Physical Coding Sublayer (PCS) 131.2.3 Forward error correction (FEC) sublayer 131.2.4 Physical Medium Attachment (PMA) sublayer 131.2.5 Physical Medium Dependent (PMD) sublayer 131.2.6 Management interface (MDIO\/MDC) <\/td>\n<\/tr>\n | ||||||
| 5230<\/td>\n | 131.2.7 Management 131.3 Service interface specification method and notation 131.3.1 Inter-sublayer service interface 131.3.2 Instances of the Inter-sublayer service interface 131.3.3 Semantics of inter-sublayer service interface primitives <\/td>\n<\/tr>\n | ||||||
| 5232<\/td>\n | 131.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5233<\/td>\n | 131.5 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 5235<\/td>\n | 131.6 State diagrams 131.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 5236<\/td>\n | 132. Reconciliation Sublayer (RS) and Media Independent Interface (50GMII) for 50 Gb\/s operation 132.1 Overview 132.1.1 Summary of major concepts 132.1.2 Application 132.1.3 Rate of operation <\/td>\n<\/tr>\n | ||||||
| 5237<\/td>\n | 132.1.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5238<\/td>\n | 132.1.5 Allocation of functions 132.1.6 50GMII structure 132.1.7 Mapping of 50GMII signals to PLS service primitives 132.2 50GMII data stream 132.3 50GMII functional specifications 132.4 LPI assertion and detection <\/td>\n<\/tr>\n | ||||||
| 5239<\/td>\n | 132.5 Protocol implementation conformance statement (PICS) proforma for Clause 132, Reconciliation Sublayer (RS) and Media Independent Interface (50GMII) for 50 Gb\/s operation 132.5.1 Introduction 132.5.2 Identification 132.5.2.1 Implementation identification 132.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5240<\/td>\n | 132.5.2.3 Major capabilities\/options 132.5.3 PICS proforma tables for Reconciliation Sublayer (RS) and Media Independent Interface (50GMII) for 50 Gb\/s operation 132.5.3.1 General 132.5.3.2 Mapping of PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 5241<\/td>\n | 133. Physical Coding Sublayer (PCS) for 64B\/66B, type 50GBASE-R 133.1 Overview 133.1.1 Scope 133.1.2 Relationship of 50GBASE-R to other standards 133.1.3 Summary of 50GBASE-R sublayers 133.1.3.1 Physical Coding Sublayer (PCS) 133.1.4 Inter-sublayer interfaces 133.1.4.1 PCS service interface (50GMII) <\/td>\n<\/tr>\n | ||||||
| 5242<\/td>\n | 133.1.4.2 Forward error correction (FEC) or Physical Medium Attachment (PMA) service interface <\/td>\n<\/tr>\n | ||||||
| 5243<\/td>\n | 133.1.5 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 5244<\/td>\n | 133.2 Physical Coding Sublayer (PCS) 133.2.1 Functions within the PCS 133.2.2 Alignment marker insertion <\/td>\n<\/tr>\n | ||||||
| 5245<\/td>\n | 133.2.3 PCS lane deskew 133.2.4 Detailed functions and state diagrams 133.3 Delay constraints 133.4 Auto-Negotiation <\/td>\n<\/tr>\n | ||||||
| 5246<\/td>\n | 133.5 Protocol implementation conformance statement (PICS) proforma for Clause 133, Physical Coding Sublayer (PCS) for 64B\/66B, type 50GBASE-R 133.5.1 Introduction 133.5.2 Identification 133.5.2.1 Implementation identification 133.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5247<\/td>\n | 133.5.3 Major capabilities\/options 133.5.4 PICS proforma tables for Physical Coding Sublayer (PCS) for 64B\/66B, type 50GBASE-R 133.5.4.1 Coding rules <\/td>\n<\/tr>\n | ||||||
| 5248<\/td>\n | 133.5.4.2 Scrambler and Descrambler 133.5.4.3 Deskew and Reordering 133.5.4.4 Alignment Markers 133.5.4.5 Test-pattern modes <\/td>\n<\/tr>\n | ||||||
| 5249<\/td>\n | 133.5.4.6 Bit order 133.5.4.7 Management 133.5.4.8 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5250<\/td>\n | 133.5.4.9 Loopback 133.5.4.10 Delay constraints 133.5.4.11 Auto-Negotiation for Backplane Ethernet functions <\/td>\n<\/tr>\n | ||||||
| 5251<\/td>\n | 134. Reed-Solomon forward error correction (RS-FEC) sublayer for 50GBASE-R PHYs 134.1 Overview 134.1.1 Scope 134.1.2 Position of RS-FEC in the 50GBASE-R sublayers 134.2 FEC service interface <\/td>\n<\/tr>\n | ||||||
| 5252<\/td>\n | 134.3 PMA compatibility <\/td>\n<\/tr>\n | ||||||
| 5253<\/td>\n | 134.4 Delay constraints 134.5 Functions within the RS-FEC sublayer 134.5.1 Functional block diagram 134.5.2 Transmit function 134.5.2.1 PCS Lane block synchronization 134.5.2.2 PCS Alignment lock and deskew 134.5.2.3 PCS Lane reorder 134.5.2.4 Alignment marker removal <\/td>\n<\/tr>\n | ||||||
| 5254<\/td>\n | 134.5.2.5 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n | ||||||
| 5255<\/td>\n | 134.5.2.6 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 5256<\/td>\n | 134.5.2.7 Reed-Solomon encoder 134.5.2.8 Symbol distribution 134.5.2.9 Transmit bit ordering <\/td>\n<\/tr>\n | ||||||
| 5258<\/td>\n | 134.5.3 Receive function 134.5.3.1 Alignment lock and deskew 134.5.3.2 FEC Lane reorder 134.5.3.3 Reed-Solomon decoder 134.5.3.3.1 FEC Error indication bypass (optional) <\/td>\n<\/tr>\n | ||||||
| 5259<\/td>\n | 134.5.3.3.2 FEC Degraded SER (optional) 134.5.3.4 Alignment marker removal 134.5.3.5 256B\/257B to 64B\/66B transcoder 134.5.3.6 Block distribution 134.5.3.7 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 5260<\/td>\n | 134.5.3.8 Receive bit ordering 134.5.4 Detailed functions and state diagrams 134.5.4.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 5262<\/td>\n | 134.5.4.2 State variables 134.5.4.2.1 Variables 134.5.4.2.2 Functions 134.5.4.2.3 Counters 134.5.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5263<\/td>\n | 134.6 RS-FEC MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5264<\/td>\n | 134.6.1 FEC_bypass_indication_enable 134.6.2 FEC_degraded_SER_enable 134.6.3 FEC_degraded_SER_activate_threshold 134.6.4 FEC_degraded_SER_deactivate_threshold 134.6.5 FEC_degraded_SER_interval 134.6.6 FEC_bypass_indication_ability <\/td>\n<\/tr>\n | ||||||
| 5265<\/td>\n | 134.6.7 hi_ser 134.6.8 FEC_degraded_SER_ability 134.6.9 FEC_degraded_SER 134.6.10 fec_optional_states 134.6.11 amps_lock 134.6.12 fec_align_status 134.6.13 FEC_corrected_cw_counter 134.6.14 FEC_uncorrected_cw_counter <\/td>\n<\/tr>\n | ||||||
| 5266<\/td>\n | 134.6.15 FEC_lane_mapping 134.6.16 FEC_symbol_error_counter_i 134.6.17 align_status 134.6.18 BIP_error_counter_i 134.6.19 lane_mapping 134.6.20 block_lock 134.6.21 am_lock <\/td>\n<\/tr>\n | ||||||
| 5267<\/td>\n | 134.7 Protocol implementation conformance statement (PICS) proforma for Clause 134, Reed-Solomon forward error correction (RS-FEC) sublayer for 50GBASE-R PHYs 134.7.1 Introduction 134.7.2 Identification 134.7.2.1 Implementation identification 134.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5268<\/td>\n | 134.7.3 Major capabilities\/options 134.7.4 PICS proforma tables for Reed-Solomon forward error correction (RS-FEC) sublayer for 50GBASE-R PHYs 134.7.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 5269<\/td>\n | 134.7.4.2 Receive function <\/td>\n<\/tr>\n | ||||||
| 5270<\/td>\n | 134.7.4.3 State diagrams 134.7.4.4 Delay Constraints <\/td>\n<\/tr>\n | ||||||
| 5271<\/td>\n | 135. Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P 135.1 Overview 135.1.1 Scope 135.1.2 Position of the PMA in the 50GBASE-R and 100GBASE-P sublayers 135.1.3 Summary of functions <\/td>\n<\/tr>\n | ||||||
| 5272<\/td>\n | 135.1.4 PMA sublayer positioning <\/td>\n<\/tr>\n | ||||||
| 5274<\/td>\n | 135.2 PMA interfaces <\/td>\n<\/tr>\n | ||||||
| 5275<\/td>\n | 135.3 PMA service interface <\/td>\n<\/tr>\n | ||||||
| 5276<\/td>\n | 135.4 Service interface below PMA <\/td>\n<\/tr>\n | ||||||
| 5277<\/td>\n | 135.5 Functions within the PMA <\/td>\n<\/tr>\n | ||||||
| 5278<\/td>\n | 135.5.1 Per input-lane clock and data recovery <\/td>\n<\/tr>\n | ||||||
| 5279<\/td>\n | 135.5.2 Bit-level multiplexing 135.5.3 Skew and Skew Variation <\/td>\n<\/tr>\n | ||||||
| 5280<\/td>\n | 135.5.3.1 Skew generation toward SP0 135.5.3.2 Skew tolerance at SP0 135.5.3.3 Skew generation toward SP1 <\/td>\n<\/tr>\n | ||||||
| 5281<\/td>\n | 135.5.3.4 Skew tolerance at SP1 135.5.3.5 Skew generation toward SP2 135.5.3.6 Skew tolerance at SP5 135.5.3.7 Skew generation at SP6 135.5.3.8 Skew tolerance at SP6 135.5.3.9 Skew generation at SP7 135.5.3.10 Skew tolerance at SP7 <\/td>\n<\/tr>\n | ||||||
| 5282<\/td>\n | 135.5.4 Delay constraints 135.5.5 Clocking architecture 135.5.6 Signal drivers <\/td>\n<\/tr>\n | ||||||
| 5283<\/td>\n | 135.5.7 PAM4 encoding 135.5.7.1 Gray mapping for PAM4 encoded lanes 135.5.7.2 Precoding for PAM4 encoded lanes <\/td>\n<\/tr>\n | ||||||
| 5284<\/td>\n | 135.5.8 PMA local loopback mode (optional) <\/td>\n<\/tr>\n | ||||||
| 5285<\/td>\n | 135.5.9 PMA remote loopback mode (optional) 135.5.10 PMA test patterns (optional) 135.5.10.1 Test patterns for NRZ encoded signals 135.5.10.1.1 PRBS31 test pattern 135.5.10.1.2 PRBS9 test pattern 135.5.10.1.3 Square-wave test pattern <\/td>\n<\/tr>\n | ||||||
| 5286<\/td>\n | 135.5.10.2 Test patterns for PAM4 encoded signals 135.5.10.2.1 PRBS13Q test pattern 135.5.10.2.2 PRBS31Q test pattern 135.5.10.2.3 SSPRQ test pattern 135.5.10.2.4 Square wave (quaternary) test pattern 135.6 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5290<\/td>\n | 135.7 Protocol implementation conformance statement (PICS) proforma for Clause 135, Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P 135.7.1 Introduction 135.7.2 Identification 135.7.2.1 Implementation identification 135.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5291<\/td>\n | 135.7.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5292<\/td>\n | 135.7.4 PICS proforma tables for Physical Medium Attachment (PMA) sublayer, type 50GBASE-R and 100GBASE-P 135.7.4.1 Functions 135.7.4.2 Timing <\/td>\n<\/tr>\n | ||||||
| 5293<\/td>\n | 135.7.4.3 Electrical <\/td>\n<\/tr>\n | ||||||
| 5294<\/td>\n | 135.7.4.4 Diagnostics <\/td>\n<\/tr>\n | ||||||
| 5296<\/td>\n | 135.7.7 Encoding <\/td>\n<\/tr>\n | ||||||
| 5297<\/td>\n | 136. Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5299<\/td>\n | 136.2 Conventions 136.3 PMD service interfaces <\/td>\n<\/tr>\n | ||||||
| 5301<\/td>\n | 136.4 PCS requirements for Auto-Negotiation (AN) service interface 136.5 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5302<\/td>\n | 136.6 Skew constraints 136.6.1 Skew Constraints for 50GBASE-CR 136.6.2 Skew Constraints for 100GBASE-CR2 and 200GBASE-CR4 136.7 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5306<\/td>\n | 136.8 PMD functional specifications 136.8.1 Link block diagram <\/td>\n<\/tr>\n | ||||||
| 5307<\/td>\n | 136.8.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 5308<\/td>\n | 136.8.3 PMD receive function 136.8.4 PMD global signal detect function 136.8.5 PMD lane-by-lane signal detect function 136.8.6 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 5309<\/td>\n | 136.8.7 PMD lane-by-lane transmit disable function (optional) 136.8.8 PMD fault function 136.8.9 PMD transmit fault function (optional) 136.8.10 PMD receive fault function (optional) 136.8.11 PMD control function 136.8.11.1 Training frame structure <\/td>\n<\/tr>\n | ||||||
| 5310<\/td>\n | 136.8.11.1.1 Frame marker 136.8.11.1.2 Control and status fields <\/td>\n<\/tr>\n | ||||||
| 5311<\/td>\n | 136.8.11.1.3 Training pattern <\/td>\n<\/tr>\n | ||||||
| 5312<\/td>\n | 136.8.11.1.4 Zero pad 136.8.11.2 Control field structure <\/td>\n<\/tr>\n | ||||||
| 5313<\/td>\n | 136.8.11.2.1 Initial condition request 136.8.11.2.2 Modulation and precoding request 136.8.11.2.3 Coefficient select 136.8.11.2.4 Coefficient request <\/td>\n<\/tr>\n | ||||||
| 5314<\/td>\n | 136.8.11.3 Status field structure 136.8.11.3.1 Receiver ready 136.8.11.3.2 Modulation and precoding status 136.8.11.3.3 Receiver frame lock <\/td>\n<\/tr>\n | ||||||
| 5315<\/td>\n | 136.8.11.3.4 Initial condition status 136.8.11.3.5 Parity bit 136.8.11.3.6 Coefficient select echo 136.8.11.3.7 Coefficient status 136.8.11.4 Equalization control 136.8.11.4.1 Initial condition setting request process 136.8.11.4.2 Initial condition setting response process <\/td>\n<\/tr>\n | ||||||
| 5316<\/td>\n | 136.8.11.4.3 Coefficient update request process 136.8.11.4.4 Coefficient update response process <\/td>\n<\/tr>\n | ||||||
| 5317<\/td>\n | 136.8.11.5 Modulation and precoding setting <\/td>\n<\/tr>\n | ||||||
| 5318<\/td>\n | 136.8.11.6 Handshake timing 136.8.11.7 Variables, functions, timers, counters, and state diagrams 136.8.11.7.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5320<\/td>\n | 136.8.11.7.2 Functions <\/td>\n<\/tr>\n | ||||||
| 5321<\/td>\n | 136.8.11.7.3 Timers 136.8.11.7.4 Counters 136.8.11.7.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5326<\/td>\n | 136.9 PMD electrical characteristics 136.9.1 AC-coupling 136.9.2 Signal paths 136.9.3 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 5327<\/td>\n | 136.9.3.1 Transmitter output waveform 136.9.3.1.1 Linear fit to the measured waveform <\/td>\n<\/tr>\n | ||||||
| 5329<\/td>\n | 136.9.3.1.2 Steady-state voltage and linear fit pulse peak 136.9.3.1.3 Coefficient initialization 136.9.3.1.4 Coefficient step size <\/td>\n<\/tr>\n | ||||||
| 5330<\/td>\n | 136.9.3.1.5 Coefficient range 136.9.3.2 Insertion loss, TP0 to TP2 or TP3 to TP5 136.9.3.3 J3u jitter 136.9.3.4 Transmitter effective return loss (ERL) <\/td>\n<\/tr>\n | ||||||
| 5331<\/td>\n | 136.9.4 Receiver characteristics 136.9.4.1 Receiver input amplitude tolerance <\/td>\n<\/tr>\n | ||||||
| 5332<\/td>\n | 136.9.4.2 Receiver interference tolerance 136.9.4.2.1 Test setup 136.9.4.2.2 Test channel 136.9.4.2.3 Test channel calibration <\/td>\n<\/tr>\n | ||||||
| 5333<\/td>\n | 136.9.4.2.4 Pattern generator and noise injection <\/td>\n<\/tr>\n | ||||||
| 5334<\/td>\n | 136.9.4.2.5 Test procedure 136.9.4.3 Receiver jitter tolerance 136.9.4.3.1 Test setup 136.9.4.3.2 Test procedure <\/td>\n<\/tr>\n | ||||||
| 5335<\/td>\n | 136.9.4.4 Signaling rate range 136.9.4.5 Receiver ERL 136.10 Channel characteristics 136.11 Cable assembly characteristics <\/td>\n<\/tr>\n | ||||||
| 5336<\/td>\n | 136.11.1 Characteristic impedance and reference impedance 136.11.2 Cable assembly insertion loss 136.11.3 Cable assembly ERL <\/td>\n<\/tr>\n | ||||||
| 5337<\/td>\n | 136.11.4 Differential to common-mode return loss 136.11.5 Differential to common-mode conversion loss 136.11.6 Common-mode to common-mode return loss 136.11.7 Cable assembly Channel Operating Margin <\/td>\n<\/tr>\n | ||||||
| 5339<\/td>\n | 136.11.7.1 Channel signal and crosstalk path calculations 136.11.7.1.1 Channel signal path 136.11.7.1.2 Channel crosstalk paths <\/td>\n<\/tr>\n | ||||||
| 5340<\/td>\n | 136.11.7.2 Signal and crosstalk paths used in calculation of COM <\/td>\n<\/tr>\n | ||||||
| 5341<\/td>\n | 136.12 MDI specifications 136.13 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5342<\/td>\n | 136.14 Protocol implementation conformance statement (PICS) proforma for Clause 136, Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136.14.1 Introduction 136.14.2 Identification 136.14.2.1 Implementation identification 136.14.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5343<\/td>\n | 136.14.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5344<\/td>\n | 136.14.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136.14.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5345<\/td>\n | 136.14.4.2 PMD control function 136.14.4.3 Transmitter specifications <\/td>\n<\/tr>\n | ||||||
| 5346<\/td>\n | 136.14.4.4 Receiver specifications 136.14.4.5 Cable assembly specifications <\/td>\n<\/tr>\n | ||||||
| 5347<\/td>\n | 136.14.4.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5348<\/td>\n | 137. Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-KR, 100GBASE-KR2, and 200GBASE-KR4 137.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5351<\/td>\n | 137.2 Conventions 137.3 PMD service interfaces 137.4 PCS requirements for Auto-Negotiation (AN) service interface 137.5 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5352<\/td>\n | 137.6 Skew constraints 137.6.1 Skew Constraints for 50GBASE-KR 137.6.2 Skew Constraints for 100GBASE-KR2 and 200GBASE-KR4 137.7 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5353<\/td>\n | 137.8 PMD functional specifications 137.8.1 Link block diagram 137.8.2 PMD transmit function 137.8.3 PMD receive function 137.8.4 PMD global signal detect function 137.8.5 PMD lane-by-lane signal detect function 137.8.6 PMD global transmit disable function (optional) 137.8.7 PMD lane-by-lane transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 5354<\/td>\n | 137.8.8 PMD fault function 137.8.9 PMD transmit fault function (optional) 137.8.10 PMD receive fault function (optional) 137.8.11 PMD control function 137.9 Electrical characteristics 137.9.1 MDI 137.9.2 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 5355<\/td>\n | 137.9.2.1 Transmitter ERL 137.9.3 Receiver characteristics 137.9.3.1 Receiver ERL 137.10 Channel characteristics <\/td>\n<\/tr>\n | ||||||
| 5357<\/td>\n | 137.10.1 Channel insertion loss 137.10.2 Channel ERL 137.11 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5359<\/td>\n | 137.12 Protocol implementation conformance statement (PICS) proforma for Clause 137, Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-KR, 100GBASE-KR2, and 200GBASE-KR4 137.12.1 Introduction 137.12.2 Identification 137.12.2.1 Implementation identification 137.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5360<\/td>\n | 137.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5361<\/td>\n | 137.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and baseband medium, type 50GBASE-KR, 100GBASE-KR2, and 200GBASE-KR4 137.12.4.1 Functional specifications <\/td>\n<\/tr>\n | ||||||
| 5362<\/td>\n | 137.12.4.2 PMD control function 137.12.4.3 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 5363<\/td>\n | 137.12.4.4 Receiver characteristics 137.12.4.5 Channel characteristics 137.12.4.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5364<\/td>\n | 138. Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-SR, 100GBASE-SR2, 200GBASE-SR4, 400GBASE-SR8 138.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5367<\/td>\n | 138.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 5368<\/td>\n | 138.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 5369<\/td>\n | 138.3 Delay and Skew 138.3.1 Delay constraints 138.3.2 Skew constraints 138.3.2.1 Skew Constraints for 50GBASE-SR <\/td>\n<\/tr>\n | ||||||
| 5370<\/td>\n | 138.3.2.2 Skew Constraints for 100GBASE-SR2, 200GBASE-SR4, and 400GBASE-SR8 138.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5371<\/td>\n | 138.5 PMD functional specifications 138.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 5372<\/td>\n | 138.5.2 PMD transmit function 138.5.3 PMD receive function 138.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 5373<\/td>\n | 138.5.5 PMD lane-by-lane signal detect function 138.5.6 PMD reset function 138.5.7 PMD global transmit disable function (optional) 138.5.8 PMD lane-by-lane transmit disable function (optional) 138.5.9 PMD fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 5374<\/td>\n | 138.5.10 PMD transmit fault function (optional) 138.5.11 PMD receive fault function (optional) 138.6 Lane assignments 138.7 PMD to MDI optical specifications for 50GBASE-SR, 100GBASE-SR2, 200GBASE-SR4, and 400GBASE-SR8 <\/td>\n<\/tr>\n | ||||||
| 5375<\/td>\n | 138.7.1 Transmitter optical specifications 138.7.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 5376<\/td>\n | 138.7.3 Illustrative link power budget <\/td>\n<\/tr>\n | ||||||
| 5377<\/td>\n | 138.8 Definition of optical parameters and measurement methods 138.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 5378<\/td>\n | 138.8.1.1 Multi-lane testing considerations 138.8.2 Center wavelength and spectral width 138.8.3 Average optical power 138.8.4 Outer Optical Modulation Amplitude (OMAouter) 138.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) <\/td>\n<\/tr>\n | ||||||
| 5379<\/td>\n | 138.8.5.1 TDECQ reference equalizer 138.8.6 Extinction ratio 138.8.7 Transmitter transition time 138.8.8 Relative intensity noise (RIN12OMA) <\/td>\n<\/tr>\n | ||||||
| 5380<\/td>\n | 138.8.9 Receiver sensitivity 138.8.10 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 5381<\/td>\n | 138.8.10.1 Sinusoidal jitter for receiver conformance test 138.9 Safety, installation, environment, and labeling 138.9.1 General safety 138.9.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 5382<\/td>\n | 138.9.3 Installation 138.9.4 Environment 138.9.5 Electromagnetic emission 138.9.6 Temperature, humidity, and handling 138.9.7 PMD labeling requirements 138.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 5383<\/td>\n | 138.10.1 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 5384<\/td>\n | 138.10.2 Characteristics of the fiber optic cabling (channel) 138.10.2.1 Optical fiber cable 138.10.2.2 Optical fiber connection 138.10.2.2.1 Connection insertion loss 138.10.2.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 5385<\/td>\n | 138.10.3 Medium Dependent Interface (MDI) 138.10.3.1 Optical lane assignments for 100GBASE-SR2, 200GBASE-SR4, and 400GBASE-SR8 <\/td>\n<\/tr>\n | ||||||
| 5386<\/td>\n | 138.10.3.2 MDI requirements for 50GBASE-SR <\/td>\n<\/tr>\n | ||||||
| 5387<\/td>\n | 138.10.3.3 MDI requirements for 100GBASE-SR2 and 200GBASE-SR4 138.10.3.4 MDI requirements for 400GBASE-SR8 <\/td>\n<\/tr>\n | ||||||
| 5388<\/td>\n | 138.11 Protocol implementation conformance statement (PICS) proforma for Clause 138, Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-SR, 100GBASE-SR2, 200GBASE-SR4, 400GBASE-SR8 138.11.1 Introduction 138.11.2 Identification 138.11.2.1 Implementation identification 138.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5389<\/td>\n | 138.11.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5390<\/td>\n | 138.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-SR, 100GBASE-SR2, 200GBASE-SR4, 400GBASE-SR8 138.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5391<\/td>\n | 138.11.4.2 Management functions 138.11.4.3 PMD to MDI optical specifications <\/td>\n<\/tr>\n | ||||||
| 5392<\/td>\n | 138.11.4.4 Optical measurement methods 138.11.4.5 Environmental specifications 138.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 5394<\/td>\n | 139. Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER 139.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5395<\/td>\n | 139.1.1 Bit error ratio 139.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 5396<\/td>\n | 139.3 Delay and Skew 139.3.1 Delay constraints 139.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 5397<\/td>\n | 139.4 PMD MDIO function mapping 139.5 PMD functional specifications 139.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 5398<\/td>\n | 139.5.2 PMD transmit function 139.5.3 PMD receive function 139.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 5399<\/td>\n | 139.5.5 PMD reset function 139.5.6 PMD global transmit disable function (optional) 139.5.7 PMD fault function (optional) 139.5.8 PMD transmit fault function (optional) 139.5.9 PMD receive fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 5400<\/td>\n | 139.6 PMD to MDI optical specifications for 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER 139.6.1 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 5401<\/td>\n | 139.6.2 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 5403<\/td>\n | 139.6.3 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER illustrative link power budgets 139.7 Definition of optical parameters and measurement methods 139.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 5404<\/td>\n | 139.7.2 Wavelength and side-mode suppression ratio (SMSR) 139.7.3 Average optical power 139.7.4 Outer Optical Modulation Amplitude (OMAouter) <\/td>\n<\/tr>\n | ||||||
| 5405<\/td>\n | 139.7.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 139.7.5.1 TDECQ conformance test setup <\/td>\n<\/tr>\n | ||||||
| 5406<\/td>\n | 139.7.5.2 Channel requirements 139.7.5.3 TDECQ measurement method <\/td>\n<\/tr>\n | ||||||
| 5407<\/td>\n | 139.7.5.4 TDECQ reference equalizer 139.7.6 Extinction ratio 139.7.7 Transmitter transition time 139.7.8 Relative intensity noise (RIN17.1OMA, RIN15.6OMA, and RIN15OMA) <\/td>\n<\/tr>\n | ||||||
| 5408<\/td>\n | 139.7.9 Receiver sensitivity 139.7.10 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 5409<\/td>\n | 139.7.10.1 Stressed receiver conformance test block diagram 139.7.10.2 Stressed receiver conformance test signal characteristics and calibration 139.7.10.3 Stressed receiver conformance test signal verification <\/td>\n<\/tr>\n | ||||||
| 5410<\/td>\n | 139.8 Safety, installation, environment, and labeling 139.8.1 General safety <\/td>\n<\/tr>\n | ||||||
| 5411<\/td>\n | 139.8.2 Laser safety 139.8.3 Installation 139.8.4 Environment 139.8.5 Electromagnetic emission 139.8.6 Temperature, humidity, and handling 139.8.7 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 5412<\/td>\n | 139.9 Fiber optic cabling model 139.10 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 5413<\/td>\n | 139.10.1 Optical fiber cable 139.10.2 Optical fiber connection 139.10.2.1 Connection insertion loss 139.10.2.2 Maximum discrete reflectance 139.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 5414<\/td>\n | 139.11 Requirements for interoperation between 50GBASE-ER and 50GBASE-FR 139.12 Requirements for interoperation between 50GBASE-ER and 50GBASE-LR <\/td>\n<\/tr>\n | ||||||
| 5415<\/td>\n | 139.13 Protocol implementation conformance statement (PICS) proforma for Clause 139, Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER 139.13.1 Introduction 139.13.2 Identification 139.13.2.1 Implementation identification 139.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5416<\/td>\n | 139.13.3 Major capabilities\/options 139.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 50GBASE-FR, 50GBASE-LR, and 50GBASE-ER 139.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5417<\/td>\n | 139.13.4.2 Management functions 139.13.4.3 PMD to MDI optical specifications for 50GBASE-FR <\/td>\n<\/tr>\n | ||||||
| 5418<\/td>\n | 139.13.4.4 PMD to MDI optical specifications for 50GBASE-LR 139.13.4.5 PMD to MDI optical specifications for 50GBASE-ER <\/td>\n<\/tr>\n | ||||||
| 5419<\/td>\n | 139.13.4.6 Optical measurement methods 139.13.4.7 Environmental specifications 139.13.4.8 Characteristics of the fiber optic cabling and MD <\/td>\n<\/tr>\n | ||||||
| 5420<\/td>\n | 140. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 140.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5421<\/td>\n | 140.1.1 Bit error ratio 140.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 5422<\/td>\n | 140.3 Delay and Skew 140.3.1 Delay constraints 140.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 5423<\/td>\n | 140.4 PMD MDIO function mapping 140.5 PMD functional specifications 140.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 5424<\/td>\n | 140.5.2 PMD transmit function 140.5.3 PMD receive function 140.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 5425<\/td>\n | 140.5.5 PMD reset function 140.5.6 PMD global transmit disable function (optional) 140.5.7 PMD fault function (optional) 140.5.8 PMD transmit fault function (optional) 140.5.9 PMD receive fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 5426<\/td>\n | 140.6 PMD to MDI optical specifications for 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 140.6.1 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 5428<\/td>\n | 140.6.2 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 5430<\/td>\n | 140.6.3 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 illustrative link power budgets <\/td>\n<\/tr>\n | ||||||
| 5432<\/td>\n | 140.7 Definition of optical parameters and measurement methods 140.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 5433<\/td>\n | 140.7.2 Wavelength and side-mode suppression ratio (SMSR) 140.7.3 Average optical power 140.7.4 Outer Optical Modulation Amplitude (OMAouter) 140.7.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) <\/td>\n<\/tr>\n | ||||||
| 5434<\/td>\n | 140.7.5.1 TDECQ reference equalizer 140.7.5.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 5435<\/td>\n | 140.7.6 Transmitter eye closure for PAM4 (TECQ) 140.7.7 Over\/under-shoot 140.7.8 Transmitter power excursion <\/td>\n<\/tr>\n | ||||||
| 5436<\/td>\n | 140.7.9 Extinction ratio 140.7.10 Transmitter transition time 140.7.11 Relative intensity noise (RINxOMA) 140.7.12 Receiver sensitivity 140.7.12.1 Receiver sensitivity for 100GBASE-DR <\/td>\n<\/tr>\n | ||||||
| 5437<\/td>\n | 140.7.12.2 Receiver sensitivity for 100GBASE-FR1 and 100GBASE-LR1 140.7.13 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 5438<\/td>\n | 140.8 Safety, installation, environment, and labeling 140.8.1 General safety 140.8.2 Laser safety 140.8.3 Installation 140.8.4 Environment 140.8.5 Electromagnetic emission <\/td>\n<\/tr>\n | ||||||
| 5439<\/td>\n | 140.8.6 Temperature, humidity, and handling 140.8.7 PMD labeling requirements 140.9 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 5440<\/td>\n | 140.10 Characteristics of the fiber optic cabling (channel) 140.10.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 5441<\/td>\n | 140.10.2 Optical fiber connection 140.10.2.1 Connection insertion loss 140.10.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 5442<\/td>\n | 140.10.3 Medium Dependent Interface (MDI) 140.11 Interoperation between 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1 140.11.1 Interoperation between 100GBASE-FR1 and 100GBASE-DR 140.11.2 Interoperation between 100GBASE-LR1 and 100GBASE-DR 140.11.3 Interoperation between 100GBASE-LR1 and 100GBASE-FR1 <\/td>\n<\/tr>\n | ||||||
| 5444<\/td>\n | 140.12 Protocol implementation conformance statement (PICS) proforma for Clause 140, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1, 100GBASE-FR1, and 100GBASE-LR1 140.12.1 Introduction 140.12.2 Identification 140.12.2.1 Implementation identification 140.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5445<\/td>\n | 140.12.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5446<\/td>\n | 140.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-DR, 100GBASE-FR1, and 100GBASE-LR1, 100GBASE-FR1, and 100GBASE-LR1 140.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5447<\/td>\n | 140.12.4.2 Management functions 140.12.4.3 PMD to MDI optical specifications for 100GBASE-DR <\/td>\n<\/tr>\n | ||||||
| 5448<\/td>\n | 140.12.4.4 PMD to MDI optical specifications for 100GBASE-FR1 140.12.4.5 PMD to MDI optical specifications for 100GBASE-LR1 140.12.4.6 Optical measurement methods <\/td>\n<\/tr>\n | ||||||
| 5449<\/td>\n | 140.12.4.7 Environmental specifications 140.12.4.8 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 5450<\/td>\n | 141. Physical Medium Dependent (PMD) sublayer and medium for Nx25G-EPON passive optical networks 141.1 Overview 141.1.1 Terminology 141.1.2 Positioning of the PMD sublayer within the IEEE 802.3 architecture 141.1.3 PHY link types <\/td>\n<\/tr>\n | ||||||
| 5453<\/td>\n | 141.2 PMD nomenclature 141.2.1 Introduction 141.2.2 PMD rate classes 141.2.3 PMD coexistence classes 141.2.4 PMD transmission direction classes 141.2.5 PMD power classes <\/td>\n<\/tr>\n | ||||||
| 5454<\/td>\n | 141.2.6 PMD naming 141.2.7 Supported combinations of OLT and ONU PMDs <\/td>\n<\/tr>\n | ||||||
| 5455<\/td>\n | 141.2.7.1 PHY Links supporting medium power budget <\/td>\n<\/tr>\n | ||||||
| 5456<\/td>\n | 141.2.7.2 PHY Links supporting high power budget 141.3 PMD functional specifications 141.3.1 PMD service interface 141.3.1.1 Channel-to-wavelength mapping <\/td>\n<\/tr>\n | ||||||
| 5457<\/td>\n | 141.3.1.2 Delay constraints 141.3.1.3 PMD_UNITDATA[i].request 141.3.1.4 PMD_UNITDATA[i].indication <\/td>\n<\/tr>\n | ||||||
| 5458<\/td>\n | 141.3.1.5 PMD_SIGNAL[i].request 141.3.1.6 PMD_SIGNAL[i].indication 141.3.2 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 5459<\/td>\n | 141.3.3 PMD transmit function 141.3.4 PMD receive function 141.3.5 PMD signal detect function 141.3.5.1 ONU PMD signal detect <\/td>\n<\/tr>\n | ||||||
| 5460<\/td>\n | 141.3.5.2 OLT PMD signal detect 141.3.5.3 Nx25G-EPON signal detect functions 141.4 Wavelength allocation <\/td>\n<\/tr>\n | ||||||
| 5461<\/td>\n | 141.5 PMD to MDI optical specifications for OLT PMDs 141.5.1 Transmitter optical specifications 141.5.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 5466<\/td>\n | 141.6 PMD to MDI optical specifications for ONU PMDs 141.6.1 Transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 5469<\/td>\n | 141.6.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 5471<\/td>\n | 141.7 Definitions of optical parameters and measurement methods 141.7.1 Insertion loss 141.7.2 Test patterns 141.7.3 Wavelength and spectral width measurement 141.7.4 Optical power measurements 141.7.5 Extinction ratio measurements 141.7.6 Optical Modulation Amplitude (OMA) test procedure 141.7.7 Relative intensity noise optical modulation amplitude (RINxOMA) measuring procedure <\/td>\n<\/tr>\n | ||||||
| 5472<\/td>\n | 141.7.8 Transmit optical waveform (transmit eye) 141.7.9 Transmitter and dispersion penalty (TDP) for 25G 141.7.9.1 Reference transmitter requirements 141.7.9.2 Channel requirements 141.7.9.3 Reference receiver requirements 141.7.9.4 Test procedure <\/td>\n<\/tr>\n | ||||||
| 5473<\/td>\n | 141.7.10 Receive sensitivity 141.7.11 Stressed receiver conformance test 141.7.12 Jitter measurements 141.7.13 Laser on\/off timing measurement 141.7.13.1 Definitions 141.7.13.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 5475<\/td>\n | 141.7.14 Receiver settling timing measurement 141.7.14.1 Definitions 141.7.14.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 5476<\/td>\n | 141.8 Environmental, safety, and labeling 141.8.1 General safety 141.8.2 Laser safety 141.8.3 Installation 141.8.4 Environment 141.8.5 PMD labeling <\/td>\n<\/tr>\n | ||||||
| 5477<\/td>\n | 141.9 Characteristics of the fiber optic cabling 141.9.1 Fiber optic cabling model 141.9.2 Optical fiber and cable 141.9.3 Optical fiber connection <\/td>\n<\/tr>\n | ||||||
| 5478<\/td>\n | 141.9.4 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 5479<\/td>\n | 141.10 Protocol implementation conformance statement (PICS) proforma for Clause 141, Physical Medium Dependent (PMD) sublayer and medium for Nx25G-EPON passive optical networks 141.10.1 Introduction 141.10.2 Identification 141.10.2.1 Implementation identification 141.10.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5480<\/td>\n | 141.10.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5483<\/td>\n | 141.10.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium for passive optical networks, type 25\/10GBASE-PQ, 25GBASE-PQ, 50\/10GBASE-PQ, 50\/25GBASE-PQ, and 50GBASE-PQ 141.10.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 5484<\/td>\n | 141.10.4.2 PMD to MDI optical specifications for 25\/10GBASE-PQG-D2 141.10.4.3 PMD to MDI optical specifications for 25\/10GBASE-PQG-D3 141.10.4.4 PMD to MDI optical specifications for 25\/10GBASE-PQX-D2 <\/td>\n<\/tr>\n | ||||||
| 5485<\/td>\n | 141.10.4.5 PMD to MDI optical specifications for 25\/10GBASE-PQX-D3 141.10.4.6 PMD to MDI optical specifications for 25GBASE-PQG-D2 141.10.4.7 PMD to MDI optical specifications for 25GBASE-PQG-D3 141.10.4.8 PMD to MDI optical specifications for 25GBASE-PQX-D2 <\/td>\n<\/tr>\n | ||||||
| 5486<\/td>\n | 141.10.4.9 PMD to MDI optical specifications for 25GBASE-PQX-D3 141.10.4.10 PMD to MDI optical specifications for 50\/10GBASE-PQG-D2 141.10.4.11 PMD to MDI optical specifications for 50\/10GBASE-PQG-D3 141.10.4.12 PMD to MDI optical specifications for 50\/10GBASE-PQX-D2 <\/td>\n<\/tr>\n | ||||||
| 5487<\/td>\n | 141.10.4.13 PMD to MDI optical specifications for 50\/10GBASE-PQX-D3 141.10.4.14 PMD to MDI optical specifications for 50\/25GBASE-PQG-D2 141.10.4.15 PMD to MDI optical specifications for 50\/25GBASE-PQG-D3 141.10.4.16 PMD to MDI optical specifications for 50\/25GBASE-PQX-D2 <\/td>\n<\/tr>\n | ||||||
| 5488<\/td>\n | 141.10.4.17 PMD to MDI optical specifications for 50\/25GBASE-PQX-D3 141.10.4.18 PMD to MDI optical specifications for 50GBASE-PQG-D2 141.10.4.19 PMD to MDI optical specifications for 50GBASE-PQG-D3 141.10.4.20 PMD to MDI optical specifications for 50GBASE-PQX-D2 <\/td>\n<\/tr>\n | ||||||
| 5489<\/td>\n | 141.10.4.21 PMD to MDI optical specifications for 50GBASE-PQX-D3 141.10.4.22 PMD to MDI optical specifications for 25\/10GBASE-PQG-U2 141.10.4.23 PMD to MDI optical specifications for 25\/10GBASE-PQG-U3 141.10.4.24 PMD to MDI optical specifications for 25\/10GBASE-PQX-U2 <\/td>\n<\/tr>\n | ||||||
| 5490<\/td>\n | 141.10.4.25 PMD to MDI optical specifications for 25\/10GBASE-PQX-U3 141.10.4.26 PMD to MDI optical specifications for 25GBASE-PQG-U2 141.10.4.27 PMD to MDI optical specifications for 25GBASE-PQG-U3 141.10.4.28 PMD to MDI optical specifications for 25GBASE-PQX-U2 <\/td>\n<\/tr>\n | ||||||
| 5491<\/td>\n | 141.10.4.29 PMD to MDI optical specifications for 25GBASE-PQX-U3 141.10.4.30 PMD to MDI optical specifications for 50\/10GBASE-PQG-U2 141.10.4.31 PMD to MDI optical specifications for 50\/10GBASE-PQG-U3 141.10.4.32 PMD to MDI optical specifications for 50\/10GBASE-PQX-U2 <\/td>\n<\/tr>\n | ||||||
| 5492<\/td>\n | 141.10.4.33 PMD to MDI optical specifications for 50\/10GBASE-PQX-U3 141.10.4.34 PMD to MDI optical specifications for 50\/25GBASE-PQG-U2 141.10.4.35 PMD to MDI optical specifications for 50\/25GBASE-PQG-U3 141.10.4.36 PMD to MDI optical specifications for 50\/25GBASE-PQX-U2 <\/td>\n<\/tr>\n | ||||||
| 5493<\/td>\n | 141.10.4.37 PMD to MDI optical specifications for 50\/25GBASE-PQX-U3 141.10.4.38 PMD to MDI optical specifications for 50GBASE-PQG-U2 141.10.4.39 PMD to MDI optical specifications for 50GBASE-PQG-U3 141.10.4.40 PMD to MDI optical specifications for 50GBASE-PQX-U2 <\/td>\n<\/tr>\n | ||||||
| 5494<\/td>\n | 141.10.4.41 PMD to MDI optical specifications for 50GBASE-PQX-U3 141.10.4.42 Definitions of optical parameters and measurement methods <\/td>\n<\/tr>\n | ||||||
| 5495<\/td>\n | 141.10.4.43 Characteristics of the fiber optic cabling and MDI 141.10.4.44 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 5496<\/td>\n | 142. Physical Coding Sublayer and Physical Media Attachment for Nx25G-EPON 142.1 Overview 142.1.1 Conventions 142.1.1.1 State diagrams 142.1.1.2 Hexadecimal notation <\/td>\n<\/tr>\n | ||||||
| 5499<\/td>\n | 142.1.1.3 Timers 142.1.1.4 Operations on variables <\/td>\n<\/tr>\n | ||||||
| 5500<\/td>\n | 142.1.1.5 Operations on wrap-around variables 142.1.1.6 FIFO access operations <\/td>\n<\/tr>\n | ||||||
| 5501<\/td>\n | 142.1.2 Delay constraints 142.1.3 Burst transmission <\/td>\n<\/tr>\n | ||||||
| 5502<\/td>\n | 142.1.3.1 Default synchronization pattern parameters <\/td>\n<\/tr>\n | ||||||
| 5503<\/td>\n | 142.2 PCS transmit data path 142.2.1 64B\/66B line encoder <\/td>\n<\/tr>\n | ||||||
| 5505<\/td>\n | 142.2.2 Scrambler 142.2.3 64B\/66B to 256B\/257B transcoder 142.2.4 FEC encoder 142.2.4.1 Low-density parity-check coding <\/td>\n<\/tr>\n | ||||||
| 5508<\/td>\n | 142.2.4.2 FEC encoding process <\/td>\n<\/tr>\n | ||||||
| 5510<\/td>\n | 142.2.4.3 Interleaver <\/td>\n<\/tr>\n | ||||||
| 5515<\/td>\n | 142.2.5 Transmit data path state diagrams 142.2.5.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5516<\/td>\n | 142.2.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5518<\/td>\n | 142.2.5.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5519<\/td>\n | 142.2.5.4 State diagrams 142.2.5.4.1 PCS Input process <\/td>\n<\/tr>\n | ||||||
| 5520<\/td>\n | 142.2.5.4.2 PCS Framer process <\/td>\n<\/tr>\n | ||||||
| 5521<\/td>\n | 142.2.5.4.3 PCS Transmit process <\/td>\n<\/tr>\n | ||||||
| 5522<\/td>\n | 142.3 PCS receive data path 142.3.1 FEC decoder 142.3.1.1 Receive interleaving <\/td>\n<\/tr>\n | ||||||
| 5523<\/td>\n | 142.3.2 256B\/257B to 64B\/66B transcoder 142.3.3 Descrambler <\/td>\n<\/tr>\n | ||||||
| 5524<\/td>\n | 142.3.4 64B\/66B decoder <\/td>\n<\/tr>\n | ||||||
| 5525<\/td>\n | 142.3.5 Receive data path state diagrams 142.3.5.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5526<\/td>\n | 142.3.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5528<\/td>\n | 142.3.5.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5529<\/td>\n | 142.3.5.4 OLT Synchronizer process state diagram 142.3.5.5 ONU Synchronizer process state diagram <\/td>\n<\/tr>\n | ||||||
| 5530<\/td>\n | 142.3.5.6 PCS ONU BER Monitor process <\/td>\n<\/tr>\n | ||||||
| 5531<\/td>\n | 142.3.5.7 PCS Output process 142.4 Nx25G-EPON PMA 142.4.1 Service Interface <\/td>\n<\/tr>\n | ||||||
| 5532<\/td>\n | 142.4.1.1 PMA_UNITDATA[i].request 142.4.1.1.1 Semantics of the service primitive 142.4.1.1.2 When generated 142.4.1.1.3 Effect of receipt 142.4.1.2 PMA_UNITDATA[i].indication 142.4.1.2.1 Semantics of the service primitive 142.4.1.2.2 When generated 142.4.1.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5533<\/td>\n | 142.4.1.3 PMA_SIGNAL[i].request 142.4.1.4 PMA_SIGNAL[i].indication 142.4.1.4.1 Semantics of the service primitive 142.4.1.4.2 When generated 142.4.1.4.3 Effect of receipt 142.4.2 Differential encoder <\/td>\n<\/tr>\n | ||||||
| 5534<\/td>\n | 142.4.3 Differential decoder 142.4.4 PMA transmit clock 142.4.4.1 Loop-timing specifications for ONUs 142.4.5 TCDR measurement 142.4.5.1 Definitions 142.4.5.2 Test specification <\/td>\n<\/tr>\n | ||||||
| 5536<\/td>\n | 142.5 Protocol implementation conformance statement (PICS) proforma for Clause 142, Physical Coding Sublayer and Physical Media Attachment for Nx25G-EPON 142.5.1 Introduction 142.5.2 Identification 142.5.2.1 Implementation identification 142.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5537<\/td>\n | 142.5.3 PCS capabilities\/options 142.5.4 PCS processes <\/td>\n<\/tr>\n | ||||||
| 5538<\/td>\n | 142.5.5 PMA processes <\/td>\n<\/tr>\n | ||||||
| 5539<\/td>\n | 143. Multi-Channel Reconciliation Sublayer 143.1 Overview 143.2 Summary of major concepts <\/td>\n<\/tr>\n | ||||||
| 5540<\/td>\n | 143.2.1 Concept of a logical link and LLID 143.2.2 Concept of an MCRS channel 143.2.3 Binding of multiple MACs to multiple xMII instances <\/td>\n<\/tr>\n | ||||||
| 5541<\/td>\n | 143.2.4 Transmission and reception over multiple MCRS channels 143.2.4.1 Transmission unit 143.2.4.2 Transmission envelopes 143.2.4.3 Envelope headers <\/td>\n<\/tr>\n | ||||||
| 5542<\/td>\n | 143.2.4.4 Interpacket gap adjustment <\/td>\n<\/tr>\n | ||||||
| 5543<\/td>\n | 143.2.5 Dynamic channel bonding <\/td>\n<\/tr>\n | ||||||
| 5544<\/td>\n | 143.2.5.1 LLID transmission over multiple MCRS channels <\/td>\n<\/tr>\n | ||||||
| 5545<\/td>\n | 143.2.5.2 MCRS channel skew remediation mechanism 143.2.5.3 EnvTx and EnvRx buffers <\/td>\n<\/tr>\n | ||||||
| 5547<\/td>\n | 143.2.5.4 Envelope position alignment marker 143.2.6 MDIO addressing model for multi-channel architecture <\/td>\n<\/tr>\n | ||||||
| 5549<\/td>\n | 143.3 MCRS functional specifications 143.3.1 MCRS interfaces 143.3.1.1 PLS service primitives <\/td>\n<\/tr>\n | ||||||
| 5550<\/td>\n | 143.3.1.1.1 Mapping of PLS_DATA[ch].request primitive 143.3.1.1.2 Mapping of PLS_SIGNAL[ch].indication primitive 143.3.1.1.3 Mapping of PLS_DATA[ch].indication primitive <\/td>\n<\/tr>\n | ||||||
| 5551<\/td>\n | 143.3.1.1.4 Mapping of PLS_DATA_VALID[ch].indication primitive 143.3.1.1.5 Mapping of PLS_CARRIER[ch].indication primitive 143.3.1.2 MCRS control primitives 143.3.1.2.1 MCRS_CTRL[ch].request(link_id, epam, env_length) primitive 143.3.1.2.2 MCRS_CTRL[ch].indication() primitive 143.3.1.2.3 MCRS_ECH[ch].indication(Llid) primitive 143.3.1.3 XGMII interfaces 143.3.1.4 25GMII interfaces <\/td>\n<\/tr>\n | ||||||
| 5552<\/td>\n | 143.3.2 Envelope header format <\/td>\n<\/tr>\n | ||||||
| 5553<\/td>\n | 143.3.2.1 CRC8 calculation test sequences <\/td>\n<\/tr>\n | ||||||
| 5554<\/td>\n | 143.3.3 Transmit functional specifications <\/td>\n<\/tr>\n | ||||||
| 5555<\/td>\n | 143.3.3.1 Conventions 143.3.3.2 Application-specific parameter definitions 143.3.3.3 Constants <\/td>\n<\/tr>\n | ||||||
| 5556<\/td>\n | 143.3.3.4 Variables <\/td>\n<\/tr>\n | ||||||
| 5558<\/td>\n | 143.3.3.5 Functions <\/td>\n<\/tr>\n | ||||||
| 5560<\/td>\n | 143.3.3.6 State diagrams 143.3.3.6.1 Input process 143.3.3.6.2 Transmit process <\/td>\n<\/tr>\n | ||||||
| 5562<\/td>\n | 143.3.4 Receive functional specifications <\/td>\n<\/tr>\n | ||||||
| 5563<\/td>\n | 143.3.4.1 Conventions 143.3.4.2 Constants <\/td>\n<\/tr>\n | ||||||
| 5564<\/td>\n | 143.3.4.3 Variables <\/td>\n<\/tr>\n | ||||||
| 5565<\/td>\n | 143.3.4.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5566<\/td>\n | 143.3.4.5 State diagrams 143.3.4.5.1 Receive process <\/td>\n<\/tr>\n | ||||||
| 5567<\/td>\n | 143.3.4.5.2 Output process 143.4 Nx25G-EPON MCRS requirements 143.4.1 Nx25G-EPON architecture <\/td>\n<\/tr>\n | ||||||
| 5569<\/td>\n | 143.4.1.1 MCRS channels 143.4.1.2 Symmetric and asymmetric data rates <\/td>\n<\/tr>\n | ||||||
| 5570<\/td>\n | 143.4.1.3 Nx25G-EPON application-specific parameters 143.4.1.3.1 Constants 143.4.1.3.2 Transmit variables 143.4.2 MCRS time synchronization <\/td>\n<\/tr>\n | ||||||
| 5571<\/td>\n | 143.4.3 Delay variability constraints 143.4.4 Asymmetric rate operation <\/td>\n<\/tr>\n | ||||||
| 5574<\/td>\n | 143.5 Protocol implementation conformance statement (PICS) proforma for Clause 143, Multi-Channel Reconciliation Sublayer 143.5.1 Introduction 143.5.2 Identification 143.5.2.1 Implementation identification 143.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5575<\/td>\n | 143.5.3 Generic MCRS 143.5.4 MCRS in Nx25G-EPON 143.5.4.1 Major capabilities\/option <\/td>\n<\/tr>\n | ||||||
| 5576<\/td>\n | 143.5.4.2 MCRS implementation in Nx25G-EPON <\/td>\n<\/tr>\n | ||||||
| 5577<\/td>\n | 144. Multipoint MAC Control for Nx25G-EPON 144.1 Overview 144.1.1 Principles of point-to-multipoint operation 144.1.1.1 Transmission arbitration <\/td>\n<\/tr>\n | ||||||
| 5578<\/td>\n | 144.1.1.2 Concept of logical links <\/td>\n<\/tr>\n | ||||||
| 5580<\/td>\n | 144.1.1.3 ONU discovery and registration 144.1.2 Position of Multipoint MAC Control (MPMC) within the IEEE 802.3 hierarchy 144.1.3 Functional block diagram 144.1.4 Service interfaces 144.1.4.1 MAC Control service (MCS) interface <\/td>\n<\/tr>\n | ||||||
| 5583<\/td>\n | 144.1.4.2 MAC Control interconnect (MCI) 144.1.4.3 MAC service Interface 144.1.4.4 MCRS Control interface 144.1.5 Conventions 144.2 Protocol-independent operation <\/td>\n<\/tr>\n | ||||||
| 5584<\/td>\n | 144.2.1 Control Parser and Control Multiplexer 144.2.1.1 Constants 144.2.1.2 Counters 144.2.1.3 Variables <\/td>\n<\/tr>\n | ||||||
| 5585<\/td>\n | 144.2.1.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5586<\/td>\n | 144.2.1.5 Control Parser state diagram <\/td>\n<\/tr>\n | ||||||
| 5587<\/td>\n | 144.2.1.6 Control Multiplexer state diagram 144.3 Multipoint Control Protocol (MPCP) 144.3.1 Principles of Multipoint Control Protocol (MPCP) 144.3.1.1 Ranging measurement and time synchronization <\/td>\n<\/tr>\n | ||||||
| 5590<\/td>\n | 144.3.1.2 Granting access to the PON media by the OLT <\/td>\n<\/tr>\n | ||||||
| 5591<\/td>\n | 144.3.2 MPCP block diagram <\/td>\n<\/tr>\n | ||||||
| 5593<\/td>\n | 144.3.3 Delay variability requirements 144.3.4 Logical link identifier (LLID) types 144.3.4.1 Physical Layer ID (PLID) <\/td>\n<\/tr>\n | ||||||
| 5594<\/td>\n | 144.3.4.2 Management link ID (MLID) 144.3.4.3 User link ID (ULID) 144.3.4.4 Group link ID (GLID) 144.3.5 Allocation of LLID values <\/td>\n<\/tr>\n | ||||||
| 5595<\/td>\n | 144.3.6 MPCPDU structure and encoding <\/td>\n<\/tr>\n | ||||||
| 5596<\/td>\n | 144.3.6.1 GATE description <\/td>\n<\/tr>\n | ||||||
| 5598<\/td>\n | 144.3.6.2 REPORT description <\/td>\n<\/tr>\n | ||||||
| 5600<\/td>\n | 144.3.6.3 REGISTER_REQ description <\/td>\n<\/tr>\n | ||||||
| 5601<\/td>\n | 144.3.6.4 REGISTER description <\/td>\n<\/tr>\n | ||||||
| 5603<\/td>\n | 144.3.6.5 REGISTER_ACK description <\/td>\n<\/tr>\n | ||||||
| 5605<\/td>\n | 144.3.6.6 DISCOVERY description <\/td>\n<\/tr>\n | ||||||
| 5607<\/td>\n | 144.3.6.7 SYNC_PATTERN description <\/td>\n<\/tr>\n | ||||||
| 5609<\/td>\n | 144.3.7 Discovery process <\/td>\n<\/tr>\n | ||||||
| 5611<\/td>\n | 144.3.7.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5612<\/td>\n | 144.3.7.2 Counters 144.3.7.3 Variables <\/td>\n<\/tr>\n | ||||||
| 5614<\/td>\n | 144.3.7.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5615<\/td>\n | 144.3.7.5 Messages 144.3.7.6 Discovery Initiation state diagram <\/td>\n<\/tr>\n | ||||||
| 5616<\/td>\n | 144.3.7.7 Registration Completion state diagram <\/td>\n<\/tr>\n | ||||||
| 5617<\/td>\n | 144.3.7.8 ONU Registration state diagram <\/td>\n<\/tr>\n | ||||||
| 5619<\/td>\n | 144.3.8 Granting process 144.3.8.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5620<\/td>\n | 144.3.8.2 Counters 144.3.8.3 Variables <\/td>\n<\/tr>\n | ||||||
| 5621<\/td>\n | 144.3.8.4 Functions 144.3.8.5 Timers 144.3.8.6 Messages 144.3.8.7 GATE Generation state diagram <\/td>\n<\/tr>\n | ||||||
| 5622<\/td>\n | 144.3.8.8 GATE Reception state diagram 144.3.8.9 OLT Envelope Commitment state diagram <\/td>\n<\/tr>\n | ||||||
| 5623<\/td>\n | 144.3.8.10 ONU Envelope Commitment state diagram <\/td>\n<\/tr>\n | ||||||
| 5624<\/td>\n | 144.3.8.11 Envelope Activation state diagram 144.3.9 Discovery process in dual-rate systems 144.3.9.1 OLT rate-specific discovery <\/td>\n<\/tr>\n | ||||||
| 5625<\/td>\n | 144.3.9.2 ONU rate-specific registration <\/td>\n<\/tr>\n | ||||||
| 5626<\/td>\n | 144.4 Channel Control Protocol (CCP) 144.4.1 CCP block diagram <\/td>\n<\/tr>\n | ||||||
| 5627<\/td>\n | 144.4.2 Principles of Channel Control Protocol <\/td>\n<\/tr>\n | ||||||
| 5628<\/td>\n | 144.4.2.1 Disabling a downstream channel at an ONU 144.4.2.2 Enabling a downstream channel at an ONU 144.4.2.3 Disabling an upstream channel at an ONU <\/td>\n<\/tr>\n | ||||||
| 5629<\/td>\n | 144.4.2.4 Enabling an upstream channel at an ONU 144.4.2.5 Local channel state changes at an ONU 144.4.3 CCPDU structure and encoding <\/td>\n<\/tr>\n | ||||||
| 5630<\/td>\n | 144.4.3.1 CC_REQUEST description <\/td>\n<\/tr>\n | ||||||
| 5632<\/td>\n | 144.4.3.2 CC_RESPONSE description <\/td>\n<\/tr>\n | ||||||
| 5633<\/td>\n | 144.4.4 Channel Control operation 144.4.4.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5634<\/td>\n | 144.4.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5635<\/td>\n | 144.4.4.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5636<\/td>\n | 144.4.4.4 Messages 144.4.4.5 OLT CCPDU processing state diagram <\/td>\n<\/tr>\n | ||||||
| 5637<\/td>\n | 144.4.4.6 ONU CCPDU processing state diagram <\/td>\n<\/tr>\n | ||||||
| 5638<\/td>\n | 144.5 Protocol implementation conformance statement (PICS) proforma for Clause 144, Multipoint MAC Control for Nx25G-EPON 144.5.1 Introduction 144.5.2 Identification 144.5.2.1 Implementation identification 144.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5639<\/td>\n | 144.5.3 Major capabilities\/options 144.5.4 PICS proforma tables for Multipoint MAC Control 144.5.4.1 Clock tracking 144.5.4.2 LLID <\/td>\n<\/tr>\n | ||||||
| 5640<\/td>\n | 144.5.4.3 Protocol-independent state diagrams 144.5.4.4 MPCP <\/td>\n<\/tr>\n | ||||||
| 5643<\/td>\n | 144.5.4.5 CCP <\/td>\n<\/tr>\n | ||||||
| 5644<\/td>\n | 145. Power over Ethernet 145.1 Overview <\/td>\n<\/tr>\n | ||||||
| 5645<\/td>\n | 145.1.1 Compatibility considerations 145.1.2 Relationship of Power over Ethernet to the IEEE 802.3 Architecture <\/td>\n<\/tr>\n | ||||||
| 5646<\/td>\n | 145.1.3 System parameters <\/td>\n<\/tr>\n | ||||||
| 5647<\/td>\n | 145.1.4 Cabling requirements <\/td>\n<\/tr>\n | ||||||
| 5648<\/td>\n | 145.2 Power sourcing equipment (PSE) 145.2.1 PSE Type descriptions <\/td>\n<\/tr>\n | ||||||
| 5649<\/td>\n | 145.2.2 PSE location 145.2.3 Midspan PSE variants <\/td>\n<\/tr>\n | ||||||
| 5656<\/td>\n | 145.2.4 PSE PI <\/td>\n<\/tr>\n | ||||||
| 5657<\/td>\n | 145.2.5 PSE state diagrams 145.2.5.1 State diagram overview and timing <\/td>\n<\/tr>\n | ||||||
| 5658<\/td>\n | 145.2.5.2 Conventions <\/td>\n<\/tr>\n | ||||||
| 5659<\/td>\n | 145.2.5.2.1 Alternative designation 145.2.5.3 Constants 145.2.5.4 Variables <\/td>\n<\/tr>\n | ||||||
| 5669<\/td>\n | 145.2.5.5 Timers <\/td>\n<\/tr>\n | ||||||
| 5672<\/td>\n | 145.2.5.6 Functions <\/td>\n<\/tr>\n | ||||||
| 5677<\/td>\n | 145.2.5.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5693<\/td>\n | 145.2.6 PSE detection of PDs 145.2.6.1 PSE detection validation circuit <\/td>\n<\/tr>\n | ||||||
| 5694<\/td>\n | 145.2.6.2 Detection probe requirements <\/td>\n<\/tr>\n | ||||||
| 5695<\/td>\n | 145.2.6.3 Detection criteria 145.2.6.4 Rejection criteria <\/td>\n<\/tr>\n | ||||||
| 5696<\/td>\n | 145.2.6.5 Open circuit criteria 145.2.7 Connection check 145.2.8 PSE classification of PDs and mutual identification <\/td>\n<\/tr>\n | ||||||
| 5700<\/td>\n | 145.2.8.1 PSE Multiple-Event Physical Layer classification <\/td>\n<\/tr>\n | ||||||
| 5703<\/td>\n | 145.2.8.2 Autoclass (optional) <\/td>\n<\/tr>\n | ||||||
| 5704<\/td>\n | 145.2.9 4PID requirements 145.2.10 Power supply output <\/td>\n<\/tr>\n | ||||||
| 5708<\/td>\n | 145.2.10.1 Output voltage in the power on states 145.2.10.2 Output voltage pair-to-pair difference 145.2.10.3 Voltage transients 145.2.10.4 Reflected voltage 145.2.10.5 Power feeding ripple and noise 145.2.10.6 Continuous current capability in the power on states <\/td>\n<\/tr>\n | ||||||
| 5711<\/td>\n | 145.2.10.6.1 PSE pair-to-pair current unbalance <\/td>\n<\/tr>\n | ||||||
| 5713<\/td>\n | 145.2.10.7 Current during power up <\/td>\n<\/tr>\n | ||||||
| 5715<\/td>\n | 145.2.10.8 Overload current 145.2.10.9 Short circuit current <\/td>\n<\/tr>\n | ||||||
| 5718<\/td>\n | 145.2.10.10 Turn off time 145.2.10.11 Turn off voltage 145.2.10.12 Intra-pair current unbalance 145.2.10.13 Type power <\/td>\n<\/tr>\n | ||||||
| 5719<\/td>\n | 145.2.10.14 Power turn on time 145.2.10.15 Error delay timing 145.2.10.16 PSE stability 145.2.11 Power supply allocation 145.2.12 PSE Maintain Power Signature (MPS) requirements <\/td>\n<\/tr>\n | ||||||
| 5720<\/td>\n | 145.3 Powered devices (PDs) <\/td>\n<\/tr>\n | ||||||
| 5721<\/td>\n | 145.3.1 PD Type descriptions 145.3.2 PD PI <\/td>\n<\/tr>\n | ||||||
| 5723<\/td>\n | 145.3.3 PD state diagrams 145.3.3.1 Conventions 145.3.3.2 Mode designation 145.3.3.3 Single-signature PD state diagrams 145.3.3.3.1 Constants 145.3.3.3.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5726<\/td>\n | 145.3.3.3.3 Timers <\/td>\n<\/tr>\n | ||||||
| 5727<\/td>\n | 145.3.3.3.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5728<\/td>\n | 145.3.3.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5730<\/td>\n | 145.3.3.4 Dual-signature PD state diagram 145.3.3.4.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5731<\/td>\n | 145.3.3.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5733<\/td>\n | 145.3.3.4.3 Timers 145.3.3.4.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5735<\/td>\n | 145.3.3.4.5 State diagram <\/td>\n<\/tr>\n | ||||||
| 5736<\/td>\n | 145.3.4 PD valid and non-valid detection signatures <\/td>\n<\/tr>\n | ||||||
| 5738<\/td>\n | 145.3.5 PD signature configurations <\/td>\n<\/tr>\n | ||||||
| 5739<\/td>\n | 145.3.6 PD classification <\/td>\n<\/tr>\n | ||||||
| 5740<\/td>\n | 145.3.6.1 PD Multiple-Event class signature <\/td>\n<\/tr>\n | ||||||
| 5742<\/td>\n | 145.3.6.1.1 Mark Event behavior 145.3.6.2 Autoclass (optional) <\/td>\n<\/tr>\n | ||||||
| 5743<\/td>\n | 145.3.7 PSE Type identification 145.3.8 PD power <\/td>\n<\/tr>\n | ||||||
| 5746<\/td>\n | 145.3.8.1 Input voltage 145.3.8.2 Input average power <\/td>\n<\/tr>\n | ||||||
| 5747<\/td>\n | 145.3.8.2.1 Input average power exceptions 145.3.8.2.2 System stability test conditions during startup and steady state operation 145.3.8.3 Input inrush current <\/td>\n<\/tr>\n | ||||||
| 5748<\/td>\n | 145.3.8.4 Peak operating power <\/td>\n<\/tr>\n | ||||||
| 5749<\/td>\n | 145.3.8.4.1 Peak operating power exceptions 145.3.8.5 Input current slew rate 145.3.8.6 PD behavior during transients at the PSE PI <\/td>\n<\/tr>\n | ||||||
| 5750<\/td>\n | 145.3.8.7 Ripple and noise 145.3.8.8 Reflected voltage <\/td>\n<\/tr>\n | ||||||
| 5751<\/td>\n | 145.3.8.9 PD pair-to-pair current unbalance <\/td>\n<\/tr>\n | ||||||
| 5753<\/td>\n | 145.3.9 PD Maintain Power Signature <\/td>\n<\/tr>\n | ||||||
| 5755<\/td>\n | 145.4 Additional electrical specifications 145.4.1 Electrical isolation 145.4.1.1 Electrical isolation environments 145.4.1.1.1 Environment A requirements <\/td>\n<\/tr>\n | ||||||
| 5756<\/td>\n | 145.4.1.1.2 Environment B requirements 145.4.2 Fault tolerance <\/td>\n<\/tr>\n | ||||||
| 5757<\/td>\n | 145.4.3 Impedance balance <\/td>\n<\/tr>\n | ||||||
| 5758<\/td>\n | 145.4.4 Common-mode output voltage <\/td>\n<\/tr>\n | ||||||
| 5760<\/td>\n | 145.4.5 Pair-to-pair output noise voltage 145.4.6 Differential noise voltage <\/td>\n<\/tr>\n | ||||||
| 5761<\/td>\n | 145.4.7 Return loss 145.4.8 100BASE-TX transformer droop 145.4.9 Midspan PSE device additional requirements <\/td>\n<\/tr>\n | ||||||
| 5763<\/td>\n | 145.4.9.1 Connector Midspan PSE device transmission requirements 145.4.9.1.1 Near End Crosstalk (NEXT) <\/td>\n<\/tr>\n | ||||||
| 5764<\/td>\n | 145.4.9.1.2 Insertion loss 145.4.9.1.3 Return loss 145.4.9.2 Cord Midspan PSE <\/td>\n<\/tr>\n | ||||||
| 5765<\/td>\n | 145.4.9.2.1 Maximum link delay 145.4.9.2.2 Maximum link delay skew 145.4.9.3 Midspan signal path requirements 145.4.9.3.1 Alternative A Midspan PSE signal path transfer function <\/td>\n<\/tr>\n | ||||||
| 5766<\/td>\n | 145.4.9.4 Coupling parameters between link segments 145.4.9.4.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss 145.4.9.4.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss <\/td>\n<\/tr>\n | ||||||
| 5767<\/td>\n | 145.5 Data Link Layer classification 145.5.1 TLV frame definition 145.5.2 Data Link Layer classification timing requirements 145.5.3 Power control state diagrams <\/td>\n<\/tr>\n | ||||||
| 5768<\/td>\n | 145.5.3.1 Conventions 145.5.3.2 PSE power control state diagrams 145.5.3.2.1 Alternative designation 145.5.3.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5772<\/td>\n | 145.5.3.2.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5773<\/td>\n | 145.5.3.2.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n | ||||||
| 5774<\/td>\n | 145.5.3.2.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5778<\/td>\n | 145.5.3.3 Single-signature PD power control state diagrams 145.5.3.3.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5780<\/td>\n | 145.5.3.3.2 Timers 145.5.3.3.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5781<\/td>\n | 145.5.3.3.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n | ||||||
| 5782<\/td>\n | 145.5.3.3.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5783<\/td>\n | 145.5.3.4 Dual-signature PD power control state diagrams 145.5.3.4.1 Mode designation <\/td>\n<\/tr>\n | ||||||
| 5784<\/td>\n | 145.5.3.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5786<\/td>\n | 145.5.3.4.3 Functions <\/td>\n<\/tr>\n | ||||||
| 5787<\/td>\n | 145.5.3.4.4 Attribute to state diagram variable mapping <\/td>\n<\/tr>\n | ||||||
| 5788<\/td>\n | 145.5.3.4.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5790<\/td>\n | 145.5.4 Power requests and allocations 145.5.5 State change procedure across a link (single-signature) <\/td>\n<\/tr>\n | ||||||
| 5791<\/td>\n | 145.5.5.1 PSE state change procedure across a link (single-signature) 145.5.5.2 PD state change procedure across a link (single-signature) <\/td>\n<\/tr>\n | ||||||
| 5792<\/td>\n | 145.5.6 State change procedure across a link (dual-signature) 145.5.6.1 Transitions between 2-pair and 4-pair mode (dual-signature) <\/td>\n<\/tr>\n | ||||||
| 5793<\/td>\n | 145.5.6.2 PSE state change procedure across a link (dual-signature) 145.5.6.3 PD state change procedure across a link (dual-signature) 145.5.7 Autoclass <\/td>\n<\/tr>\n | ||||||
| 5794<\/td>\n | 145.6 Environmental 145.6.1 General safety 145.6.2 Network safety 145.6.3 Installation and maintenance guidelines <\/td>\n<\/tr>\n | ||||||
| 5795<\/td>\n | 145.6.4 Patch panel considerations 145.6.5 Electromagnetic emissions 145.6.6 Temperature and humidity 145.6.7 Labeling <\/td>\n<\/tr>\n | ||||||
| 5796<\/td>\n | 145.7 Protocol implementation conformance statement (PICS) proforma for Clause 145, Power over Ethernet 145.7.1 Introduction 145.7.2 Identification 145.7.2.1 Implementation identification 145.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5797<\/td>\n | 145.7.2.3 PD Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5798<\/td>\n | 145.7.2.4 PSE Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 5799<\/td>\n | 145.7.3 PICS proforma tables for Power over Ethernet 145.7.3.1 Power sourcing equipment <\/td>\n<\/tr>\n | ||||||
| 5804<\/td>\n | 145.7.3.2 Powered devices <\/td>\n<\/tr>\n | ||||||
| 5809<\/td>\n | 145.7.3.3 Electrical specifications applicable to the PSE and PD <\/td>\n<\/tr>\n | ||||||
| 5810<\/td>\n | 145.7.3.4 Electrical specifications applicable to the PSE <\/td>\n<\/tr>\n | ||||||
| 5812<\/td>\n | 145.7.3.5 Electrical specifications applicable to the PD 145.7.3.6 Data Link Layer classification requirements <\/td>\n<\/tr>\n | ||||||
| 5813<\/td>\n | 145.7.3.7 Environmental specifications applicable to PSEs and PDs <\/td>\n<\/tr>\n | ||||||
| 5814<\/td>\n | 145.7.3.8 Environmental specifications applicable to the PSE <\/td>\n<\/tr>\n | ||||||
| 5815<\/td>\n | 146. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1L 146.1 Overview 146.1.1 Relationship of 10BASE-T1L to other standards 146.1.2 Operation of 10BASE-T1L <\/td>\n<\/tr>\n | ||||||
| 5816<\/td>\n | 146.1.2.1 Physical Coding Sublayer (PCS) 146.1.2.2 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 5817<\/td>\n | 146.1.2.3 EEE capability 146.1.2.4 Signaling 146.1.3 Conventions in this clause <\/td>\n<\/tr>\n | ||||||
| 5818<\/td>\n | 146.1.3.1 State diagram notation 146.1.3.2 State diagram timer specifications 146.1.3.3 Service specifications 146.2 Service primitives and interfaces 146.2.1 PMA_LINK.request <\/td>\n<\/tr>\n | ||||||
| 5819<\/td>\n | 146.2.1.1 Semantics of the primitive 146.2.1.2 When generated 146.2.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5820<\/td>\n | 146.2.2 PMA_LINK.indication 146.2.2.1 Semantics of the primitive 146.2.2.2 When generated 146.2.2.3 Effect of receipt 146.2.3 PMA_TXMODE.indication 146.2.3.1 Semantics of the primitive 146.2.3.2 When generated 146.2.3.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5821<\/td>\n | 146.2.4 PMA_UNITDATA.indication 146.2.4.1 Semantics of the primitive 146.2.4.2 When generated 146.2.4.3 Effect of receipt 146.2.5 PMA_UNITDATA.request 146.2.5.1 Semantics of the primitive 146.2.5.2 When generated 146.2.5.3 Effect of receipt 146.2.6 PMA_RXSTATUS.indication <\/td>\n<\/tr>\n | ||||||
| 5822<\/td>\n | 146.2.6.1 Semantics of the primitive 146.2.6.2 When generated 146.2.6.3 Effect of receipt 146.2.7 PMA_REMRXSTATUS.request 146.2.7.1 Semantics of the primitive 146.2.7.2 When generated 146.2.7.3 Effect of receipt 146.2.8 PMA_SCRSTATUS.request 146.2.8.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5823<\/td>\n | 146.2.8.2 When generated 146.2.8.3 Effect of receipt 146.2.9 PMA_TXEN.request (tx_enable_mii) 146.2.9.1 Semantics of the primitive 146.2.9.2 When generated 146.2.9.3 Effect of receipt 146.2.10 PMA_RX_LPI_STATUS.request (rx_lpi_active) 146.2.10.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5824<\/td>\n | 146.2.10.2 When generated 146.2.10.3 Effect of receipt 146.2.11 PMA_TX_LPI_STATUS.request (tx_lpi_active) 146.2.11.1 Semantics of the primitive 146.2.11.2 When generated 146.2.11.3 Effect of receipt 146.2.12 PMA_TX_LPI_STATUS.indication 146.2.12.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5825<\/td>\n | 146.2.12.2 When generated 146.2.12.3 Effect of receipt 146.3 Physical Coding Sublayer (PCS) functions 146.3.1 PCS Reset function 146.3.2 PCS Data Transmission Enable 146.3.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5827<\/td>\n | 146.3.3 PCS Transmit 146.3.3.1 PCS Transmit state diagram <\/td>\n<\/tr>\n | ||||||
| 5828<\/td>\n | 146.3.3.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5829<\/td>\n | 146.3.3.1.2 Functions <\/td>\n<\/tr>\n | ||||||
| 5831<\/td>\n | 146.3.3.1.3 Timers 146.3.3.1.4 Abbreviations 146.3.3.1.5 Constants 146.3.3.1.6 State diagram 146.3.3.2 PCS Transmit multiplexer state diagram 146.3.3.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5833<\/td>\n | 146.3.3.2.2 Timers 146.3.3.2.3 Abbreviations 146.3.3.2.4 State diagram <\/td>\n<\/tr>\n | ||||||
| 5834<\/td>\n | 146.3.3.3 PCS Transmit symbol generation 146.3.3.4 Data and idle stream scrambling 146.3.3.4.1 Side-stream scrambler polynomial <\/td>\n<\/tr>\n | ||||||
| 5835<\/td>\n | 146.3.3.4.2 Generation of Syn[3:0] <\/td>\n<\/tr>\n | ||||||
| 5836<\/td>\n | 146.3.3.4.3 Generation of scrambled bits Sdn[3:0] 146.3.3.5 Generation of code-groups 146.3.3.5.1 Generation of code-groups in mode SEND_N and SEND_I <\/td>\n<\/tr>\n | ||||||
| 5838<\/td>\n | 146.3.3.5.2 Generation of code-groups in mode SEND_Z 146.3.4 PCS Receive 146.3.4.1 PCS Receive overview <\/td>\n<\/tr>\n | ||||||
| 5839<\/td>\n | 146.3.4.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5840<\/td>\n | 146.3.4.1.2 Functions <\/td>\n<\/tr>\n | ||||||
| 5841<\/td>\n | 146.3.4.1.3 Timers 146.3.4.1.4 Constants <\/td>\n<\/tr>\n | ||||||
| 5842<\/td>\n | 146.3.4.1.5 State diagrams 146.3.4.2 PCS Receive symbol decoding <\/td>\n<\/tr>\n | ||||||
| 5845<\/td>\n | 146.3.4.3 PCS Receive descrambler polynomial 146.3.4.4 PCS Receive automatic polarity detection 146.3.5 PCS loopback 146.4 Physical Medium Attachment (PMA) sublayer <\/td>\n<\/tr>\n | ||||||
| 5847<\/td>\n | 146.4.1 PMA Reset function 146.4.2 PMA Transmit function 146.4.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 5848<\/td>\n | 146.4.4 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 5849<\/td>\n | 146.4.4.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5850<\/td>\n | 146.4.4.2 Timers <\/td>\n<\/tr>\n | ||||||
| 5852<\/td>\n | 146.4.4.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 5855<\/td>\n | 146.4.5 Link Monitor function 146.4.5.1 Variables 146.4.5.2 State diagram 146.4.6 PMA clock recovery 146.4.7 LPI quiet-refresh cycling <\/td>\n<\/tr>\n | ||||||
| 5856<\/td>\n | 146.4.7.1 Variables 146.4.7.2 Timers <\/td>\n<\/tr>\n | ||||||
| 5857<\/td>\n | 146.4.7.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 5858<\/td>\n | 146.5 PMA electrical specifications 146.5.1 EMC tests 146.5.1.1 Immunity\u2014DPI test 146.5.1.2 Emission\u2014Conducted emission test 146.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 5859<\/td>\n | 146.5.3 Test fixture 146.5.4 Transmitter electrical specifications 146.5.4.1 Transmitter output voltage <\/td>\n<\/tr>\n | ||||||
| 5860<\/td>\n | 146.5.4.2 Transmitter output droop 146.5.4.3 Transmitter timing jitter 146.5.4.4 Transmitter Power Spectral Density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 5862<\/td>\n | 146.5.4.5 Transmit clock frequency 146.5.5 Receiver electrical specifications 146.5.5.1 Receiver differential input signals 146.5.5.2 Receiver frequency tolerance 146.5.5.3 Alien crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 5863<\/td>\n | 146.5.6 PMA local loopback 146.6 Management interface 146.6.1 Support for Auto-Negotiation 146.6.2 MASTER-SLAVE configuration <\/td>\n<\/tr>\n | ||||||
| 5864<\/td>\n | 146.6.3 PHY initialization 146.6.4 Increased transmit level configuration 146.6.5 EEE configuration 146.6.6 PMA and PCS MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 5865<\/td>\n | 146.7 Link segment characteristics 146.7.1 Link transmission parameters for 10BASE-T1L <\/td>\n<\/tr>\n | ||||||
| 5866<\/td>\n | 146.7.1.1 Insertion loss 146.7.1.1.1 Insertion loss for PHYs in the 2.4 Vpp operation mode <\/td>\n<\/tr>\n | ||||||
| 5867<\/td>\n | 146.7.1.1.2 Insertion loss supported for PHYs in 1.0 Vpp operation mode 146.7.1.2 Return loss <\/td>\n<\/tr>\n | ||||||
| 5868<\/td>\n | 146.7.1.3 Maximum link delay 146.7.1.4 Differential-to-common-mode conversion 146.7.1.5 Coupling attenuation <\/td>\n<\/tr>\n | ||||||
| 5869<\/td>\n | 146.7.1.6 Electromagnetic classifications 146.7.2 Coupling parameters between 10BASE-T1L link segments 146.7.2.1 Multiple disturber power sum alien near-end crosstalk (PSANEXT) loss <\/td>\n<\/tr>\n | ||||||
| 5870<\/td>\n | 146.7.2.2 Multiple disturber power sum alien far-end crosstalk (PSAFEXT) loss 146.8 MDI specification 146.8.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 5873<\/td>\n | 146.8.2 MDI electrical specification 146.8.3 MDI return loss 146.8.4 MDI mode conversion loss 146.8.5 MDI DC power voltage tolerance 146.8.6 MDI fault tolerance <\/td>\n<\/tr>\n | ||||||
| 5874<\/td>\n | 146.9 Environmental specifications 146.9.1 General safety 146.9.2 Network safety 146.9.2.1 Environmental safety 146.9.2.2 Electromagnetic compatibility 146.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5876<\/td>\n | 146.11 Protocol implementation conformance statement (PICS) proforma for Clause 146, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1L 146.11.1 Introduction 146.11.2 Identification 146.11.2.1 Implementation identification 146.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5877<\/td>\n | 146.11.3 Major capabilities\/options 146.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1L 146.11.4.1 Physical Coding Sublayer (PCS) 146.11.4.1.1 PCS Transmit <\/td>\n<\/tr>\n | ||||||
| 5878<\/td>\n | 146.11.4.1.2 PCS Receive <\/td>\n<\/tr>\n | ||||||
| 5879<\/td>\n | 146.11.4.1.3 PCS loopback 146.11.4.2 Physical Medium Attachment (PMA) 146.11.4.2.1 PMA function <\/td>\n<\/tr>\n | ||||||
| 5880<\/td>\n | 146.11.4.2.2 PMA electrical specification <\/td>\n<\/tr>\n | ||||||
| 5882<\/td>\n | 146.11.4.3 Management interface <\/td>\n<\/tr>\n | ||||||
| 5883<\/td>\n | 146.11.4.4 Link Segment characteristics 146.11.4.5 MDI specifications <\/td>\n<\/tr>\n | ||||||
| 5884<\/td>\n | 146.11.4.6 Environmental specifications 146.11.4.7 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5885<\/td>\n | 147. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1S 147.1 Overview 147.1.1 Relationship of 10BASE-T1S to other standards 147.1.2 Operation of 10BASE-T1S <\/td>\n<\/tr>\n | ||||||
| 5886<\/td>\n | 147.1.3 Conventions in this clause 147.1.3.1 State diagram notation 147.1.3.2 State diagram timer specifications <\/td>\n<\/tr>\n | ||||||
| 5887<\/td>\n | 147.1.3.3 Service specifications 147.2 Service primitives and interfaces <\/td>\n<\/tr>\n | ||||||
| 5888<\/td>\n | 147.2.1 PMA_UNITDATA.indication 147.2.1.1 Semantics of the primitive 147.2.1.2 When generated 147.2.1.3 Effect of receipt 147.2.2 PMA_UNITDATA.request 147.2.2.1 Semantics of the primitive 147.2.2.2 When generated 147.2.2.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5889<\/td>\n | 147.2.3 Mapping of PMA_CARRIER.indication 147.2.3.1 Function 147.2.3.2 Semantic of the service primitive 147.2.3.3 When generated 147.2.4 PMA_LINK.request 147.2.4.1 Semantics of the primitive 147.2.4.2 When generated 147.2.5 PMA_LINK.indication 147.2.5.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5890<\/td>\n | 147.2.5.2 When generated 147.2.5.3 Effect of receipt 147.2.6 PCS_STATUS.indication 147.2.6.1 Semantics of the primitive 147.2.6.2 When generated 147.2.6.3 Effect of receipt 147.3 Physical Coding Sublayer (PCS) functions 147.3.1 PCS Reset function <\/td>\n<\/tr>\n | ||||||
| 5891<\/td>\n | 147.3.2 PCS Transmit 147.3.2.1 PCS Transmit overview <\/td>\n<\/tr>\n | ||||||
| 5892<\/td>\n | 147.3.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5893<\/td>\n | 147.3.2.3 Constants <\/td>\n<\/tr>\n | ||||||
| 5894<\/td>\n | 147.3.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5895<\/td>\n | 147.3.2.5 Abbreviations 147.3.2.6 Timers <\/td>\n<\/tr>\n | ||||||
| 5896<\/td>\n | 147.3.2.7 State diagram <\/td>\n<\/tr>\n | ||||||
| 5897<\/td>\n | 147.3.2.8 Self-synchronizing scrambler <\/td>\n<\/tr>\n | ||||||
| 5898<\/td>\n | 147.3.2.9 Jabber functional requirements 147.3.3 PCS Receive 147.3.3.1 PCS Receive overview <\/td>\n<\/tr>\n | ||||||
| 5899<\/td>\n | 147.3.3.2 Variables 147.3.3.3 Constants <\/td>\n<\/tr>\n | ||||||
| 5900<\/td>\n | 147.3.3.4 Functions 147.3.3.5 Abbreviations 147.3.3.6 Timers <\/td>\n<\/tr>\n | ||||||
| 5901<\/td>\n | 147.3.3.7 State diagrams <\/td>\n<\/tr>\n | ||||||
| 5903<\/td>\n | 147.3.3.8 Self-synchronizing descrambler 147.3.3.9 Jabber diagnostics 147.3.4 PCS loopback 147.3.5 Collision detection <\/td>\n<\/tr>\n | ||||||
| 5904<\/td>\n | 147.3.6 Carrier sense 147.3.7 Support for PCS status generation 147.3.7.1 Heartbeat transmit overview 147.3.7.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5905<\/td>\n | 147.3.7.1.2 Timers <\/td>\n<\/tr>\n | ||||||
| 5906<\/td>\n | 147.3.7.1.3 State diagram <\/td>\n<\/tr>\n | ||||||
| 5907<\/td>\n | 147.3.7.2 Heartbeat receive overview 147.3.7.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 5908<\/td>\n | 147.3.7.2.2 Constants 147.3.7.2.3 Timers 147.3.7.2.4 State diagram <\/td>\n<\/tr>\n | ||||||
| 5909<\/td>\n | 147.4 Physical Medium Attachment (PMA) sublayer 147.4.1 PMA Reset function 147.4.2 PMA Transmit function <\/td>\n<\/tr>\n | ||||||
| 5910<\/td>\n | 147.4.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 5911<\/td>\n | 147.4.4 Link Monitor function 147.4.4.1 Link Monitor overview 147.4.4.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5912<\/td>\n | 147.5 PMA electrical specifications 147.5.1 EMC tests 147.5.1.1 Immunity\u2014DPI test 147.5.1.2 Emission\u2014Conducted emission test 147.5.2 Test modes <\/td>\n<\/tr>\n | ||||||
| 5913<\/td>\n | 147.5.3 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 5914<\/td>\n | 147.5.4 Transmitter electrical specification 147.5.4.1 Transmitter output voltage 147.5.4.2 Transmitter output droop 147.5.4.3 Transmitter timing jitter <\/td>\n<\/tr>\n | ||||||
| 5915<\/td>\n | 147.5.4.4 Transmitter Power Spectral Density (PSD) 147.5.4.4.1 Upper PSD 147.5.4.4.2 PSD mask <\/td>\n<\/tr>\n | ||||||
| 5916<\/td>\n | 147.5.4.5 Transmitter high impedance mode 147.5.5 Receiver electrical specifications 147.5.5.1 Receiver differential input signals 147.5.5.2 Alien crosstalk noise rejection 147.5.6 PMA local loopback <\/td>\n<\/tr>\n | ||||||
| 5917<\/td>\n | 147.6 Management interface 147.6.1 Support for Auto-Negotiation 147.7 Point-to-point link segment characteristics 147.7.1 Insertion loss 147.7.2 Return loss <\/td>\n<\/tr>\n | ||||||
| 5918<\/td>\n | 147.7.3 Mode conversion loss 147.7.4 Power sum alien near-end crosstalk (PSANEXT) 147.7.5 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF) 147.8 Mixing segment characteristics <\/td>\n<\/tr>\n | ||||||
| 5919<\/td>\n | 147.8.1 Insertion loss 147.8.2 Return loss 147.8.3 Mode conversion loss 147.9 MDI specification 147.9.1 MDI connectors <\/td>\n<\/tr>\n | ||||||
| 5922<\/td>\n | 147.9.2 MDI electrical specification 147.9.3 MDI line powering voltage tolerance 147.9.4 MDI fault tolerance <\/td>\n<\/tr>\n | ||||||
| 5923<\/td>\n | 147.10 Environmental specifications 147.10.1 General safety 147.10.2 Network safety 147.10.2.1 Environmental safety <\/td>\n<\/tr>\n | ||||||
| 5924<\/td>\n | 147.10.2.2 Electromagnetic compatibility 147.11 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5925<\/td>\n | 147.12 Protocol implementation conformance statement (PICS) proforma for Clause 147, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1S 147.12.1 Introduction 147.12.2 Identification 147.12.2.1 Implementation identification 147.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5926<\/td>\n | 147.12.3 Major capabilities\/options 147.12.4 PICS proforma tables for Physical Medium Attachment (PMA) sublayer and baseband medium, type 10BASE-T1S 147.12.4.1 PCS Transmit <\/td>\n<\/tr>\n | ||||||
| 5927<\/td>\n | 147.12.4.2 PCS Receive 147.12.4.3 PCS loopback <\/td>\n<\/tr>\n | ||||||
| 5928<\/td>\n | 147.12.4.4 Collision detection 147.12.4.5 Support for PCS status generation 147.12.4.6 Physical Medium Attachment (PMA) 147.12.4.6.1 PMA function <\/td>\n<\/tr>\n | ||||||
| 5929<\/td>\n | 147.12.4.6.2 PMA electrical specification <\/td>\n<\/tr>\n | ||||||
| 5931<\/td>\n | 147.12.4.7 Point-to-point link Segment characteristics 147.12.4.8 Mixing Segment characteristics <\/td>\n<\/tr>\n | ||||||
| 5932<\/td>\n | 147.12.4.9 MDI specification 147.12.4.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 5933<\/td>\n | 148. PLCA Reconciliation Sublayer (RS) 148.1 Introduction 148.1.1 Conventions in this clause 148.1.1.1 State diagram notation 148.1.1.2 State diagram timer specifications 148.1.1.3 Service specifications 148.2 Overview <\/td>\n<\/tr>\n | ||||||
| 5934<\/td>\n | 148.3 Relationship with other IEEE standards <\/td>\n<\/tr>\n | ||||||
| 5935<\/td>\n | 148.4 PLCA Reconciliation Sublayer operation 148.4.1 General 148.4.2 Mapping of MII signals to PLS service primitives and PLCA functions 148.4.2.1 Mapping of PLS_DATA.request 148.4.2.1.1 Function <\/td>\n<\/tr>\n | ||||||
| 5936<\/td>\n | 148.4.2.1.2 Semantic of the service primitive 148.4.2.1.3 When generated 148.4.2.2 Mapping of PLS_DATA.indication 148.4.2.3 Mapping of PLS_CARRIER.indication 148.4.2.3.1 Function 148.4.2.3.2 Semantic of the service primitive 148.4.2.3.3 When generated 148.4.2.4 Mapping of PLS_SIGNAL.indication 148.4.2.4.1 Function <\/td>\n<\/tr>\n | ||||||
| 5937<\/td>\n | 148.4.2.4.2 Semantic of the service primitive 148.4.2.4.3 When generated 148.4.2.5 Mapping of PLS_DATA_VALID.indication 148.4.2.6 Generation of TX_ER 148.4.2.7 Response to RX_ER indication 148.4.3 Requirements for the PHY 148.4.3.1 PHY response to PLCA commands and notifications 148.4.3.1.1 BEACON request 148.4.3.1.2 COMMIT request <\/td>\n<\/tr>\n | ||||||
| 5938<\/td>\n | 148.4.3.2 Mapping of MII signals to PLCA variables 148.4.3.2.1 BEACON indication 148.4.3.2.2 COMMIT indication 148.4.4 PLCA Control 148.4.4.1 PLCA Control state diagram <\/td>\n<\/tr>\n | ||||||
| 5939<\/td>\n | 148.4.4.2 PLCA Control variables <\/td>\n<\/tr>\n | ||||||
| 5941<\/td>\n | 148.4.4.3 Functions 148.4.4.4 Timers <\/td>\n<\/tr>\n | ||||||
| 5942<\/td>\n | 148.4.4.5 Abbreviations <\/td>\n<\/tr>\n | ||||||
| 5943<\/td>\n | 148.4.4.6 State diagram <\/td>\n<\/tr>\n | ||||||
| 5945<\/td>\n | 148.4.5 PLCA Data 148.4.5.1 PLCA Data state diagram <\/td>\n<\/tr>\n | ||||||
| 5946<\/td>\n | 148.4.5.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5947<\/td>\n | 148.4.5.3 Functions 148.4.5.4 Timers 148.4.5.5 Abbreviations 148.4.5.6 Constants <\/td>\n<\/tr>\n | ||||||
| 5948<\/td>\n | 148.4.5.7 State diagram <\/td>\n<\/tr>\n | ||||||
| 5950<\/td>\n | 148.4.6 PLCA Status 148.4.6.1 PLCA Status state diagram 148.4.6.2 PLCA Status variables 148.4.6.3 Functions 148.4.6.4 Timers <\/td>\n<\/tr>\n | ||||||
| 5951<\/td>\n | 148.4.6.5 State diagram <\/td>\n<\/tr>\n | ||||||
| 5952<\/td>\n | 148.5 Protocol implementation conformance statement (PICS) proforma for Clause 148, PLCA Reconciliation Sublayer (RS) 148.5.1 Introduction 148.5.2 Identification 148.5.2.1 Implementation identification 148.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 5953<\/td>\n | 148.5.3 PICS proforma tables for PLCA Reconciliation Sublayer (RS) 148.5.3.1 Reconciliation Sublayer 148.5.3.2 Mapping of MII signals to PLS service primitives and PLCA functions <\/td>\n<\/tr>\n | ||||||
| 5954<\/td>\n | 148.5.3.3 Specific RS and PHY specification 148.5.3.4 PLCA Control 148.5.3.5 PLCA Data 148.5.3.6 PLCA Status <\/td>\n<\/tr>\n | ||||||
| 5955<\/td>\n | 149. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 149.1 Overview 149.1.1 Nomenclature 149.1.2 Relationship of 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 to other standards <\/td>\n<\/tr>\n | ||||||
| 5956<\/td>\n | 149.1.3 Operation of 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 <\/td>\n<\/tr>\n | ||||||
| 5957<\/td>\n | 149.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n | ||||||
| 5960<\/td>\n | 149.1.3.2 Physical Medium Attachment (PMA) sublayer 149.1.3.3 EEE Capability 149.1.3.4 Link Synchronization 149.1.4 Signaling <\/td>\n<\/tr>\n | ||||||
| 5961<\/td>\n | 149.1.5 Interfaces 149.1.6 Conventions in this clause 149.2 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 service primitives and interfaces <\/td>\n<\/tr>\n | ||||||
| 5962<\/td>\n | 149.2.1 Technology Dependent Interface 149.2.1.1 PMA_LINK.request 149.2.1.1.1 Semantics of the primitive 149.2.1.1.2 When generated 149.2.1.1.3 Effect of receipt 149.2.1.2 PMA_LINK.indication 149.2.1.2.1 Semantics of the primitive 149.2.1.2.2 When generated <\/td>\n<\/tr>\n | ||||||
| 5963<\/td>\n | 149.2.1.2.3 Effect of receipt 149.2.2 PMA service interface 149.2.2.1 PMA_TXMODE.indication 149.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n | ||||||
| 5964<\/td>\n | 149.2.2.1.2 When generated 149.2.2.1.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5965<\/td>\n | 149.2.2.2 PMA_CONFIG.indication 149.2.2.2.1 Semantics of the primitive 149.2.2.2.2 When generated 149.2.2.2.3 Effect of receipt 149.2.2.3 PMA_UNITDATA.request 149.2.2.3.1 Semantics of the primitive 149.2.2.3.2 When generated <\/td>\n<\/tr>\n | ||||||
| 5966<\/td>\n | 149.2.2.3.3 Effect of receipt 149.2.2.4 PMA_UNITDATA.indication 149.2.2.4.1 Semantics of the primitive 149.2.2.4.2 When generated 149.2.2.4.3 Effect of receipt 149.2.2.5 PMA_SCRSTATUS.request 149.2.2.5.1 Semantics of the primitive 149.2.2.5.2 When generated 149.2.2.5.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5967<\/td>\n | 149.2.2.6 PMA_PCSSTATUS.request 149.2.2.6.1 Semantics of the primitive 149.2.2.6.2 When generated 149.2.2.6.3 Effect of receipt 149.2.2.7 PMA_RXSTATUS.indication 149.2.2.7.1 Semantics of the primitive 149.2.2.7.2 When generated 149.2.2.7.3 Effect of receipt <\/td>\n<\/tr>\n | ||||||
| 5968<\/td>\n | 149.2.2.8 PMA_REMRXSTATUS.request 149.2.2.8.1 Semantics of the primitive 149.2.2.8.2 When generated 149.2.2.8.3 Effect of receipt 149.2.2.9 PMA_PCSDATAMODE.indication 149.2.2.9.1 Semantics of the primitive 149.2.2.9.2 When generated 149.2.2.9.3 Effect of receipt 149.2.2.10 PMA_PCS_RX_LPI_STATUS.request <\/td>\n<\/tr>\n | ||||||
| 5969<\/td>\n | 149.2.2.10.1 Semantics of the primitive 149.2.2.10.2 When generated 149.2.2.10.3 Effect of receipt 149.2.2.11 PMA_PCS_TX_LPI_STATUS.request 149.2.2.11.1 Semantics of the primitive 149.2.2.11.2 When generated 149.2.2.11.3 Effect of receipt 149.2.2.12 PMA_ALERTDETECT.indication <\/td>\n<\/tr>\n | ||||||
| 5970<\/td>\n | 149.2.2.12.1 Semantics of the primitive 149.2.2.12.2 When generated 149.2.2.12.3 Effect of receipt 149.3 Physical Coding Sublayer (PCS) functions 149.3.1 PCS service interface (XGMII) 149.3.2 PCS functions <\/td>\n<\/tr>\n | ||||||
| 5971<\/td>\n | 149.3.2.1 PCS Reset function 149.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n | ||||||
| 5973<\/td>\n | 149.3.2.2.1 Use of blocks 149.3.2.2.2 65B RS-FEC transmission code <\/td>\n<\/tr>\n | ||||||
| 5974<\/td>\n | 149.3.2.2.3 Notation conventions <\/td>\n<\/tr>\n | ||||||
| 5976<\/td>\n | 149.3.2.2.4 Block structure <\/td>\n<\/tr>\n | ||||||
| 5977<\/td>\n | 149.3.2.2.5 Control codes 149.3.2.2.6 Ordered sets 149.3.2.2.7 Idle (\/I\/) 149.3.2.2.8 LPI (\/LI\/) 149.3.2.2.9 Start (\/S\/) <\/td>\n<\/tr>\n | ||||||
| 5978<\/td>\n | 149.3.2.2.10 Terminate (\/T\/) 149.3.2.2.11 Ordered set (\/O\/) <\/td>\n<\/tr>\n | ||||||
| 5979<\/td>\n | 149.3.2.2.12 Error (\/E\/) 149.3.2.2.13 Transmit process 149.3.2.2.14 RS-FEC framing and RS-FEC encoder 149.3.2.2.15 RS-FEC superframe and round-robin interleaving <\/td>\n<\/tr>\n | ||||||
| 5980<\/td>\n | 149.3.2.2.16 RS-FEC recombine 149.3.2.2.17 Reed-Solomon encoder <\/td>\n<\/tr>\n | ||||||
| 5982<\/td>\n | 149.3.2.2.18 PCS scrambler 149.3.2.2.19 Gray mapping for PAM4 encoding <\/td>\n<\/tr>\n | ||||||
| 5983<\/td>\n | 149.3.2.2.20 Selectable precoder 149.3.2.2.21 PAM4 encoding <\/td>\n<\/tr>\n | ||||||
| 5984<\/td>\n | 149.3.2.2.22 EEE capability <\/td>\n<\/tr>\n | ||||||
| 5985<\/td>\n | 149.3.2.3 PCS Receive function <\/td>\n<\/tr>\n | ||||||
| 5986<\/td>\n | 149.3.2.3.1 Frame and block synchronization 149.3.2.3.2 PCS descrambler 149.3.2.3.3 Invalid blocks 149.3.3 Test-pattern generators <\/td>\n<\/tr>\n | ||||||
| 5987<\/td>\n | 149.3.4 Side-stream scrambler polynomials <\/td>\n<\/tr>\n | ||||||
| 5988<\/td>\n | 149.3.5 PMA training frame 149.3.5.1 Generation of symbol Tn 149.3.5.2 PMA training mode descrambler polynomials 149.3.6 LPI signaling <\/td>\n<\/tr>\n | ||||||
| 5989<\/td>\n | 149.3.6.1 LPI synchronization <\/td>\n<\/tr>\n | ||||||
| 5990<\/td>\n | 149.3.6.2 Quiet period signaling <\/td>\n<\/tr>\n | ||||||
| 5991<\/td>\n | 149.3.6.3 Refresh period signaling 149.3.7 Detailed functions and state diagrams 149.3.7.1 State diagram conventions 149.3.7.2 State diagram parameters 149.3.7.2.1 Constants <\/td>\n<\/tr>\n | ||||||
| 5992<\/td>\n | 149.3.7.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 5994<\/td>\n | 149.3.7.2.3 Timers 149.3.7.2.4 Functions <\/td>\n<\/tr>\n | ||||||
| 5996<\/td>\n | 149.3.7.2.5 Counters 149.3.7.2.6 Messages 149.3.7.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6004<\/td>\n | 149.3.8 PCS management 149.3.8.1 Status 149.3.8.2 Counter 149.3.8.3 Loopback <\/td>\n<\/tr>\n | ||||||
| 6005<\/td>\n | 149.3.9 MultiGBASE-T1 operations, administration, and maintenance (OAM) 149.3.9.1 Definitions 149.3.9.2 Functional specifications 149.3.9.2.1 MultiGBASE-T1 OAM frame structure <\/td>\n<\/tr>\n | ||||||
| 6006<\/td>\n | 149.3.9.2.2 OAM frame data <\/td>\n<\/tr>\n | ||||||
| 6007<\/td>\n | 149.3.9.2.3 Ping RX 149.3.9.2.4 Ping TX 149.3.9.2.5 PHY health <\/td>\n<\/tr>\n | ||||||
| 6008<\/td>\n | 149.3.9.2.6 OAM message valid 149.3.9.2.7 OAM message toggle 149.3.9.2.8 OAM message acknowledge 149.3.9.2.9 OAM message toggle acknowledge 149.3.9.2.10 OAM message number 149.3.9.2.11 OAM message data <\/td>\n<\/tr>\n | ||||||
| 6009<\/td>\n | 149.3.9.2.12 OAM status 149.3.9.2.13 OAM Reed-Solomon <\/td>\n<\/tr>\n | ||||||
| 6010<\/td>\n | 149.3.9.2.14 MultiGBASE-T1 OAM frame acceptance criteria 149.3.9.2.15 PHY health indicator 149.3.9.2.16 Ping 149.3.9.2.17 OAM message exchange <\/td>\n<\/tr>\n | ||||||
| 6012<\/td>\n | 149.3.9.3 State diagram variable to OAM register mapping 149.3.9.4 Detailed functions and state diagrams 149.3.9.4.1 State diagram conventions <\/td>\n<\/tr>\n | ||||||
| 6013<\/td>\n | 149.3.9.4.2 State diagram parameters 149.3.9.4.3 Variables <\/td>\n<\/tr>\n | ||||||
| 6017<\/td>\n | 149.3.9.4.4 Counters 149.3.9.4.5 Functions <\/td>\n<\/tr>\n | ||||||
| 6018<\/td>\n | 149.3.9.4.6 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6020<\/td>\n | 149.4 Physical Medium Attachment (PMA) sublayer 149.4.1 PMA functional specifications 149.4.2 PMA functions <\/td>\n<\/tr>\n | ||||||
| 6021<\/td>\n | 149.4.2.1 PMA Reset function 149.4.2.2 PMA Transmit function 149.4.2.2.1 Global PMA transmit disable 149.4.2.3 PMA Receive function <\/td>\n<\/tr>\n | ||||||
| 6022<\/td>\n | 149.4.2.4 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 6023<\/td>\n | 149.4.2.4.1 Infofield notation 149.4.2.4.2 Start of Frame Delimiter 149.4.2.4.3 Partial PHY frame count (PFC24) 149.4.2.4.4 Message Field <\/td>\n<\/tr>\n | ||||||
| 6024<\/td>\n | 149.4.2.4.5 PHY capability bits 149.4.2.4.6 Data switch partial PHY frame count <\/td>\n<\/tr>\n | ||||||
| 6025<\/td>\n | 149.4.2.4.7 Reserved fields 149.4.2.4.8 CRC16 149.4.2.4.9 PMA MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 6026<\/td>\n | 149.4.2.4.10 Startup sequence 149.4.2.5 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 6027<\/td>\n | 149.4.2.6 PHY Link Synchronization <\/td>\n<\/tr>\n | ||||||
| 6028<\/td>\n | 149.4.2.6.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 6029<\/td>\n | 149.4.2.6.2 State diagram timers 149.4.2.6.3 Messages <\/td>\n<\/tr>\n | ||||||
| 6030<\/td>\n | 149.4.2.6.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6031<\/td>\n | 149.4.2.7 Refresh monitor function 149.4.2.8 Clock Recovery function 149.4.3 MDI 149.4.3.1 MDI signals transmitted by the PHY 149.4.3.2 Signals received at the MDI 149.4.4 State variables 149.4.4.1 State diagram variables <\/td>\n<\/tr>\n | ||||||
| 6033<\/td>\n | 149.4.4.2 Timers <\/td>\n<\/tr>\n | ||||||
| 6034<\/td>\n | 149.4.5 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6036<\/td>\n | 149.5 PMA electrical specifications 149.5.1 Test modes <\/td>\n<\/tr>\n | ||||||
| 6037<\/td>\n | 149.5.1.1 Test fixtures <\/td>\n<\/tr>\n | ||||||
| 6038<\/td>\n | 149.5.2 Transmitter electrical specifications 149.5.2.1 Maximum output droop 149.5.2.2 Transmitter linearity 149.5.2.3 Transmitter timing jitter <\/td>\n<\/tr>\n | ||||||
| 6039<\/td>\n | 149.5.2.3.1 Transmit MDI random jitter in MASTER mode 149.5.2.3.2 Transmit MDI deterministic jitter in MASTER mode <\/td>\n<\/tr>\n | ||||||
| 6040<\/td>\n | 149.5.2.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n | ||||||
| 6041<\/td>\n | 149.5.2.5 Transmitter peak differential output 149.5.2.6 Transmitter clock frequency 149.5.3 Receiver electrical specifications 149.5.3.1 Receiver differential input signals 149.5.3.2 Alien crosstalk noise rejection <\/td>\n<\/tr>\n | ||||||
| 6042<\/td>\n | 149.6 Management interface 149.6.1 Optional Support for Auto-Negotiation 149.7 Link segment characteristics 149.7.1 Link transmission parameters <\/td>\n<\/tr>\n | ||||||
| 6043<\/td>\n | 149.7.1.1 Insertion loss 149.7.1.2 Differential characteristic impedance 149.7.1.3 Return loss 149.7.1.3.1 2.5GBASE-T1 link segment return loss <\/td>\n<\/tr>\n | ||||||
| 6044<\/td>\n | 149.7.1.3.2 5GBASE-T1 link segment return loss <\/td>\n<\/tr>\n | ||||||
| 6045<\/td>\n | 149.7.1.3.3 10GBASE-T1 link segment return loss <\/td>\n<\/tr>\n | ||||||
| 6046<\/td>\n | 149.7.1.4 Coupling attenuation <\/td>\n<\/tr>\n | ||||||
| 6047<\/td>\n | 149.7.1.5 Screening attenuation 149.7.1.6 Maximum link delay 149.7.2 Coupling parameters between link segments 149.7.2.1 Power sum alien near-end crosstalk (PSANEXT) <\/td>\n<\/tr>\n | ||||||
| 6048<\/td>\n | 149.7.2.2 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF) <\/td>\n<\/tr>\n | ||||||
| 6049<\/td>\n | 149.8 MDI specification 149.8.1 MDI connectors 149.8.2 MDI electrical specification 149.8.2.1 MDI return loss <\/td>\n<\/tr>\n | ||||||
| 6050<\/td>\n | 149.8.3 MDI fault tolerance 149.9 Environmental specifications 149.9.1 General safety <\/td>\n<\/tr>\n | ||||||
| 6051<\/td>\n | 149.9.2 Network safety 149.9.2.1 Environmental safety 149.9.2.2 Electromagnetic compatibility 149.10 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 6053<\/td>\n | 149.11 Protocol implementation conformance statement (PICS) proforma for Clause 149, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 149.11.1 Introduction 149.11.2 Identification 149.11.2.1 Implementation identification 149.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6054<\/td>\n | 149.11.3 Major capabilities\/options 149.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1 149.11.4.1 General <\/td>\n<\/tr>\n | ||||||
| 6055<\/td>\n | 149.11.4.2 Physical Coding Sublayer (PCS) 149.11.4.2.1 PCS Transmit <\/td>\n<\/tr>\n | ||||||
| 6057<\/td>\n | 149.11.4.2.2 PCS Receive 149.11.4.2.3 Test-pattern generators <\/td>\n<\/tr>\n | ||||||
| 6058<\/td>\n | 149.11.4.2.4 Side-stream scrambler 149.11.4.2.5 LPI signaling <\/td>\n<\/tr>\n | ||||||
| 6059<\/td>\n | 149.11.4.2.6 Functions and state diagrams 149.11.4.2.7 PCS loopback <\/td>\n<\/tr>\n | ||||||
| 6060<\/td>\n | 149.11.4.2.8 OAM 149.11.4.3 Physical Medium Attachment (PMA) 149.11.4.3.1 PMA Reset function <\/td>\n<\/tr>\n | ||||||
| 6061<\/td>\n | 149.11.4.3.2 PMA Transmit function <\/td>\n<\/tr>\n | ||||||
| 6062<\/td>\n | 149.11.4.3.3 PMA Receive function 149.11.4.3.4 PHY Control function <\/td>\n<\/tr>\n | ||||||
| 6063<\/td>\n | 149.11.4.3.5 Link Monitor function <\/td>\n<\/tr>\n | ||||||
| 6064<\/td>\n | 149.11.4.3.6 PHY Link Synchronization <\/td>\n<\/tr>\n | ||||||
| 6065<\/td>\n | 149.11.4.3.7 Refresh monitor function 149.11.4.3.8 Clock Recovery function 149.11.4.3.9 MDI 149.11.4.3.10 PMA State variables <\/td>\n<\/tr>\n | ||||||
| 6066<\/td>\n | 149.11.4.4 PMA electrical specifications 149.11.4.4.1 Test modes 149.11.4.4.2 Transmitter electrical specifications <\/td>\n<\/tr>\n | ||||||
| 6067<\/td>\n | 149.11.4.4.3 Receiver electrical specifications <\/td>\n<\/tr>\n | ||||||
| 6068<\/td>\n | 149.11.4.5 Link segment characteristics 149.11.4.6 MDI specifications 149.11.4.7 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 6069<\/td>\n | 150. Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR4.2 150.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6070<\/td>\n | 150.1.1 Bit error ratio 150.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 6071<\/td>\n | 150.3 Delay and Skew 150.3.1 Delay constraints 150.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 6072<\/td>\n | 150.4 PMD MDIO function mapping 150.5 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6073<\/td>\n | 150.5.1 PMD block diagram 150.5.2 PMD transmit function 150.5.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 6074<\/td>\n | 150.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 6075<\/td>\n | 150.5.5 PMD lane-by-lane signal detect function 150.5.6 PMD reset function 150.5.7 PMD global transmit disable function (optional) 150.5.8 PMD lane-by-lane transmit disable function (optional) 150.5.9 PMD fault function (optional) 150.5.10 PMD transmit fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 6076<\/td>\n | 150.5.11 PMD receive fault function (optional) 150.6 Wavelength ranges 150.7 PMD to MDI optical specifications for 400GBASE-SR4.2 <\/td>\n<\/tr>\n | ||||||
| 6077<\/td>\n | 150.7.1 Transmitter optical specifications 150.7.2 Receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 6079<\/td>\n | 150.7.3 Illustrative link power budget 150.8 Definition of optical parameters and measurement methods 150.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 6080<\/td>\n | 150.8.1.1 Multi-lane testing considerations 150.8.2 Center wavelength and spectral width 150.8.3 Average optical power 150.8.4 Outer Optical Modulation Amplitude (OMAouter) <\/td>\n<\/tr>\n | ||||||
| 6081<\/td>\n | 150.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 150.8.5.1 TDECQ reference equalizer 150.8.6 Extinction ratio 150.8.7 Transmitter transition time <\/td>\n<\/tr>\n | ||||||
| 6082<\/td>\n | 150.8.8 Relative intensity noise (RIN12OMA) 150.8.9 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 6083<\/td>\n | 150.8.10 Stressed receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 6084<\/td>\n | 150.8.10.1 Sinusoidal jitter for receiver conformance test 150.9 Safety, installation, environment, and labeling 150.9.1 General safety 150.9.2 Laser safety 150.9.3 Installation <\/td>\n<\/tr>\n | ||||||
| 6085<\/td>\n | 150.9.4 Environment 150.9.5 Electromagnetic emission 150.9.6 Temperature, humidity, and handling 150.9.7 PMD labeling requirements 150.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 6086<\/td>\n | 150.10.1 Fiber optic cabling model 150.10.2 Characteristics of the fiber optic cabling (channel) 150.10.2.1 Optical fiber cable <\/td>\n<\/tr>\n | ||||||
| 6087<\/td>\n | 150.10.2.2 Optical fiber connection 150.10.2.2.1 Connection insertion loss 150.10.2.2.2 Maximum discrete reflectance 150.10.3 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 6088<\/td>\n | 150.10.3.1 Optical lane assignments 150.10.3.2 MDI requirements <\/td>\n<\/tr>\n | ||||||
| 6089<\/td>\n | 150.11 Protocol implementation conformance statement (PICS) proforma for Clause 150, Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR4.2 150.11.1 Introduction 150.11.2 Identification 150.11.2.1 Implementation identification 150.11.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6090<\/td>\n | 150.11.3 Major capabilities\/options 150.11.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-SR4.2 150.11.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6091<\/td>\n | 150.11.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 6092<\/td>\n | 150.11.4.3 PMD to MDI optical specifications 150.11.4.4 Optical measurement methods 150.11.4.5 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 6093<\/td>\n | 150.11.4.6 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 6094<\/td>\n | 151. Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-FR4 and 400GBASE-LR4-6 151.1 Overview 151.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 6095<\/td>\n | 151.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 6096<\/td>\n | 151.3 Delay and Skew 151.3.1 Delay constraints 151.3.2 Skew constraints 151.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 6097<\/td>\n | 151.5 PMD functional specifications 151.5.1 PMD block diagram 151.5.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 6098<\/td>\n | 151.5.3 PMD receive function 151.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 6099<\/td>\n | 151.5.5 PMD lane-by-lane signal detect function 151.5.6 PMD reset function 151.5.7 PMD global transmit disable function (optional) <\/td>\n<\/tr>\n | ||||||
| 6100<\/td>\n | 151.5.8 PMD lane-by-lane transmit disable function 151.5.9 PMD fault function (optional) 151.5.10 PMD transmit fault function (optional) 151.5.11 PMD receive fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 6101<\/td>\n | 151.6 Wavelength-division-multiplexed lane assignments 151.7 PMD to MDI optical specifications for 400GBASE-FR4 and 400GBASE-LR4-6 151.7.1 400GBASE-FR4 and 400GBASE-LR4-6 transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 6103<\/td>\n | 151.7.2 400GBASE-FR4 and 400GBASE-LR4-6 receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 6105<\/td>\n | 151.7.3 400GBASE-FR4 and 400GBASE-LR4-6 illustrative link power budgets <\/td>\n<\/tr>\n | ||||||
| 6107<\/td>\n | 151.8 Definition of optical parameters and measurement methods 151.8.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 6108<\/td>\n | 151.8.2 Wavelength and side mode suppression ratio (SMSR) 151.8.3 Average optical power 151.8.4 Outer Optical Modulation Amplitude (OMAouter) 151.8.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 151.8.5.1 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 6109<\/td>\n | 151.8.6 Transmitter eye closure for PAM4 (TECQ) 151.8.7 Over\/under-shoot 151.8.8 Transmitter power excursion 151.8.9 Extinction ratio 151.8.10 Transmitter transition time <\/td>\n<\/tr>\n | ||||||
| 6110<\/td>\n | 151.8.11 Relative intensity noise (RIN17.1OMA and RIN15.6OMA) 151.8.12 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 6111<\/td>\n | 151.8.13 Stressed receiver sensitivity 151.9 Safety, installation, environment, and labeling 151.9.1 General safety 151.9.2 Laser safety 151.9.3 Installation <\/td>\n<\/tr>\n | ||||||
| 6112<\/td>\n | 151.9.4 Environment 151.9.5 Electromagnetic emission 151.9.6 Temperature, humidity, and handling 151.9.7 PMD labeling requirements 151.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 6113<\/td>\n | 151.11 Characteristics of the fiber optic cabling (channel) 151.11.1 Optical fiber cable 151.11.2 Optical fiber connection <\/td>\n<\/tr>\n | ||||||
| 6114<\/td>\n | 151.11.2.1 Connection insertion loss 151.11.2.2 Maximum discrete reflectance 151.11.3 Medium Dependent Interface (MDI) requirements 151.12 Interoperation between 400GBASE-LR4-6 and 400GBASE-FR4 <\/td>\n<\/tr>\n | ||||||
| 6116<\/td>\n | 151.13 Protocol implementation conformance statement (PICS) proforma for Clause 151, Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-FR4 and 400GBASE-LR4-6 151.13.1 Introduction 151.13.2 Identification 151.13.2.1 Implementation identification 151.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6117<\/td>\n | 151.13.3 Major capabilities\/options 151.13.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 400GBASE-FR4 and 400GBASE-LR4-6 151.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6118<\/td>\n | 151.13.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 6119<\/td>\n | 151.13.4.3 PMD to MDI optical specifications for 400GBASE-FR4 151.13.4.4 PMD to MDI optical specifications for 400GBASE-LR4-6 151.13.4.5 Optical measurement methods <\/td>\n<\/tr>\n | ||||||
| 6120<\/td>\n | 151.13.4.6 Environmental specifications 151.13.4.7 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 6121<\/td>\n | 152. Inverse RS-FEC sublayer 152.1 Overview 152.1.1 Scope 152.1.2 Position of Inverse RS-FEC in the 100GBASE-R sublayers <\/td>\n<\/tr>\n | ||||||
| 6122<\/td>\n | 152.2 Inverse RS-FEC service interface 152.3 PMA or FEC sublayer compatibility 152.4 Delay constraints 152.5 Functions within the Inverse RS-FEC sublayer 152.5.1 Functional block diagram <\/td>\n<\/tr>\n | ||||||
| 6123<\/td>\n | 152.5.2 Transmit function 152.5.2.1 Alignment lock and deskew <\/td>\n<\/tr>\n | ||||||
| 6124<\/td>\n | 152.5.2.2 Lane reorder 152.5.2.3 Reed-Solomon decoder 152.5.2.4 Alignment marker removal 152.5.2.5 256B\/257B to 64B\/66B transcoder <\/td>\n<\/tr>\n | ||||||
| 6125<\/td>\n | 152.5.2.6 Block distribution 152.5.2.7 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 6126<\/td>\n | 152.5.2.8 Transmit bit ordering <\/td>\n<\/tr>\n | ||||||
| 6128<\/td>\n | 152.5.3 Receive function 152.5.3.1 Lane block synchronization 152.5.3.2 Alignment lock and deskew 152.5.3.3 Lane reorder 152.5.3.4 Alignment marker removal 152.5.3.5 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n | ||||||
| 6129<\/td>\n | 152.5.3.6 Alignment marker mapping and insertion <\/td>\n<\/tr>\n | ||||||
| 6131<\/td>\n | 152.5.3.7 Reed-Solomon encoder 152.5.3.8 Symbol distribution 152.5.3.9 Receive bit ordering <\/td>\n<\/tr>\n | ||||||
| 6133<\/td>\n | 152.5.4 Detailed functions and state diagrams 152.5.4.1 State diagram conventions 152.5.4.2 State variables 152.5.4.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 6134<\/td>\n | 152.5.4.2.2 Functions <\/td>\n<\/tr>\n | ||||||
| 6135<\/td>\n | 152.5.4.2.3 Counters 152.5.4.3 State diagrams 152.6 Inverse RS-FEC MDIO function mapping 152.6.1 IFEC_bypass_correction_enable <\/td>\n<\/tr>\n | ||||||
| 6136<\/td>\n | 152.6.2 IFEC_bypass_indication_enable 152.6.3 IFEC_bypass_correction_ability <\/td>\n<\/tr>\n | ||||||
| 6137<\/td>\n | 152.6.4 IFEC_bypass_indication_ability 152.6.5 hi_ser 152.6.6 amps_lock 152.6.7 IFEC_align_status 152.6.8 IFEC_corrected_cw_counter 152.6.9 IFEC_uncorrected_cw_counter 152.6.10 IFEC_lane_mapping <\/td>\n<\/tr>\n | ||||||
| 6138<\/td>\n | 152.6.11 IFEC_symbol_error_counter_i 152.6.12 align_status 152.6.13 BIP_error_counter_i 152.6.14 lane_mapping 152.6.15 block_lock 152.6.16 am_lock <\/td>\n<\/tr>\n | ||||||
| 6139<\/td>\n | 152.7 Protocol implementation conformance statement (PICS) proforma for Clause 152, Inverse RS-FEC sublayer 152.7.1 Introduction 152.7.2 Identification 152.7.2.1 Implementation identification 152.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6140<\/td>\n | 152.7.3 Major capabilities\/options 152.7.4 PICS proforma tables for Inverse RS-FEC sublayer 152.7.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 6141<\/td>\n | 152.7.4.2 Receive Function <\/td>\n<\/tr>\n | ||||||
| 6142<\/td>\n | 152.7.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6143<\/td>\n | 153. SC-FEC and 100GBASE-ZR Physical Medium Attachment (PMA) sublayer for 100GBASE-ZR PHYs 153.1 Overview 153.1.1 Scope 153.1.2 Position of SC-FEC and 100GBASE-ZR PMA in the 100GBASE-R sublayers 153.2 SC-FEC sublayer 153.2.1 FEC service interface <\/td>\n<\/tr>\n | ||||||
| 6144<\/td>\n | 153.2.2 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 6145<\/td>\n | 153.2.3 Functions within the SC-FEC sublayer 153.2.3.1 Functional block diagram 153.2.3.2 Transmit function 153.2.3.2.1 Lane block synchronization <\/td>\n<\/tr>\n | ||||||
| 6146<\/td>\n | 153.2.3.2.2 Alignment lock and deskew 153.2.3.2.3 Lane reorder 153.2.3.2.4 GMP mapper <\/td>\n<\/tr>\n | ||||||
| 6149<\/td>\n | 153.2.3.2.5 SC-FEC encoder 153.2.3.2.6 Scrambler <\/td>\n<\/tr>\n | ||||||
| 6150<\/td>\n | 153.2.3.2.7 Lane distribution <\/td>\n<\/tr>\n | ||||||
| 6151<\/td>\n | 153.2.3.3 Receive function 153.2.3.3.1 Lane lock and deskew 153.2.3.3.2 Lane reorder 153.2.3.3.3 De-scrambler 153.2.3.3.4 SC-FEC decoder 153.2.3.3.5 GMP demapper <\/td>\n<\/tr>\n | ||||||
| 6152<\/td>\n | 153.2.3.3.6 Block alignment 153.2.3.3.7 Block distribution 153.2.4 Detailed functions and state diagrams 153.2.4.1 State variables 153.2.4.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 6153<\/td>\n | 153.2.4.2 Functions <\/td>\n<\/tr>\n | ||||||
| 6154<\/td>\n | 153.2.4.3 Counters 153.2.4.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6156<\/td>\n | 153.2.5 SC-FEC MDIO function mapping 153.2.5.1 FEC_corrected_cw_counter 153.2.5.2 FEC_uncorrected_cw_counter 153.2.5.3 FEC_total_bits_counter <\/td>\n<\/tr>\n | ||||||
| 6157<\/td>\n | 153.2.5.4 FEC_corrected_bits_counter 153.3 100GBASE-ZR PMA sublayer 153.3.1 100GBASE-ZR PMA service interface <\/td>\n<\/tr>\n | ||||||
| 6158<\/td>\n | 153.3.2 Functions within the 100GBASE-ZR PMA sublayer 153.3.2.1 Functional block diagram 153.3.2.2 Transmit function 153.3.2.2.1 Lane interleave 153.3.2.2.2 DQPSK encode <\/td>\n<\/tr>\n | ||||||
| 6159<\/td>\n | 153.3.2.3 Receive function 153.3.2.3.1 DQPSK decode 153.3.2.3.2 Lane de-interleave <\/td>\n<\/tr>\n | ||||||
| 6160<\/td>\n | 153.4 Protocol implementation conformance statement (PICS) proforma for Clause 153, SC-FEC and 100GBASE-ZR Physical Medium Attachment (PMA) sublayer for 100GBASE-ZR PHYs 153.4.1 Introduction 153.4.2 Identification 153.4.2.1 Implementation identification 153.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6161<\/td>\n | 153.4.3 Major capabilities\/options 153.4.4 PICS proforma tables for SC-FEC sublayer for 100GBASE-ZR PHYs 153.4.4.1 Transmit function <\/td>\n<\/tr>\n | ||||||
| 6162<\/td>\n | 153.4.4.2 Receive function 153.4.4.3 State diagrams <\/td>\n<\/tr>\n | ||||||
| 6163<\/td>\n | 154. Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-ZR 154.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6164<\/td>\n | 154.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 6165<\/td>\n | 154.2 Physical Medium Dependent (PMD) service interface 154.3 Delay and Skew 154.3.1 Delay constraints 154.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 6166<\/td>\n | 154.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 6167<\/td>\n | 154.5 PMD functional specifications 154.5.1 PMD block diagram 154.5.2 PMD transmit function <\/td>\n<\/tr>\n | ||||||
| 6168<\/td>\n | 154.5.3 PMD receive function 154.5.4 PMD global signal detect function 154.5.5 PMD reset function 154.5.6 PMD global transmit disable function (optional) 154.5.7 PMD fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 6169<\/td>\n | 154.5.8 PMD transmit fault function (optional) 154.5.9 PMD receive fault function (optional) 154.6 DWDM channel over a DWDM black link <\/td>\n<\/tr>\n | ||||||
| 6171<\/td>\n | 154.7 PMD to MDI optical specifications for 100GBASE-ZR <\/td>\n<\/tr>\n | ||||||
| 6172<\/td>\n | 154.7.1 100GBASE-ZR transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 6173<\/td>\n | 154.7.2 100GBASE-ZR receive optical specifications 154.8 100GBASE-ZR DWDM black link transfer characteristics 154.9 Definition of optical parameters and measurement methods 154.9.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 6175<\/td>\n | 154.9.2 Optical center frequency (wavelength) and side-mode suppression ratio (SMSR) 154.9.3 Average channel output power 154.9.4 Spectral excursion 154.9.5 Laser linewidth <\/td>\n<\/tr>\n | ||||||
| 6176<\/td>\n | 154.9.6 Offset between the carrier and the nominal center frequency 154.9.7 Power difference between X and Y polarizations 154.9.8 Skew between X and Y polarizations 154.9.9 Error vector magnitude 154.9.10 I-Q offset 154.9.11 Optical signal-to-noise ratio (OSNR) 154.9.12 Transmitter in-band OSNR 154.9.13 Average receive power <\/td>\n<\/tr>\n | ||||||
| 6177<\/td>\n | 154.9.14 Receiver sensitivity 154.9.15 Receiver OSNR 154.9.16 Receiver OSNR tolerance 154.9.17 Ripple 154.9.18 Optical path OSNR penalty 154.9.19 Optical path power penalty 154.9.20 Polarization dependent loss <\/td>\n<\/tr>\n | ||||||
| 6178<\/td>\n | 154.9.21 Polarization rotation speed 154.9.22 Inter-channel crosstalk at TP3 154.9.23 Interferometric crosstalk at TP3 154.10 Safety, installation, environment, and labeling 154.10.1 General safety 154.10.2 Laser safety 154.10.3 Installation 154.10.4 Environment <\/td>\n<\/tr>\n | ||||||
| 6179<\/td>\n | 154.10.5 Electromagnetic emission 154.10.6 Temperature, humidity, and handling 154.10.7 PMD labeling requirements 154.11 Medium Dependent Interface (MDI) <\/td>\n<\/tr>\n | ||||||
| 6180<\/td>\n | 154.12 Protocol implementation conformance statement (PICS) proforma for Clause 154, Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-ZR 154.12.1 Introduction 154.12.2 Identification 154.12.2.1 Implementation identification 154.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6181<\/td>\n | 154.12.3 Major capabilities\/options 154.12.4 PICS proforma tables for Physical Medium Dependent (PMD) sublayer and medium, type 100GBASE-ZR 154.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6182<\/td>\n | 154.12.4.2 Management functions 154.12.4.3 PMD to MDI optical specifications for 100GBASE-ZR <\/td>\n<\/tr>\n | ||||||
| 6183<\/td>\n | 154.12.4.4 Optical measurement methods 154.12.4.5 Environmental specifications 154.12.4.6 Characteristics of DWDM black link and MDI <\/td>\n<\/tr>\n | ||||||
| 6184<\/td>\n | 155. Clause 155 is reserved for future use <\/td>\n<\/tr>\n | ||||||
| 6185<\/td>\n | 156. Clause 156 is reserved for future use <\/td>\n<\/tr>\n | ||||||
| 6186<\/td>\n | 157. Introduction to 10 Gb\/s, 25 Gb\/s, and 50 Gb\/s BiDi PHYs 157.1 Overview 157.1.1 Scope 157.1.2 Relationship of Multi-Gigabit Ethernet BiDi PHYs to the ISO OSI reference model 157.1.3 Nomenclature <\/td>\n<\/tr>\n | ||||||
| 6188<\/td>\n | 157.1.4 Physical Layer signaling systems <\/td>\n<\/tr>\n | ||||||
| 6190<\/td>\n | 157.2 Summary of Multi-Gigabit Ethernet BiDi sublayers 157.2.1 Reconciliation Sublayer (RS) and Media Independent Interface (XGMII, 25GMII, and 50GMII) 157.2.2 Physical Coding Sublayer (PCS) 157.2.3 Forward error correction (FEC) sublayer <\/td>\n<\/tr>\n | ||||||
| 6191<\/td>\n | 157.2.4 Physical Medium Attachment (PMA) sublayer 157.2.5 Physical Medium Dependent (PMD) sublayer 157.2.6 Management interface (MDIO\/MDC) 157.2.7 Management 157.3 Service interface specification method and notation 157.4 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 6192<\/td>\n | 157.5 ONU silent start 157.6 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n | ||||||
| 6193<\/td>\n | 158. Physical Medium Dependent (PMD) sublayer and medium, types 10GBASE-BR10, 10GBASE-BR20, and 10GBASE-BR40 158.1 Overview 158.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 6194<\/td>\n | 158.2 PMD sublayer service interface 158.3 Delay constraints 158.4 PMD MDIO function mapping <\/td>\n<\/tr>\n | ||||||
| 6195<\/td>\n | 158.5 PMD functional specifications 158.5.1 PMD block diagram 158.5.2 PMD transmit function 158.5.3 PMD receive function <\/td>\n<\/tr>\n | ||||||
| 6196<\/td>\n | 158.5.4 PMD signal detect function <\/td>\n<\/tr>\n | ||||||
| 6197<\/td>\n | 158.5.5 PMD reset function 158.5.6 PMD global transmit disable function 158.5.7 PMD fault function 158.5.8 PMD transmit fault function 158.5.9 PMD receive fault function 158.5.10 ONU silent start 158.6 PMD to MDI optical specifications for 10GBASE-BRx <\/td>\n<\/tr>\n | ||||||
| 6198<\/td>\n | 158.6.1 10GBASE-BRx transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 6199<\/td>\n | 158.6.2 10GBASE-BRx receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 6200<\/td>\n | 158.6.3 10GBASE-BRx illustrative link power budgets 158.7 Jitter specifications for 10GBASE-BRx 158.8 Definition of optical parameters and measurement methods 158.8.1 Test patterns 158.8.1.1 Test pattern definition <\/td>\n<\/tr>\n | ||||||
| 6201<\/td>\n | 158.8.1.2 Square wave pattern definition 158.8.2 Wavelength and side-mode suppression ratio (SMSR) <\/td>\n<\/tr>\n | ||||||
| 6202<\/td>\n | 158.8.3 Average optical power 158.8.4 Extinction ratio 158.8.5 Optical Modulation Amplitude (OMA) 158.8.6 Relative Intensity Noise (RINxOMA) 158.8.7 Transmitter optical waveform (transmitter eye) <\/td>\n<\/tr>\n | ||||||
| 6203<\/td>\n | 158.8.8 Receiver sensitivity 158.8.9 Stressed receiver sensitivity 158.8.9.1 Stressed receiver sensitivity for 10GBASE-BR10 and 10GBASE-BR40 158.8.9.1.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 6205<\/td>\n | 158.8.9.1.2 Parameter definitions <\/td>\n<\/tr>\n | ||||||
| 6206<\/td>\n | 158.8.9.1.3 Stressed receiver conformance test signal characteristics and calibration <\/td>\n<\/tr>\n | ||||||
| 6207<\/td>\n | 158.8.9.1.4 Stressed receiver conformance test procedure <\/td>\n<\/tr>\n | ||||||
| 6208<\/td>\n | 158.8.9.1.5 Sinusoidal jitter for receiver conformance test 158.8.9.2 Stressed receiver sensitivity for 10GBASE-BR20 158.8.10 Transmitter and dispersion penalty (TDP) 158.8.10.1 Reference transmitter requirements <\/td>\n<\/tr>\n | ||||||
| 6209<\/td>\n | 158.8.10.2 Channel requirements 158.8.10.3 Reference receiver requirements <\/td>\n<\/tr>\n | ||||||
| 6210<\/td>\n | 158.8.10.4 Test procedure 158.9 Safety, installation, environment, and labeling 158.9.1 General safety 158.9.2 Laser safety 158.9.3 Installation 158.9.4 Environment 158.9.5 Electromagnetic emission <\/td>\n<\/tr>\n | ||||||
| 6211<\/td>\n | 158.9.6 Temperature, humidity, and handling 158.9.7 PMD labeling requirements 158.10 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 6212<\/td>\n | 158.11 Characteristics of the fiber optic cabling (channel) 158.11.1 Optical fiber and cable 158.11.2 Optical fiber connection 158.11.2.1 Connection insertion loss 158.11.2.2 Maximum discrete reflectance <\/td>\n<\/tr>\n | ||||||
| 6213<\/td>\n | 158.11.3 Medium Dependent Interface (MDI) requirements 158.12 Requirements for interoperation between 10GBASE-BRx PMDs <\/td>\n<\/tr>\n | ||||||
| 6214<\/td>\n | 158.13 Protocol implementation conformance statement (PICS) proforma for Clause 158, Physical Medium Dependent (PMD) sublayer and medium, types 10GBASE-BR10, 10GBASE-BR20, and 10GBASE-BR40 158.13.1 Introduction 158.13.2 Identification 158.13.2.1 Implementation identification 158.13.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6215<\/td>\n | 158.13.3 Major capabilities\/options 158.13.4 PICS proforma tables for PMD sublayer and medium, types 10GBASE-BR10, 10GBASE-BR20, and 10GBASE-BR40 158.13.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6216<\/td>\n | 158.13.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 6217<\/td>\n | 158.13.4.3 PMD to MDI optical specifications for 10GBASE-BR10 158.13.4.4 PMD to MDI optical specifications for 10GBASE-BR20 158.13.4.5 PMD to MDI optical specifications for 10GBASE-BR40 158.13.4.6 Optical measurement methods <\/td>\n<\/tr>\n | ||||||
| 6218<\/td>\n | 158.13.4.7 Environmental specifications 158.13.4.8 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 6219<\/td>\n | 159. Physical Medium Dependent (PMD) sublayer and medium, types 25GBASE-BR10, 25GBASE-BR20, and 25GBASE-BR40 159.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6220<\/td>\n | 159.1.1 Bit error ratio 159.2 Physical Medium Dependent (PMD) service interface 159.3 Delay constraints <\/td>\n<\/tr>\n | ||||||
| 6221<\/td>\n | 159.4 PMD MDIO function mapping 159.5 PMD functional specifications 159.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 6222<\/td>\n | 159.5.2 PMD transmit function 159.5.3 PMD receive function 159.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 6223<\/td>\n | 159.5.5 PMD reset function 159.5.6 PMD global transmit disable function 159.5.7 PMD fault function (optional) 159.5.8 PMD transmit fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 6224<\/td>\n | 159.5.9 PMD receive fault function 159.5.10 ONU silent start 159.6 PMD to MDI optical specifications for 25GBASE-BRx <\/td>\n<\/tr>\n | ||||||
| 6225<\/td>\n | 159.6.1 25GBASE-BRx transmitter optical specifications 159.6.2 25GBASE-BRx receiver optical specifications <\/td>\n<\/tr>\n | ||||||
| 6227<\/td>\n | 159.6.3 25GBASE-BRx illustrative link power budgets 159.7 Definition of optical parameters and measurement methods 159.7.1 Test patterns for optical parameters 159.7.2 Wavelength and side-mode suppression ratio (SMSR) 159.7.3 Average optical power <\/td>\n<\/tr>\n | ||||||
| 6228<\/td>\n | 159.7.4 Optical Modulation Amplitude (OMA) 159.7.5 Transmitter and dispersion penalty (TDP) 159.7.5.1 Reference transmitter requirements 159.7.5.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 6229<\/td>\n | 159.7.5.3 Reference receiver requirements 159.7.5.4 Test procedure 159.7.6 Extinction ratio 159.7.7 Relative Intensity Noise (RIN20OMA) 159.7.8 Transmitter optical waveform (transmit eye) 159.7.9 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 6230<\/td>\n | 159.7.10 Stressed receiver sensitivity 159.8 Safety, installation, environment, and labeling 159.8.1 General safety 159.8.2 Laser safety <\/td>\n<\/tr>\n | ||||||
| 6231<\/td>\n | 159.8.3 Installation 159.8.4 Environment 159.8.5 Electromagnetic emission 159.8.6 Temperature, humidity, and handling 159.8.7 PMD labeling requirements 159.9 Fiber optic cabling model <\/td>\n<\/tr>\n | ||||||
| 6232<\/td>\n | 159.10 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 6233<\/td>\n | 159.10.1 Optical fiber cable 159.10.2 Optical fiber connection 159.10.2.1 Connection insertion loss 159.10.2.2 Maximum discrete reflectance 159.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 6234<\/td>\n | 159.11 Requirements for interoperation between 25GBASE-BRx PMDs <\/td>\n<\/tr>\n | ||||||
| 6235<\/td>\n | 159.12 Protocol implementation conformance statement (PICS) proforma for Clause 159, Physical Medium Dependent (PMD) sublayer and medium, types 25GBASE-BR10, 25GBASE-BR20, and 25GBASE-BR40 159.12.1 Introduction 159.12.2 Identification 159.12.2.1 Implementation identification 159.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6236<\/td>\n | 159.12.3 Major capabilities\/options 159.12.4 PICS proforma tables for PMD sublayer and medium, types 25GBASE-BR10, 25GBASE-BR20, and 25GBASE-BR40 159.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6237<\/td>\n | 159.12.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 6238<\/td>\n | 159.12.4.3 PMD to MDI optical specifications for 25GBASE-BR10 159.12.4.4 PMD to MDI optical specifications for 25GBASE-BR20 159.12.4.5 PMD to MDI optical specifications for 25GBASE-BR40 159.12.4.6 Optical measurement methods <\/td>\n<\/tr>\n | ||||||
| 6239<\/td>\n | 159.12.4.7 Environmental specifications 159.12.4.8 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 6240<\/td>\n | 160. Physical Medium Dependent (PMD) sublayer and medium, types 50GBASE-BR10, 50GBASE-BR20, and 50GBASE-BR40 160.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6241<\/td>\n | 160.1.1 Bit error ratio 160.2 Physical Medium Dependent (PMD) service interface <\/td>\n<\/tr>\n | ||||||
| 6242<\/td>\n | 160.3 Delay and Skew 160.3.1 Delay constraints 160.3.2 Skew constraints <\/td>\n<\/tr>\n | ||||||
| 6243<\/td>\n | 160.4 PMD MDIO function mapping 160.5 PMD functional specifications 160.5.1 PMD block diagram <\/td>\n<\/tr>\n | ||||||
| 6244<\/td>\n | 160.5.2 PMD transmit function 160.5.3 PMD receive function 160.5.4 PMD global signal detect function <\/td>\n<\/tr>\n | ||||||
| 6245<\/td>\n | 160.5.5 PMD reset function 160.5.6 PMD global transmit disable function 160.5.7 PMD fault function (optional) 160.5.8 PMD transmit fault function (optional) <\/td>\n<\/tr>\n | ||||||
| 6246<\/td>\n | 160.5.9 PMD receive fault function 160.5.10 ONU silent start 160.6 PMD to MDI optical specifications for 50GBASE-BRx 160.6.1 50GBASE-BRx transmitter optical specifications <\/td>\n<\/tr>\n | ||||||
| 6247<\/td>\n | 160.6.2 50GBASE-BRx receive optical specifications <\/td>\n<\/tr>\n | ||||||
| 6249<\/td>\n | 160.6.3 50GBASE-BRx illustrative link power budgets 160.7 Definition of optical parameters and measurement methods 160.7.1 Test patterns for optical parameters <\/td>\n<\/tr>\n | ||||||
| 6250<\/td>\n | 160.7.2 Wavelength and side-mode suppression ratio (SMSR) 160.7.3 Average optical power 160.7.4 Outer Optical Modulation Amplitude (OMAouter) <\/td>\n<\/tr>\n | ||||||
| 6251<\/td>\n | 160.7.5 Transmitter and dispersion eye closure for PAM4 (TDECQ) 160.7.5.1 TDECQ conformance test setup 160.7.5.2 Channel requirements <\/td>\n<\/tr>\n | ||||||
| 6252<\/td>\n | 160.7.5.3 TDECQ measurement method 160.7.5.4 TDECQ reference equalizer <\/td>\n<\/tr>\n | ||||||
| 6253<\/td>\n | 160.7.6 Transmitter eye closure for PAM4 (TECQ) 160.7.7 Extinction ratio 160.7.8 Transmitter transition time 160.7.9 Relative intensity noise (RINxOMA) <\/td>\n<\/tr>\n | ||||||
| 6254<\/td>\n | 160.7.10 Receiver sensitivity <\/td>\n<\/tr>\n | ||||||
| 6255<\/td>\n | 160.7.11 Stressed receiver sensitivity 160.7.11.1 Stressed receiver conformance test block diagram <\/td>\n<\/tr>\n | ||||||
| 6256<\/td>\n | 160.7.11.2 Stressed receiver conformance test signal characteristics and calibration 160.7.11.3 Stressed receiver conformance test signal verification 160.8 Safety, installation, environment, and labeling 160.8.1 General safety <\/td>\n<\/tr>\n | ||||||
| 6257<\/td>\n | 160.8.2 Laser safety 160.8.3 Installation 160.8.4 Environment 160.8.5 Electromagnetic emission 160.8.6 Temperature, humidity, and handling 160.8.7 PMD labeling requirements <\/td>\n<\/tr>\n | ||||||
| 6258<\/td>\n | 160.9 Fiber optic cabling model 160.10 Characteristics of the fiber optic cabling (channel) <\/td>\n<\/tr>\n | ||||||
| 6259<\/td>\n | 160.10.1 Optical fiber cable 160.10.2 Optical fiber connection 160.10.2.1 Connection insertion loss 160.10.2.2 Maximum discrete reflectance 160.10.3 Medium Dependent Interface (MDI) requirements <\/td>\n<\/tr>\n | ||||||
| 6260<\/td>\n | 160.11 Requirements for interoperation between 50GBASE-BRx PMDs <\/td>\n<\/tr>\n | ||||||
| 6261<\/td>\n | 160.12 Protocol implementation conformance statement (PICS) proforma for Clause 160, Physical Medium Dependent (PMD) sublayer and medium, types 50GBASE-BR10, 50GBASE-BR20, and 50GBASE-BR40 160.12.1 Introduction 160.12.2 Identification 160.12.2.1 Implementation identification 160.12.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6262<\/td>\n | 160.12.3 Major capabilities\/options 160.12.4 PICS proforma tables for PMD sublayer and medium, types 50GBASE-BR10, 50GBASE-BR20, and 50GBASE-BR40 160.12.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6263<\/td>\n | 160.12.4.2 Management functions <\/td>\n<\/tr>\n | ||||||
| 6264<\/td>\n | 160.12.4.3 PMD to MDI optical specifications for 50GBASE-BR10 160.12.4.4 PMD to MDI optical specifications for 50GBASE-BR20 160.12.4.5 PMD to MDI optical specifications for 50GBASE-BR40 160.12.4.6 Optical measurement methods <\/td>\n<\/tr>\n | ||||||
| 6265<\/td>\n | 160.12.4.7 Environmental specifications 160.12.4.8 Characteristics of the fiber optic cabling and MDI <\/td>\n<\/tr>\n | ||||||
| 6266<\/td>\n | Annex A (informative) Bibliography <\/td>\n<\/tr>\n | ||||||
| 6270<\/td>\n | Annex B (informative) System guidelines B.1 Baseband system guidelines and concepts, 10 Mb\/s B.1.1 Overall system objectives B.1.2 Analog system components and parameter values <\/td>\n<\/tr>\n | ||||||
| 6272<\/td>\n | B.1.3 Minimum frame length determination <\/td>\n<\/tr>\n | ||||||
| 6273<\/td>\n | B.1.4 System jitter budgets B.1.4.1 Nominal jitter values <\/td>\n<\/tr>\n | ||||||
| 6274<\/td>\n | B.1.4.2 Decoder evaluation <\/td>\n<\/tr>\n | ||||||
| 6275<\/td>\n | B.1.5 Systems consideration calculations B.1.5.1 Overview B.1.5.2 Maximum collision fragment size <\/td>\n<\/tr>\n | ||||||
| 6276<\/td>\n | B.1.5.2.1 Left-end base SDV <\/td>\n<\/tr>\n | ||||||
| 6277<\/td>\n | B.1.5.2.2 Mid-base SDV B.1.5.2.3 Right-end base SDV <\/td>\n<\/tr>\n | ||||||
| 6278<\/td>\n | B.1.5.3 Interpacket Gap (IPG) shrinkage B.1.5.3.1 Transmitting end segment variability value <\/td>\n<\/tr>\n | ||||||
| 6279<\/td>\n | B.1.5.3.2 Mid-segment variability value B.1.5.4 Timing parameters for round-trip delay and variability calculations B.1.5.4.1 MAU parameters <\/td>\n<\/tr>\n | ||||||
| 6280<\/td>\n | B.1.5.4.2 Repeater parameters B.1.5.4.3 Media parameters B.1.5.4.4 DTE parameters <\/td>\n<\/tr>\n | ||||||
| 6282<\/td>\n | B.2 System parameters and budgets for 1BASE5 B.2.1 Delay budget <\/td>\n<\/tr>\n | ||||||
| 6283<\/td>\n | B.2.2 Minimum frame length determination <\/td>\n<\/tr>\n | ||||||
| 6284<\/td>\n | B.2.3 Jitter budget <\/td>\n<\/tr>\n | ||||||
| 6285<\/td>\n | B.3 Example crosstalk computation for multiple disturbers, balanced-pair cable <\/td>\n<\/tr>\n | ||||||
| 6287<\/td>\n | B.4 10BASE-T guidelines B.4.1 System jitter budget B.4.2 Filter characteristics B.4.3 Notes for conformance testing B.4.3.1 Notes for 14.3.1.2.1 on differential output voltage <\/td>\n<\/tr>\n | ||||||
| 6288<\/td>\n | B.4.3.2 Note for 14.3.1.2.2 on transmitter differential output impedance B.4.3.3 Note for 14.3.1.2.3 on output timing jitter <\/td>\n<\/tr>\n | ||||||
| 6289<\/td>\n | B.4.3.4 General note on common-mode tests B.4.3.5 Note for 14.3.1.3.4 on receiver differential input impedance B.4.3.6 Note for 14.3.1.3.3 on receiver idle input behavior B.4.3.7 Note for 14.3.1.3.5 on receiver common-mode rejection <\/td>\n<\/tr>\n | ||||||
| 6290<\/td>\n | B.5 10BASE-F B.5.1 System jitter budget B.5.2 10BASE-FP fiber optic segment loss budget <\/td>\n<\/tr>\n | ||||||
| 6293<\/td>\n | Annex C (informative) State diagram, MAC sublayer <\/td>\n<\/tr>\n | ||||||
| 6294<\/td>\n | Annex D (informative) Application context, selected medium specifications D.1 Introduction D.2 Type 10BASE5 applications D.3 Type 10BASE2 applications <\/td>\n<\/tr>\n | ||||||
| 6295<\/td>\n | D.4 Type FOIRL and 10BASE-F applications; alternative fiber optic medium applications D.4.1 Alternative fiber types D.4.1.1 Theoretical coupling losses <\/td>\n<\/tr>\n | ||||||
| 6296<\/td>\n | D.4.1.2 Maximum launch power <\/td>\n<\/tr>\n | ||||||
| 6297<\/td>\n | D.4.2 Type 10BASE-FP applications using 50\/125 \u00b5m fiber D.4.2.1 Coupled transmit power D.4.2.2 Star coupler loss <\/td>\n<\/tr>\n | ||||||
| 6298<\/td>\n | D.4.2.3 Collision detection D.5 10BASE-T use of cabling systems with a nominal differential characteristic impedance of 120 W <\/td>\n<\/tr>\n | ||||||
| 6299<\/td>\n | D.6 10BASE-T use of cabling systems with a nominal differential characteristic impedance of 150 W <\/td>\n<\/tr>\n | ||||||
| 6301<\/td>\n | Annex E (informative) Receiver wavelength design considerations (FOIRL) <\/td>\n<\/tr>\n | ||||||
| 6302<\/td>\n | Annex F (normative) Additional attributes required for systems F.1 Introduction F.1.1 Scope F.2 Objects\/Attributes\/Actions\/Notifications F.2.1 TimeSinceSystemReset attribute <\/td>\n<\/tr>\n | ||||||
| 6303<\/td>\n | F.2.2 RepeaterResetTimeStamp attribute F.2.3 ResetSystemAction action <\/td>\n<\/tr>\n | ||||||
| 6304<\/td>\n | Annex G (normative) Additional material required for conformance testing G.1 Introduction G.1.1 Material in support of the aDataRateMismatches attribute <\/td>\n<\/tr>\n | ||||||
| 6305<\/td>\n | Annex H (normative) GDMO specifications for CSMA\/CD managed objects <\/td>\n<\/tr>\n | ||||||
| 6306<\/td>\n | Annex J (normative) Electrical isolation and general safety J.1 Electrical isolation J.2 General safety <\/td>\n<\/tr>\n | ||||||
| 6307<\/td>\n | J.3 Protocol implementation conformance statement (PICS) proforma for Annex J, Electrical isolation and general safety J.3.1 Introduction J.3.2 Identification J.3.2.1 Implementation identification J.3.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6308<\/td>\n | J.3.3 Major capabilities\/options J.3.4 PICS proforma tables for electrical isolation and general safety J.3.4.1 Electrical isolation J.3.4.2 General safety <\/td>\n<\/tr>\n | ||||||
| 6309<\/td>\n | Annex K (informative) Optional alternative terminology for \u201cmaster\u201d and \u201cslave\u201d <\/td>\n<\/tr>\n | ||||||
| 6310<\/td>\n | Annex 4A (normative) Simplified full duplex media access control 4A.1 Functional model of the MAC method 4A.1.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6311<\/td>\n | 4A.1.2 Full duplex operation 4A.1.2.1 Transmission 4A.1.2.2 Reception <\/td>\n<\/tr>\n | ||||||
| 6312<\/td>\n | 4A.1.3 Relationships to the MAC client and Physical Layers 4A.2 Media access control (MAC) method: precise specification 4A.2.1 Introduction 4A.2.2 Overview of the procedural model 4A.2.2.1 Ground rules for the procedural model <\/td>\n<\/tr>\n | ||||||
| 6313<\/td>\n | 4A.2.2.2 Use of Pascal in the procedural model 4A.2.2.3 Organization of the procedural model <\/td>\n<\/tr>\n | ||||||
| 6318<\/td>\n | 4A.2.2.4 Layer management extensions to procedural model 4A.2.3 Packet transmission model 4A.2.3.1 Transmit data encapsulation 4A.2.3.2 Transmit media access management 4A.2.3.2.1 Deference <\/td>\n<\/tr>\n | ||||||
| 6319<\/td>\n | 4A.2.3.2.2 Interpacket gap 4A.2.3.2.3 Transmission 4A.2.3.2.4 Minimum frame size 4A.2.4 Frame reception model 4A.2.4.1 Receive data decapsulation 4A.2.4.1.1 Address recognition <\/td>\n<\/tr>\n | ||||||
| 6320<\/td>\n | 4A.2.4.1.2 Frame check sequence validation 4A.2.4.1.3 Frame disassembly 4A.2.4.2 Receive media access management 4A.2.5 Preamble generation 4A.2.6 Start frame sequence <\/td>\n<\/tr>\n | ||||||
| 6321<\/td>\n | 4A.2.7 Global declarations 4A.2.7.1 Common constants, types, and variables <\/td>\n<\/tr>\n | ||||||
| 6322<\/td>\n | 4A.2.7.2 Transmit state variables 4A.2.7.3 Receive state variables 4A.2.7.4 State variable initialization <\/td>\n<\/tr>\n | ||||||
| 6323<\/td>\n | 4A.2.8 Frame transmission <\/td>\n<\/tr>\n | ||||||
| 6326<\/td>\n | 4A.2.9 Frame reception <\/td>\n<\/tr>\n | ||||||
| 6329<\/td>\n | 4A.2.10 Common procedures 4A.3 Interfaces to\/from adjacent layers 4A.3.1 Overview 4A.3.2 MAC service 4A.3.2.1 MAC client transmit interface state diagram 4A.3.2.1.1 Variables <\/td>\n<\/tr>\n | ||||||
| 6330<\/td>\n | 4A.3.2.1.2 Functions 4A.3.2.1.3 Messages 4A.3.2.1.4 MAC client transmit interface state diagram <\/td>\n<\/tr>\n | ||||||
| 6331<\/td>\n | 4A.3.2.2 MAC client receive interface state diagram 4A.3.2.2.1 Variables 4A.3.2.2.2 Functions 4A.3.2.2.3 Messages <\/td>\n<\/tr>\n | ||||||
| 6332<\/td>\n | 4A.3.2.2.4 MAC client receive interface state diagram 4A.3.3 Services required from the Physical Layer <\/td>\n<\/tr>\n | ||||||
| 6333<\/td>\n | 4A.4 Specific implementations 4A.4.1 Compatibility overview <\/td>\n<\/tr>\n | ||||||
| 6334<\/td>\n | 4A.4.2 MAC parameters <\/td>\n<\/tr>\n | ||||||
| 6335<\/td>\n | Annex 22A (informative) MII output delay, setup, and hold time budget 22A.1 System model <\/td>\n<\/tr>\n | ||||||
| 6336<\/td>\n | 22A.2 Signal transmission path characteristics <\/td>\n<\/tr>\n | ||||||
| 6337<\/td>\n | 22A.3 Budget calculation <\/td>\n<\/tr>\n | ||||||
| 6339<\/td>\n | Annex 22B (informative) MII driver ac characteristics 22B.1 Implications of CMOS ASIC processes <\/td>\n<\/tr>\n | ||||||
| 6340<\/td>\n | 22B.2 Ro(min) and V, I values for operation from 5 V \u00b1 10% supply 22B.3 Ro(min) and V, I values for operation from 3.3 V \u00b1 0.3 V supply <\/td>\n<\/tr>\n | ||||||
| 6341<\/td>\n | Annex 22C (informative) Measurement techniques for MII signal timing characteristics 22C.1 Measuring timing characteristics of source terminated signals 22C.2 Measuring timing characteristics of transmit signals at the MII 22C.3 Measuring timing characteristics of receive signals at the MII <\/td>\n<\/tr>\n | ||||||
| 6342<\/td>\n | 22C.4 Measuring timing characteristics of MDIO <\/td>\n<\/tr>\n | ||||||
| 6343<\/td>\n | Annex 22D (informative) Clause 22 access to Clause 45 MMD registers 22D.1 Write operation 22D.2 Read operation 22D.3 MMD address operations 22D.3.1 Address <\/td>\n<\/tr>\n | ||||||
| 6344<\/td>\n | 22D.3.2 Data, no post increment 22D.3.3 Data, post increment on reads and writes 22D.3.4 Data, post increment on writes only 22D.4 PHY Coexistence and bus conflict avoidance <\/td>\n<\/tr>\n | ||||||
| 6345<\/td>\n | Annex 23A (normative) 6T codewords <\/td>\n<\/tr>\n | ||||||
| 6347<\/td>\n | Annex 23B (informative) Noise budget <\/td>\n<\/tr>\n | ||||||
| 6348<\/td>\n | Annex 23C (informative) Use of cabling systems with a nominal differential characteristic impedance of 120 W <\/td>\n<\/tr>\n | ||||||
| 6349<\/td>\n | Annex 27A (normative) Repeater delay consistency requirements <\/td>\n<\/tr>\n | ||||||
| 6350<\/td>\n | Annex 28A (normative) Selector Field definitions <\/td>\n<\/tr>\n | ||||||
| 6351<\/td>\n | Annex 28B (normative) IEEE 802.3 Selector Base Page definition 28B.1 Selector field value 28B.2 Technology Ability Field bit assignments <\/td>\n<\/tr>\n | ||||||
| 6352<\/td>\n | 28B.3 Priority resolution <\/td>\n<\/tr>\n | ||||||
| 6353<\/td>\n | 28B.4 Message Page transmission convention <\/td>\n<\/tr>\n | ||||||
| 6354<\/td>\n | Annex 28C (normative) Next Page Message Code field definitions <\/td>\n<\/tr>\n | ||||||
| 6355<\/td>\n | 28C.1 Message code 0\u2014Auto-Negotiation reserved code 1 28C.2 Message code 1\u2014Null Message code 28C.3 Message code 2\u2014Technology Ability extension code 1 28C.4 Message code 3\u2014Technology Ability extension code 2 <\/td>\n<\/tr>\n | ||||||
| 6356<\/td>\n | 28C.5 Message code 4\u2014Remote fault number code 28C.6 Message code 5\u2014Organizationally Unique Identifier (OUI) tag code <\/td>\n<\/tr>\n | ||||||
| 6357<\/td>\n | 28C.7 Message code 6\u2014PHY identifier tag code 28C.8 Message code 2047\u2014Auto-Negotiation reserved code 2 28C.9 Message code 7\u2014100BASE-T2 technology message code 28C.10 Message code 8\u20141000BASE-T technology message code 28C.11 Message code 9\u2014MultiGBASE-T and 1000BASE-T technology message code <\/td>\n<\/tr>\n | ||||||
| 6358<\/td>\n | 28C.12 Message code 10\u2014EEE technology message code 28C.13 Message code 11\u2014Organizationally Unique Identifier Tagged Message (Extended Next Page) <\/td>\n<\/tr>\n | ||||||
| 6359<\/td>\n | Annex 28D (normative) Description of extensions to Clause 28 and associated annexes 28D.1 Introduction 28D.2 Extensions to Clause 28 28D.2.1 Extensions required for Clause 31 (full duplex) 28D.2.2 Extensions required for Clause 32 (100BASE-T2) 28D.3 Extensions for Clause 31 <\/td>\n<\/tr>\n | ||||||
| 6360<\/td>\n | 28D.4 Extensions for Clause 32 (100BASE-T2) 28D.5 Extensions required for Clause 40 (1000BASE-T) <\/td>\n<\/tr>\n | ||||||
| 6361<\/td>\n | 28D.6 Extensions required for Clause 55 (10GBASE-T) 28D.7 Extensions required for Energy-Efficient Ethernet (Clause 78) 28D.8 Extensions required for Clause 113 (25GBASE-T and 40GBASE-T) <\/td>\n<\/tr>\n | ||||||
| 6362<\/td>\n | 28D.9 Extensions required for Clause 126 (2.5G\/5GBASE-T) <\/td>\n<\/tr>\n | ||||||
| 6363<\/td>\n | Annex 29A (informative) DTE and repeater delay components 29A.1 DTE delay 29A.2 Repeater delay <\/td>\n<\/tr>\n | ||||||
| 6364<\/td>\n | Annex 29B (informative) Recommended topology documentation <\/td>\n<\/tr>\n | ||||||
| 6365<\/td>\n | Annex 30A (normative) GDMO specification for IEEE 802.3 managed object classes <\/td>\n<\/tr>\n | ||||||
| 6366<\/td>\n | Annex 30B (normative) GDMO and ASN.1 definitions for management <\/td>\n<\/tr>\n | ||||||
| 6367<\/td>\n | Annex 30C (normative) SNMP MIB definitions for Link Aggregation <\/td>\n<\/tr>\n | ||||||
| 6368<\/td>\n | Annex 31A (normative) MAC Control opcode assignments <\/td>\n<\/tr>\n | ||||||
| 6374<\/td>\n | Annex 31B (normative) MAC Control PAUSE operation 31B.1 PAUSE description 31B.2 Parameter semantics <\/td>\n<\/tr>\n | ||||||
| 6375<\/td>\n | 31B.3 Detailed specification of PAUSE operation 31B.3.1 Transmit operation 31B.3.2 Transmit state diagram for PAUSE operation 31B.3.2.1 Constants 31B.3.2.2 Variables <\/td>\n<\/tr>\n | ||||||
| 6376<\/td>\n | 31B.3.2.3 Functions 31B.3.2.4 Timers 31B.3.2.5 Messages 31B.3.2.6 Transmit state diagram for PAUSE operation 31B.3.3 Receive operation <\/td>\n<\/tr>\n | ||||||
| 6378<\/td>\n | 31B.3.4 Receive state diagram for PAUSE operation 31B.3.4.1 Constants 31B.3.4.2 Variables 31B.3.4.3 Timers <\/td>\n<\/tr>\n | ||||||
| 6379<\/td>\n | 31B.3.4.4 Receive state diagram (INITIATE MAC CONTROL FUNCTION) for PAUSE operation 31B.3.5 Status indication operation 31B.3.6 Indication state diagram for pause operation 31B.3.6.1 Constants 31B.3.6.2 Variables <\/td>\n<\/tr>\n | ||||||
| 6380<\/td>\n | 31B.3.6.3 Messages 31B.3.6.4 Indication state diagram for PAUSE operation 31B.3.7 Timing considerations for PAUSE operation <\/td>\n<\/tr>\n | ||||||
| 6383<\/td>\n | 31B.4 Protocol implementation conformance statement (PICS) proforma for MAC Control PAUSE operation 31B.4.1 Introduction 31B.4.2 Identification 31B.4.2.1 Implementation identification 31B.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6384<\/td>\n | 31B.4.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 6385<\/td>\n | 31B.4.4 PAUSE command requirements 31B.4.5 PAUSE command state diagram requirements 31B.4.6 PAUSE command MAC timing considerations <\/td>\n<\/tr>\n | ||||||
| 6387<\/td>\n | Annex 31C (normative) MAC Control organization specific extension operation 31C.1 Organization specific extension description 31C.2 Transmission of Extension MAC Control frame 31C.3 Receive operation <\/td>\n<\/tr>\n | ||||||
| 6388<\/td>\n | 31C.3.1 Receive state diagram (INITIATE MAC CONTROL FUNCTION) for EXTENSION operation <\/td>\n<\/tr>\n | ||||||
| 6389<\/td>\n | 31C.4 Protocol implementation conformance statement (PICS) proforma for MAC Control organization specific extension operation 31C.4.1 Introduction 31C.4.2 Identification 31C.4.2.1 Implementation identification 31C.4.2.2 Protocol summary 31C.4.3 EXTENSION command state diagram requirements <\/td>\n<\/tr>\n | ||||||
| 6390<\/td>\n | Annex 31D (normative) MAC Control PFC operation 31D.1 PFC description 31D.2 Parameter semantics <\/td>\n<\/tr>\n | ||||||
| 6391<\/td>\n | 31D.3 PFC transmit <\/td>\n<\/tr>\n | ||||||
| 6392<\/td>\n | 31D.4 Transmit state diagram for PFC operation 31D.4.1 Constants <\/td>\n<\/tr>\n | ||||||
| 6393<\/td>\n | 31D.4.2 Variables 31D.4.3 Messages 31D.4.4 Transmit state diagram for PFC operation 31D.5 PFC receive 31D.6 Receive state diagram for PFC operation <\/td>\n<\/tr>\n | ||||||
| 6394<\/td>\n | 31D.6.1 Constants 31D.6.2 Variables <\/td>\n<\/tr>\n | ||||||
| 6395<\/td>\n | 31D.6.3 Receive state diagram (INITIATE MAC CONTROL FUNCTION) for PFC operation <\/td>\n<\/tr>\n | ||||||
| 6396<\/td>\n | 31D.7 Protocol implementation conformance statement (PICS) proforma for MAC Control PFC operation 31D.7.1 Introduction 31D.7.2 Identification 31D.7.2.1 Implementation identification 31D.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6397<\/td>\n | 31D.7.3 Major capabilities\/options 31D.7.4 PFC command requirements 31D.7.5 PFC command state diagram requirements <\/td>\n<\/tr>\n | ||||||
| 6398<\/td>\n | Annex 32A (informative) Use of cabling systems with nominal differential characteristic impedance of 120 \u03a9 or 150 \u03a9 <\/td>\n<\/tr>\n | ||||||
| 6399<\/td>\n | Annex 33A (informative) PSE-PD stability 33A.1 Recommended PSE design guidelines and test setup <\/td>\n<\/tr>\n | ||||||
| 6401<\/td>\n | 33A.2 Recommended PD design guidelines <\/td>\n<\/tr>\n | ||||||
| 6402<\/td>\n | Annex 36A (informative) Jitter test patterns 36A.1 High-frequency test pattern 36A.2 Low-frequency test pattern 36A.3 Mixed frequency test pattern 36A.4 Long continuous random test pattern <\/td>\n<\/tr>\n | ||||||
| 6403<\/td>\n | 36A.5 Short continuous random test pattern <\/td>\n<\/tr>\n | ||||||
| 6405<\/td>\n | Annex 36B (informative) 8B\/10B transmission code running disparity calculation examples <\/td>\n<\/tr>\n | ||||||
| 6407<\/td>\n | Annex 38A (informative) Fiber launch conditions 38A.1 Overfilled Launch 38A.2 Radial Overfilled Launch (ROFL) <\/td>\n<\/tr>\n | ||||||
| 6408<\/td>\n | Annex 40A (informative) Additional cabling design guidelines 40A.1 Alien crosstalk 40A.1.1 Multipair cabling (i.e., greater than 4-pair) 40A.1.2 Bundled or hybrid cable configurations 40A.2 Cabling configurations <\/td>\n<\/tr>\n | ||||||
| 6410<\/td>\n | Annex 40B (informative) Description of cable clamp <\/td>\n<\/tr>\n | ||||||
| 6412<\/td>\n | 40B.1 Cable clamp validation <\/td>\n<\/tr>\n | ||||||
| 6414<\/td>\n | Annex 40C (informative) Add-on interface for additional Next Pages <\/td>\n<\/tr>\n | ||||||
| 6416<\/td>\n | 40C.1 State variables 40C.2 State diagrams 40C.2.1 Auto-Negotiation Transmit state diagram add-on for 1000BASE-T <\/td>\n<\/tr>\n | ||||||
| 6419<\/td>\n | 40C.2.2 Auto-Negotiation Receive state diagram add-on for 1000BASE-T <\/td>\n<\/tr>\n | ||||||
| 6421<\/td>\n | Annex 43A (informative) Annex 43A is no longer in use. <\/td>\n<\/tr>\n | ||||||
| 6422<\/td>\n | Annex 43B (informative) Annex 43B is no longer in use. <\/td>\n<\/tr>\n | ||||||
| 6423<\/td>\n | Annex 43C (informative) Annex 43C is no longer in use. <\/td>\n<\/tr>\n | ||||||
| 6424<\/td>\n | Annex 44A (informative) Diagram of Data Flow 44A.1 10GBASE-R bit ordering 44A.2 10GBASE-W serial bit ordering 44A.3 10GBASE-LX4 bit ordering <\/td>\n<\/tr>\n | ||||||
| 6430<\/td>\n | 44A.4 Loopback locations <\/td>\n<\/tr>\n | ||||||
| 6431<\/td>\n | Annex 45A (informative) Clause 45 MDIO electrical interface 45A.1 MDIO driver 45A.2 Single Clause 45 electrical interface <\/td>\n<\/tr>\n | ||||||
| 6432<\/td>\n | 45A.3 Clause 45 electrical interface for STA with Clause 22 electrical interface to PHYs 45A.4 Clause 22 electrical interface for STA with Clause 45 electrical interface to MMDs <\/td>\n<\/tr>\n | ||||||
| 6434<\/td>\n | Annex 48A (normative) Jitter test patterns 48A.1 High-frequency test pattern 48A.2 Low-frequency test pattern 48A.3 Mixed-frequency test pattern <\/td>\n<\/tr>\n | ||||||
| 6435<\/td>\n | 48A.4 Continuous random test pattern (CRPAT) <\/td>\n<\/tr>\n | ||||||
| 6436<\/td>\n | 48A.5 Continuous jitter test pattern (CJPAT) <\/td>\n<\/tr>\n | ||||||
| 6437<\/td>\n | 48A.5.1 Continuous jitter test pattern (CJPAT) 10 bit values <\/td>\n<\/tr>\n | ||||||
| 6441<\/td>\n | Annex 48B (informative) Jitter test methods 48B.1 BER and jitter model 48B.1.1 Description of dual Dirac mathematical model <\/td>\n<\/tr>\n | ||||||
| 6443<\/td>\n | 48B.1.2 Random Jitter 48B.1.3 Addition of Deterministic Jitter 48B.1.4 Effects of jitter high-pass filtering and CJPAT on deterministic jitter <\/td>\n<\/tr>\n | ||||||
| 6444<\/td>\n | 48B.2 Jitter tolerance test methodologies 48B.2.1 Calibration of a signal source using the BERT scan technique <\/td>\n<\/tr>\n | ||||||
| 6445<\/td>\n | 48B.3 Jitter output test methodologies 48B.3.1 Time domain measurement\u2014Scope and BERT scan 48B.3.1.1 Jitter high pass filtering (using Golden PLL) <\/td>\n<\/tr>\n | ||||||
| 6446<\/td>\n | 48B.3.1.2 Time domain scope measurement 48B.3.1.3 BERT scan 48B.3.1.3.1 Approximate curve-fitting for BERT scan <\/td>\n<\/tr>\n | ||||||
| 6447<\/td>\n | 48B.3.2 Time Interval Analysis 48B.3.2.1 TIA with Golden PLL <\/td>\n<\/tr>\n | ||||||
| 6448<\/td>\n | 48B.3.2.1.1 Test method <\/td>\n<\/tr>\n | ||||||
| 6449<\/td>\n | 48B.3.2.2 TIA with pattern trigger <\/td>\n<\/tr>\n | ||||||
| 6450<\/td>\n | 48B.3.2.2.1 Test method 48B.3.2.3 Approximate curve fitting for TIA bathtub curve <\/td>\n<\/tr>\n | ||||||
| 6451<\/td>\n | Annex 50A (informative) Thresholds for Severely Errored Second calculations 50A.1 Section SES threshold 50A.2 Line SES threshold 50A.3 Path SES threshold <\/td>\n<\/tr>\n | ||||||
| 6452<\/td>\n | 50A.4 Definition of Path Block Error 50A.5 Definition of Far End Path Block Error <\/td>\n<\/tr>\n | ||||||
| 6453<\/td>\n | Annex 55A (normative) LDPC details 55A.1 Generator matrix 55A.2 Sparse parity check matrix H <\/td>\n<\/tr>\n | ||||||
| 6454<\/td>\n | Annex 55B (informative) Additional cabling design guidelines for 10GBASE-T 55B.1 Alien crosstalk considerations <\/td>\n<\/tr>\n | ||||||
| 6455<\/td>\n | 55B.1.1 Alien crosstalk mitigation <\/td>\n<\/tr>\n | ||||||
| 6456<\/td>\n | 55B.1.2 Alien crosstalk mitigation procedure <\/td>\n<\/tr>\n | ||||||
| 6457<\/td>\n | Annex 57A (normative) Requirements for support of Slow Protocols 57A.1 Introduction and rationale 57A.2 Slow Protocol transmission characteristics 57A.3 Addressing <\/td>\n<\/tr>\n | ||||||
| 6458<\/td>\n | 57A.4 Protocol identification <\/td>\n<\/tr>\n | ||||||
| 6459<\/td>\n | 57A.5 Handling of Slow Protocol frames <\/td>\n<\/tr>\n | ||||||
| 6460<\/td>\n | 57A.6 Protocol implementation conformance statement (PICS) proforma for Annex 57A, Requirements for support of Slow Protocols 57A.6.1 Introduction 57A.6.2 Identification 57A.6.2.1 Implementation identification 57A.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6461<\/td>\n | 57A.6.2.3 Transmission characteristics 57A.6.2.4 Frame handling <\/td>\n<\/tr>\n | ||||||
| 6462<\/td>\n | Annex 57B (normative) Organization specific slow protocol (OSSP) 57B.1 Transmission and representation of octets 57B.1.1 OSSPDU frame structure <\/td>\n<\/tr>\n | ||||||
| 6464<\/td>\n | 57B.2 Protocol implementation conformance statement (PICS) proforma for Annex 57B, Organization specific slow protocol (OSSP) 57B.2.1 Introduction 57B.2.2 Identification 57B.2.2.1 Implementation identification 57B.2.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6465<\/td>\n | 57B.2.2.3 OSSPDU structure <\/td>\n<\/tr>\n | ||||||
| 6466<\/td>\n | Annex 58A (informative) Frame-based testing <\/td>\n<\/tr>\n | ||||||
| 6468<\/td>\n | Annex 58B (informative) Jitter, OMA, and TDP 58B.1 Jitter at TP1 and TP4 for 100BASE-LX10 and 100BASE-BX10 58B.2 OMA relationship to extinction ratio and power measurements <\/td>\n<\/tr>\n | ||||||
| 6469<\/td>\n | 58B.3 Approximate measures of TDP <\/td>\n<\/tr>\n | ||||||
| 6470<\/td>\n | 58B.4 Jitter measurements <\/td>\n<\/tr>\n | ||||||
| 6472<\/td>\n | Annex 59A (informative) Jitter budget and measurements 59A.1 Jitter specifications <\/td>\n<\/tr>\n | ||||||
| 6473<\/td>\n | 59A.2 Total jitter measurements 59A.3 Deterministic or high probability jitter measurement <\/td>\n<\/tr>\n | ||||||
| 6474<\/td>\n | Annex 60A (informative) Jitter at TP1 to TP4 for 1000BASE-PX <\/td>\n<\/tr>\n | ||||||
| 6476<\/td>\n | Annex 61A (informative) EFM Copper examples 61A.1 Purpose and scope 61A.2 Aggregation Discovery example <\/td>\n<\/tr>\n | ||||||
| 6480<\/td>\n | 61A.3 Example of 64\/65-octet encapsulation <\/td>\n<\/tr>\n | ||||||
| 6484<\/td>\n | Annex 61B (informative) Handshake codepoints for 2BASE-TL and 10PASS-TS 61B.1 Purpose and scope 61B.2 Level-1 S field codepoints for 2BASE-TL and 10PASS-TS 61B.3 Codepoints for 2BASE-TL 61B.3.1 Level-2 S field codepoints for 2BASE-TL <\/td>\n<\/tr>\n | ||||||
| 6486<\/td>\n | 61B.3.2 Level-3 S field codepoints for 2BASE-TL 61B.3.2.1 Training parameter codepoints <\/td>\n<\/tr>\n | ||||||
| 6497<\/td>\n | 61B.3.2.2 PMMS parameter codepoints <\/td>\n<\/tr>\n | ||||||
| 6504<\/td>\n | 61B.3.2.3 Framing parameter codepoints <\/td>\n<\/tr>\n | ||||||
| 6505<\/td>\n | 61B.4 Codepoints for 10PASS-TS 61B.4.1 Level-2 S field codepoints for 10PASS-TS <\/td>\n<\/tr>\n | ||||||
| 6506<\/td>\n | 61B.4.2 Level-3 S field codepoints for 10PASS-TS 61B.4.2.1 Used bands in upstream codepoints <\/td>\n<\/tr>\n | ||||||
| 6507<\/td>\n | 61B.4.2.2 Used bands in downstream codepoints <\/td>\n<\/tr>\n | ||||||
| 6508<\/td>\n | 61B.4.2.3 IDFT\/DFT size codepoints 61B.4.2.4 Initial length of CE codepoints <\/td>\n<\/tr>\n | ||||||
| 6509<\/td>\n | 61B.4.2.5 MCM RFI band codepoints <\/td>\n<\/tr>\n | ||||||
| 6511<\/td>\n | 61B.5 Protocol implementation conformance statement (PICS) proforma for Annex 61B, Handshake codepoints for 2BASE-TL and 10PASS-TS 61B.5.1 Introduction 61B.5.2 Identification 61B.5.2.1 Implementation identification 61B.5.2.2 Protocol summary 61B.5.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 6512<\/td>\n | 61B.5.4 2BASE-TL handshake coding rules <\/td>\n<\/tr>\n | ||||||
| 6513<\/td>\n | Annex 62A (normative) PMD profiles for 10PASS-TS 62A.1 Introduction and rationale 62A.2 Relationship to other clauses 62A.3 Profile definitions 62A.3.1 Bandplan and PSD mask profiles <\/td>\n<\/tr>\n | ||||||
| 6515<\/td>\n | 62A.3.2 Bandplan definitions 62A.3.3 PSD mask definitions 62A.3.4 UPBO Reference PSD Profiles <\/td>\n<\/tr>\n | ||||||
| 6516<\/td>\n | 62A.3.5 Band Notch Profiles <\/td>\n<\/tr>\n | ||||||
| 6518<\/td>\n | 62A.3.6 Payload rate profiles 62A.3.7 Complete profiles 62A.3.8 Default profile <\/td>\n<\/tr>\n | ||||||
| 6519<\/td>\n | 62A.4 Register settings <\/td>\n<\/tr>\n | ||||||
| 6521<\/td>\n | 62A.5 Protocol implementation conformance statement (PICS) proforma for Annex 62A, PMD profiles for 10PASS-TS 62A.5.1 Introduction 62A.5.2 Identification 62A.5.2.1 Implementation identification 62A.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6522<\/td>\n | 62A.5.3 Major capabilities\/options 62A.5.4 PICS proforma tables for PMD profiles for 10PASS-TS <\/td>\n<\/tr>\n | ||||||
| 6526<\/td>\n | Annex 62B (normative) Performance guidelines for 10PASS-TS PMD profiles 62B.1 Introduction and rationale 62B.2 Relationship to other clauses 62B.3 Performance test cases <\/td>\n<\/tr>\n | ||||||
| 6528<\/td>\n | 62B.3.1 Additional tests 62B.4 Deployment guidelines <\/td>\n<\/tr>\n | ||||||
| 6529<\/td>\n | 62B.5 Protocol implementation conformance statement (PICS) proforma for Annex 62B, Performance guidelines for 10PASS-TS PMD profiles 62B.5.1 Introduction 62B.5.2 Identification 62B.5.2.1 Implementation identification 62B.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6530<\/td>\n | 62B.5.3 Major capabilities\/options 62B.5.4 PICS proforma tables for Performance guidelines for 10PASS-TS PMD profiles <\/td>\n<\/tr>\n | ||||||
| 6531<\/td>\n | Annex 62C (informative) 10PASS-TS Examples 62C.1 Introduction 62C.2 Bandplan configuration <\/td>\n<\/tr>\n | ||||||
| 6534<\/td>\n | 62C.2.1 Plan A with variable LF region <\/td>\n<\/tr>\n | ||||||
| 6535<\/td>\n | 62C.3 PSD mask configuration 62C.3.1 General procedure 62C.3.2 PSD Masks for Plan A with variable LF region <\/td>\n<\/tr>\n | ||||||
| 6536<\/td>\n | Annex 63A (normative) PMD Profiles for 2BASE-TL 63A.1 Introduction and rationale 63A.2 Relationship to other clauses 63A.3 Profile definitions <\/td>\n<\/tr>\n | ||||||
| 6537<\/td>\n | 63A.4 Register settings <\/td>\n<\/tr>\n | ||||||
| 6538<\/td>\n | 63A.5 Protocol implementation conformance statement (PICS) proforma Annex 63A, PMD Profiles for 2BASE-TL 63A.5.1 Introduction 63A.5.2 Identification 63A.5.2.1 Implementation identification 63A.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6539<\/td>\n | 63A.5.3 Major capabilities\/options 63A.5.4 PICS proforma tables for Performance guidelines for 2BASE-TL PMD profiles <\/td>\n<\/tr>\n | ||||||
| 6540<\/td>\n | Annex 63B (normative) Performance guidelines for 2BASE-TL PMD profiles 63B.1 Introduction and rationale 63B.2 Relationship to other clauses 63B.3 Performance test cases. <\/td>\n<\/tr>\n | ||||||
| 6542<\/td>\n | 63B.4 Deployment Guidelines <\/td>\n<\/tr>\n | ||||||
| 6543<\/td>\n | 63B.5 Protocol implementation conformance statement (PICS) proforma for Annex 63B, Performance guidelines for 2BASE-TL PMD profiles 63B.5.1 Introduction 63B.5.2 Identification 63B.5.2.1 Implementation identification 63B.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6544<\/td>\n | 63B.5.3 Major capabilities\/options 63B.5.4 PICS proforma tables for Performance guidelines for 2BASE-TL PMD profiles <\/td>\n<\/tr>\n | ||||||
| 6545<\/td>\n | Annex 67A (informative) Environmental characteristics for Ethernet subscriber access networks 67A.1 Introduction 67A.1.1 Terminal deployment scenarios <\/td>\n<\/tr>\n | ||||||
| 6546<\/td>\n | 67A.2 Temperature <\/td>\n<\/tr>\n | ||||||
| 6548<\/td>\n | 67A.3 Temperature impact on optical components 67A.3.1 Component case temperature recommendations <\/td>\n<\/tr>\n | ||||||
| 6550<\/td>\n | Annex 69A (normative) Interference tolerance testing 69A.1 Introduction 69A.2 Test setup <\/td>\n<\/tr>\n | ||||||
| 6551<\/td>\n | 69A.2.1 Pattern generator 69A.2.2 Test channel <\/td>\n<\/tr>\n | ||||||
| 6552<\/td>\n | 69A.2.3 Interference generator 69A.2.4 Transmitter control <\/td>\n<\/tr>\n | ||||||
| 6553<\/td>\n | 69A.3 Test methodology <\/td>\n<\/tr>\n | ||||||
| 6554<\/td>\n | Annex 69B (informative) Interconnect characteristics 69B.1 Overview 69B.2 Reference model 69B.3 Characteristic impedance <\/td>\n<\/tr>\n | ||||||
| 6555<\/td>\n | 69B.4 Channel parameters 69B.4.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6556<\/td>\n | 69B.4.2 Fitted attenuation <\/td>\n<\/tr>\n | ||||||
| 6558<\/td>\n | 69B.4.3 Insertion loss <\/td>\n<\/tr>\n | ||||||
| 6561<\/td>\n | 69B.4.4 Insertion loss deviation <\/td>\n<\/tr>\n | ||||||
| 6563<\/td>\n | 69B.4.5 Return loss <\/td>\n<\/tr>\n | ||||||
| 6564<\/td>\n | 69B.4.6 Crosstalk 69B.4.6.1 Power sum differential near-end crosstalk (PSNEXT) 69B.4.6.2 Power sum differential far-end crosstalk (PSFEXT) <\/td>\n<\/tr>\n | ||||||
| 6565<\/td>\n | 69B.4.6.3 Power sum differential crosstalk 69B.4.6.4 Insertion loss to crosstalk ratio (ICR) <\/td>\n<\/tr>\n | ||||||
| 6567<\/td>\n | Annex 73A (normative) Next page message code field definitions 73A.1 Message code 1\u2014Null Message code 73A.2 Message code 5\u2014Organizationally Unique Identifier (OUI) tag code <\/td>\n<\/tr>\n | ||||||
| 6568<\/td>\n | 73A.3 Message code 6\u2014AN device identifier tag code <\/td>\n<\/tr>\n | ||||||
| 6569<\/td>\n | 73A.4 Message code 10\u2014EEE technology message code <\/td>\n<\/tr>\n | ||||||
| 6570<\/td>\n | Annex 74A (informative) FEC block encoding examples 74A.1 Input to the FEC (2112,2080) Encoder 74A.2 Output of the FEC (2112,2080) Encoder <\/td>\n<\/tr>\n | ||||||
| 6571<\/td>\n | 74A.3 Output of the FEC (2112,2080) Encoder after scrambling with PN-2112 sequence <\/td>\n<\/tr>\n | ||||||
| 6572<\/td>\n | 74A.4 Output of the PN-2112 sequence generator 74A.5 Output of the FEC (2112,2080) Encoder to Support Rapid Block during the wake state in EEE (optional) 74A.6 Output of the FEC (2112,2080) Encoder to Support Rapid Block during the refresh state in EEE (optional) <\/td>\n<\/tr>\n | ||||||
| 6574<\/td>\n | Annex 75A (informative) Dual-rate receiver implementation 75A.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6577<\/td>\n | Annex 75B (informative) Illustrative channels and penalties for 10GBASE-PR and 10\/1GBASE-PRX power budget classes 75B.1 Overview 75B.2 Wavelength allocation 75B.2.1 Downstream wavelength allocation <\/td>\n<\/tr>\n | ||||||
| 6579<\/td>\n | 75B.2.2 Upstream wavelength allocation <\/td>\n<\/tr>\n | ||||||
| 6580<\/td>\n | Annex 75C (informative) Jitter at TP1 to TP8 for 10GBASE\u2013PR and 10\/1GBASE\u2013PRX 75C.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6582<\/td>\n | Annex 76A (informative) FEC Encoding example 76A.1 Introduction and rationale 76A.2 64B\/66B block input <\/td>\n<\/tr>\n | ||||||
| 6584<\/td>\n | 76A.3 66 bit block input in binary format 76A.4 RS(255,223) input buffer in Binary Format <\/td>\n<\/tr>\n | ||||||
| 6585<\/td>\n | 76A.5 RS(255,223) input buffer <\/td>\n<\/tr>\n | ||||||
| 6586<\/td>\n | 76A.6 Parity symbol output 76A.7 Parity symbols in binary format <\/td>\n<\/tr>\n | ||||||
| 6587<\/td>\n | 76A.8 64B\/66B Parity Blocks for Transmit 76A.9 Parity 66 bit blocks in binary format <\/td>\n<\/tr>\n | ||||||
| 6588<\/td>\n | Annex 83A (normative) 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10) 83A.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6589<\/td>\n | 83A.1.1 Summary of major concepts 83A.1.2 Rate of operation 83A.2 XLAUI\/CAUI-10 link block diagram <\/td>\n<\/tr>\n | ||||||
| 6590<\/td>\n | 83A.2.1 Transmitter compliance points <\/td>\n<\/tr>\n | ||||||
| 6591<\/td>\n | 83A.2.2 Receiver compliance points 83A.3 XLAUI\/CAUI-10 electrical characteristics 83A.3.1 Signal levels <\/td>\n<\/tr>\n | ||||||
| 6592<\/td>\n | 83A.3.2 Signal paths 83A.3.3 EEE operation 83A.3.4 Transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 6593<\/td>\n | 83A.3.4.1 Output amplitude <\/td>\n<\/tr>\n | ||||||
| 6594<\/td>\n | 83A.3.4.1.1 Amplitude and swing 83A.3.4.2 Rise\/fall time 83A.3.4.3 Differential output return loss <\/td>\n<\/tr>\n | ||||||
| 6595<\/td>\n | 83A.3.4.4 Common-mode output return loss <\/td>\n<\/tr>\n | ||||||
| 6596<\/td>\n | 83A.3.4.5 Transmitter eye mask and transmitter jitter definition <\/td>\n<\/tr>\n | ||||||
| 6597<\/td>\n | 83A.3.4.6 Global transmit disable function 83A.3.5 Receiver characteristics 83A.3.5.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 6598<\/td>\n | 83A.3.5.2 Input signal definition <\/td>\n<\/tr>\n | ||||||
| 6599<\/td>\n | 83A.3.5.3 Differential input return loss 83A.3.5.4 Differential to common-mode input return loss <\/td>\n<\/tr>\n | ||||||
| 6600<\/td>\n | 83A.3.5.5 AC-coupling 83A.3.5.6 Jitter tolerance 83A.3.5.7 Global energy detect function <\/td>\n<\/tr>\n | ||||||
| 6601<\/td>\n | 83A.4 Interconnect characteristics <\/td>\n<\/tr>\n | ||||||
| 6602<\/td>\n | 83A.4.1 Characteristic impedance <\/td>\n<\/tr>\n | ||||||
| 6603<\/td>\n | 83A.5 Electrical parameter measurement methods 83A.5.1 Transmit jitter 83A.5.2 Receiver tolerance <\/td>\n<\/tr>\n | ||||||
| 6604<\/td>\n | 83A.6 Environmental specifications 83A.6.1 General safety 83A.6.2 Network safety 83A.6.3 Installation and maintenance guidelines 83A.6.4 Electromagnetic compatibility 83A.6.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 6605<\/td>\n | 83A.7 Protocol implementation conformance statement (PICS) proforma for Annex 83A, 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10) 83A.7.1 Introduction 83A.7.2 Identification 83A.7.2.1 Implementation identification 83A.7.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6606<\/td>\n | 83A.7.3 Major capabilities\/options 83A.7.4 XLAUI\/CAUI-10 transmitter requirements <\/td>\n<\/tr>\n | ||||||
| 6607<\/td>\n | 83A.7.5 XLAUI\/CAUI-10 receiver requirements 83A.7.6 Electrical measurement methods 83A.7.7 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 6608<\/td>\n | Annex 83B (normative) Chip-to-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10) 83B.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6610<\/td>\n | 83B.2 Compliance point specifications for chip-to-module XLAUI\/CAUI-10 <\/td>\n<\/tr>\n | ||||||
| 6612<\/td>\n | 83B.2.1 Module specifications <\/td>\n<\/tr>\n | ||||||
| 6615<\/td>\n | 83B.2.2 Host specifications <\/td>\n<\/tr>\n | ||||||
| 6616<\/td>\n | 83B.2.3 Host input signal tolerance <\/td>\n<\/tr>\n | ||||||
| 6617<\/td>\n | 83B.3 Environmental specifications 83B.3.1 General safety 83B.3.2 Network safety 83B.3.3 Installation and maintenance guidelines 83B.3.4 Electromagnetic compatibility <\/td>\n<\/tr>\n | ||||||
| 6618<\/td>\n | 83B.3.5 Temperature and humidity <\/td>\n<\/tr>\n | ||||||
| 6619<\/td>\n | 83B.4 Protocol implementation conformance statement (PICS) proforma for Annex 83B, Chip-to-module 40 Gb\/s Attachment Unit Interface (XLAUI) and 100 Gb\/s ten-lane Attachment Unit Interface (CAUI-10) 83B.4.1 Introduction 83B.4.2 Identification 83B.4.2.1 Implementation identification 83B.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6620<\/td>\n | 83B.4.3 Major capabilities\/options 83B.4.4 Module requirements 83B.4.5 Host requirements <\/td>\n<\/tr>\n | ||||||
| 6621<\/td>\n | 83B.4.6 Environmental specifications <\/td>\n<\/tr>\n | ||||||
| 6622<\/td>\n | Annex 83C (informative) PMA sublayer partitioning examples 83C.1 Partitioning examples with FEC 83C.1.1 FEC implemented with PCS <\/td>\n<\/tr>\n | ||||||
| 6623<\/td>\n | 83C.1.2 FEC implemented with PMD <\/td>\n<\/tr>\n | ||||||
| 6624<\/td>\n | 83C.2 Partitioning examples with RS-FEC 83C.2.1 Single PMA sublayer with RS-FEC <\/td>\n<\/tr>\n | ||||||
| 6625<\/td>\n | 83C.2.2 Single CAUI-10 with RS-FEC <\/td>\n<\/tr>\n | ||||||
| 6626<\/td>\n | 83C.3 Partitioning examples without FEC 83C.3.1 Single PMA sublayer without FEC <\/td>\n<\/tr>\n | ||||||
| 6627<\/td>\n | 83C.3.2 Single XLAUI\/CAUI-4 without FEC <\/td>\n<\/tr>\n | ||||||
| 6628<\/td>\n | 83C.3.3 Separate SERDES for optical module interface <\/td>\n<\/tr>\n | ||||||
| 6629<\/td>\n | 83C.4 Partitioning examples with SC-FEC 83C.4.1 CAUI-4 with SC-FEC <\/td>\n<\/tr>\n | ||||||
| 6630<\/td>\n | Annex 83D (normative) Chip-to-chip 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83D.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6632<\/td>\n | 83D.2 CAUI-4 chip-to-chip compliance point definition 83D.3 CAUI-4 chip-to-chip electrical characteristics 83D.3.1 CAUI-4 transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 6633<\/td>\n | 83D.3.1.1 Transmitter equalization settings <\/td>\n<\/tr>\n | ||||||
| 6634<\/td>\n | 83D.3.2 Optional EEE operation <\/td>\n<\/tr>\n | ||||||
| 6635<\/td>\n | 83D.3.3 CAUI-4 receiver characteristics 83D.3.3.1 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6636<\/td>\n | 83D.3.3.2 Transmitter equalization feedback (optional) <\/td>\n<\/tr>\n | ||||||
| 6637<\/td>\n | 83D.3.4 Global energy detect function for optional EEE operation 83D.4 CAUI-4 chip-to-chip channel characteristics <\/td>\n<\/tr>\n | ||||||
| 6638<\/td>\n | 83D.5 Example usage of the optional transmitter equalization feedback 83D.5.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6639<\/td>\n | 83D.5.2 Tuning equalization settings on lane 0 in the transmit direction <\/td>\n<\/tr>\n | ||||||
| 6640<\/td>\n | 83D.5.3 Tuning equalization settings on lane 0 in the receive direction <\/td>\n<\/tr>\n | ||||||
| 6641<\/td>\n | 83D.6 Protocol implementation conformance statement (PICS) proforma for Annex 83D, Chip-to-chip 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83D.6.1 Introduction 83D.6.2 Identification 83D.6.2.1 Implementation identification 83D.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6642<\/td>\n | 83D.6.3 Major capabilities\/options 83D.6.4 PICS proforma tables for chip-to-chip 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83D.6.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6643<\/td>\n | 83D.6.4.2 Receiver 83D.6.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6644<\/td>\n | Annex 83E (normative) Chip-to-module 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83E.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6645<\/td>\n | 83E.1.1 Bit error ratio <\/td>\n<\/tr>\n | ||||||
| 6646<\/td>\n | 83E.2 CAUI-4 chip-to-module compliance point definitions 83E.3 CAUI-4 chip-to-module electrical characteristics 83E.3.1 CAUI-4 host output characteristics <\/td>\n<\/tr>\n | ||||||
| 6647<\/td>\n | 83E.3.1.1 Signaling rate and range 83E.3.1.2 Signal levels <\/td>\n<\/tr>\n | ||||||
| 6648<\/td>\n | 83E.3.1.3 Output return loss <\/td>\n<\/tr>\n | ||||||
| 6649<\/td>\n | 83E.3.1.4 Differential termination mismatch 83E.3.1.5 Transition time <\/td>\n<\/tr>\n | ||||||
| 6650<\/td>\n | 83E.3.1.6 Host output eye width and eye height 83E.3.1.6.1 Reference receiver for host output eye width and eye height evaluation <\/td>\n<\/tr>\n | ||||||
| 6652<\/td>\n | 83E.3.2 CAUI-4 module output characteristics 83E.3.2.1 Module output eye width and eye height 83E.3.2.1.1 Reference receiver for module output eye width and eye height evaluation <\/td>\n<\/tr>\n | ||||||
| 6653<\/td>\n | 83E.3.3 CAUI-4 host input characteristics <\/td>\n<\/tr>\n | ||||||
| 6654<\/td>\n | 83E.3.3.1 Input return loss <\/td>\n<\/tr>\n | ||||||
| 6655<\/td>\n | 83E.3.3.2 Host stressed input test 83E.3.3.2.1 Host stressed input test procedure <\/td>\n<\/tr>\n | ||||||
| 6657<\/td>\n | 83E.3.4 CAUI-4 module input characteristics 83E.3.4.1 Module stressed input test <\/td>\n<\/tr>\n | ||||||
| 6658<\/td>\n | 83E.3.4.1.1 Module stressed input test procedure <\/td>\n<\/tr>\n | ||||||
| 6660<\/td>\n | 83E.4 CAUI-4 measurement methodology 83E.4.1 HCB\/MCB characteristics 83E.4.2 Eye width and eye height measurement method <\/td>\n<\/tr>\n | ||||||
| 6661<\/td>\n | 83E.4.2.1 Vertical eye closure <\/td>\n<\/tr>\n | ||||||
| 6662<\/td>\n | 83E.5 Protocol implementation conformance statement (PICS) proforma for Annex 83E, Chip-to-module 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83E.5.1 Introduction 83E.5.2 Identification 83E.5.2.1 Implementation identification 83E.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6663<\/td>\n | 83E.5.3 Major capabilities\/options 83E.5.4 PICS proforma tables for chip-to-module 100 Gb\/s four-lane Attachment Unit Interface (CAUI-4) 83E.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6664<\/td>\n | 83E.5.4.2 Module output 83E.5.4.3 Host input 83E.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6665<\/td>\n | Annex 85A (informative) 40GBASE-CR4 and 100GBASE-CR10 TP0 and TP5 test point parameters 85A.1 Overview 85A.2 Transmitter characteristics at TP0 <\/td>\n<\/tr>\n | ||||||
| 6666<\/td>\n | 85A.3 Receiver characteristics at TP5 85A.4 Transmitter and receiver differential printed circuit board trace loss <\/td>\n<\/tr>\n | ||||||
| 6667<\/td>\n | 85A.5 Channel insertion loss <\/td>\n<\/tr>\n | ||||||
| 6668<\/td>\n | 85A.6 Channel return loss 85A.7 Channel insertion loss deviation (ILD) <\/td>\n<\/tr>\n | ||||||
| 6669<\/td>\n | 85A.8 Channel integrated crosstalk noise (ICN) <\/td>\n<\/tr>\n | ||||||
| 6671<\/td>\n | Annex 86A (normative) Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.1 Overview 86A.2 Block diagram and test points 86A.3 Lane assignments <\/td>\n<\/tr>\n | ||||||
| 6672<\/td>\n | 86A.4 Electrical specifications for nPPI 86A.4.1 nPPI host to module electrical specifications <\/td>\n<\/tr>\n | ||||||
| 6673<\/td>\n | 86A.4.1.1 Differential return losses at TP1 and TP1a <\/td>\n<\/tr>\n | ||||||
| 6675<\/td>\n | 86A.4.2 nPPI module to host electrical specifications 86A.4.2.1 Differential return losses at TP4 and TP4a <\/td>\n<\/tr>\n | ||||||
| 6676<\/td>\n | 86A.5 Definitions of electrical parameters and measurement methods 86A.5.1 Test points and compliance boards <\/td>\n<\/tr>\n | ||||||
| 6677<\/td>\n | 86A.5.1.1 Compliance board parameters 86A.5.1.1.1 Reference insertion losses of HCB and MCB <\/td>\n<\/tr>\n | ||||||
| 6678<\/td>\n | 86A.5.1.1.2 Electrical specifications of mated HCB and MCB <\/td>\n<\/tr>\n | ||||||
| 6681<\/td>\n | 86A.5.2 Test patterns and related subclauses 86A.5.3 Parameter definitions 86A.5.3.1 AC common-mode voltage 86A.5.3.2 Termination mismatch <\/td>\n<\/tr>\n | ||||||
| 6682<\/td>\n | 86A.5.3.3 Transition time 86A.5.3.4 Data Dependent Pulse Width Shrinkage (DDPWS) <\/td>\n<\/tr>\n | ||||||
| 6683<\/td>\n | 86A.5.3.5 Signal to noise ratio Qsq <\/td>\n<\/tr>\n | ||||||
| 6684<\/td>\n | 86A.5.3.6 Eye mask for TP1a and TP4 86A.5.3.7 Reference impedances for electrical measurements 86A.5.3.8 Host input signal tolerance 86A.5.3.8.1 Introduction 86A.5.3.8.2 Test equipment and setup <\/td>\n<\/tr>\n | ||||||
| 6685<\/td>\n | 86A.5.3.8.3 Stressed eye jitter characteristics <\/td>\n<\/tr>\n | ||||||
| 6686<\/td>\n | 86A.5.3.8.4 Calibration <\/td>\n<\/tr>\n | ||||||
| 6687<\/td>\n | 86A.5.3.8.5 Calibration procedure 86A.5.3.8.6 Test procedure <\/td>\n<\/tr>\n | ||||||
| 6688<\/td>\n | 86A.6 Recommended electrical channel <\/td>\n<\/tr>\n | ||||||
| 6689<\/td>\n | 86A.7 Safety, installation, environment, and labeling 86A.7.1 General safety 86A.7.2 Installation 86A.7.3 Environment 86A.7.4 PMD labeling <\/td>\n<\/tr>\n | ||||||
| 6690<\/td>\n | 86A.8 Protocol implementation conformance statement (PICS) proforma for Annex 86A, Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.8.1 Introduction 86A.8.2 Identification 86A.8.2.1 Implementation identification 86A.8.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6691<\/td>\n | 86A.8.3 Major capabilities\/options 86A.8.4 PICS proforma tables for Parallel Physical Interface (nPPI) for 40GBASE-SR4 and 40GBASE-LR4 (XLPPI) and 100GBASE-SR10 (CPPI) 86A.8.4.1 PMD functional specifications <\/td>\n<\/tr>\n | ||||||
| 6692<\/td>\n | 86A.8.4.2 Electrical specifications for nPPI 86A.8.4.3 Definitions of parameters and measurement methods <\/td>\n<\/tr>\n | ||||||
| 6693<\/td>\n | 86A.8.4.4 Environmental and safety specifications <\/td>\n<\/tr>\n | ||||||
| 6694<\/td>\n | Annex 91A (informative) RS-FEC codeword examples 91A.1 Input to the 64B\/66B to 256B\/257B transcoder <\/td>\n<\/tr>\n | ||||||
| 6695<\/td>\n | 91A.2 Output of the RS(528,514) encoder 91A.3 Output of the RS(544,514) encoder <\/td>\n<\/tr>\n | ||||||
| 6696<\/td>\n | 91A.4 Reed-Solomon encoder model 91A.4.1 Global variable declarations for RS(528,514) <\/td>\n<\/tr>\n | ||||||
| 6697<\/td>\n | 91A.4.2 Global variable declarations for RS(544,514) 91A.4.3 Other global variable declarations 91A.4.4 GF(210) multiplier function 91A.4.5 Reed-Solomon encoder function <\/td>\n<\/tr>\n | ||||||
| 6698<\/td>\n | 91A.4.6 Main function <\/td>\n<\/tr>\n | ||||||
| 6699<\/td>\n | Annex 92A (informative) 100GBASE-CR4 TP0 and TP5 test point parameters and channel characteristics 92A.1 Overview 92A.2 Transmitter characteristics at TP0 92A.3 Receiver characteristics at TP5 92A.4 Transmitter and receiver differential printed circuit board trace loss <\/td>\n<\/tr>\n | ||||||
| 6700<\/td>\n | 92A.5 Channel insertion loss <\/td>\n<\/tr>\n | ||||||
| 6702<\/td>\n | 92A.6 Channel return loss 92A.7 Channel Operating Margin (COM) <\/td>\n<\/tr>\n | ||||||
| 6703<\/td>\n | Annex 93A (normative) Specification methods for electrical channels 93A.1 Channel Operating Margin <\/td>\n<\/tr>\n | ||||||
| 6706<\/td>\n | 93A.1.1 Measurement of the channel 93A.1.2 Transmitter and receiver device package models <\/td>\n<\/tr>\n | ||||||
| 6707<\/td>\n | 93A.1.2.1 Cascade connection of two-port networks 93A.1.2.2 Two-port network for a shunt capacitance 93A.1.2.3 Two-port network for the package transmission line <\/td>\n<\/tr>\n | ||||||
| 6708<\/td>\n | 93A.1.2.4 Assembly of transmitter and receiver device package models <\/td>\n<\/tr>\n | ||||||
| 6709<\/td>\n | 93A.1.3 Path terminations 93A.1.4 Filters 93A.1.4.1 Receiver noise filter 93A.1.4.2 Transmitter equalizer <\/td>\n<\/tr>\n | ||||||
| 6710<\/td>\n | 93A.1.4.3 Receiver equalizer 93A.1.5 Pulse response 93A.1.6 Determination of variable equalizer parameters <\/td>\n<\/tr>\n | ||||||
| 6712<\/td>\n | 93A.1.7 Interference and noise amplitude 93A.1.7.1 Interference amplitude distribution <\/td>\n<\/tr>\n | ||||||
| 6713<\/td>\n | 93A.1.7.2 Noise amplitude distribution 93A.1.7.3 Combination of interference and noise distributions <\/td>\n<\/tr>\n | ||||||
| 6714<\/td>\n | 93A.2 Test channel calibration using COM <\/td>\n<\/tr>\n | ||||||
| 6715<\/td>\n | 93A.3 Fitted insertion loss <\/td>\n<\/tr>\n | ||||||
| 6716<\/td>\n | 93A.4 Insertion loss deviation 93A.5 Effective Return Loss 93A.5.1 Pulse time-domain reflection signal <\/td>\n<\/tr>\n | ||||||
| 6717<\/td>\n | 93A.5.2 Effective reflection waveform <\/td>\n<\/tr>\n | ||||||
| 6718<\/td>\n | 93A.5.3 Sampled effective reflection <\/td>\n<\/tr>\n | ||||||
| 6719<\/td>\n | 93A.5.4 x-quantile of the reflection distribution 93A.5.5 ERL <\/td>\n<\/tr>\n | ||||||
| 6720<\/td>\n | Annex 93B (informative) Electrical backplane reference model <\/td>\n<\/tr>\n | ||||||
| 6721<\/td>\n | Annex 93C (normative) Receiver interference tolerance 93C.1 Test setup <\/td>\n<\/tr>\n | ||||||
| 6724<\/td>\n | 93C.2 Test method <\/td>\n<\/tr>\n | ||||||
| 6726<\/td>\n | Annex 97A (normative) Common-mode conversion test methodology 97A.1 Introduction 97A.2 Test configuration and measurement <\/td>\n<\/tr>\n | ||||||
| 6728<\/td>\n | 97A.3 Protocol implementation conformance statement (PICS) proforma for Annex 97A, Common-mode conversion test methodology 97A.3.1 Introduction 97A.3.2 Identification 97A.3.2.1 Implementation identification 97A.3.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6729<\/td>\n | 97A.3.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 6730<\/td>\n | Annex 97B (normative) Alien Crosstalk Test Procedure 97B.1 Introduction 97B.1.1 Alien crosstalk test configurations 97B.2 Alien crosstalk coupled between type A link segments <\/td>\n<\/tr>\n | ||||||
| 6731<\/td>\n | 97B.3 Cable bundling <\/td>\n<\/tr>\n | ||||||
| 6733<\/td>\n | 97B.4 Protocol implementation conformance statement (PICS) proforma for Annex 97B, Alien Crosstalk Test Procedure 97B.4.1 Introduction 97B.4.2 Identification 97B.4.2.1 Implementation identification 97B.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6734<\/td>\n | 97B.4.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 6735<\/td>\n | Annex 98A (normative) Selector Field definitions 98A.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 6736<\/td>\n | Annex 98B (normative) IEEE 802.3 Selector Base Page definition 98B.1 Introduction 98B.2 Selector field value 98B.3 Technology Ability Field bit assignments <\/td>\n<\/tr>\n | ||||||
| 6737<\/td>\n | 98B.3.1 10BASE-T1L-specific bit assignments 98B.4 Priority Resolution 98B.5 Message Page transmission convention <\/td>\n<\/tr>\n | ||||||
| 6738<\/td>\n | Annex 98C (normative) Next Page Message Code Field definitions 98C.1 Introduction 98C.2 Message code 1\u2014Null Message code 98C.3 Message code 5\u2014Organizationally Unique Identifier (OUI) tag code <\/td>\n<\/tr>\n | ||||||
| 6739<\/td>\n | 98C.4 Message code 6\u2014AN device identifier tag code <\/td>\n<\/tr>\n | ||||||
| 6740<\/td>\n | Annex 100A (normative) EPoC OFDM channel model 100A.1 Topology 100A.2 Downstream channel parameters <\/td>\n<\/tr>\n | ||||||
| 6743<\/td>\n | 100A.3 Upstream channel parameters <\/td>\n<\/tr>\n | ||||||
| 6746<\/td>\n | 100A.4 Protocol implementation conformance statement (PICS) proforma for Annex 100A, EPoC OFDM channel model 100A.4.1 Introduction 100A.4.2 Identification 100A.4.2.1 Implementation identification 100A.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6747<\/td>\n | 100A.4.3 Major capabilities\/options <\/td>\n<\/tr>\n | ||||||
| 6748<\/td>\n | Annex 109A (normative) Chip-to-chip 25 Gigabit Attachment Unit Interface (25GAUI C2C) 109A.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6749<\/td>\n | 109A.2 25GAUI C2C compliance point definition 109A.3 25GAUI C2C electrical characteristics 109A.3.1 25GAUI C2C transmitter characteristics 109A.3.2 25GAUI C2C receiver characteristics 109A.3.3 Optional EEE operation 109A.4 25GAUI C2C channel characteristics <\/td>\n<\/tr>\n | ||||||
| 6750<\/td>\n | 109A.5 Protocol implementation conformance statement (PICS) proforma for Annex 109A, Chip-to-chip 25 Gigabit Attachment Unit Interface (25GAUI C2C) 109A.5.1 Introduction 109A.5.2 Identification 109A.5.2.1 Implementation identification 109A.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6751<\/td>\n | 109A.5.3 Major capabilities\/options 109A.5.4 PICS proforma tables for chip-to-chip 25 Gigabit Attachment Unit Interface (25GAUI C2C) 109A.5.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6752<\/td>\n | 109A.5.4.2 Receiver 109A.5.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6753<\/td>\n | Annex 109B (normative) Chip-to-module 25 Gigabit Attachment Unit Interface (25GAUI C2M) 109B.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6754<\/td>\n | 109B.1.1 Bit error ratio 109B.2 25GAUI C2M compliance point definitions 109B.3 25GAUI C2M electrical characteristics 109B.3.1 25GAUI C2M host output characteristics 109B.3.2 25GAUI C2M module output characteristics <\/td>\n<\/tr>\n | ||||||
| 6755<\/td>\n | 109B.3.2.1 25GAUI C2M module output eye opening 109B.3.2.1.1 Eye opening using measurement method A 109B.3.2.1.2 Eye opening using measurement method B 109B.3.3 25GAUI C2M host input characteristics 109B.3.4 25GAUI C2M module input characteristics <\/td>\n<\/tr>\n | ||||||
| 6756<\/td>\n | 109B.3.4.1 Module stressed input test using measurement method A 109B.3.4.2 Module stressed input test using measurement method B 109B.4 25GAUI C2M measurement methodology 109B.4.1 Eye width, eye height, and eye closure measurement method B <\/td>\n<\/tr>\n | ||||||
| 6758<\/td>\n | 109B.5 Protocol implementation conformance statement (PICS) proforma for Annex 109B, Chip-to-module 25 Gigabit Attachment Unit Interface (25GAUI C2M) 109B.5.1 Introduction 109B.5.2 Identification 109B.5.2.1 Implementation identification 109B.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6759<\/td>\n | 109B.5.3 Major capabilities\/options 109B.5.4 PICS proforma tables for chip-to-module 25 Gigabit Attachment Unit Interface (25GAUI C2M) 109B.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6760<\/td>\n | 109B.5.4.2 Module output 109B.5.4.3 Host input <\/td>\n<\/tr>\n | ||||||
| 6761<\/td>\n | 109B.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6762<\/td>\n | Annex 109C (informative) 25GBASE-R PMA sublayer partitioning examples <\/td>\n<\/tr>\n | ||||||
| 6766<\/td>\n | Annex 110A (informative) TP0 and TP5 test point parameters and channel characteristics for 25GBASE-CR and 25GBASE-CR-S 110A.1 Overview 110A.2 Transmitter characteristics at TP0 110A.3 Receiver characteristics at TP5 110A.4 Transmitter and receiver differential printed circuit board trace loss 110A.5 Channel insertion loss <\/td>\n<\/tr>\n | ||||||
| 6768<\/td>\n | 110A.6 Channel return loss 110A.7 Channel Operating Margin (COM) <\/td>\n<\/tr>\n | ||||||
| 6769<\/td>\n | Annex 110B (normative) Test fixtures for 25GBASE-CR, 25GBASE-CR-S, and 25GAUI C2M 110B.1 Test fixtures 110B.1.1 SFP28 TP2 or TP3 test fixture 110B.1.2 SFP28 Cable assembly test fixture <\/td>\n<\/tr>\n | ||||||
| 6770<\/td>\n | 110B.1.3 SFP28 Mated test fixtures 110B.1.3.1 Mated test fixtures differential insertion loss 110B.1.3.2 Mated test fixtures differential return loss 110B.1.3.3 Mated test fixtures common-mode conversion insertion loss 110B.1.3.4 Mated test fixtures common-mode return loss 110B.1.3.5 Mated test fixtures common-mode to differential mode return loss 110B.1.3.6 Mated test fixtures integrated near-end crosstalk noise <\/td>\n<\/tr>\n | ||||||
| 6772<\/td>\n | 110B.2 Protocol implementation conformance statement (PICS) proforma for Annex 110B, Test fixtures for 25GBASE-CR, 25GBASE-CR-S, and 25GAUI C2M 110B.2.1 Introduction 110B.2.2 Identification 110B.2.2.1 Implementation identification 110B.2.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6773<\/td>\n | 110B.2.3 Major capabilities\/options 110B.2.4 PICS proforma tables for test fixtures for 25GBASE-CR, 25GBASE-CR-S, and 25GAUI C2M <\/td>\n<\/tr>\n | ||||||
| 6774<\/td>\n | Annex 110C (normative) Host and cable assembly form factors for 25GBASE-CR and 25GBASE-CR-S PHYs 110C.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6775<\/td>\n | 110C.2 Host form factors 110C.2.1 SFP28 host form factor 110C.2.2 QSFP28 host form factor <\/td>\n<\/tr>\n | ||||||
| 6776<\/td>\n | 110C.3 Cable assembly form factors 110C.3.1 SFP28 to SFP28 cable assembly form factor 110C.3.2 QSFP28 to QSFP28 cable assembly form factor 110C.3.3 QSFP28 to 4\u00d7SFP28 cable assembly form factor <\/td>\n<\/tr>\n | ||||||
| 6778<\/td>\n | Annex 113A (informative) Description of cable clamp and test setup 113A.1 Overview 113A.2 Description of cable clamp <\/td>\n<\/tr>\n | ||||||
| 6780<\/td>\n | 113A.3 Cable clamp measurement, calibration, and validation <\/td>\n<\/tr>\n | ||||||
| 6783<\/td>\n | 113A.4 Test setup <\/td>\n<\/tr>\n | ||||||
| 6784<\/td>\n | Annex 115A (informative) BCH codeword examples 115A.1 Output of the BCH(896, 720) encoder 115A.2 Output of the BCH(1976, 1668) encoder <\/td>\n<\/tr>\n | ||||||
| 6786<\/td>\n | Annex 119A (informative) 200GBASE-R and 400GBASE-R PCS FEC codeword examples <\/td>\n<\/tr>\n | ||||||
| 6792<\/td>\n | Annex 120A (informative) 200 Gb\/s and 400 Gb\/s PMA sublayer partitioning examples 120A.1 Partitioning example supporting 400GBASE-SR16 <\/td>\n<\/tr>\n | ||||||
| 6793<\/td>\n | 120A.2 Partitioning examples supporting 200GBASE-DR4\/FR4\/LR4 and 400GBASE-FR8\/LR8 <\/td>\n<\/tr>\n | ||||||
| 6796<\/td>\n | 120A.3 Partitioning examples supporting 400GBASE-DR4 <\/td>\n<\/tr>\n | ||||||
| 6798<\/td>\n | 120A.4 Partitioning example using 200GXS and 400GXS <\/td>\n<\/tr>\n | ||||||
| 6799<\/td>\n | Annex 120B (normative) Chip-to-chip 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2C) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2C) 120B.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6801<\/td>\n | 120B.2 200GAUI-8 and 400GAUI-16 chip-to-chip compliance point definition <\/td>\n<\/tr>\n | ||||||
| 6802<\/td>\n | 120B.3 200GAUI-8 and 400GAUI-16 chip-to-chip electrical characteristics 120B.3.1 200GAUI-8 and 400GAUI-16 C2C transmitter characteristics 120B.3.2 200GAUI-8 and 400GAUI-16 C2C receiver characteristics <\/td>\n<\/tr>\n | ||||||
| 6803<\/td>\n | 120B.4 200GAUI-8 and 400GAUI-16 chip-to-chip channel characteristics <\/td>\n<\/tr>\n | ||||||
| 6804<\/td>\n | 120B.5 Protocol implementation conformance statement (PICS) proforma for Annex 120B, Chip-to-chip 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2C) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2C) 120B.5.1 Introduction 120B.5.2 Identification 120B.5.2.1 Implementation identification 120B.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6805<\/td>\n | 120B.5.3 Major capabilities\/options 120B.5.4 PICS proforma tables for Chip-to-chip 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2C) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2C) 120B.5.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6806<\/td>\n | 120B.5.4.2 Receiver 120B.5.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6807<\/td>\n | Annex 120C (normative) Chip-to-module 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2M) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2M) 120C.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6809<\/td>\n | 120C.1.1 Bit error ratio 120C.2 200GAUI-8 and 400GAUI-16 chip-to-module compliance point definitions 120C.3 200GAUI-8 and 400GAUI-16 chip-to-module electrical characteristics 120C.3.1 200GAUI-8 and 400GAUI-16 C2M host output characteristics 120C.3.2 200GAUI-8 and 400GAUI-16 C2M module output characteristics 120C.3.3 200GAUI-8 and 400GAUI-16 C2M host input characteristics <\/td>\n<\/tr>\n | ||||||
| 6810<\/td>\n | 120C.3.4 200GAUI-8 and 400GAUI-16 C2M module input characteristics 120C.4 200GAUI-8 and 400GAUI-16 C2M measurement methodology <\/td>\n<\/tr>\n | ||||||
| 6811<\/td>\n | 120C.5 Protocol implementation conformance statement (PICS) proforma for Annex 120C, Chip-to-module 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2M) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2M) 120C.5.1 Introduction 120C.5.2 Identification 120C.5.2.1 Implementation identification 120C.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6812<\/td>\n | 120C.5.3 Major capabilities\/options 120C.5.4 PICS proforma tables for Chip-to-module 200 Gb\/s eight-lane Attachment Unit Interface (200GAUI-8 C2M) and 400 Gb\/s sixteen-lane Attachment Unit Interface (400GAUI-16 C2M) 120C.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6813<\/td>\n | 120C.5.4.2 Module output 120C.5.4.3 Host input 120C.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6814<\/td>\n | Annex 120D (normative) Chip-to-chip 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2C) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2C) 120D.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6817<\/td>\n | 120D.2 200GAUI-4 and 400GAUI-8 chip-to-chip compliance point definition 120D.3 200GAUI-4 and 400GAUI-8 chip-to-chip electrical characteristics 120D.3.1 200GAUI-4 and 400GAUI-8 C2C transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 6818<\/td>\n | 120D.3.1.1 Transmitter differential output return loss <\/td>\n<\/tr>\n | ||||||
| 6819<\/td>\n | 120D.3.1.2 Transmitter linearity 120D.3.1.2.1 Measurement of mean signal levels <\/td>\n<\/tr>\n | ||||||
| 6820<\/td>\n | 120D.3.1.3 Linear fit to the measured waveform 120D.3.1.4 Steady-state voltage and linear fit pulse peak 120D.3.1.5 Transmitter equalization settings <\/td>\n<\/tr>\n | ||||||
| 6822<\/td>\n | 120D.3.1.6 Transmitter output noise and distortion 120D.3.1.7 Transmitter output residual ISI 120D.3.1.8 Output jitter <\/td>\n<\/tr>\n | ||||||
| 6823<\/td>\n | 120D.3.1.8.1 J4u and JRMS jitter <\/td>\n<\/tr>\n | ||||||
| 6824<\/td>\n | 120D.3.1.8.2 Even-odd Jitter 120D.3.2 200GAUI-4 and 400GAUI-8 C2C receiver characteristics 120D.3.2.1 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6826<\/td>\n | 120D.3.2.2 Receiver jitter tolerance 120D.3.2.3 Transmitter equalization feedback (optional) <\/td>\n<\/tr>\n | ||||||
| 6827<\/td>\n | 120D.4 200GAUI-4 and 400GAUI-8 chip-to-chip channel characteristics 120D.4.1 Channel Operating Margin <\/td>\n<\/tr>\n | ||||||
| 6828<\/td>\n | 120D.4.2 Channel return loss <\/td>\n<\/tr>\n | ||||||
| 6830<\/td>\n | 120D.5 Protocol implementation conformance statement (PICS) proforma for Annex 120D, Chip-to-chip 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2C) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2C) 120D.5.1 Introduction 120D.5.2 Identification 120D.5.2.1 Implementation identification 120D.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6831<\/td>\n | 120D.5.3 Major capabilities\/options 120D.5.4 PICS proforma tables for Chip-to-chip 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2C) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2C) 120D.5.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6832<\/td>\n | 120D.5.4.2 Receiver 120D.5.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6833<\/td>\n | Annex 120E (normative) Chip-to-module 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2M) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2M) 120E.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6835<\/td>\n | 120E.1.1 Bit error ratio 120E.2 200GAUI-4 and 400GAUI-8 chip-to-module compliance point definitions <\/td>\n<\/tr>\n | ||||||
| 6836<\/td>\n | 120E.3 200GAUI-4 and 400GAUI-8 chip-to-module electrical characteristics 120E.3.1 200GAUI-4 and 400GAUI-8 C2M host output characteristics <\/td>\n<\/tr>\n | ||||||
| 6837<\/td>\n | 120E.3.1.1 Signaling rate and range 120E.3.1.2 Signal levels <\/td>\n<\/tr>\n | ||||||
| 6838<\/td>\n | 120E.3.1.3 Output return loss 120E.3.1.4 Differential termination mismatch 120E.3.1.5 Transition time 120E.3.1.6 Host output eye width and eye height <\/td>\n<\/tr>\n | ||||||
| 6839<\/td>\n | 120E.3.1.7 Reference receiver for eye width and eye height evaluation <\/td>\n<\/tr>\n | ||||||
| 6841<\/td>\n | 120E.3.2 200GAUI-4 and 400GAUI-8 C2M module output characteristics <\/td>\n<\/tr>\n | ||||||
| 6842<\/td>\n | 120E.3.2.1 Module output eye width, eye height, and pre-cursor ISI ratio <\/td>\n<\/tr>\n | ||||||
| 6843<\/td>\n | 120E.3.2.1.1 Reference receiver for module output evaluation 120E.3.2.1.2 Far-end pre-cursor ISI ratio 120E.3.3 200GAUI-4 and 400GAUI-8 C2M host input characteristics 120E.3.3.1 Input return loss <\/td>\n<\/tr>\n | ||||||
| 6844<\/td>\n | 120E.3.3.2 Host stressed input test 120E.3.3.2.1 Host stressed input test procedure <\/td>\n<\/tr>\n | ||||||
| 6846<\/td>\n | 120E.3.4 200GAUI-4 and 400GAUI-8 C2M module input characteristics 120E.3.4.1 Module stressed input test 120E.3.4.1.1 Module stressed input test procedure <\/td>\n<\/tr>\n | ||||||
| 6848<\/td>\n | 120E.4 200GAUI-4 and 400GAUI-8 C2M measurement methodology 120E.4.1 HCB\/MCB characteristics <\/td>\n<\/tr>\n | ||||||
| 6849<\/td>\n | 120E.4.2 Eye width and eye height measurement method <\/td>\n<\/tr>\n | ||||||
| 6851<\/td>\n | 120E.4.3 Vertical eye closure <\/td>\n<\/tr>\n | ||||||
| 6853<\/td>\n | 120E.5 Protocol implementation conformance statement (PICS) proforma for Annex 120E, Chip-to-module 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2M) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2M) 120E.5.1 Introduction 120E.5.2 Identification 120E.5.2.1 Implementation identification 120E.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6854<\/td>\n | 120E.5.3 Major capabilities\/options 120E.5.4 PICS proforma tables for Chip-to-module 200 Gb\/s four-lane Attachment Unit Interface (200GAUI-4 C2M) and 400 Gb\/s eight-lane Attachment Unit Interface (400GAUI-8 C2M) 120E.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6855<\/td>\n | 120E.5.4.2 Module output 120E.5.4.3 Host input 120E.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6856<\/td>\n | Annex 127A (informative) Compatibility of 2.5GBASE-X PCS\/PMA with 1000BASE-X PCS\/PMA running 2.5 times faster <\/td>\n<\/tr>\n | ||||||
| 6857<\/td>\n | Annex 128A (normative) 2.5 Gb\/s Storage Enclosure Interface (2.5GSEI) 128A.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6859<\/td>\n | 128A.1.1 Bit error ratio 128A.2 2.5GSEI compliance point definitions <\/td>\n<\/tr>\n | ||||||
| 6862<\/td>\n | 128A.3 2.5GSEI electrical characteristics 128A.3.1 2.5GSEI host output characteristics 128A.3.1.1 Signaling rate and range <\/td>\n<\/tr>\n | ||||||
| 6863<\/td>\n | 128A.3.1.2 Signaling levels 128A.3.1.3 Output return loss <\/td>\n<\/tr>\n | ||||||
| 6864<\/td>\n | 128A.3.1.4 Transmit jitter test requirements 128A.3.1.5 Transmit jitter 128A.3.1.6 Transmitter output noise and distortion <\/td>\n<\/tr>\n | ||||||
| 6865<\/td>\n | 128A.3.2 2.5GSEI host input characteristics 128A.3.2.1 Input differential return loss 128A.3.2.2 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6867<\/td>\n | 128A.3.2.3 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 6868<\/td>\n | 128A.3.3 2.5GSEI drive output characteristics <\/td>\n<\/tr>\n | ||||||
| 6869<\/td>\n | 128A.3.4 2.5GSEI drive input characteristics 128A.3.4.1 Input differential return loss 128A.3.4.2 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6870<\/td>\n | 128A.3.4.3 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 6872<\/td>\n | 128A.4 Protocol implementation conformance statement (PICS) proforma for Annex 128A, 2.5 Gb\/s Storage Enclosure Interface (2.5GSEI) 128A.4.1 Introduction 128A.4.2 Identification 128A.4.2.1 Implementation identification 128A.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6873<\/td>\n | 128A.4.3 Major capabilities\/options 128A.4.4 PICS proforma tables for 2.5 Gb\/s Storage Enclosure Interface (2.5GSEI) 128A.4.4.1 Host output functions 128A.4.4.2 Host input functions <\/td>\n<\/tr>\n | ||||||
| 6874<\/td>\n | 128A.4.4.3 Drive output functions 128A.4.4.4 Drive input functions <\/td>\n<\/tr>\n | ||||||
| 6875<\/td>\n | Annex 128B (normative) Test fixtures for 2.5 Gb\/s and 5 Gb\/s Storage Enclosure Interfaces 128B.1 Host and drive compliance boards 128B.1.1 Test fixture return loss 128B.1.2 Test fixture insertion loss <\/td>\n<\/tr>\n | ||||||
| 6876<\/td>\n | 128B.2 Mated test fixtures <\/td>\n<\/tr>\n | ||||||
| 6877<\/td>\n | 128B.2.1 Mated test fixtures insertion loss 128B.2.2 Mated test fixtures return loss <\/td>\n<\/tr>\n | ||||||
| 6878<\/td>\n | 128B.2.3 Mated test fixtures integrated crosstalk noise 128B.2.3.1 Mated test fixture near-end crosstalk (NEXT) loss <\/td>\n<\/tr>\n | ||||||
| 6880<\/td>\n | 128B.3 Protocol implementation conformance statement (PICS) proforma for Annex 128B, Test fixtures for 2.5 Gb\/s and 5 Gb\/s Storage Enclosure Interfaces 128B.3.1 Introduction 128B.3.2 Identification 128B.3.2.1 Implementation identification 128B.3.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6881<\/td>\n | 128B.3.3 Major capabilities\/options 128B.3.4 PICS proforma tables for test fixtures 128B.3.4.1 Management functions <\/td>\n<\/tr>\n | ||||||
| 6882<\/td>\n | Annex 130A (normative) 5 Gb\/s Storage Enclosure Interface (5GSEI) 130A.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6884<\/td>\n | 130A.1.1 Bit error ratio 130A.2 5GSEI compliance point definitions <\/td>\n<\/tr>\n | ||||||
| 6887<\/td>\n | 130A.3 5GSEI electrical characteristics 130A.3.1 5GSEI host output characteristics 130A.3.1.1 Signaling rate and range <\/td>\n<\/tr>\n | ||||||
| 6888<\/td>\n | 130A.3.1.2 Signaling levels 130A.3.1.3 Output return loss <\/td>\n<\/tr>\n | ||||||
| 6889<\/td>\n | 130A.3.1.4 Transmitter output waveform 130A.3.1.4.1 Linear fit to the measured waveform 130A.3.1.4.2 Steady-state voltage and linear fit pulse peak 130A.3.1.4.3 Pre-cursor coefficient <\/td>\n<\/tr>\n | ||||||
| 6890<\/td>\n | 130A.3.1.5 Transmit jitter test requirements 130A.3.1.6 Transmit jitter 130A.3.1.7 Transmitter output noise and distortion <\/td>\n<\/tr>\n | ||||||
| 6891<\/td>\n | 130A.3.2 5GSEI host input characteristics 130A.3.2.1 Input differential return loss 130A.3.2.2 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6893<\/td>\n | 130A.3.2.3 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 6894<\/td>\n | 130A.3.3 5GSEI drive output characteristics <\/td>\n<\/tr>\n | ||||||
| 6895<\/td>\n | 130A.3.3.1 Linear fit to the measured waveform 130A.3.3.2 Steady-state voltage and linear fit pulse peak 130A.3.3.3 Precursor coefficient 130A.3.3.4 Transmitter output noise and distortion <\/td>\n<\/tr>\n | ||||||
| 6896<\/td>\n | 130A.3.4 5GSEI drive input characteristics 130A.3.4.1 Input differential return loss 130A.3.4.2 Receiver interference tolerance <\/td>\n<\/tr>\n | ||||||
| 6898<\/td>\n | 130A.3.4.3 Receiver jitter tolerance <\/td>\n<\/tr>\n | ||||||
| 6900<\/td>\n | 130A.4 Protocol implementation conformance statement (PICS) proforma for Annex 130A, 5 Gb\/s Storage Enclosure Interface (5GSEI) 130A.4.1 Introduction 130A.4.2 Identification 130A.4.2.1 Implementation identification 130A.4.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6901<\/td>\n | 130A.4.3 Major capabilities\/options 130A.4.4 PICS proforma tables for 5 Gb\/s Storage Enclosure Interface (5GSEI) 130A.4.4.1 Host output functions 130A.4.4.2 Host input functions <\/td>\n<\/tr>\n | ||||||
| 6902<\/td>\n | 130A.4.4.3 Drive output functions 130A.4.4.4 Drive input functions <\/td>\n<\/tr>\n | ||||||
| 6903<\/td>\n | Annex 135A (informative) 50 Gb\/s and 100 Gb\/s PMA sublayer partitioning examples 135A.1 Partitioning examples of 50GBASE-R PHYs <\/td>\n<\/tr>\n | ||||||
| 6908<\/td>\n | 135A.2 Partitioning examples of 100GBASE-P PHYs <\/td>\n<\/tr>\n | ||||||
| 6909<\/td>\n | 135A.3 Partitioning examples of 100GAUI-n with Inverse RS-FEC 135A.3.1 100GAUI-n with Inverse RS-FEC <\/td>\n<\/tr>\n | ||||||
| 6910<\/td>\n | 135A.3.2 CAUI-4 chip-to-chip and 100GAUI-n chip-to-module with Inverse RS-FEC <\/td>\n<\/tr>\n | ||||||
| 6911<\/td>\n | Annex 135B (normative) Chip-to-Chip 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2C) 135B.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6912<\/td>\n | 135B.2 LAUI-2 C2C compliance point definition 135B.3 LAUI-2 C2C electrical characteristics 135B.3.1 LAUI-2 C2C transmitter characteristics <\/td>\n<\/tr>\n | ||||||
| 6913<\/td>\n | 135B.3.2 LAUI-2 C2C receiver characteristics 135B.4 LAUI-2 C2C channel characteristics <\/td>\n<\/tr>\n | ||||||
| 6914<\/td>\n | 135B.5 Protocol implementation conformance statement (PICS) proforma for Annex 135B, Chip-to-Chip 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2C) 135B.5.1 Introduction 135B.5.2 Identification 135B.5.2.1 Implementation identification 135B.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6915<\/td>\n | 135B.5.3 Major capabilities\/options 135B.5.4 PICS proforma tables for chip-to-chip 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2C) 135B.5.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6916<\/td>\n | 135B.5.4.2 Receiver 135B.5.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6917<\/td>\n | Annex 135C (normative) Chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2M) 135C.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6918<\/td>\n | 135C.1.1 Bit error ratio 135C.2 LAUI-2 C2M compliance point definitions 135C.3 LAUI-2 C2M electrical characteristics 135C.3.1 LAUI-2 C2M host output characteristics 135C.3.2 LAUI-2 C2M module output characteristics <\/td>\n<\/tr>\n | ||||||
| 6919<\/td>\n | 135C.3.3 LAUI-2 C2M host input characteristics 135C.3.4 LAUI-2 C2M module input characteristics 135C.4 LAUI-2 C2M measurement methodology <\/td>\n<\/tr>\n | ||||||
| 6920<\/td>\n | 135C.5 Protocol implementation conformance statement (PICS) proforma for Annex 135C, Chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2M) 135C.5.1 Introduction 135C.5.2 Identification 135C.5.2.1 Implementation identification 135C.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6921<\/td>\n | 135C.5.3 Major capabilities\/options 135C.5.4 PICS proforma tables for chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (LAUI-2 C2M) 135C.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6922<\/td>\n | 135C.5.4.2 Module output 135C.5.4.3 Host input 135C.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6923<\/td>\n | Annex 135D (normative) Chip-to-chip 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2C) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2C) 135D.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6925<\/td>\n | 135D.2 50GAUI-2 C2C and 100GAUI-4 C2C compliance point definition 135D.3 50GAUI-2 C2C and 100GAUI-4 C2C electrical characteristics 135D.3.1 50GAUI-2 C2C and 100GAUI-4 C2C transmitter characteristics 135D.3.2 50GAUI-2 C2C and 100GAUI-4 C2C receiver characteristics 135D.4 50GAUI-2 C2C and 100GAUI-4 C2C channel characteristics <\/td>\n<\/tr>\n | ||||||
| 6926<\/td>\n | 135D.5 Protocol implementation conformance statement (PICS) proforma for Annex 135D, Chip-to-chip 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2C) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2C) 135D.5.1 Introduction 135D.5.2 Identification 135D.5.2.1 Implementation identification 135D.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6927<\/td>\n | 135D.5.3 Major capabilities\/options 135D.5.4 PICS proforma tables for chip-to-chip 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2C) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2C) 135D.5.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6928<\/td>\n | 135D.5.4.2 Receiver 135D.5.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6929<\/td>\n | Annex 135E (normative) Chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2M) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2M) 135E.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6931<\/td>\n | 135E.1.1 Bit error ratio 135E.2 50GAUI-2 C2M and 100GAUI-4 C2M compliance point definitions 135E.3 50GAUI-2 C2M and 100GAUI-4 C2M electrical characteristics 135E.3.1 50GAUI-2 C2M and 100GAUI-4 C2M host output characteristics 135E.3.2 50GAUI-2 C2M and 100GAUI-4 C2M module output characteristics 135E.3.3 50GAUI-2 C2M and 100GAUI-4 C2M host input characteristics 135E.3.4 50GAUI-2 C2M and 100GAUI-4 C2M module input characteristics 135E.4 50GAUI-2 C2M and 100GAUI-4 C2M measurement methodology <\/td>\n<\/tr>\n | ||||||
| 6932<\/td>\n | 135E.5 Protocol implementation conformance statement (PICS) proforma for Annex 135E, Chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2M) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2M) 135E.5.1 Introduction 135E.5.2 Identification 135E.5.2.1 Implementation identification 135E.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6933<\/td>\n | 135E.5.3 Major capabilities\/options 135E.5.4 PICS proforma tables for chip-to-module 50 Gb\/s two-lane Attachment Unit Interface (50GAUI-2 C2M) and 100 Gb\/s four-lane Attachment Unit Interface (100GAUI-4 C2M) 135E.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6934<\/td>\n | 135E.5.4.2 Module output <\/td>\n<\/tr>\n | ||||||
| 6935<\/td>\n | 135E.5.4.3 Host input 135E.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6936<\/td>\n | Annex 135F (normative) Chip-to-chip 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2C) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2C) 135F.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6938<\/td>\n | 135F.2 50GAUI-1 C2C and 100GAUI-2 C2C compliance point definition 135F.3 50GAUI-1 C2C and 100GAUI-2 C2C electrical characteristics 135F.3.1 50GAUI-1 C2C and 100GAUI-2 C2C transmitter characteristics 135F.3.2 50GAUI-1 C2C and 100GAUI-2 C2C receiver characteristics 135F.3.2.1 Transmitter precoder request (optional) <\/td>\n<\/tr>\n | ||||||
| 6939<\/td>\n | 135F.4 50GAUI-1 C2C and 100GAUI-2 C2C channel characteristics 135F.5 Example usage of the optional transmitter precoder request 135F.5.1 Overview 135F.5.2 Configuring precoder setting in the transmit direction <\/td>\n<\/tr>\n | ||||||
| 6940<\/td>\n | 135F.5.3 Configuring precoder setting in the receive direction <\/td>\n<\/tr>\n | ||||||
| 6941<\/td>\n | 135F.6 Protocol implementation conformance statement (PICS) proforma for Annex 135F, Chip-to-chip 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2C) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2C) 135F.6.1 Introduction 135F.6.2 Identification 135F.6.2.1 Implementation identification 135F.6.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6942<\/td>\n | 135F.6.3 Major capabilities\/options 135F.6.4 PICS proforma tables for chip-to-chip 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2C) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2C) 135F.6.4.1 Transmitter <\/td>\n<\/tr>\n | ||||||
| 6943<\/td>\n | 135F.6.4.2 Receiver 135F.6.4.3 Channel <\/td>\n<\/tr>\n | ||||||
| 6944<\/td>\n | Annex 135G (normative) Chip-to-module 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2M) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2M) 135G.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6946<\/td>\n | 135G.1.1 Bit error ratio 135G.2 50GAUI-1 C2M and 100GAUI-2 C2M compliance point definitions 135G.3 50GAUI-1 C2M and 100GAUI-2 C2M electrical characteristics 135G.3.1 50GAUI-1 C2M and 100GAUI-2 C2M host output characteristics 135G.3.2 50GAUI-1 C2M and 100GAUI-2 C2M module output characteristics 135G.3.3 50GAUI-1 C2M and 100GAUI-2 C2M host input characteristics 135G.3.4 50GAUI-1 C2M and 100GAUI-2 C2M module input characteristics 135G.4 50GAUI-1 C2M and 100GAUI-2 C2M measurement methodology <\/td>\n<\/tr>\n | ||||||
| 6947<\/td>\n | 135G.5 Protocol implementation conformance statement (PICS) proforma for Annex 135G, Chip-to-module 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2M) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2M) 135G.5.1 Introduction 135G.5.2 Identification 135G.5.2.1 Implementation identification 135G.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6948<\/td>\n | 135G.5.3 Major capabilities\/options 135G.5.4 PICS proforma tables for chip-to-module 50 Gb\/s one-lane Attachment Unit Interface (50GAUI-1 C2M) and 100 Gb\/s two-lane Attachment Unit Interface (100GAUI-2 C2M) 135G.5.4.1 Host output <\/td>\n<\/tr>\n | ||||||
| 6949<\/td>\n | 135G.5.4.2 Module output <\/td>\n<\/tr>\n | ||||||
| 6950<\/td>\n | 135G.5.4.3 Host input 135G.5.4.4 Module input <\/td>\n<\/tr>\n | ||||||
| 6951<\/td>\n | Annex 136A (informative) TP0 and TP5 test point parameters and channel characteristics for 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136A.1 Overview 136A.2 Transmitter characteristics at TP0 136A.3 Receiver characteristics at TP5 136A.4 Transmitter and receiver differential printed circuit board trace loss 136A.5 Channel insertion loss <\/td>\n<\/tr>\n | ||||||
| 6953<\/td>\n | 136A.6 Channel effective return loss 136A.7 Channel Operating Margin (COM) <\/td>\n<\/tr>\n | ||||||
| 6954<\/td>\n | Annex 136B (normative) Test fixtures for 50GBASE-CR, 100GBASE-CR2, 200GBASE-CR4, 50GAUI-1 C2M, and 100GAUI-2 C2M 136B.1 Test fixtures 136B.1.1 Mated test fixtures 136B.1.1.1 Mated test fixtures differential insertion loss <\/td>\n<\/tr>\n | ||||||
| 6955<\/td>\n | 136B.1.1.2 Mated test fixtures differential return loss 136B.1.1.3 Mated test fixtures common-mode conversion insertion loss 136B.1.1.4 Mated test fixtures common-mode return loss 136B.1.1.5 Mated test fixtures common-mode to differential mode return loss 136B.1.1.6 Mated test fixtures integrated crosstalk noise <\/td>\n<\/tr>\n | ||||||
| 6957<\/td>\n | 136B.2 Protocol implementation conformance statement (PICS) proforma for Annex 136B, Test fixtures for 50GBASE-CR, 100GBASE-CR2, 200GBASE-CR4, 50GAUI-1 C2M, and 100GAUI-2 C2M 136B.2.1 Introduction 136B.2.2 Identification 136B.2.2.1 Implementation identification 136B.2.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6958<\/td>\n | 136B.2.3 Major capabilities\/options 136B.2.4 PICS proforma tables for test fixtures for 50GBASE-CR, 100GBASE-CR2, 200GBASE-CR4, 50GAUI-1 C2M, and 100GAUI-2 C2M <\/td>\n<\/tr>\n | ||||||
| 6959<\/td>\n | Annex 136C (normative) MDIs for 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136C.1 Overview <\/td>\n<\/tr>\n | ||||||
| 6962<\/td>\n | 136C.2 MDI connector types 136C.2.1 SFP28 <\/td>\n<\/tr>\n | ||||||
| 6963<\/td>\n | 136C.2.2 QSFP28 136C.2.3 MicroQSFP <\/td>\n<\/tr>\n | ||||||
| 6964<\/td>\n | 136C.2.4 QSFP-DD <\/td>\n<\/tr>\n | ||||||
| 6965<\/td>\n | 136C.2.5 OSFP <\/td>\n<\/tr>\n | ||||||
| 6966<\/td>\n | 136C.3 Protocol implementation conformance statement (PICS) proforma for Annex 136C, MDIs for 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136C.3.1 Introduction 136C.3.2 Identification 136C.3.2.1 Implementation identification 136C.3.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 6967<\/td>\n | 136C.3.3 Major capabilities\/options 136C.3.4 PICS proforma tables for MDIs for 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136C.3.4.1 Contact Mapping <\/td>\n<\/tr>\n | ||||||
| 6968<\/td>\n | Annex 136D (informative) Host and cable assembly form factors for 50GBASE-CR, 100GBASE-CR2, and 200GBASE-CR4 136D.1 Overview 136D.2 Host form factors 136D.2.1 SFP28 host form factor 136D.2.2 QSFP28 host form factor <\/td>\n<\/tr>\n | ||||||
| 6969<\/td>\n | 136D.2.3 microQSFP host form factor 136D.2.4 QSFP-DD host form factor 136D.2.5 OSFP host form factor <\/td>\n<\/tr>\n | ||||||
| 6970<\/td>\n | 136D.3 Cable assembly form factors 136D.3.1 One-plug to one-plug cable assembly form factor <\/td>\n<\/tr>\n | ||||||
| 6971<\/td>\n | 136D.3.2 One-plug to two-plug cable assembly form factor <\/td>\n<\/tr>\n | ||||||
| 6972<\/td>\n | 136D.3.3 One-plug to four-plug cable assembly form factor <\/td>\n<\/tr>\n | ||||||
| 6973<\/td>\n | 136D.3.4 One-plug to eight-plug cable assembly form factor <\/td>\n<\/tr>\n | ||||||
| 6974<\/td>\n | Annex 142A (informative) Encoding example for QC-LDPC(16952,14392) FEC and interleaving 142A.1 Example of initial control seed sequence 142A.2 QC-LDPC FEC encoder test vectors <\/td>\n<\/tr>\n | ||||||
| 6982<\/td>\n | Annex 145A (informative) Resistance and current unbalance 145A.1 Intra pair resistance unbalance 145A.2 Pair-to-pair unbalance overview <\/td>\n<\/tr>\n | ||||||
| 6984<\/td>\n | 145A.3 Pair-to-pair link section resistance unbalance requirements for 4-pair operation 145A.4 PSE resistance and current unbalance <\/td>\n<\/tr>\n | ||||||
| 6985<\/td>\n | 145A.4.1 Direct RPSE measurement <\/td>\n<\/tr>\n | ||||||
| 6986<\/td>\n | 145A.5 PD resistance and current unbalance <\/td>\n<\/tr>\n | ||||||
| 6987<\/td>\n | Annex 145B (informative) Timing diagrams 145B.1 CC_DET_SEQ timing diagrams 145B.1.1 CC_DET_SEQ=0 timing diagrams <\/td>\n<\/tr>\n | ||||||
| 6988<\/td>\n | 145B.1.2 CC_DET_SEQ=1 timing diagrams <\/td>\n<\/tr>\n | ||||||
| 6989<\/td>\n | 145B.1.3 CC_DET_SEQ=2 timing diagrams <\/td>\n<\/tr>\n | ||||||
| 6990<\/td>\n | 145B.1.4 CC_DET_SEQ=3 timing diagrams <\/td>\n<\/tr>\n | ||||||
| 6991<\/td>\n | 145B.2 PSE Single-Event Physical Layer classification timing diagram 145B.3 PSE Multiple-Event Physical Layer classification timing diagram <\/td>\n<\/tr>\n | ||||||
| 6993<\/td>\n | Annex 145C (informative) Power system and parameters 145C.1 Constant power <\/td>\n<\/tr>\n | ||||||
| 6995<\/td>\n | 145C.2 Current <\/td>\n<\/tr>\n | ||||||
| 6996<\/td>\n | 145C.3 Direct current resistance (DCR) <\/td>\n<\/tr>\n | ||||||
| 6997<\/td>\n | 145C.4 Bundled cabling applications <\/td>\n<\/tr>\n | ||||||
| 6998<\/td>\n | Annex 146A (informative) Guidelines for implementation of the 10BASE-T1L PHY in an intrinsically safe application <\/td>\n<\/tr>\n | ||||||
| 7001<\/td>\n | Annex 146B (informative) Optional power distribution 146B.1 Overview 146B.2 Point-to-point powering topologies <\/td>\n<\/tr>\n | ||||||
| 7002<\/td>\n | 146B.3 Powered trunk cable topologies <\/td>\n<\/tr>\n | ||||||
| 7003<\/td>\n | Annex 149A (normative) Coupling and screening attenuation test methodology 149A.1 Introduction 149A.2 General test conditions 149A.3 Reference cable assembly <\/td>\n<\/tr>\n | ||||||
| 7004<\/td>\n | 149A.4 Measurement setup <\/td>\n<\/tr>\n | ||||||
| 7006<\/td>\n | 149A.5 Protocol implementation conformance statement (PICS) proforma for Annex 149A, Coupling and screening attenuation test methodology 149A.5.1 Introduction 149A.5.2 Identification 149A.5.2.1 Implementation identification 149A.5.2.2 Protocol summary <\/td>\n<\/tr>\n | ||||||
| 7007<\/td>\n | 149A.5.3 Major capabilities\/options 149A.5.4 PICS proforma tables for Coupling and screening attenuation test methodology <\/td>\n<\/tr>\n | ||||||
| 7009<\/td>\n | Annex 149B (informative) OAM status 149B.1 Purpose 149B.2 MultiGBASE-T1 OAM status structure 149B.3 MultiGBASE-T1 status message data <\/td>\n<\/tr>\n | ||||||
| 7010<\/td>\n | 149B.3.1 MultiGBASE-T1 status valid 149B.3.2 Power supply warning 149B.3.3 Internal temperature warning 149B.3.4 No MAC messages warning 149B.3.5 Degraded link segment 149B.3.6 Polarity inversion <\/td>\n<\/tr>\n | ||||||
| 7011<\/td>\n | 149B.3.7 Vendor-specific field 149B.3.8 Clear REC 149B.3.9 REC cleared 149B.3.10 Receive error counter (REC) 149B.4 Detailed functions and state diagrams 149B.4.1 State diagram conventions 149B.4.2 State diagram parameters 149B.4.2.1 Variables <\/td>\n<\/tr>\n | ||||||
| 7012<\/td>\n | 149B.4.2.2 Counters 149B.4.2.3 Messages <\/td>\n<\/tr>\n | ||||||
| 7013<\/td>\n | 149B.4.2.4 State diagrams <\/td>\n<\/tr>\n | ||||||
| 7014<\/td>\n | Annex 149C (informative) Tx Function to Rx function channel characteristics 149C.1 Overview 149C.2 Differential printed circuit board trace loss <\/td>\n<\/tr>\n | ||||||
| 7015<\/td>\n | 149C.3 Channel insertion loss 149C.4 Channel return loss 149C.4.1 Tx\/Rx function to MDI return loss <\/td>\n<\/tr>\n | ||||||
| 7017<\/td>\n | 149C.4.2 Link segment return loss <\/td>\n<\/tr>\n | ||||||
| 7018<\/td>\n | 149C.4.3 Channel return loss concatenation 149C.5 Coupling between ports on multiport designs <\/td>\n<\/tr>\n | ||||||
| 7019<\/td>\n | Annex 154A (informative) Examples of 100GBASE-ZR compliant DWDM black links 154A.1 Introduction <\/td>\n<\/tr>\n | ||||||
| 7020<\/td>\n | 154A.2 Relationship between OSNR and average optical power <\/td>\n<\/tr>\n | ||||||
| 7021<\/td>\n | 154A.3 Examples of DWDM black link applications with OSNR at TP3 between 19.5 dB (12.5 GHz) and 35 dB (12.5 GHz) <\/td>\n<\/tr>\n | ||||||
| 7022<\/td>\n | 154A.4 Example of DWDM black link applications with OSNR at TP3 greater than or equal to 35 dB (12.5 GHz) <\/td>\n<\/tr>\n | ||||||
| 7025<\/td>\n | Back Cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":" IEEE Standard for Ethernet<\/b><\/p>\n |