{"id":453287,"date":"2024-10-20T09:29:31","date_gmt":"2024-10-20T09:29:31","guid":{"rendered":"https:\/\/pdfstandards.shop\/product\/uncategorized\/ieee-802-3cy-2023-5\/"},"modified":"2024-10-26T17:36:55","modified_gmt":"2024-10-26T17:36:55","slug":"ieee-802-3cy-2023-5","status":"publish","type":"product","link":"https:\/\/pdfstandards.shop\/product\/publishers\/ieee\/ieee-802-3cy-2023-5\/","title":{"rendered":"IEEE 802.3cy-2023"},"content":{"rendered":"

Amendment Standard – Active. This amendment to IEEE Std 802.3-2022 adds physical layer specifications and management parameters for 25 Gb\/s operation on a single balanced pair of conductors suitable for automotive applications.<\/p>\n

PDF Catalog<\/h4>\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n\n
PDF Pages<\/th>\nPDF Title<\/th>\n<\/tr>\n
1<\/td>\nFront Cover <\/td>\n<\/tr>\n
4<\/td>\nImportant Notices and Disclaimers Concerning IEEE Standards Documents <\/td>\n<\/tr>\n
8<\/td>\nParticipants <\/td>\n<\/tr>\n
11<\/td>\nIntroduction <\/td>\n<\/tr>\n
14<\/td>\nContents <\/td>\n<\/tr>\n
22<\/td>\n1. Introduction
1.4 Definitions <\/td>\n<\/tr>\n
23<\/td>\n30. Management
30.3 Layer management for DTEs
30.3.2 PHY device managed object class
30.3.2.1 PHY device attributes
30.3.2.1.2 aPhyType
30.3.2.1.3 aPhyTypeList
30.5 Layer management for medium attachment units (MAUs)
30.5.1 MAU managed object class
30.5.1.1 MAU attributes
30.5.1.1.2 aMAUType
30.6 Management for link Auto-Negotiation
30.6.1 Auto-Negotiation managed object class
30.6.1.1 Auto-Negotiation attributes
30.6.1.1.5 aAutoNegLocalTechnologyAbility <\/td>\n<\/tr>\n
24<\/td>\n45. Management Data Input\/Output (MDIO) Interface
45.2 MDIO Interface registers
45.2.1 PMA\/PMD registers
45.2.1.7 PMA\/PMD status 2 register (Register 1.8)
45.2.1.7.4 Transmit fault (1.8.11)
45.2.1.7.5 Receive fault (1.8.10) <\/td>\n<\/tr>\n
25<\/td>\n45.2.1.16 BASE-T1 PMA\/PMD extended ability register (1.18)
45.2.1.16.a 25GBASE-T1 ability (1.18.7)
45.2.1.214 BASE-T1 PMA\/PMD control register (Register 1.2100) <\/td>\n<\/tr>\n
26<\/td>\n45.2.1.214.2 Type selection (1.2100.3:0)
45.2.1.244 MultiGBASE-T1 training register (1.2311)
45.2.1.244.1 Interleave request (1.2311.12:11) <\/td>\n<\/tr>\n
27<\/td>\n45.2.1.245 MultiGBASE-T1 link partner training register (1.2312)
45.2.1.245.1 Link partner interleave request (1.2312.12:11)
45.2.1.246 MultiGBASE-T1 test mode control register (1.2313)
45.2.1.246.1 Test mode control (1.2313.15:13)
45.2.1.246.2 Local transmitter precoder override (1.2313.11) <\/td>\n<\/tr>\n
28<\/td>\n45.2.1.246.3 Local transmit precoder setting (1.2313.10:9)
45.2.1.246.4 Jitter test control (1.2313.1:0)
45.2.3 PCS Registers
45.2.3.87 MultiGBASE-T1 PCS status 2 register (Register 3.2324)
45.2.3.87.2 PCS high RFER (3.2324.9) <\/td>\n<\/tr>\n
29<\/td>\n78. Energy-Efficient Ethernet (EEE)
78.1 Overview
78.1.4 PHY types optionally supporting EEE
78.2 LPI mode timing parameters description
78.3 Capabilities Negotiation <\/td>\n<\/tr>\n
30<\/td>\n78.5 Communication link access latency <\/td>\n<\/tr>\n
32<\/td>\n98. Auto-Negotiation for single differential-pair media
98.5 Detailed functions and state diagrams
98.5.1 State diagram variables <\/td>\n<\/tr>\n
33<\/td>\n104. Power over Data Lines (PoDL) of Single-Pair Ethernet
104.1 Overview
104.1.3 PoDL system types <\/td>\n<\/tr>\n
34<\/td>\n105. Introduction to 25 Gb\/s networks
105.1 Overview
105.1.2 Relationship of 25 Gigabit Ethernet to the ISO OSI reference model
105.1.3 Nomenclature <\/td>\n<\/tr>\n
35<\/td>\n105.2 Physical Layer signaling systems <\/td>\n<\/tr>\n
36<\/td>\n105.3 Summary of 25 Gigabit Ethernet sublayers
105.3.2 Physical Coding Sublayer (PCS)
105.3.4 Physical Medium Attachment (PMA) sublayer
105.3.6 Auto-Negotiation (AN)
105.5 Delay constraints <\/td>\n<\/tr>\n
37<\/td>\n105.7 Protocol implementation conformance statement (PICS) proforma <\/td>\n<\/tr>\n
38<\/td>\n149. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 2.5GBASE-T1, 5GBASE-T1, and 10GBASE-T1
149.3 Physical Coding Sublayer (PCS) functions
149.3.7 Detailed functions and state diagrams
149.3.7.2 State diagram parameters
149.3.7.2.2 Variables <\/td>\n<\/tr>\n
39<\/td>\n165. Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1
165.1 Overview
165.1.1 Nomenclature
165.1.2 Relationship of 25GBASE-T1 to other standards <\/td>\n<\/tr>\n
40<\/td>\n165.1.3 Operation of 25GBASE-T1 <\/td>\n<\/tr>\n
41<\/td>\n165.1.3.1 Physical Coding Sublayer (PCS) <\/td>\n<\/tr>\n
43<\/td>\n165.1.3.2 Physical Medium Attachment (PMA) sublayer
165.1.3.3 EEE Capability
165.1.3.4 Link Synchronization <\/td>\n<\/tr>\n
44<\/td>\n165.1.4 Signaling
165.1.5 Interfaces
165.1.6 Conventions in this clause
165.2 25GBASE-T1 service primitives and interfaces <\/td>\n<\/tr>\n
45<\/td>\n165.2.1 Technology Dependent Interface
165.2.1.1 PMA_LINK.request
165.2.1.1.1 Semantics of the primitive
165.2.1.1.2 When generated
165.2.1.1.3 Effect of receipt
165.2.1.2 PMA_LINK.indication
165.2.1.2.1 Semantics of the primitive <\/td>\n<\/tr>\n
46<\/td>\n165.2.1.2.2 When generated
165.2.1.2.3 Effect of receipt
165.2.2 PMA service interface
165.2.2.1 PMA_TXMODE.indication
165.2.2.1.1 Semantics of the primitive <\/td>\n<\/tr>\n
47<\/td>\n165.2.2.1.2 When generated
165.2.2.1.3 Effect of receipt <\/td>\n<\/tr>\n
48<\/td>\n165.2.2.2 PMA_CONFIG.indication
165.2.2.2.1 Semantics of the primitive
165.2.2.2.2 When generated
165.2.2.2.3 Effect of receipt
165.2.2.3 PMA_UNITDATA.request
165.2.2.3.1 Semantics of the primitive
165.2.2.3.2 When generated <\/td>\n<\/tr>\n
49<\/td>\n165.2.2.3.3 Effect of receipt
165.2.2.4 PMA_UNITDATA.indication
165.2.2.4.1 Semantics of the primitive
165.2.2.4.2 When generated
165.2.2.4.3 Effect of receipt
165.2.2.5 PMA_SCRSTATUS.request
165.2.2.5.1 Semantics of the primitive
165.2.2.5.2 When generated
165.2.2.5.3 Effect of receipt <\/td>\n<\/tr>\n
50<\/td>\n165.2.2.6 PMA_PCSSTATUS.request
165.2.2.6.1 Semantics of the primitive
165.2.2.6.2 When generated
165.2.2.6.3 Effect of receipt
165.2.2.7 PMA_RXSTATUS.indication
165.2.2.7.1 Semantics of the primitive
165.2.2.7.2 When generated
165.2.2.7.3 Effect of receipt <\/td>\n<\/tr>\n
51<\/td>\n165.2.2.8 PMA_REMRXSTATUS.request
165.2.2.8.1 Semantics of the primitive
165.2.2.8.2 When generated
165.2.2.8.3 Effect of receipt
165.2.2.9 PMA_PCSDATAMODE.indication
165.2.2.9.1 Semantics of the primitive
165.2.2.9.2 When generated
165.2.2.9.3 Effect of receipt <\/td>\n<\/tr>\n
52<\/td>\n165.2.2.10 PMA_PCS_RX_LPI_STATUS.request
165.2.2.10.1 Semantics of the primitive
165.2.2.10.2 When generated
165.2.2.10.3 Effect of receipt
165.2.2.11 PMA_PCS_TX_LPI_STATUS.request
165.2.2.11.1 Semantics of the primitive
165.2.2.11.2 When generated
165.2.2.11.3 Effect of receipt
165.2.2.12 PMA_ALERTDETECT.indication <\/td>\n<\/tr>\n
53<\/td>\n165.2.2.12.1 Semantics of the primitive
165.2.2.12.2 When generated
165.2.2.12.3 Effect of receipt
165.3 Physical Coding Sublayer (PCS) functions
165.3.1 PCS service interface (25GMII)
165.3.2 PCS functions <\/td>\n<\/tr>\n
55<\/td>\n165.3.2.1 PCS Reset function
165.3.2.2 PCS Transmit function <\/td>\n<\/tr>\n
57<\/td>\n165.3.2.2.1 Use of blocks
165.3.2.2.2 65B RS-FEC transmission code <\/td>\n<\/tr>\n
58<\/td>\n165.3.2.2.3 Notation conventions <\/td>\n<\/tr>\n
59<\/td>\n165.3.2.2.4 Block structure
165.3.2.2.5 Control codes <\/td>\n<\/tr>\n
60<\/td>\n165.3.2.2.6 Ordered sets
165.3.2.2.7 Idle (\/I\/)
165.3.2.2.8 LPI (\/LI\/)
165.3.2.2.9 Start (\/S\/)
165.3.2.2.10 Terminate (\/T\/)
165.3.2.2.11 Ordered set (\/O\/)
165.3.2.2.12 Error (\/E\/)
165.3.2.2.13 Transmit process
165.3.2.2.14 RS-FEC framing and RS-FEC encoder <\/td>\n<\/tr>\n
61<\/td>\n165.3.2.2.15 RS-FEC superframe and round-robin interleaving
165.3.2.2.16 RS-FEC recombine <\/td>\n<\/tr>\n
62<\/td>\n165.3.2.2.17 Reed-Solomon encoder <\/td>\n<\/tr>\n
63<\/td>\n165.3.2.2.18 PCS scrambler <\/td>\n<\/tr>\n
64<\/td>\n165.3.2.2.19 Gray mapping for PAM4 encoding
165.3.2.2.20 Selectable precoder
165.3.2.2.21 PAM4 encoding
165.3.2.2.22 EEE capability <\/td>\n<\/tr>\n
65<\/td>\n165.3.2.3 PCS Receive function <\/td>\n<\/tr>\n
66<\/td>\n165.3.2.3.1 Frame and block synchronization
165.3.2.3.2 PCS descrambler
165.3.2.3.3 Invalid blocks
165.3.3 Test-pattern generators <\/td>\n<\/tr>\n
67<\/td>\n165.3.4 Side-stream scrambler polynomials
165.3.5 PMA training frame
165.3.5.1 Generation of symbol Tn
165.3.5.2 PMA training mode descrambler polynomials
165.3.6 LPI signaling <\/td>\n<\/tr>\n
69<\/td>\n165.3.6.1 LPI synchronization <\/td>\n<\/tr>\n
70<\/td>\n165.3.6.2 Quiet period signaling
165.3.6.3 Refresh period signaling
165.3.7 Detailed functions and state diagrams
165.3.7.1 State diagram conventions
165.3.7.2 State diagram parameters
165.3.7.2.1 Constants
165.3.7.2.2 Variables <\/td>\n<\/tr>\n
71<\/td>\n165.3.7.2.3 Timers
165.3.7.2.4 Functions
165.3.7.2.5 Counters
165.3.7.2.6 Messages
165.3.7.3 State diagrams <\/td>\n<\/tr>\n
74<\/td>\n165.3.8 PCS management
165.3.9 25GBASE-T1 operations, administration, and maintenance (OAM)
165.3.9.1 Definitions
165.3.9.2 Functional specifications
165.3.9.2.1 25GBASE-T1 OAM frame structure <\/td>\n<\/tr>\n
75<\/td>\n165.3.9.3 State diagram variable to OAM register mapping
165.3.9.4 Detailed functions and state diagrams
165.3.9.4.1 State diagram conventions
165.3.9.4.2 State diagram parameters
165.3.9.4.3 Variables <\/td>\n<\/tr>\n
76<\/td>\n165.3.9.4.4 Counters
165.3.9.4.5 Functions
165.3.9.4.6 State diagrams
165.4 Physical Medium Attachment (PMA) sublayer
165.4.1 PMA functional specifications
165.4.2 PMA functions <\/td>\n<\/tr>\n
77<\/td>\n165.4.2.1 PMA Reset function <\/td>\n<\/tr>\n
78<\/td>\n165.4.2.2 PMA Transmit function
165.4.2.2.1 Global PMA transmit disable
165.4.2.3 PMA Receive function <\/td>\n<\/tr>\n
79<\/td>\n165.4.2.4 PHY Control function
165.4.2.4.1 Infofield notation
165.4.2.4.2 Start of frame delimiter <\/td>\n<\/tr>\n
80<\/td>\n165.4.2.4.3 Partial frame count (PFC24)
165.4.2.4.4 Message Field <\/td>\n<\/tr>\n
81<\/td>\n165.4.2.4.5 PHY capability bits
165.4.2.4.6 Data switch partial frame count
165.4.2.4.7 Reserved fields <\/td>\n<\/tr>\n
82<\/td>\n165.4.2.4.8 CRC16
165.4.2.4.9 PMA MDIO function mapping
165.4.2.4.10 Startup sequence <\/td>\n<\/tr>\n
83<\/td>\n165.4.2.5 Link Monitor function
165.4.2.6 PHY Link Synchronization <\/td>\n<\/tr>\n
85<\/td>\n165.4.2.6.1 State diagram variables
165.4.2.6.2 State diagram timers <\/td>\n<\/tr>\n
86<\/td>\n165.4.2.6.3 Messages <\/td>\n<\/tr>\n
87<\/td>\n165.4.2.6.4 State diagrams <\/td>\n<\/tr>\n
88<\/td>\n165.4.2.7 Refresh monitor function
165.4.2.8 Clock Recovery function
165.4.3 MDI
165.4.3.1 MDI signals transmitted by the PHY
165.4.3.2 Signals received at the MDI <\/td>\n<\/tr>\n
89<\/td>\n165.4.4 State variables
165.4.4.1 State diagram variables <\/td>\n<\/tr>\n
90<\/td>\n165.4.4.2 Timers <\/td>\n<\/tr>\n
92<\/td>\n165.4.5 State diagrams <\/td>\n<\/tr>\n
94<\/td>\n165.5 PMA electrical specifications
165.5.1 Test modes <\/td>\n<\/tr>\n
95<\/td>\n165.5.1.1 Test configurations
165.5.2 Test Points <\/td>\n<\/tr>\n
96<\/td>\n165.5.3 Transmitter electrical specifications <\/td>\n<\/tr>\n
97<\/td>\n165.5.3.1 Maximum output droop
165.5.3.2 Transmitter linearity
165.5.3.3 Transmitter timing jitter
165.5.3.3.1 Transmit MDI random jitter in MASTER mode <\/td>\n<\/tr>\n
98<\/td>\n165.5.3.3.2 Transmit MDI deterministic jitter in MASTER mode
165.5.3.4 Transmitter power spectral density (PSD) and power level <\/td>\n<\/tr>\n
99<\/td>\n165.5.3.5 Transmitter peak differential output
165.5.3.6 Transmitter clock frequency
165.5.4 Receiver electrical specifications <\/td>\n<\/tr>\n
100<\/td>\n165.5.4.1 Receiver differential input signals
165.5.4.2 Alien crosstalk noise rejection
165.5.5 Test configurations
165.5.5.1 Host test configuration <\/td>\n<\/tr>\n
101<\/td>\n165.5.5.2 Link segment test configuration <\/td>\n<\/tr>\n
102<\/td>\n165.5.5.3 Mated test configurations
165.5.5.3.1 Insertion loss
165.5.5.3.2 Return loss <\/td>\n<\/tr>\n
103<\/td>\n165.5.5.3.3 Mode Conversion
165.5.5.3.4 Crosstalk
165.6 Management interface
165.6.1 Optional support for Auto-Negotiation <\/td>\n<\/tr>\n
104<\/td>\n165.7 Link segment characteristics
165.7.1 Link transmission parameters
165.7.1.1 Insertion loss <\/td>\n<\/tr>\n
105<\/td>\n165.7.1.2 Differential characteristic impedance
165.7.1.3 Return loss
165.7.1.3.1 25GBASE-T1 link segment return loss <\/td>\n<\/tr>\n
106<\/td>\n165.7.1.3.2 Characteristics of the echo from the link segment
165.7.1.3.3 Residual echo metric (REM)
165.7.1.3.4 Calculating residual echo metric <\/td>\n<\/tr>\n
108<\/td>\n165.7.1.3.5 Limit on residual echo metric
165.7.1.3.6 Echo tail metric (ETM)
165.7.1.3.7 Calculating echo tail metric <\/td>\n<\/tr>\n
110<\/td>\n165.7.1.3.8 Limit on echo tail metric
165.7.1.4 Coupling attenuation <\/td>\n<\/tr>\n
111<\/td>\n165.7.1.5 Screening attenuation
165.7.1.6 Maximum link delay
165.7.2 Coupling parameters between link segments <\/td>\n<\/tr>\n
112<\/td>\n165.7.2.1 Power sum alien near-end crosstalk (PSANEXT)
165.7.2.2 Power sum alien attenuation to crosstalk ratio far-end (PSAACRF) <\/td>\n<\/tr>\n
113<\/td>\n165.8 MDI specification
165.8.1 MDI connectors <\/td>\n<\/tr>\n
114<\/td>\n165.8.2 MDI electrical specification
165.8.2.1 MDI return loss <\/td>\n<\/tr>\n
115<\/td>\n165.8.3 MDI fault tolerance
165.9 Environmental specifications
165.9.1 General safety
165.9.2 Network safety
165.9.2.1 Environmental safety
165.9.2.2 Electromagnetic compatibility
165.10 Delay constraints <\/td>\n<\/tr>\n
117<\/td>\n165.11 Protocol implementation conformance statement (PICS) proforma for Clause 165, Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1
165.11.1 Introduction
165.11.2 Identification
165.11.2.1 Implementation identification
165.11.2.2 Protocol summary <\/td>\n<\/tr>\n
118<\/td>\n165.11.3 Major capabilities\/options
165.11.4 PICS proforma tables for Physical Coding Sublayer (PCS), Physical Medium Attachment (PMA) sublayer, and baseband medium, type 25GBASE-T1
165.11.4.1 General <\/td>\n<\/tr>\n
119<\/td>\n165.11.4.2 Physical Coding Sublayer (PCS)
165.11.4.2.1 PCS Transmit <\/td>\n<\/tr>\n
120<\/td>\n165.11.4.2.2 PCS Receive
165.11.4.2.3 Test-pattern generators <\/td>\n<\/tr>\n
121<\/td>\n165.11.4.2.4 Side-stream scrambler
165.11.4.2.5 LPI signaling
165.11.4.2.6 Functions and state diagrams <\/td>\n<\/tr>\n
122<\/td>\n165.11.4.2.7 PCS loopback <\/td>\n<\/tr>\n
123<\/td>\n165.11.4.2.8 OAM
165.11.4.3 Physical Medium Attachment (PMA)
165.11.4.3.1 PMA Reset function <\/td>\n<\/tr>\n
124<\/td>\n165.11.4.3.2 PMA Transmit function <\/td>\n<\/tr>\n
125<\/td>\n165.11.4.3.3 PMA Receive function
165.11.4.3.4 PHY Control function <\/td>\n<\/tr>\n
126<\/td>\n165.11.4.3.5 Link Monitor function <\/td>\n<\/tr>\n
127<\/td>\n165.11.4.3.6 PHY Link Synchronization
165.11.4.3.7 Refresh monitor function <\/td>\n<\/tr>\n
128<\/td>\n165.11.4.3.8 Clock Recovery function
165.11.4.3.9 MDI
165.11.4.3.10 PMA State variables
165.11.4.4 PMA electrical specifications
165.11.4.4.1 Test modes <\/td>\n<\/tr>\n
129<\/td>\n165.11.4.4.2 Transmitter electrical specifications <\/td>\n<\/tr>\n
130<\/td>\n165.11.4.4.3 Receiver electrical specifications
165.11.4.4.4 Mated test configurations <\/td>\n<\/tr>\n
131<\/td>\n165.11.4.5 Link segment characteristics
165.11.4.6 MDI specifications
165.11.4.7 Delay constraints <\/td>\n<\/tr>\n
132<\/td>\nAnnex 98B (normative) IEEE 802.3 Selector Base Page definition
98B.3 Technology Ability Field bit assignments
98B.4 Priority Resolution <\/td>\n<\/tr>\n
133<\/td>\nAnnex 149B (informative) OAM status
149B.1 Purpose <\/td>\n<\/tr>\n
134<\/td>\nAnnex 165A (informative) Tx function to Rx function channel characteristics
165A.1 Overview
165A.2 TP2 to TP0 and TP3 to TP5 reference insertion loss <\/td>\n<\/tr>\n
135<\/td>\n165A.2.1 Host PCB trace loss
165A.3 TP0 to TP5 channel insertion loss <\/td>\n<\/tr>\n
136<\/td>\n165A.4 Example models for Tx\/Rx function to MDI return loss
165A.5 Coupling between ports on multiport designs <\/td>\n<\/tr>\n
137<\/td>\nBack Cover <\/td>\n<\/tr>\n<\/table>\n","protected":false},"excerpt":{"rendered":"

IEEE Standard for Ethernet Amendment 8: Physical Layer Specifications and Management Parameters for 25 Gb\/s – Electrical Automotive Ethernet (Published)<\/b><\/p>\n\n\n\n\n
Published By<\/td>\nPublication Date<\/td>\nNumber of Pages<\/td>\n<\/tr>\n
IEEE<\/b><\/a><\/td>\n2023<\/td>\n137<\/td>\n<\/tr>\n<\/tbody>\n<\/table>\n","protected":false},"featured_media":453292,"template":"","meta":{"rank_math_lock_modified_date":false,"ep_exclude_from_search":false},"product_cat":[2644],"product_tag":[],"class_list":{"0":"post-453287","1":"product","2":"type-product","3":"status-publish","4":"has-post-thumbnail","6":"product_cat-ieee","8":"first","9":"instock","10":"sold-individually","11":"shipping-taxable","12":"purchasable","13":"product-type-simple"},"_links":{"self":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product\/453287","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product"}],"about":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/types\/product"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media\/453292"}],"wp:attachment":[{"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/media?parent=453287"}],"wp:term":[{"taxonomy":"product_cat","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_cat?post=453287"},{"taxonomy":"product_tag","embeddable":true,"href":"https:\/\/pdfstandards.shop\/wp-json\/wp\/v2\/product_tag?post=453287"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}